Ee-316 -- Circuit Theory Lab

PRACTICAL WORK BOOKFor Academic Session 2009

CIRCUIT THEORY (EE -316)For

T .E (CIS)

Name:Roll Number:Class:Batch:Department :

Department of Electrical EngineeringNED University of Engineering & Technology, Karachi

Circuit Theory CONTENTSNED University of Engineering and Technology Department of Electrical Engineering

CO NT EN TS

Lab.No. Da te d List of Experiments

Pa geNo . Re ma rk s

1 Introduction to different circuit parameters

2 To Verify KCL (Kirchoff’s Current Law)and KVL (Kirchoff’s Voltage Law)

3 Mesh analysis

4 To verify Thevenin’s theorem.

5 Maximum power transfer theorem

6 To study a simple source free RL circuit.

7To study the response of an RC circuitwhen applied with a sudden dc voltagesource

8To study an RLC circuit and determine itsresponse mathematically and graphically

9 To design a full wave Rectifier circuit withand without filter circuit.

10 To design a regulated power supply usingZener Mechanism.

11 To design an Op-Amp in an invertingmode.

12 Analysis of an Op-Amp., as a`Differentiator`.

13 Analysis of an Op-Amp., as an `Integrator`.

14 To observe and determine the ResonantFrequency of a parallel-resonant circuit.

15 To design a circuit showing Bode Plot i.e.Magnitude and phase plot.

Circuit Theory INTRODUCTIONNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 01

Introduction to different circuit parameters

OBJECTIVES1) To investigate the current, voltage and power ratings of resistances.2) To identify whether the power is being absorbed or delivered by each circuit

element using passive sign convention.

APPARATUS Power supply Multimeter Resistors Connecting wires Bread board

THEORY

Every conductor possesses some resistance, which is defined as the opposition to flow ofelectrons. The devices which are specifically made for the purpose are called “Resistors”.Ohm’s law states, “Voltage is directly proportional to the current flowing through acomponent if resistance of that component remains constant”. Now a practical questionarises, can we extend that proportionality to infinity? This experiment answers thequestion and sets certain stress limits to which a component can be exposed. If those areexceeded, either we burn out the component or proper function of the circuit can not beguaranteed.

Mathematically Ohm’s law can be exposed as follows,V = I × R

Thus relating different quantities, if voltage across certain resistor is given we can findcurrent through it and vice versa. Other most important and critical circuit parameter forany resistor is its power rating. Power rating decides safe operating voltages (maximumvoltages) that can be applied across resistor. Relation for power absorbed or delivered byany component is given by the following relation,

P =R

V 2

Watt

Hence, safe operating voltage for any resistor with value R ohms and power rating of PWatts is,

V = PR Volts

Carbon film resistors normally come in 1/8, ¼, ½ m 1, 2 Watt ratings.

Passive sign convention states that “If for any circuit element current enters into apositive terminal then power will be absorbed by the element and its value is positive”.


Figure 1.1

EXERCISE

1. Connect the circuit as shown in Fig.1 and set Vs to zero volts.2. Fill the first two columns of table 1.1 and calculate Vsafe for the circuit.3. Now increase Vs to Vsafe and measure the circuit current and fill corresponding

column of Table 1.1.4. Calculate power being absorbed by the resistor as shown in the last column of

Table 1.1.5. Now place your finger tip at the top of the resistor and slowly increase the

voltage beyond the safe voltage limit. Note down your observations.

Figure 1.2

Observation

Table 1.1

R (Ω) (Nominal)

P(watt)(Nominal)

Vsafe = √(P R)(Volts)

I measured(A)

P = I2R (Watt)(Calculated)


Comments

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6. Connect the circuit as shown in Fig.2.7. Measure I1, I2, I3 and fill in the corresponding column of the Table 1.2.8. Calculate P1, P2, P3, Pt, (P1+ P2 + P3) and fill in the corresponding columns of

Table 1-2. What you conclude from the results?

Figure 1.3

Observation

Table 1.2

I1 I2 I3 It P1 = I12R1 P2 = I2

2R2 P3 = I32R3 Pt = It

2Rt P1 + P2 + P3

Comments

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9. Connect the circuit as shown in Fig.3.10. Measure voltage across each component. While measuring the voltage keep in

mind that voltmeter reads positive value and mark + at the terminal of eachcomponent where red lead of the multi-meter is connected.

11. Measure current through each component. While measuring the current keep in


mind that ampere-meter measures positive value and mark arrow directingfrom red lead to black one.

12. Calculate power delivered or absorbed by each element in the Fig.3. and fillappropriate column of Table 1-3. Use “Passive sign convention” whiletabulating the results.

Figure1.4

Observation

Table 1.3

VoltageSource 1

(W)

VoltageSource 2 (W)

R1(W)

R2(W)

R3(W)

Comments

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Circuit Theory KCL & KVLNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 02

Verifying Kirchhoffs Current & Kirchhoffs Voltage Law.

OBJECTIVETo Verify KCL (Kirchoff’s Current Law) and KVL (Kirchoff’s Voltage Law)


THEORYKCL states that,

The algebraic sum of all the currents entering any node is zero.

KVL states that,

The algebraic sum of all the voltages around any closed path is zero.

EXERCISES

1. For the given circuit verify KCL. First calculate the voltages by KCL. Secondlymeasure the voltages by multimeter. Then compare the voltages obtained bycalculation to the voltages obtained by multimeter.

Figure 2.1


Calculations:

Observation:

V = ________ R1 = ________ R2 = ________ R3 = ________ R4 = ________

Table 2.1

S. No. By Formula By MultimeterV1

V2

Comments

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2. For the given circuit verify KVL. First calculate the currents by KVL. Secondlymeasure the currents by multimeter. Then compare the currents obtained bycalculation to the currents obtained by multimeter.

Figure 2.2


Calculations:

Observation:

V = ________ R1 = ________ R2 = ________ R3 = ________ R4 = ________

Table 2.2

S. No. By Formula By MultimeterI1

I2

Comments

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Circuit Theory MESHNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 03Mesh Analysis

OBJECTIVEUse mesh analysis as a tool to find different loop currents and common branch currents

APPARATUS Power supply and two batteries Multimeter Resistors Connecting wires Bread board

THEORYA closed path of circuit components that does not pass through the same node twice, iscalled a loop. Mesh is a loop which does not have sub-loops. Mesh analysis is used as atool when we require loop currents rather than node voltages as in nodal analysis.Mesh analysis is an extension of Kirchhoff`s Voltage Law (KVL) which states that ‘In aclosed loop, sum of all voltages is zero’.The best network analysis method to use depends not only on the network to be analyzedbut also on the information required. However, it is wise to pick the method that result insmallest set of equation. The set of mesh equations can easily be reduced to the numberof meshes minus the number of current sources if present.

Mesh equations for the circuit of Fig.1 can be written as under,

-V1 + I1R1 + (I1 – I2)R2 + 5 = 0 --- Eq [1]

-V2 + (I2 – I1)R2 +I2R3 + (I2 – I3)R4 = 0 --- Eq [2]

(I3 – I2)R4 + I3R5 – V3 = 0 --- Eq [3]

Figure 3.1


EXERCISE1. Find out the values of given resistances using resistance color coding and fill in

the first row of Table 1.2. Measure the values of the given resistances using multi -meter and fill in the

corresponding columns of Table 1.

Observation

Table3.1

R(Nominal)

Ω Ω Ω Ω Ω

R(Actual)

Ω Ω Ω Ω Ω

Comments

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3. Calculate I1 , I2 and I3 using equations 1, 2 & 3 and fill in correspondingcolumns of Table 2. These are nominal values. Mark proper directions only forpositive current values according to sign and show arrows (← →↑↓). (NOTE: -Do calculations for I1, I2 and I3 in the blank space provided.)

Observation

Table 3.2

IR1(I1)

IR2(I1–I2 / I1 – I2)

IR3(I2)

IR4(I2–I3 / I3 – I2)

IR5(I3)

Nominal(Calculated)

Calculations:


Comments

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4. Connect the circuit as in Fig1.5. Measure the current through the resistors R1, R2, R3, R4 & R5. Make sure the

multi-meter reads positive value and mark arrow from red probe of the multi-meter to black one. Fill the corresponding values in Table 1.3 and mark currentdirections (← →↑↓) as in step 3.

6. Compare Table 1.2 and Table 1.3 , give your comments.7. Verify the mesh equations with measured and nominal values.

Observation

Table 33

IR1 IR2 IR3 IR4 IR5

Measured

Comments

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Circuit Theory THEVENINNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 04Thevenin’s Theorem

OBJECTIVETo verify Thevenin’s theorem.


THEORYThevenin’s theorem can be stated as follows,

Given any linear circuit, rearrange it in the form of two networks A and B connected bytwo wires. Define a voltage as voc as the open circuit voltage which appears across theterminals of A when B is disconnected. Then all currents and voltages in B will remainunchanged if all independent voltage and current sources in A are “killed” or “zeroedout” and an independent voltage source voc is connected, with proper polarity, in serieswith the dead (inactive) A network.

EXERCISE

Verify Thevenin’s theorem by following the directions listed below.

Figure 4.1

Write down the following circuit parameters

V = ________ R1 = ________ R2 = ________ R3 = ________ R4 = ________


RL = ________

1. Construct the given circuit and by multimeter measure the load current IL through theload resistor.

IL = ________

2. Now find the Thevenin’s equivalent of the given circuit, considering RL as NetworkB, and the rest as Network A.

Calculations:

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VTH = ________ RTH = ________

Figure 4.2


3. Now construct the Thevenin’s equivalent according to the results in ‘2’. Connect theload resistor to it and measure the load current again. This should be the sameobtained in ‘1’.IL = ________, equal/ not equal to the value obtained in ‘1’.Thevenin’s theorem verified/ not verified._______________

Circuit Theory POWER THEOREMNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 05

Maximum Power Transfer Theorem

OBJECTIVES

a. To verify by measurement, that maximum power is developed in a load when theload resistance is equal to the internal resistance of the source.

b. To construct a graph, using measured values of voltage, current and load resistanceand calculated power to verify graphically Objective 1 above.

APPARATUS

a. Digital multimeterb. Power Suppliesc. Resistors of various valuesd. Breadboard

THEORY

The maximum power transfer theorem states that when the load resistance is equal to thesource's internal resistance, maximum power will be developed in the load. Since mostlow voltage DC power supplies have a very low internal resistance (10 ohms or less)great difficulty would result in trying to affect this condition under actual laboratoryexperimentation. If one were to connect a low value resistor across the terminals of a 10volt supply, high power ratings would be required, and the resulting current wouldprobably cause the supply's current rating to be exceeded. In this experiment, therefore,the student will simulate a higher internal resistance by purposely connecting a highvalue of resistance in series with the DC voltage supply's terminal. Refer to Figure 11.1below. The terminals (a & b) will be considered as the power supply's output voltageterminals. Use a potentiometer as a variable size of load resistance. For various settingsof the potentiometer representing RL, the load current and load voltage will be measured.The power dissipated by the load resistor can then be calculated. For the condition ofRL = Ri, the student will verify by measurement that maximum power is developed in theload resistor.

Procedure

1. Refer to Figure 5.1, select Rin equal to 1 KΩrepresenting the internal resistance ofthe power supply used and select a 10 KΩpotentiometer as load resistance RL.

a. Using the DMM set the potentiometer to 500 ohms.


b. Connect the circuit of Figure.1. Measure the current through and the voltageacross RL. Record this data in Table 5.1.c. Remove the potentiometer and set it to 1000 ohms. Return it to the circuit andagain measure the current through and the voltage across RL. Record.d. Continue increasing the potentiometer resistance in 500 ohm steps until the value10 k ohms is reached, each time measuring the current and voltage and recording same inTable 1. Be sure the applied voltage remains at the fixed value of 10 volts after eachadjustment in potentiometer resistance.

2. For each value of RL in Table 5.1, calculate the power input to the circuit using theformula:

Pinput = Vinput x IL= 10 x IL,

since Vinput is always a constant 10 volts.

3. For each value of RL in Table 10.1, calculate the power output (the power developedin RL) using the formula:

Pout = VRL x IL.

4.For each value of RL in Table 11.1, calculate the circuit efficiency using the formula:

% efficiency = Pout/P in x 100.

5. On linear graph paper, plot the curve of power output vs. RL. Plot RL on the horizontalaxis (independent variable). Plot power developed in RL on the vertical axis (dependentvariable). Label the point on the curve representing the maximum power.


Table 5.1

RL (Ω) IL (mA) VRL (V) Pinput (mW) Poutput(mW)

% eff.

500

1000

1500

2000

2500

3000

3500

4000

4500

5,000

6,000

7,000

8,000

9,000

10,000

Circuit Theory RL CIRCUITSNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 6

The RL Circuits

OBJECTTo study a simple source free RL circuit.

APPARATUS Power supply Multimeter Resistors Inductor Switch Stop Watch Connecting wires Bread board

THEORYThe complete response of an RL circuit is the sum of the natural and forced response.The source free response may be called as the natural response or free response.

Analyzing a source free RL circuit as shown in the figure, we can write,

Figure 1

Ri +vL = Ri + Ldi/dt = 0

di/dt + Ri/L = 0 --- Eq [1]

Solving the equation [1], which is a differential equation we can obtain the expressionfor i(t),

i(t) = I0 e-Rt/L --- Eq [2]

Now consider the nature of the response in the series RL circuit. We have found that the


inductor current is represented byi(t) = I0 e-Rt/L

At t=0 the current has value I0 but as time increases, the current decreases andapproaches zero. This is a shape of a decaying exponential function. Since the functionwe are plotting is e-Rt/L, the curve will not change if R/L remains unchanged. Thus thesame curve must be obtained for every series RL circuit having the same L/R or R/Lratio.

So we define = L / R --- Eq [3]

Thus ratio L/R has the units of seconds, since the exponent –Rt/L must be dimensionless.This value of time is called the time constant.

An equally important interpretation of the time constant is obtained by determining thevalue of i(t)/I0 at t = we have

i()/I0 = e-1 = 0.3679 or i() = 0.3679I0

Thus in one time constant the response has dropped to 36.8 % of its initial value.

EXERCISE

1. For the given circuit obtain an expression for the current IL through the inductorL. Plot the current expression for time t >= 0(attach graph).

Figure 6.2

Calculations:


2. Now construct the given circuit and get ready to take measurements by themultimeter very alertly. As you switches the source out at time t = 0, note downthe value of current through the inductor at every ‘time constant’. Take at leastfive readings. Now using these readings plot the current through the inductoragain (attach graph) and this should match the plot drawn in ‘1’.

Observation:

L/R

Table 6.1

S. No. t = Sec t = 2Sec t = 3Sec t = 4Sec t = 5SecIL(t)

Circuit Theory RC CIRCUITSNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 7

The RC CircuitsOBJECTIVES

To study the response of an RC circuit when applied with a sudden dc voltage source

APPARATUS Power supply Multimeter Oscilloscope Resistors Capacitors Connecting wires Bread board

THEORY

Driven circuits are defined as, a simple network subjected to a sudden dc source. Asteady state is established in the circuit before application of the source, this steady stateis then over run by the applied source. Therefore with the introduction of the source,circuit is forced to achieve new steady state values.The response before application of the source is called natural response (steady stateresponse). And the response of the circuit after the application of source is called forcedresponse (transient response).Complete response of a circuit is the sum of natural and forced responses.Mathematically given by

vc (t) = vf + vn

vc (t) = vf + Ae-t/ζ

Where vf is forced and vn is natural response.

First of all we calculate steady state values before the switch is thrown to position 2 asshown in fig.13.1. Then we calculate the steady state values when the switch is thrown toposition 2 and the circuit reaches new final values. These two values determine whetherthe transient takes charging or discharging form.

Capacitance voltage vc must be continuous if the current is not infinite. Therefore, forany physical system

vc (t0+) = vc (t0) = vc (t0

-)


Figure 7.1

EXERCISE

1. Connect the circuit as shown in Fig.13.1 with switch at position 1.2. Calculate the capacitor voltage at t = 0- and note down in Table 7.1.3. Make sure the circuit remains at this position for a while so that a steady statevalue is reached for t = 0-.4. Measure the capacitor voltage vc (0-) using multimeter and note down in Table7.1.

Observations

Table 13.1

vc (0-) (Calculated)

vc (0-) (Measured)

5. Now hold a stop watch and then throw the switch to position 2.1. Take voltage readings across the capacitor with 5 sec interval and note down in

Table 13.2.2. Plot a graph of capacitor voltage with respect to time values from Table 13.2 and

give your comments.


Observations

Table 7.2

t( Sec)

0 5 10 15 20 25 30 35 40 45 50

vc (t)

Comments

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Circuit Theory RLC CIRCUITSNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 8

The RLC Circuits

OBJECTIVETo study an RLC circuit and determine its response mathematically and graphically

APPARATUS Power supply Multimeter Oscilloscope Resistors Inductors Capacitors Connecting wires Bread board

THEORYIn this lab session we will be concerned with “Source free RLC circuits “only. Thefollowing table will be helpful in the analysis of all kind of source free RLC circuits.

Table 8.1

Useful RLC Circuits Relations

Overdamped CriticallyDamped Underdamped

v(t) tsts eAeA 2121 )( 21 AtAe

t )sincos( 21 tBtB ddt

e

i(t) ic =dtdv

C

Parallel

RC21

SeriesL

R2

0 LC1

d - 220

s120

2 220 j

s220

2 220 j


EXERCISE

1. Make a parallel RLC circuit as shown and switch on the dc supply. Now notedown the following,

Vs = _______, v = _______, i = ________

RL CiR(t) iC(t)iL(t)

v

i

Figure 8.1

2. Now remove the source from the circuit and note the initial condition,

vc (0+) = vc (0-) = _______,

iL (0+) = iL (0-) = _______,


Figure 8.2

3. Now find v(t), iR(t), iL(t), iC(t) for t > 0, using the table 8.1

Calculations


4. Plot v(t) and iL(t) (attach graphs).

Comments

Write in words the response you observe for the two quantities.

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Circuit Theory FWRNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 09

Full wave Rectifier

Object:To design a “Full wave Rectifier circuit” with a filtered output to result in a waveformcomparable to dc. Also Calculate the “Ripple Factor”.

Apparatus:AC power supply, Resistors, ideal Diodes, Transformer, filter capacitors(1μF, 10μF and 25μF ),connecting wires and breadboard.

Theory:The transformer fed power supplies are used in the rectifier circuits because of their lowresistance at the secondary winding. Center-tapped transformers further simplifies the circuit byeliminating the need of two central resistors.Rectification of alternating current to pulsating direct current is achieved by using two diodeswith a center-tapped transformer or a Bridge arrangement of four diodes. These pulses can beremoved/filtered with the filter circuits using capacitors. The effectiveness of a capacitor as afilter is related to its capacitance. The Larger the capacitance, the more effective it will be insmoothing out pulsating D.C and in keeping a low ripple level.

Procedure:1. Select the required components and devices and make necessary connections according

to the circuit diagram. (Fig. 1)2. ON power switch.3. Set the oscilloscope according to requirement.4. Observe the waveform of Fig. 1 i.e. without filter circuit.5. Measure/record the input voltage at channel A of oscilloscope with respect to ground and

output voltage.6. Observe the waveform of Fig. 2 i.e. with filter circuit.7. Measure/record the output voltage & also calculate the ‘Ripple factor’ by the

difference of the peak charging voltage to the peak discharging voltage.8. Record all your observations according to the observation table.


Circuit diagram.(without filter)


Give the Output Waveforms without Filter and with three different ratings ofCapacitor Filters i.e. 2.2 µF, 4.7 µF & 10 µF


Observation Table:

Vs(volts)

AC

R L Load(Ohms)

FilterCap.(Farads)

Vout(volts)without filter

Vout(volts)with filter

RippleFactor(volts)

V1

500

2k

10 k

V2 2k

2.2- µ f

4.7 - µ f

10 - µ f

Result:

The resultant waveforms suggest that the output which we get after filtering issmoother than the one we get without filtering.

Circuit Theory POWER SUPPLYNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 10

Power Supply

Object:To design a regulated Power Supply using Zener Mechanism.

Apparatus:AC power supply, Resistors, Zener Diode, Rectifier Diodes, Transformer, filter capacitors,connecting wires and bread board

Theory:A regulated power supply is that in which output voltage is maintained within certain pre definedlimits. To regulate a small amount of power the cheapest approach is to use a Zener Diode. TheZener diode has to operate in the breakdown Region to hold the load voltage constant. the Zenerdiode cannot regulate if the load voltage is less than the Zener Voltage.

Vth= RlVs/ Rs + Rl

This is the voltage that exists when the zener diode is disconnected from the circuit... thisvoltage has to be greater than the zener voltage, otherwise the breakdown will not occur.Pd = (Vin –Vz)/ RsVz.

Circuit Diagram:

Procedure:1. Select the required components and devices and make necessary connections

according to circuit diagram.2. Turn ON power switch.3. Set the oscilloscope according to requirement.


4. Observe the waveform of given circuit i.e. with filter and zener diode.5. Measure/record the output voltage & also calculate the ‘Ripple factor’ with the

difference of the peak charging voltage to the peak discharging voltage.5. Record your observations according to the observation table.

Observed waveform :


Observation Table:

Peak charging voltage= ------------------

Peak discharging voltage = ---------------

Ripple factor = ---------------------

Result :The resultant waveforms suggest that the Zener Diode may work well for the regulation ofoutput voltage.

Circuit Theory OPAMNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 11

Operational Amplifier

Object:To design an operational Amplifier with an inverting input to Result the output waveform whichwould be invertedAmplified version of the input waveform

Apparatus:OP-amp (741), Resistors, DVM, Power Supply Unit ( 12V,50Hz sinusoidal, 12V DC and 12V,50Hz rectangular ),4PST Switches, connecting wires and bread board.

Theory:An Op-amp is a high gain amplifier whose response characteristics are externallycontrolled by negative feedback from output to the input. Op-amps can perform mathematicaloperations such as summing, integration and differentiation. Op-amps are also used as video andaudio amplifiers, oscillators in the communication electronics. Op-amp has two inputs marked (-) and (+). The minus input is called inverting input whereas the Plus terminal is called non-inverting.Negative Feed Back Control:The output is fed back to the inverting input terminal in order to provide negative feedback forthe amplifier. As a result, the output will be inverted. It is possible to operate the op-amp as an o n i n v e r t i n g a m p l i f i e r b y a p p l y i n g t h e s i g n a l t o t h e p l u s i n p u tThe usa ge of the dua l pow er sup ply that can set two sup ply val ues (e. g. +10 V and–10V). The convention is to use VCC to denote the positive supply and VEE to denote thenegative supply.

Some important points to note regarding Operational AmplifierPower suppliesNever exceed the specified power supply limits. The most frequently used voltages are:V, ±10V, ±5 V. ±15 V & ±12 V.Input resistanceThe input resistance should be as high as possible (to approach the ideal op-amp model) andmust be at least 10 times larger than the resistance of components immediately connected to theinputs of the Opamp. Otherwise, the finite input resistance of the Op-amp must be taken intoaccount in analysis and design.Output resistanceThe output resistance should be as low as possible (to approach the ideal op-amp model) andmust be at least 10 times smaller than the resistance of the op-amp load at the output. Otherwise,th e fi ni te ou tp ut re si st an ce mu st be ta ke n in to ac co un t in an al ys is an d de si gn .


Open-loop voltage gainThe open-loop voltage gain should be as high as possible (to approach the ideal op-amp model).This gain is usually specified in dB unit and varies as function of frequencies. If a voltage gain isA, the dB value of A is defined by:A(dB) = 20 logAThis equation can be used to convert a gain to dB value or vice versa. For example, a gain A =100 is the same as A (dB) = 40 dB. The specification sheets provide both a typical value as wellas several plots of the voltage gain as function of frequency or other parameters.Note that the “open-loop voltage gain” refers to the op-amp gain by itself. When the op-amp isused in a circuit, the voltage gain of the entire circuit is different than the open-loop op-ampgain, depending on the topology of the circuit.Datasheets sometimes use these phrases to describe open-loop voltage gain: large-signal voltagegain, differential voltage gain, open-loop frequency response, etc.

Circuit Diagram

Exercise: (calculate gain)


Procedure:1. Connect the circuit according to the circuit diagram..2. Place the Oscilloscope channel A at the input and output at channel B.3. Also, place the voltmeter at output4. Now, observe the waveform, measure and record the readings in the observation table

for three different type of inputs.

Observation :

Sr. No. INPUT WAVEFORM OUTPUT WAVEFORM

1

2

3

guest


LAB SESSION 12Op-amp. As Differentiator

Object:An Operational Amplifier with a capacitor in input results in a circuit which performs themathematical operation of Differentiation. Design a differentiator circuit with Square/ sine waveinput.

Apparatus:Resistors, Operational amplifier, Power Supply, Oscilloscope, connecting wires and bread board.

Theory:The operational Amplifier can be used as a Differentiator. A capacitor is placed at the input(inverting) terminal and a resistor is connected at feedback path . This circuit realizes themathematical operation of differentiation. Let the input signal be the time variant vi(t). Thevirtual ground of the op-amplifier at the inverting input causes vi(t) to appear in effect across R,and thus the current i(t) through the C will be;

C(dvi/dt)and this current flows through the feedback resistor R providing at the op-amplifier’s outputvoltage Vo(t).Vo(t) = RC dvi(t) / dtλ= 1 / RC

Observation & Calculation :Vin(t) = ……………..R = ………………Vo(t) = ………………λ = ……………

Circuit Diagram:


Exercise: (calculate output voltage)

Procedure:1. Connect the circuit according to the circuit diagram..2. ON Power switch and set the oscilloscope according to requirement.3. Place the channel A of Oscilloscope at the input and channel B at output.4. Observe the input and output waveform on oscilloscope .5. Also measure and record the Oscilloscope reading in observation table.


Observation:

Vinvolts

RinOhms

RfOhms

Cfµ Farads

Input vs outputWaveform

Conclusion:


LAB SESSION 13

OP-amp. As an integrator

Object:An Operational Amplifier with a capacitor in feedback path results in a circuit whichperforms the mathematical operation of Integration. Design an integrator with sine wave input.

Apparatus:Resistors (Ri=1KΩ, Rf=1KΩ & 10KΩ and Cf = 10μF), Operational amplifier, Power Supply,Oscilloscope, connecting wires and bread board.

Theory:The operational Amplifier can be used as an Integrator. A capacitor is placed in the feedbackpath and a resistor at the input. This circuit realizes the mathematical operation of integration.Let the input signal be the time variant vi(t) . the virtual ground at the inverting op-amp inputcauses vi(t) to appear in effect across R, and thus the current i(t) will be vi(t) /R. this currentflows throw the capacitor C, causing the charge to accumulate on C. If we assume that thecircuit begins operation at t=0, then at an arbitrary time t the current i(t) will have deposited onC.Vo(t) = 1/CR Vi(t) dt

Circuit Diagram:


Exercise: (Calculate output voltage)

Observation

Vin

VoltsRin

OhmsRf

OhmsCf

µ FaradsInput vs outputWaveform

Conclusion:

Circuit Theory RESONANT FREQUENCYNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 14Resonant Frequency

Object:To Observed and determine the Resonant Frequency of a Parallel- resonant circuit.Apparatus:Equipment: AF sine-wave generator,Oscilloscope.Resistor: 4.7kΩ. ½ WCapacitor: 0.1 – μFInductor: 8mH, connecting wires and bread board.Theory:There is particular frequency at which XL = XC. This frequency may be defined as the conditionfor parallel resonance in high-Q (i.e. RL is small compared with XL) circuit and is similar to thecondition for series resonance.There are other definitions for parallel resonance. Thus parallel resonance may be considered asthe frequency at which the impedance of the parallel circuit is ‘maximum’. Also, // resonance asthe frequency at which the // impedance of the circuit has unity power factor.In a high – Q circuit, the formula for the resonant frequency fR is the same as in the case of seriesresonance and is given by

FR = √The currents in the two terminals of a parallel LC circuit are 1800 out of the phase, if there is noresistance in either terminal.The “circulating” current I in the parallel resonant “tank” circuit is high at resonance. Theimpedance of a parallel LC circuit is maximum at resonance.Circuit diagram:

Circuit Theory RESONANT FREQUENCYNED University of Engineering and Technology Department of Electrical Engineering

Procedure:1. Connect the circuit of fig. Adjust the scope controls for proper viewing and the AF sine-

wave generator controls for 10V p-p signal output.2. Connect the scope across the 4.7kohm. resistor with the ground of the scope going to

ground of the circuit.3. Set generator frequency at 150Hz and observe the response on the scope.4. Increase or decrease the generator frequency until a frequency fR is reached where

maximum voltage VR appears across R. minimum voltage VAB appears across C and L.

Observation:R (Ω) L (H) C (μF) fR

Measured computed

Conclusion:

Circuit Theory BODE PLOTNED University of Engineering and Technology Department of Electrical Engineering

LAB SESSION 15

Bode Plot

Object:Design a circuit showing the Bode Plot i.e.: Magnitude and Phase-plot.Apparatus:AC power supply, Resistors, Operational Amplifier and Bode Plotter.Theory:Bode Diagram is a quick method of obtaining an approximate picture of the amplitude and phasevariation of a given transfer function as function of ‘’. The approximate response curve is alsocalled an ‘Asymptotic plot’. Both the magnitude and phase curves are plotted using alogarithmic frequency scale. The magnitude is also plotted in logarithmic units called decibels(db).HdB = 20 log |H(j)|where the common logarithm(base 10) is used

Circuit Diagram:

Exercise: (Find HdB and Hphase for given network)

Circuit Theory BODE PLOTNED University of Engineering and Technology Department of Electrical Engineering

Asymptotic Bode plot:

Observed bode plot:

Conclusion:

Ee-316 -- Circuit Theory Lab

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