EE 200- Digital Logic Circuit Design 3.6 NAND and NOR ...

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The Map Method EE 200- Digital Logic Circuit Design 3.6 NAND and NOR Implementation Dr. Muhammad Mahmoud October 3, 2013 c Muhammad Mahmoud Gate-Level Minimization 1/ 20

Transcript of EE 200- Digital Logic Circuit Design 3.6 NAND and NOR ...

Page 1: EE 200- Digital Logic Circuit Design 3.6 NAND and NOR ...

The Map Method

EE 200- Digital Logic Circuit Design3.6 NAND and NOR Implementation

Dr. Muhammad Mahmoud

October 3, 2013

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The Map Method

Introduction

Can you give an example of don’t-care condition

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The Map Method

Lecture Outline

1 The Map MethodNAND ImplementationNOR Implementation

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The Map MethodNAND ImplementationNOR Implementation

NAND Implementation

Using NAND instead of AND and OR.

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The Map MethodNAND ImplementationNOR Implementation

NAND Implementation

Alternative graphic symbol for NAND gate.

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The Map MethodNAND ImplementationNOR Implementation

Two-Level Implementation with NAND

Must have the function as sum-of-products.

F = AB + CD

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The Map MethodNAND ImplementationNOR Implementation

Two-Level Implementation with NAND

F = ((AB)′(CD)′)′ = AB + CD

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The Map MethodNAND ImplementationNOR Implementation

Two-Level Implementation (Example)

Implement F using NAND gates F (x , y , z) = (1, 2, 3, 4, 5, 7)

F = xy ′ + x ′y + z

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The Map MethodNAND ImplementationNOR Implementation

Two-Level Implementation (Example)

F = xy ′ + x ′y + z

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The Map MethodNAND ImplementationNOR Implementation

Multi-Level Implementation with NAND

F = A(CD + B) + BC ′

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The Map MethodNAND ImplementationNOR Implementation

Multi-Level Implementation with NAND

F = (AB ′ + A′B)(C + D ′)

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The Map MethodNAND ImplementationNOR Implementation

Multi-Level Implementation with NAND (HOW TO)

Convert all AND gates to NAND gates with AND-invertsymbol.

Convert all OR gates to NAND gates with invert-OR symbol.

Make sure that every bubble is compensated with another onthe same line, if not, insert an inverter.

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The Map MethodNAND ImplementationNOR Implementation

NOR Implementation

Using NOR instead of AND and OR.

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The Map MethodNAND ImplementationNOR Implementation

NAND Implementation

Alternative graphic symbol for NOR gate.

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The Map MethodNAND ImplementationNOR Implementation

NOR Implementation

F = (A+ B)(C + D)E

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The Map MethodNAND ImplementationNOR Implementation

NOR Implementation

F = (AB ′ + A′B)(C + D ′)

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The Map MethodNAND ImplementationNOR Implementation

AND-OR to NAND Conversion

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The Map MethodNAND ImplementationNOR Implementation

AND-OR to NOR Conversion

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The Map MethodNAND ImplementationNOR Implementation

Summary

1 The Map MethodNAND ImplementationNOR Implementation

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The Map MethodNAND ImplementationNOR Implementation

Next Lecture

XOR

HDL

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