EDC Lab Manual

SRINIVASAN ENGINEERING COLLEGE

DEPT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ANNA UNIVERSITY CHENNAI

REGULATION 2009

I YEAR/ II SEMESTER

EC2155 - CIRCUITS AND DEVICES LABORATORY

LAB MANUAL

ISSUE:01 REVISION:00

APPROVED BY PREPARED BY

Prof. B. REVATHI R.SIVAGAMI, Assistant Professor.

HOD/ECE R.KEERTHANA, Assistant Professor.

CIRCUITS AND DEVICES LAB MANUAL SRINIVASAN ENGINEERING COLLEGE, PERAMBALUR

I YEAR

ISSUE: 01 REVISION: 00 2

Preface

This laboratory manual is prepared by the Department of Electronics and communication

engineering for Circuits and Devices (EC2155). This lab manual can be used as instructional book

for students, staff and instructors to assist in performing and understanding the experiments. This

manual will be available in electronic form from College’s official website, for the betterment of

students.

Acknowledgement

We would like to express our profound gratitude and deep regards to the support offered

by the Chairman Shri. A.Srinivasan. We also take this opportunity to express a deep sense of

gratitude to our Principal Dr.B.Karthikeyan,M.E, Ph.D, for his valuable information and

guidance, which helped us in completing this task through various stages. We extend our hearty

thanks to our head of the department Prof.B.Revathi M.E, (Ph.D), for her constant

encouragement and constructive comments.

Finally the valuable comments from fellow faculty and assistance provided by the

department are highly acknowledged.


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INDEX

S.No TOPIC PAGE NO

1 Syllabus 4

2 Lab Course Handout 5

3 Basics for bread board connection 8

4 Experiments

1. Verification of KVL and KCL 10

2. Verification of Thevenin and Norton Theorems. 16

3. Verification of superposition Theorem 23

4. Verification of Maximum power transfer and

reciprocity theorems.

26

5. Frequency response of series and parallel resonance

circuits.

32

6. Characteristics of PN and Zener diode 35

7. Characteristics of CE configuration 44

8. Characteristics of CB configuration 50

9. Characteristics of UJT and SCR 54

10. Characteristics of JFET and MOSFET 63

11. Characteristics of Diac and Triac. 68

12. Characteristics of Photodiode and Phototransistor. 73

5 University Model Question Paper 76


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SYLLABUS

EC 2155 -CIRCUITS AND DEVICES LABORATORY

1. Verification of KVL and KCL

2. Verification of Thevenin and Norton Theorems.

3. Verification of superposition Theorem.

4. Verification of Maximum power transfer and reciprocity theorems.

5. Frequency response of series and parallel resonance circuits.

6. Characteristics of PN and Zener diode

7. Characteristics of CE configuration

8. Characteristics of CB configuration

9. Characteristics of UJT and SCR

10. Characteristics of JFET and MOSFET

11. Characteristics of Diac and Triac.

12. Characteristics of Photodiode and Phototransistor.


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LAB COURSE HANDOUT

Subject code : EE 1155

Subject Title : Circuits and Devices Lab

Staff name :R.Keerthana & R.Sivagami

Scope and Objective of the Subject:

To verify various theorems and find the characteristics of various devices.

Course Plan / Schedule:

S.No Topics to be covered Learning objectives Page

No*

No. of

hours

1 Verification of KVL and KCL To verify the theorems for

Kirchoff’s voltage law and

Kirchoff’s current law.

10-14 3 hrs

2 Verification of Thevinin’s theorem and

Norton’s theorem.

To verify the theorems for

Thevinin’s and Norton’s

theorem.

15-20 3hrs

3 Verification of Super position theorem To verify the super position

theorem. 21-25 3hrs

4 Verification of Maximum power transfer

and reciprocity theorem.

To verify the Maximum power

transfer and reciprocity

theorem.

26-31 3hrs

5 Frequency response of series and parallel

resonance circuits.

To find the frequency response

for series and parallel resonance

circuits.

32-34 3hrs

6 Characteristics of PN and Zener diode. Find the characteristics of PN

and Zener diodes. 35-43 3hrs


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7 Characteristics of CE configuration Find the characteristics of CE

configuration. 44-49 3hrs

8 Characteristics of CB configuration Find the characteristics of CB

configuration. 50-53 3hrs

9 Characteristics of UJT and SCR To Find the characteristics of

UJT and SCR. 54-62 3hrs

10 Characteristics of JFET and MOSFET Find the characteristics of JFET

and MOSFET. 63-67 3hrs

11 Characteristics of Diac and Triac To Find the characteristics of

Diac and Triac. 68-72 3hrs

12 Characteristics of photo diode and photo

transistor

Find the characteristics of photo

diode and photo transistor. 73-75 3hrs

*-As in Lab Manual

Evaluation scheme – Internal Assessment

Timings for chamber consultation: Students should contact the Course Instructor in her/his

chamber during lunch break.

EC

No.

Evaluation

Components

Duration Weightage

1 Observation Continuous 20%

2 Record Continuous 30%

3 Attendance Continuous 30%

4 Model lab 3hr 20%


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STUDENTS GUIDELINES

There are 3 hours allocated to a laboratory session in Circuits and Devices Lab. It is a necessary

part of the course at which attendance is compulsory.

Here are some guidelines to help you perform the Programs and to submit the reports:

1. Read all instructions carefully and proceed according to that.

2. Ask the faculty if you are unsure of any concept.

3. Give the connection as per the diagrams.

4. After verification by the faculty, tabulate the readings.

5. Write up full and suitable conclusions for each experiment and draw the graph.

6. After completing the experiment complete the observation and get signature from the

staff.

7. Before coming to next lab make sure that you complete the record and get sign from the

faculty.

STAFF SIGNATURE HOD


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BREADBOARD

The breadboard consists of two terminal strips and two bus strips (often broken in the

centre). Each bus strip has two rows of contacts. Each of the two rows of contacts are a node. That is, each contact along a row on a bus strip is connected together (inside the breadboard). Bus strips are used primarily for power supply connections, but are also used for any node requiring a large number of connections. Each terminal strip has 60 rows and 5 columns of contacts on each side of the centre gap. Each row of 5 contacts is a node. You will build your circuits on the terminal strips by inserting the leads of circuit components into the contact receptacles and making connections with

Incorrect connection of power to the ICs could result in them exploding or becoming very hot with the possible serious injury occurring to the people working on the experiment! Ensure that the power supply polarity and all components and connections are correct before switching on power .

Fig 1. The breadboard. The lines indicate connected holes.


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BUILDING THE CIRCUIT The steps for wiring a circuit should be completed in the order described below:

1. Turn the power (Trainer Kit) off before you build anything! 2. Make sure the power is off before you build anything! 3. Connect the supply and ground (GND) leads of the power supply to the power and

ground bus strips on your breadboard. 4. Plug the devices you will be using into the breadboard. 5. Mark each connection on your schematic as you go, so as not to try to make the same

connection again at a later stage. 6. Get one of your group members to check the connections, before you turn the power

on. 7. If an error is made and is not spotted before you turn the power on. Turn the power off

immediately before you begin to rewire the circuit. 8. At the end of the laboratory session, collect you hook-up wires, devices and all

equipment and return them to the demonstrator. 9. Tidy the area that you were working in and leave it in the same condition as it was

before you started. Common Causes of Problems:

1. Not connecting the ground and/or power pins. 2. Not turning on the power supply before checking the operation of the circuit. 3. Leaving out wires. 4. Plugging wires into the wrong holes. 5. Modifying the circuit with the power on.

In all experiments, you will be expected to obtain all instruments, leads, components at

the start of the experiment and return them to their proper place after you have finished the experiment. Please inform the demonstrator or technician if you locate faulty equipment.


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1. VERIFICATION OF KIRCHOFF’S LAW

Ex.No.1

Date:

Aim:

To practically verify the kirchoff’s voltage and current law of the given network with the

theoretical calculations.

Apparatus required:

S.No Components Type/range Qty

1.

2.

3.

4.

5.

6.

Regulated power supply

Resistor

Resistor

Resistor

Resistor

Resistor

Ammeter

Voltmeter

Bread board

wires

(10-30) V

220 Ω

330 Ω

10 K Ω

22 k Ω

33 k Ω

MC(0-100) mA

MC(0-10) V

1 NO

1 NO

1 NO

1 NO

1 NO

1 NO

3

Nos

3

Nos

1 No

Statement:

Kirchoff’s Voltage Law: This law states that the algebraic sum of voltages taken around a

closed loop is equal to zero.

Kirchoff’s Current Law: This law states that the algebraic sum of current entering to a

node is equal to the algebraic sum of currents away from it.

When analysing either DC circuits or AC circuits using Kirchoffs Circuit Laws a number of

definitions and terminologies are used to describe the parts of the circuit being analysed such

as: node, paths, branches, loops and meshes. These terms are used frequently in circuit analysis

so it is important to understand them.


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Circuit - a circuit is a closed loop conducting path in which an electrical current flows.

Path - a line of connecting elements or sources with no elements or sources included

more than once.

Node - a node is a junction, connection or terminal within a circuit were two or more

circuit elements are connected or joined together giving a connection point between

two or more branches. A node is indicated by a dot.

Branch - a branch is a single or group of components such as resistors or a source which

are connected between two nodes.

Loop - a loop is a simple closed path in a circuit in which no circuit element or node is

encountered more than once.

Mesh - a mesh is a single open loop that does not have a closed path. No components

are inside a mesh.

Components are connected in series if they carry the same current.

Components are connected in parallel if the same voltage is across them

By using Kirchoffs Circuit Law we can calculate the various voltages and currents

circulating around a linear circuit, we can also use loop analysis to calculate the currents in

each independent loop which helps to reduce the amount of mathematics required by

using just Kirchoff's laws.

Procedure:

Kirchoff’s Current Law:

1. Connections are made as per the circuit diagram.

2. The current through each branch is calculated theoretically.

3. The current through each branch is measured practically.

4. Verify KCL for each and every node in the given network.

5. Repeat the same procedure for different values of voltage.


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Kirchoff’s Voltage Law:

1. Connections are made as per the circuit diagram.

2. The voltage through each branch is calculated theoretically.

3. The voltage through each branch is measured practically.

4. Verify KVL for the loop present in the given network.

5. Repeat the same procedure for different values of voltage.

Circuit diagram :KCL


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Circuit diagram :KVL

Kirchoff’s Current Law: Kirchoff’s Current Law:

Experimental Value Experimental Value

Vs

Volts IT

mA

I1

mA

I2

mA

IT = I1+I2

mA

Vs

Volts IT

mA

I1

mA

I2

mA

IT = I1+I2

mA


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Experimental Value Theoretical Value

Theoretical Calculation:

Kirchoff’s Current Law:

RT = R1/R2 = 220Ω/330Ω = 0.66Ω

For VT = 10V

I = VT/RT = 15.15

I1 = I × R1/ R1+R2 = 6.06

I2 = I × R2/ R1+R2 = 9.09

I1+ I2 = 15.15

Vs

Volts V1

mV

V2

mV

V3

mV

VT = V1+V2+ V3

mV

Vs

Volts V1

mV

V2

mV

V3

mV

VT = V1+V2+ V3

mV


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For VT = 10v

V1 = VT × R1/ R1 +R2+ R3 = 1.54V

V2 = VT × R2/ R1 +R2+ R3 = 3.39V

V1 = VT × R3/ R1 +R2+ R3 = 5.08V

V1 +V2+ V3 = 10V

Viva-voce

1. State kirchoff’s current law.

The sum of the currents flowing towards a junction is equal to the sum of

the currents flowing away from it.

2. Define kirchoff’s voltage law.

Around a closed circuit, the sum of potential rises is equal to the sum of

potential drops.

3. State Ohm’s law.

When the temperature remains constant, current flowing through a

circuit is directly propotional to potential difference across the conductor.

Result:

Thus the kirchoff’s voltage and current law was verified for the given network

with the theoretical calculations.


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2. VERIFICATION OF THEVENIN’S AND NORTON’S THEOREMS

Ex.No.2

Date:

Aim:

To verify practically the Thevenin’s and Norton’s theorem for the network with the

theoretical calculations.

Apparatus required:


1.

2.

3.

4.

5.

6.

7.


Resistor

Resistor

Decade resistance box

Ammeter

Breadboard

Wires

(10-30)V

10 KΩ

1 KΩ

(0-10) KΩ

(0-500) KΩ

1 No

1 No

2 Nos

3 Nos

3 Nos

1 No

Statement:

Thevenin’s theorem: This theorem states that any linear active two terminal network

containing resistance and voltage sources and/or current sources can be replaced by a single

voltage source VTh in series with a single resistance RTh.

Thevenins Theorem

The basic procedure for solving a circuit using Thevenins Theorem is as follows:

1. Remove the load resistor RL or component concerned.

2. Find RS by shorting all voltage sources or by open circuiting all the current sources.


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3. Find VS by the usual circuit analysis methods.

4. Find the current flowing through the load resistor RL.

Thevenins theorem can be used as a circuit analysis method and is particularly useful if

the load is to take a series of different values. It is not as powerful as Mesh or Nodal analysis in

larger networks because the use of Mesh or Nodal analysis is usually necessary in any Thevenin

exercise, so it might as well be used from the start. However, Thevenins equivalent circuits of

Transistors, Voltage Sources such as batteries etc, are very useful in circuit design.

Norton’s theorem: This theorem states that any linear active two terminal network

containing resistance and voltage sources and/or current sources can be replaced by a single

current source IN in parallel with a single resistance RN.The Norton’s equivalent IN is the short

circuit current through the terminals A,B and resistance RN. RN is the resistance between the

network terminals when all sources are replaced with their internal resistances

Norton’s Theorem Summary

The basic procedure for solving a circuit using Nortons Theorem is as follows:

Remove the load resistor RL or component concerned.

Find RS by shorting all voltage sources or by open circuiting all the current sources.

Find IS by placing a shorting link on the output terminals A and B.

Find the current flowing through the load resistor RL.

In a circuit, power supplied to the load is at its maximum when the load resistance is equal

to the source resistance. In the next tutorial we will look at Maximum Power Transfer. The

application of the maximum power transfer theorem can be applied to either simple and

complicated linear circuits having a variable load and is used to find the load resistance that

leads to transfer of maximum power to the load.

http://www.electronics-tutorials.ws/dccircuits/dcp_5.html




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Procedure:

Thevenin’s theorem:

1. Remove the portion of the network across which Thevenin’s equivalent circuit has to be found.

2. Name those terminals as A & B, 3. Calculate RTH by substituting all sources with their internal resistances looking

back at the network. 4. Calculate VTH, the open circuit voltage between the terminals A & B by replacing

all the sources to their original position. 5. Give the connections as per the circuit diagram. 6. Connect the Thevenin’s equivalent and measure the current through the load

resistor. 7. Measure the current through the load resistor. 8. Compose the values of step 6 and step 7.

Norton’s theorem:

1. Remove the branch through which is to be found and mark terminals AB.

2. Short circuit the terminals AB and find current through it and denote it as ISC.

3. Replace the independent sources with their internal resistances. 4. Calculate RTH (RN) between the terminals AB. 5. Connect short circuit (Norton’s) current source ISC in parallel with the

output terminals AB. 6. Connect the removed branch between the terminals AB and find current

through it using current divider formula.


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Verification of Thevenin’s theorem


Thevenin’s theorem:

VT = 20V

RTH = 1 kΩ II 10 KΩ = 0.909 KΩ

VTH = 20 × 10/11 = 18.18V

Req = (R2II RL) + R1 = 1.909 KΩ

IT = VT/Req = 10.47 mA

IL = IT × RL / RL+ RC = 9.57 mA

ITH = VTH/ RTH+ RL = 9.57 Ma


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Thevenin’s Theorem:



V

volts

I

mA Rth=V/I

V

volts

I

mA Rth=V/I


Input

Voltage vth

Input

Voltage vth

V Volts VTH Volts IL(mA) V Volts VTH Volts IL(mA)


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Verification of Norton’s theorem

Norton’s theorem:

VT = 25V

RTH = R1+R2 = 9Ω

ISC = V1-V2 / R = 25/9 A


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Norton’s theorem:

Experimental value Theoretical value

V1

Volts

V2

Volts

ISc = V1-V2/R

(mA)

V1

Volts

V2

Volts

ISc = V1-V2/R

(mA)

1. State Thevenin’s theorem.

Any linear, two terminal, bilateral device networks can be replaced by a voltage

source of thevenin’s voltage which is in series with thevenin’s resistance .

2. What are the results of resistance in series?

Equivalent resistance of two resistors connected in series is given by,

Rs= R1+R2

3. State Norton’s theorem.

Any linear, two terminal, active networks can be replaced by a current source in

parallal with thevenin’s resistance.

4. Define active and passive network.

A circuit which contains a source of energy is called active network. A circuit

which contains no energy source is called passive network.

5. What are the results of resistance in parallel?

Equivalent resistance of two resistors connected in parallel is given by,

1/Rp = 1/R1 + 1/R2

Result:

Thus the Thevenin’s and Norton’s theorem was verified for the given network

with the theoretical calculations.


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3. VERIFICATION OF SUPERPOSITION THEOREM

Ex.No:3

Date:

Aim:

To practically verify superposition theorem for the given network and the theoretical

calculation.

Apparatus required:


1.

2.

3.

4.

5.

6.


Resistor

Resistor

Ammeter

Breadboard

Wires

(10-30)V

1 KΩ

2 KΩ

(0-100) KΩ

1 No

1 No

2 Nos

3 Nos

1 No

Statement:

Superposition theorem: This theorem states that, in a linear bilateral network

containing two or more independent sources, the voltage across or the current through any

branch is algebraic sum of individual voltages or currents produced by each independent source

acting alone separately with all the independent sources set equal to zero.

The Superposition Theorem finds use in the study of alternating current (AC) circuits,

and semiconductor (amplifier) circuits, where sometimes AC is often mixed (superimposed)

with DC. Because AC voltage and current equations (Ohm's Law) are linear just like DC, we can

use Superposition to analyze the circuit with just the DC power source, then just the AC power

source, combining the results to tell what will happen with both AC and DC sources in effect.

For now, though, Superposition will suffice as a break from having to do simultaneous

equations to analyze a circuit.


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Procedure:

1. The connections are made as per the circuit diagram. 2. With V1 = 20V and V2 = 0V observe the ammeter reading. 3. The above procedure repeated with V1 = 0V and V2 = 20V. 4. The total response at the required terminal is obtained using sum of individual

response. 5. Repeat same procedure for different values of V1 and V2.

Verification of Superposition theorem


Circuit 1:

When V1 = 2V, V2 = 2V

In loop ABEF by KVL


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2 = 1I1+2(I1+I2)

2 = 3I1+2I2 ------------------- (1)

In loop DCBE

2 = 1I2+2(I1+I2)

2 = 2I1+3I2 ---------------- (2)

Eqn. (1) × 2 6I1+4I2 = 4 ---------------- (3)

Eqn. (2) × 3 6I1+9I2 = 6 ---------------- (4)

Eqn. (4) – (3) 5I2 = 2

I2 = 0.4 mA

Substitute I2 value in Eqn. (1)

We get 3I1+(2 × 0.4) = 2

I1 = 0.4 mA

Circuit 2:

In loop ABEF

V1 = 2V

2 = I1+2(I1-I2)

3I1-2I2 = 2

In loop BCDE

I2+2(I2-I1) = 0

3I2 = 2I1

3 × (3/2)-2I2 = 2

9I2 – 4I2 = 4


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I2 = 4/5 = 0.8 mA

Current through RL = I1 – I2 = 0.4 mA

Circuit 3:

In loop DCBE

V2 = 2V, V1 = 0

2 = I1+2(I1-I2) = 3I1 – 2I2 = 2

In loop BAFE

I2+2(I2-I1) = 0

3I2 = 2I1

Sub. in (1)

9I2 – 4I2 = 0

I2 = 0.5 mA

I1 = 1.2 mA

Current through RL = I1 – I2 = 0.4 mA

Superposition theorem:


V1

Volts

V2

Volts

ISc = V1-V2/R

(mA)

V1

Volts

V2

Volts

ISc = V1-V2/R

(mA)


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V

Volts

I

(mA)

V

Volts

I

(mA)


V

Volts

I

(mA)

V

Volts

I

(mA)

Viva voce:

1. State superposition theorem.

In a linear network containing several sources , the overall response in

any branch in the network equals the sum of response of individual sources

considered separately with all other sources made in operative.

2. Define electric current.

Electric current is defined as the rate of flow of electric charge.

3. Define electric potential.

If the work done in a moving charge of one coulomb between any two

points is 1 joule.

V = dW/dQ

Result:

Thus the superposition theorem for the given network was verified.


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4. VERIFICATION OF MAXIMUM POWER TRANSFER AND RECIPROCITY THEOREMS.

Ex.No:4

Date:

Aim:

To practically verify the maximum power transfer and reciprocity theorem for the

network with the theoretical calculation.

Apparatus required:


1.

2.

3.

4.

5.

6.

7.


Resistor

Resistor

Resistor

Ammeter

Ammeter

Voltmeter

Breadboard

Wires

(10-30)V

10 KΩ

22 KΩ

940 Ω

(0-50) mA

(0-30) mA

(0-10)V

1 No

1 No

2 Nos

1 No

1 No

1 No

1 No

Statement:

Maximum power transfer theorem: This theorem states that maximum power will be

delivered from a voltage source to a load, if load resistance is equal to the internal resistance of

the sources.

The Maximum Power Transfer Theorem is another useful analysis method to ensure

that the maximum amount of power will be dissipated in the load resistance when the value of

the load resistance is exactly equal to the resistance of the power source. The relationship

between the load impedance and the internal impedance of the energy source will give the

power in the load. Consider the circuit below.


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The reciprocity theorems are used in many electromagnetic applications, such as analyzing

electrical networks and antenna systems. For example, reciprocity implies that antennas work equally

well as transmitters or receivers and specifically that an antenna's radiation and receiving patterns are

identical. Reciprocity is also a basic lemma that is used to prove other theorems about electromagnetic

systems, such as the symmetry of the impedance matrix and scattering matrix, symmetries of Green's

functions for use in boundary-element and transfer-matrix computational methods, as well as

orthogonality properties of harmonic modes in waveguide systems (as an alternative to proving those

properties directly from the symmetries of the Eigen-operators).

Procedure:

Maximum power transfer theorem:

1. Connections are made as per the circuit diagram. 2. Initially RPS voltage is getting constant for 10V. 3. Varying the loads, resistance corresponding V and I is noted. 4. Graph is drawn between R Vs Power.

Maximum Power Transfer Theorem

http://en.wikipedia.org/wiki/Antenna_%28radio%29

http://en.wikipedia.org/wiki/Radiation_pattern

http://en.wikipedia.org/wiki/Impedance_parameters

http://en.wikipedia.org/wiki/Scattering_parameters

http://en.wikipedia.org/wiki/Green%27s_function

http://en.wikipedia.org/wiki/Green%27s_function

http://en.wikipedia.org/wiki/Boundary_element_method

http://en.wikipedia.org/wiki/Orthogonality

http://en.wikipedia.org/wiki/Harmonic_mode

http://en.wikipedia.org/wiki/Waveguide

http://en.wikipedia.org/wiki/Eigenvalue,_eigenvector_and_eigenspace


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Experimental value

S.No Load

Resistance

Voltage

(V)

Current

I (mA)

Power = V α I

watts

Theoretical value:

S.No

Vth RL Power (mW)= Vth / 4RL

Reciprocity theorem:

1. Connections are made as per the circuit diagram. 2. Note down the ammeter reading and find the ratio of output current and

input voltage. 3. Interchange the position of ammeter and voltage source.


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4. Note down the ammeter reading and find the ratio of output and input voltage.

5. Compare this value with the value obtained in step2.

Verification Of Reciprocity

Theoretical calculation:


Internal resistance = 10KΩ II 22KΩ

Rth = 10 × 22 / 32 = 6.8KΩ

V = 0.4

R = 0.5

P = V2th / 4R2

P = (0.4)2 / 4 ×6.8 = 0.16 / 27.2 = 5.88 ×10-3 watts


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V

Volts

I

(mA) Z = V / I

V

Volts

I

(mA) Z = V / I

Experimental Value:

Frequency

kHz

VR

Volts


Circuit – 1:

R = (100+100) II (470+940) Ω

= 1080.3 Ω

IT = VT / R = 9.25 mA (Assume VT = 10V)

IL = IT × 470 / 200+470 = 6.5 mA


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Circuit – 2:

R = (940 II 470) + 100 + 100

= 513.33 Ω

IT = VT / R = 9.25 mA (Assume VT = 10V)

IL = IT × 470 / 200 + 470 = 6.5 mA

Viva voce:

1. State maximum power transfer theorem for AC circuits.

Maximum power transfer to a load occurs when the load impedance is

equal to complex conjugate of the impedance of the network looking back at

it from the load terminals, all sources replaced by their respective internal

resistances.

2. State maximum power transfer theorem for DC circuits.

Maximum power transfer to a load occurs when the load resistance is

equal to complex conjugate of the impedance of the network looking back at

it from the load terminals, all sources replaced by their respective internal

resistances.

3. What is the condition for maximum power transfer?

The power delivered is maximum if the load resistance is equal to source

resistance.

4. What are the applications of maximum power transfer?

Power amplifiers, communication systems, microwave transmission.

5. What are the types of dependent sources?

1. Voltage dependent voltage source

2. Voltage dependent current source

3. Current dependent current source

4. Current dependent voltage source

Result:

Thus the maximum power transfer and reciprocity theorem for the given network was

verified with the theoretical calculation.


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5. FREQUENCY RESPONSE OF SERIES AND PARALLEL RESONANCE CIRCUITS

Ex.No:5

Date:

Aim:

To obtain the resonance frequency of the given RLC series and parallel electrical

network.

Apparatus required:


1.

2.

3.

4.

5.

6.

7.

Function generator

Resistor

Decade inductance box

Capacitor

Voltmeter

Breadboard

Wires

1 KΩ

1 μF

(0-5) V

1 No

1 No

1 No

1 No

1 No

1 No

Theory:

An a.c. circuit is said to be in resonance when the applied voltage and the resulting

current are in phase. In an RLC series circuit under resonance XL = XC where XL is inductive

reactance and XC is capacitive reactance. At fo,Vc and VL are equal in magnitude and opposite in

phase.The maximum value of VL occurs at a frequency lesser than fo and the minimum value of

VL occurs at a frequency greater than fo.

The distance between the lower half power frequency f1 and the upper half frequency

f2 is called bandwidth of the circuit.


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Resonance In RLC Series Circuit

Resonance In RLC Parallel Circuit


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Formula:

Series resonance frequency, fo = 1 / 2πѵLC


Resonance frequency fo = 1 / 2πѵLC

For L = 50 mH and C = 711.8 kH

Viva voce:

1. Define resonance.

An AC circuit is said to be resonance, it behaves as a purely resistive circuit. The

total current drawn by the circuit is in phase with the applied voltage and the power

factor will then be unity.

2. What is resonant frequency?

The frequency at which resonance occurs is called the resonant frequency.

3. Define quality factor of a coil.

Quality factor of a coil is defined as the ratio of the reactance of the coil to its

resistance. Q = Xl / R = Xc / R

Result:

Thus the resonance frequency of the given RLC series and parallel electrical network was

obtained.


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6. CHARACTERISTICS OF PN AND ZENER DIODE

Ex.No:6

Date:

Aim:

To study the characteristics of PN-junction diode and zener diode under forward bias

and reverse bias conditions.

Apparatus required:


1.

2.

3.

3.

4.

5.

6.

7.


Diode

Resistor

Voltmeter

Ammeter

Ammeter

Breadboard

Wires

(0-30)V

BY 126,FZ 9.1V

1 KΩ

(0-1) V,(0-30)V

(0-100)mA

(0-500)mA

1 No

1 No

1 No

1 No

1 No

1 No

1 No

Theory:

PN – Junction diode :

It has two terminals the P – region of the diode, is called ‘anode’ and n – region called

‘cathode’. It is an uni-lateral i.e., the diode can conduct current only in one direction.

In the forward bias, the anode terminal is connected to positive terminal of the battery

supply under forward bias condition, the supplied positive potential repels the holes, in the p-

region.hence,the holes move towards the junction. In the reverse bias the anode of the diode is

connected to the negative terminal of the battery, and cathode is connected to positive

terminal of the battery supply under the reverse bias condition, the holes of the P-region move

towards the negative terminal of the battery for large reverse bias voltage, breakdown of

junction occurs, leading to large reverse current.


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Applications of diodes

Signal rectifier

Diode gate

Diode clamps

Limiter

Zener diode:

It is a semi-conductor device, which operates in the breakdown region. It is specified by

its breakdown voltage and power dissipation capability, which ranges from 3V to 100V and few

mill watts to 50 watts respectively, zener diode can be used as constant voltage source

particularly when there is change in load voltage due to change in input supply.

During the reverse bias, there is sharp increase in the current after reaching the

breakdown voltage. This is due to zener breakdown and avalanche breakdown.

Zener Breakdown:

When reverse bias is increased under the influence of high electric field, the

electrons are pulled up from the covalent bonds. This causes sharp increase in the reverse

current. This is called zener break down.

Avalanche breakdown:

When reverse bias voltage is applied across the zener diode the minority carriers

in the technical region, gets accelerated and affair sufficient kinetic energy. These minority

carriers disrupt covalent bonds and create new electrons by collision. This phenomena

cumulatively generates an avalanche of charge carriers in the short time, thereby causing a

sharp increase in the reverse current.

Applications:

Voltage Regulators (in shunt mode)

Surge Suppressors .i.e. for device protection Formula:

Forward resistance RF = ∆VF / ∆IF Ω

Reverse resistance RR = ∆VR / ∆IR Ω


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Dynamic resistance RD = Forward voltage / reverse voltage

Where,

VF – Forward voltage IF – Forward current

VR – Reverse voltage IR – Reverse current

Diode specifications:

VF – 1.5V@5A

IF – 1A

VR – 650V

Zener Diode spepcifications:

Vout – 0.5VPP

Slew rate – 2400/Ms

Setling time – 18 ns

Procedure:

1. Connect the circuit as per the circuit diagram. 2. By varying the RPS get the different voltage in the voltmeter and note down the

corresponding current value in the ammeter. 3. Plot the graph between voltage Vs current. 4. Measure the RF,RR and RD from the graph.

mailto:1.5V@5A


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Characteristics Of PN-Junction Diode


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PN junction diode:

S.No

Forward Bias Reverse Bias

Voltage (V)

in Volts

Current (I)

in mA

Voltage (V)

in Volts

Current (I)

in mA


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Characteristics Of Zener Diode


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Zener Diode:

S.No

Forward Bias Reverse Bias

Voltage (V)

in Volts

Current (I)

in mA

Voltage (V)

in Volts

Current (I)

in mA

Viva voce:

1. What is the charge carriers found in P type material?

Majority carriers = Holes

Minority carriers = Electrons

2. What is meant by doping?

The process of adding impurity to pure semiconductor to increase the electrical

characteristics of semiconductor.

3. Define covalent band?

Sharing of valence band electrons with neighboring atom is known as covalent

band.

4. What is breakdown voltage?

The reverse voltage at which the PN junction breakdown occurs is called as

breakdown voltage.

Result:

Thus the characteristics of PN-junction diode and zener diode under forward bias and

reverse bias conditions were observed.


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7. CHARACTERISTICS OF CE CONFIGURATION Ex.No:7

Date:

Aim:

To determine the characteristics of Bipolar junction transistor in common

emitter configuration.

Apparatus required:


1.

2.

3.

3.

4.

5.

6.

7.


Diode

Resistor

Voltmeter

Ammeter

Ammeter

Breadboard

Wires

(0-30)V

SL 100

1 KΩ

(0-15) V,(0-30)V

(0-10)mA

(0-500)mA

2 Nos

1 No

2 Nos

1 No

1 No

1 No

1 No

Theory:

A transistor, in a common-emitter configuration, has two important

characteristics namely input and output characteristics.

Input characteristics:

These curve give the relation between the base current (IB) and the base

to emitter voltage (VBE) for a constant collector to emitter voltage (VCE).

First of all, we adjust the collector to emitter voltage to 1 volt. Then, we

increase the base to emitter voltage in small suitable steps and record the

corresponding values of base current at each step. If we plot a graph with base to

emitter voltage along the vertical axis. We shall obtain a curve marked VBE = 1 V as

shown in the model graph. A similar procedure may be used to obtain characteristics at


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different values of collector emitter voltage. The input characteristics give us the

information about the following important points.

1. There exists a threshold or knee voltage (VK) below which the base current is very small. The value of knee voltage is 0.5 V for Si and 0.1 V for Ge transistors.

2. Beyond the knee, the base current (IB) increases with the increase in base to emitter voltage (VBE) for a constant collector to emitter voltage (VCE).However, it may be noted that the value of base current does not increase as rapidly as that of the input characteristics of a common base transistor. It means that input characteristic resistance of a transistor in common-emitter transistor configuration is higher as compared to the common base configuration.

3. As the collector to emitter voltage (VCE) is increased above 1 V, the curve shifts downwards. It occurs because of the fact that as VCE is increased, the depletion width in the base region increases. The reduction in the effective base width, in turn reduces the base current.

4. The input characteristics may be used to determine the value of common emitter transistor a.c input resistance (Ri).Its value is given by the ratio of change in base to emitter voltage to the resulting change in base current at a constant collector to emitter voltage mathematically, the a.c. input resistance.

Input resistance Ri = ∆ VBE / ∆ IB Ω

It may be noted that the input characteristics is not linear in the lower region of

the curve.Therefore, the input resistance varies with the location of the operating point.

The value of a.c. input resistance ranges from 600 Ω to 4000 Ω.

Output characteristics:

These curves give the relationship between the collector current (IC) and

collector base current (IB).To begin with, the base current (IB) to 40 μA value.Then

increase the collector to emitter voltage (VCE) in a number of steps and record the

corresponding values of collector current (IC) at each step. If we plot a graph with

collector to emitter voltage (VCE) along the horizontal axis and collector current (IC) along

the vertical axis, we shall obtain a curve marked IB = 40 μA as shown in the model graph.

Similar procedure may be used to obtain characteristics at IB = 8 μA, 120 μA and so on.

The output characteristics give us the information about the following important points.


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The output characteristics may be divided into three important regions namely

saturation region, active region and cut-off region. The shaded areas show the cut off

region and saturation regions, while the active region is the region between the

saturation and cut-off region.

As the collector to emitter voltage (VCE) is increased above zero, the collector current

(Ic) increases rapidly to saturation value, depending upon the value of base current. It

may be noted that collector current (IC) reaches to a saturation value when VCE is about

1V.

When the collector to emitter voltage (VCE) is increased further, the collector current (IC)

slightly increases. This increase in collector current (IC) is due to the fact that increased

value of collector to emitter voltage (VCE) reduces the base current and hence the

collector current increases. This phenomenon is called early effect.

When the base current is zero, a small collector current exists. This is called leakage

current. However for all practical purposes the collector current (IC) is zero, when the

base current (IB) is zero. Under, this condition, the transistor is said to be cut-off.

The characteristics may be used to determine the common emitter transistor a.c output

résistance. Its value at any given operating point ‘Q’ is given by the ratio of change in

collector to emitter voltage to the resulting change in collector current for a constant

base current.Mathematically,the A.C output resistance,

Ro = ∆ VCE / ∆ IC Ω

The characteristics may be used to determine the small signal common emitter current

gain beta (βo) of a transistor.

Βo = ∆ IC / ∆ IB

Applications of CE Configuration:

typically used as a voltage amplifier

Diode specification:

1. PD - 0.8W

2. Ic - 500 Ma

3. Vceq - 50V

4. Vcbq – 60V

http://en.wikipedia.org/wiki/Electronic_amplifier#Input_and_output_variables


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Procedure:

Input characteristics:

1. Connect the circuit as per the circuit diagram. 2. By adjusting the RPS(2) set the collector to emitter voltage (VCE) to a particular voltage. 3. Now vary the base to emitter voltage (VBE) by adjusting the RPS (1) and note down the

corresponding variation in the base current IB. 4. Repeat step 3 for various values of VCE.


1. Connect the circuit as per the circuit diagram. 2. By adjusting the RPS (1) set the base to emitter voltage (VBE) to a particular voltage and

note down the corresponding IB value. 3. Now vary the collector to emitter voltage (VCE) by adjusting the RPS 2 and note down

the corresponding variation in the collector current. (IC)

4. Repeat step 3 for various values of VBE.

Input And Output Characteristics Of Common Emitter Transistor


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CHARACTERISTICS OF CE CONFIGURATION

INPUT CHARACTERISTICS

S.No

IC1 IC2 IC3

VCE1 VCE1 VCE3

VBE (V) IB (μA) VBE (V) IB (μA) VBE (V) IB (μA)


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OUTPUT CHARACTERISTICS

S.No

VBE1 VBE2 VBE3

IB1 IB2 IB3

VCE (V) IC(mA) VCE (V) IC (mA) VCE (V) IC (mA)

Viva voce:

1. What are the requirements for biasing circuits?

Transistor parameters, temperature variations

2. What is biasing?

To use the transistor in any application it is necessary to provide sufficient

voltage and current to operate the transistor.

3. What is stability factor?

It is defined as the rate of collector current with respect to the rate of change of

reverse saturation current.

4. What are the regions in a transistor?

1. Active region

2. Saturation region

3. Cutoff region

Result:

Thus the characteristics of Bipolar junction transistor in common emitter

configuration was determined.


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8. CHARACTERISTICS OF CB CONFIGURATION Ex.No:8

Date:

Aim:

To determine the characteristics of Bipolar junction transistor in common base

configuration.

Apparatus required:


1.

2.

3.

3.

4.

5.

6.

7.


Diode

Resistor

Voltmeter

Ammeter

Ammeter

Breadboard

Wires

(0-30)V

SL 100

1 KΩ

(0-15) V,(0-30)V

(0-10)mA

(0-500)mA

2 Nos

1 No

2 Nos

1 No

1 No

1 No

1 No

Theory:

A transistor, in a common-base configuration, has two important characteristics

namely input and output characteristics.


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Input characteristics



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CHARACTERISTICS OF CB CONFIGURATION

INPUT CHARACTERISTICS

S.No

VCB VCB

VEB IE VEB IE

OUTPUT CHARACTERISTICS

S.No

IE1 IE2

VCB (V) IC(mA) VCE (V) IC (mA)


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Applications of CB Configuration:

act as a preamplifier for moving-coil microphones.

popular in high-frequency amplifiers, for example for VHF and UHF, because its

input capacitance does not suffer from the Miller effect

Viva voce:

1. What are the requirements for biasing circuits?

Transistor parameters, temperature variations

2. What is biasing?

To use the transistor in any application it is necessary to provide sufficient

voltage and current to operate the transistor.

3. What is stability factor?

It is defined as the rate of collector current with respect to the rate of change of

reverse saturation current.

4. What are the regions in a transistor?

Active region

Saturation region

Cutoff region

Result:

Thus the characteristics of Bipolar junction transistor in common base

configuration was determined.

9. CHARACTERISTICS OF UJT AND SCR CONFIGURATION

Ex.No:9

Date:

Aim:

To determine the characteristics of UJT (Uni- junction transistor) and SCR.

Apparatus required:

http://en.wikipedia.org/wiki/Preamplifier

http://en.wikipedia.org/wiki/Microphone

http://en.wikipedia.org/wiki/VHF

http://en.wikipedia.org/wiki/Ultra_high_frequency

http://en.wikipedia.org/wiki/Miller_effect


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1.

2.

3.

3.

4.

5.

6.

7.

8.


Transistor

SCR

Voltmeter

Ammeter

Ammeter

Breadboard

Resistor

Resistor

Wires

(0-30)V

2N 2646

TY 6004

(0-15) V,(0-30)V

(0-10)mA(0-15)mA

(0-100)mA(0-500)μ A

1 KΩ

6.8 KΩ

2 Nos

1 No

1 No

2 No

1 No

1 No

1 No

2 Nos

1 No

Theory:

UJT:

Uni-junction is a three terminal semi-conductor switching device. The UJT

has an N-type bar leads B1 and B2.A P-type material closer to B2 forms PN-junctions.

The lead to this junction is called emitter lead.

The resistance of silicon bar is called the inner base resistance RBB which

is the sum of RB1 and RB2, where RB1 is the resistance of silicon bar between B2.and the

emitter junction. If a voltage VBB is applied between the two bases, with emitter

terminal open, a voltage gradient is established alone in the N- type bar. The voltage

across RB1 is given by

V1= ηVBB

Where η = RB1 / (RB1+RB2)

Where ‘η’ is called the intrinsic stand – off ratio. The voltage V1 reverse biases

the diodes and hence emitter current is cut – off. If a positive voltage VE is applied in the

emitter, the diode ‘D’ starts conducting, holes are injected from p-type material to N-

type bar and are swept down towards B1.This decreases the resistance between emitter

and B1.The emitter current increases regenerative and is limited by VE..The device is said

to be in the ‘ON’state.If a negative voltage is applied to the emitter, the PN junction

remains reverse biased and the emitter current is cut-off. The device now is said to be in

the ‘OFF’ state.

Characteristics of UJT:


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There are two important points on the characteristics curve

namely the peak – point and the valley point. These points divide the curve into three

important regions (i.e.) cut-off region, negative resistance region and saturation region.

These regions are explained below:

Cut-off region:

The region to the left of peak point is called cut-off region. In the

region.The emitter voltage is below the peak-point voltage (vp) and the emitter current

is approximately zero. The UJT is in its OFF position in this region.

Negative Resistance region:

The region between the peak-point and the valley –point is called

negative-resistance region. In this region, the emitter voltage decreases from VP to VV

and the emitter current increases from IP to IV.The increase in emitter current is due to

the decrease in resistance RB1.It is because of this fact that this region is called negative

resistance region. It is the most important region from the application point of view. For

example, when UJT is operated as an oscillator, it works in the negative resistance

region.

Saturation region:

The region, beyond the valley point, is called the saturation region. In this

region, the device is in its ON position. The emitter voltage (VE) remains almost constant

with the increasing current.

Applications:

Relaxation oscillator

Saw tooth wave generator

Phase control and in timing circuits.

Formula:

Voltage across RB1 is given by

V1 = η VBB

Where, η = RB1 / RB1+RB2

η - intrinsic stand-off ratio.

UJT specifications:

RMS output current – 3.5 A

Peak output current – 6.5 A


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Operating supply voltage – 50V

Procedure:

UJT:

1. Connections are made as per the circuit diagram. 2. Keeping some fixed value for VB1B2.vary the emitter voltage and note

the emitter current. 3. Tabulate the reading and plot a graph between VE and IE. 4. Calculate the intrinsic stand-off ratio.


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Characteristics Of UJT


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CHARACTERISTICS OF UJT

S.NO

VB1B2 = --------------V

VEB1 (V) IE (mA)

SCR:

SCR is four layer three terminal device which ends p-layer acts as anode, the end

N-layer acts as cathode and p-layer nearer to cathode and acts as Gate.SCR is uni-

directional device and like diode it allows flows current in one direction. But unlike

diode it has built in feature to switch ON and OFF. When the gate current IG =

0.Operation of SCR is similar to PNPN diode when Ia < 0 the reverse bias applied so that

break over voltage is decreased. Thereby decreasing break over voltage with very large


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positive gate current break over may occur at very low voltage, and by reducing supply

voltage below VH keeping the gate open.

Applications:

SCRs are mainly used in devices where the control of high power, possibly coupled with high voltage, is demanded. Their operation makes them suitable for use in medium to high-voltage AC power control applications, such as lamp dimming, regulators and motor control.

SCRs and similar devices are used for rectification of high power AC in high-voltage direct current power transmission. They are also used in the control of welding machines, mainly MTAW and GTAW processes.

Procedure:

1. Connect the circuit as per circuit diagram. 2. Set the gate current IG to the value when the SCR get triggered. 3. Once the break over occurs, note down the forward voltage and

corresponding forward current.

Reverse bias:

1. Connect the circuit as per circuit diagram. 2. Fix Ig value as per previous case vary the reverse voltage

and the down the corresponding reverse current.

http://en.wikipedia.org/wiki/High-voltage_direct_current

http://en.wikipedia.org/wiki/High-voltage_direct_current


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Characteristics Of SCR


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CHARACTERISTICS OF SCR:

FORWARD BIAS: VG = ------------mA

S.No Forward Voltage

(VF) V

Forward Current IF

(mA)


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REVERSE BIAS: VG = ------------mA

S.No Reverse Voltage

(VF) V

Reverse Current

IF (mA)

Viva voce:

1. Give the applications of UJT.

Timing circuits, switching circuits, phase control circuits, saw-tooth generators

2. Define tunneling phenomenon.

Instead of crossing over the junction barrier, the electron penetrates through the

barrier. It is known as tunneling phenomenon.

3. List the merits of tunnel diode.

Low cost

Simplicity

Low noise

High speed

Low power consumption

4. What are the applications of tunnel diode?

Pulse and digital circuits

Microwave oscillator

Switch networks

Pulse generators

Result:

Thus the characteristics of UJT (Uni- junction transistor) and SCR were

determined.


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10. CHARACTERISTICS OF DIAC AND TRIAC

Ex.No:10

Date:

Aim:

To determine the characteristics of DIAC AND TRIAC.

Apparatus required:


1.

2.

3.

3.

4.

5.

DIAC

Resistor

Voltmeter

Ammeter

Breadboard

Wires

SS 320

5 KΩ

(0-100)V(0-30)V

(0-50)mA

1 No

1 No

1 No

1 No

1 No

Theory:

The DIAC is a two terminal three layer bi-directional device, which can be

switched from its ‘OFF’ state to ‘ON’ state for either polarity of applied voltage. When

positive or negative voltage is applied across the terminal of DIAC .Only a small leakage

current IBE will flow through device. As applied voltage is increased the leakage current

will continue to flow until the voltage reaches the breakdown of the reverse bias

function occurs and the device exhibits negative resistance, the current through the

device increases and the voltage across the device drops to the breakdown voltage.

Triac is a bidirectional switch having three terminals that is it can be

triggered into conduction for both positive and negative voltage at anode (between

terminals MT1,MT2). It behaves like two SCR’S connected in inverse parallel with gate

as common.

Applications of DIAC:

Widely used as triggering devices in triac phase control circuits employed for

lamp dimmer,


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Heat control,

Universal motor speed control

Applications of TRIAC:

Speed controls for electric fans and other electric motors

Modern computerized control circuits of many household small and major

appliances.

Characteristics Of DIAC and TRIAC

Fig: MT1 negative with respect to MT2

http://en.wikipedia.org/wiki/Electric_fan

http://en.wikipedia.org/wiki/Electric_motor

http://en.wikipedia.org/wiki/Small_appliance

http://en.wikipedia.org/wiki/Major_appliance

http://en.wikipedia.org/wiki/Major_appliance


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DIAC specifications:

Vcc max – 5.5 V

Vcc min – 1.65V

No of channels – 2

PROCEDURE:

DIAC:

1. Connections are made as per the circuit diagram. 2. Vary the supply voltage and take the corresponding values of voltage and

current in voltmeter and millimeter respectively. TRIAC:

1. Connections are made as per the circuit diagram. 2. The method implies positive triggering. 3. Set the gate current to fixed value. 4. By varying the gate supply voltage between MT1, MT2, corresponding

values of voltage and current in voltmeter and millimeter respectively.


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Characteristics of TRIAC


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Viva voce:

1. What are the terminals of TRIAC?

MT1, MT2, gate.

2. What is DIAC?

DIAC is a two terminal three layer bi-directional device, which can be switched

from its ‘OFF’ state to ‘ON’ state for either polarity of applied voltage.

Result:

Thus the characteristics of DIAC AND TRIAC were determined.


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11. CHARACTERISTICS OF JFET AND MOSFET

EX NO: 11

DATE:

AIM:

To study the characteristics of JFET (Junction Field Effect Transistor) and

MOSFET.

Components required:

S.NO Components Type/Range Qty

1.

2

3

4

5

6

FET

Resistor

Ammeter

Voltmeter

Breadboard

Connecting wires

BFW10

1K, 68K

(0-30)mA

(0-30)V

1

1, 1

1

1

1

Theory:

JFET is a three terminal semi-conductor device in which the conduction is due to

either electrons or holes. Depending on the construction, FET’s are classified in to two

types namely, (i) Junction FET (JFET) and (ii) Metal oxide semi-conductor FET

(MOSFET).The JEFET is further classified in to N-channel JFET and P-channel JFET.

In N-channel JFET electrons from the majority carriers. It consists of three

terminals namely (i) Source (ii) Drain (iii) Gate. In the N-channel JFET, the N-type silicon

bar forms the conducting channel for the charge carriers.

When N-channel JFET, is applied with a voltage (VDS) across its drain and source

terminal, the electrons from source to drain causing the drain and source to drain

causing the drain current ’ID’.This drain current flows through the channel between the


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two P-regions. Its value can be controlled by controlling the width of the channel. This is

accomplished by carrying the reverse bias voltage (VGS) applied to the gate.

Drain characteristics:

First of all, we adjust the gate to source voltage (VGS) to zero volt. Then increase

the drain –to –source (VDS) in small suitable steps and record the corresponding values

of drain current. In at each step. now if we plot a graph with drain-to-source voltage

(VDS) along the horizontal axis and drain current (ID) along the vertical axis, we shall

obtained a curve marked VGS=0 as shown in the model graph. A similar procedure may

be used to obtain curves for different values of gate-to-source voltages.

In order to explain the typical shape of drain characteristics let us select the

curve with VGS=0 volt .The curve may be sub-divided in to the following regions.

Ohmic Region:

This region is shown as a curve OA in the figure. In this region, the drain current

increases linearly with the increase in drain-to-source voltages, obeying ohm’s law. the

linear increase in drain current is due to the fact that N-type semiconductor bar acts like

a simple resistor.

Curve AB:

In this region, the drain current increase at the reverse square law rate with the

increase in drain-to-source voltage. It means that the drain current increases slowly as

compared to that in Ohmic region. It is because of the fact, that with the increase in

drain-to-source voltage, the drain current increase. This in turn increases the reverse

bias voltage across the gate-source junction. As a result of this, the depletion region

grows in size, thereby reducing the effective width is reduced to a minimum value and is

known as pitch off occurs, is known as pinch-off voltage(VP).

Pinch-off region:

This region is shown by the curve BC. It is also called saturation region or

constant current remains at its maximum value.then drain current in the pinch –off

region, depends upon the gate-to-source voltage and is given by the relation

ID=IDSS (1-VGS/VD) ^2


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The above relation is known as Shockley’s equation. The pinch-off region is the

normal operation region of JFET, when used as an amplifier.

Breakdown region:

This region is shown by the curve CD. In this region, the drain current increase

rapidly as the drain-to source voltage is also increased. It happens because of the

breakdown of gate-to –source junction due to avalanche effect. This drain-to-source

voltage corresponding to point C is called break down voltage.

Transfer characteristics:

These are also called transconductance curves, which gives us the relationship

between drain current (ID) and gate-to-source voltage (VGS) for a constant value of

drain-to-source .Voltage to some suitable value and increase the gate-to-source voltage

in small step. Now record the corresponding values of drain current at each step. A

simple procedure may be to obtain curves at different values of gate-to source voltage

(VGS).

The upper end of the curve is shown by the drain current values equal to IDSS,

which the lower end is indicated by a voltage equal to VGS (OFF) or VP.It may be noted

that the curve is a part of a parabola and therefore may be expressed by the equation.

ID=IDSS (1-VGS/VP) ^2 =IDSS ((1-VGS)/VGS (OFF)) ^2

Applications of JFET:

-High Input Impedance Amplifier

-Low-Noise Amplifier

- Differential Amplifier

- Constant Current Source

- Analogue Switch or Gate

- Voltage Controlled Resistor

Applications of MOSFET:

Almost all electronics and appliances, including personal computers, contain millions of

silicon MOSFETs on a thumbnail sized chip

FORMULA:

Drain resistance RD= (∆VDS/∆ID) Ω

Trans conductance gm= (∆ID/∆VGS) mho


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Amplification factor =RD*gm

FET specifications:

No of gates – 1

Vcc min – 1.65V

Vcc max – 5.5V

Procedure:

Drain characteristics

1. Connect the circuit as per the circuit diagram.

2. By adjusting the RPS (1) set the gate-to-source (VGS) to a particular voltage.

3. Now vary the drain-to-source voltage (VDS) by adjusting the RPS (2) and note

down the

Corresponding variation in the drain current ID.

4. Repeat step 3 for various values of VGS

Transfer characteristics:

1. Connect the circuits as per the circuit diagram.

2. By adjusting the RPS (2) set the drain-to-source voltage (VDS) to a particular

voltage.

3. Now vary gate-to-source voltage (VGS) by adjusting the RPS (1) and note down

the corresponding variation in the drain current ID.

4. Reapet step 3 for various values of VDS.


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Characteristics of JFET and MOSFET

Viva voce:

1. What is FET?

It is a three terminal device with its output characteristics controlled by input

voltage.

2. Why FET is called voltage controlled device?

The output characteristics of FET are controlled by its input voltage thus it is

controlled.

3. What are the terminals available in FET?

Drain, source, gate

Result:

Thus the Drain & Transfer characteristics of given FET is plotted.


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12. CHARACTERISTICS OF PHOTO DIODE AND PHOTO TRANSISTOR

EX NO: 12

DATE:

Aim:

To study the characteristics of photo diode and photo transistor.

Components required:

S.NO Components Type/Range Qty

1.

2

3

4

5

6

Photo diode & photo transistor

Resistor

Ammeter

Voltmeter

Breadboard

Connecting wires

1K

(0-30)mA

(0-30)V

1

2

1

1

1

Theory:

It is a four layer PNPN device. Basically it is a rectifier with a control element. It consists of three diodes. It is used as switching device in power control applications. It has four layers alternatively P and N junctions. The three junctions are marked as J1, J2 and J3 where the three terminals are, anode,cathode and gate.

Photodiode specifications:

Pth – 0.2 Mw

S – 0.5 A/W

Id – 25 Ms

Photo transistor specifications:

IF – 50 Ma

Vceo – 80V

Pc – 100Mw


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Procedure:

Photo diode:

1. Rig up the circuit as per the circuit diagram 2. Maintain a known distance between the DC bulb and the photo piode. 3. Set the voltage of the bulb , vary the voltage of the diode insteps of 1V and note down

the corresponding diode current. 4. Repeat the above procedure for the various voltages of DC bulb. 5. Plot the graph

Applications: Used in consumer electronics devices such as compact disc players, smoke

detectors, and the receivers for infrared remote control devices used to control equipment from televisions to air conditioners.

Photo transistor:

1. Rig up the circuit as per the circuit diagram 2. Maintain a known distance between the DC bulb and the photo piode. 3. Set the voltage of the bulb , vary the voltage of the diode insteps of 1V and note down

the corresponding diode current. 4. Repeat the above procedure for the various voltages of DC bulb. 5. Plot the graph

Applications: Usable with almost any visible or near infrared light source such as LEDs, neon,

fluorescent, incandescent bulbs, laser, flame sources, sunlight, etc.... Same general electrical characteristics as familiar signal transistors (except that

incident light replaces base drive current)

PHOTO DIODE

http://en.wikipedia.org/wiki/Consumer_electronics

http://en.wikipedia.org/wiki/Compact_disc

http://en.wikipedia.org/wiki/Smoke_detector

http://en.wikipedia.org/wiki/Smoke_detector

http://en.wikipedia.org/wiki/Remote_control

http://en.wikipedia.org/wiki/Television


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PHOTO TRANSISTOR

. .

Viva voce:

1. What is photo diode? It is a light sensitive device used to convert light signal into electrical signal.

2. Define dark current? When there is no light, the reverse biased photodiode carriers a current which is very small and it is callad dark current.


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Result:

Thus the characteristics of photo diode and photo transistor were studied.

ANNA UNIVERSITY: CHENNAI – 600 025

B.E./B.Tech. DEGREE EXAMINATIONS, MAY /JUNE - 2012

Regulations - 2008

Second Semester

(Common to All Branches)

EC2155 – CIRCUITS AND DEVICES LABORATORY

Time: 3 Hours Maximum Marks: 100

1. State Kirchoff’s Current Law and for the circuit shown in Fig. 1, prove KCL at each

node by conducting a suitable experiment and verify the same by theoretical

calculations.

Aim

Circuit Connection Theoretical Inference

Viva Total

diagram & & Calculation & Result

Procedure Execution

10 25 25 20 10 10 100

2. State Kirchoff’s Voltage Law and for the circuit shown in Fig. 2, prove KVL for each


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loop by conducting a suitable experiment and verify the same by theoretical calculations.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

3. Convert the circuit shown in Fig. 3, into an equivalent Current source in parallel to an

equivalent resistor across terminals A-B by theoretical calculations and verify the same by conducting a suitable experiment.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

4. Convert the circuit shown in Fig. 4, into an equivalent Voltage source in with an

equivalent resistor across terminals A-B by theoretical calculations and validate the


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constructed equivalent circuit by conducting a suitable experiment.

Fig. 4

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

5. For the circuit shown in Fig. 5, measure the current through 2kΩ resistor by connecting the

5V source only and by connecting 8V source only, subsequently measure the current in

2kΩ resistor by simultaneously connecting both the 5V and

8V sources. Thereby prove the associated theorem by theoretical calculations.

Fig. 5

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100


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6. For the circuit shown in Fig. 6, state and prove Superposition theorem by conducting a

suitable experiment and verify the same by theoretical calculations.

Fig. 6

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

7. For the circuit shown in Fig. 7, calculate the value of load resistor RL for which maximum

power is transferred from source to load and compute the maximum value of power delivered to RL. And experimentally verify that for any other load

values (say 10% increase and 10% decrease from optimal value) the power

transferred to the load is lesser.

Fig. 7

Aim Circuit Connection Theoretical Inference Viva Total


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Procedure Execution

10 25 25 20 10 10 100


power is transferred from source to load and for a load with 120% of optimal RL, state and

prove Reciprocity theorem by conducting a suitable experiment.

Fig. 8

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100


power is transferred from source to load by conducting a suitable experiment measure the current through 390Ω resistor and subsequently measure the

current by interchanging the position of 5V source and RL resistor. Using the measured

values state the inference of the experiment and validate it by theoretical calculations.


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Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

10. With the following parameters R = 1kΩ, L = 2H and C = 1μF, construct a series RLC

circuit determine the value of resonant frequency and its corresponding

amplitude by plotting the variation of voltage across supply frequency.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

11. For the following parameters R = 1kΩ, L = 2H and C = 1μF, construct a Parallel RLC

circuit and determine the value of resonant frequency and its corresponding

amplitude by plotting the variation of current across supply frequency.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100


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12. By conducting a suitable experiment obtain the V-I characteristics of a semiconductor

based device which is used as an uncontrolled rectifier (minimum of 5 readings have to be taken for both forward and reverse biased conditions). Also

compute the values of threshold voltage, reverse leakage current and dynamic

resistance.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

13. By conducting a suitable experiment obtain the V-I characteristics of a semiconductor

based device which is used as a voltage regulator (minimum of 5 readings have to be taken

for both forward and reverse biased conditions). Also compute the value of reverse leakage

current and breakdown voltage.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

14. By conducting a suitable experiment plot the input and output characteristics of a

BJT configuration having a current gain greater than unity and with moderate input

and output resistances (minimum of 5 readings have to be taken for both input and

output characteristics). Also compute the values of input impedance and output

admittance.


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Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

15. By conducting a suitable experiment plot the input and output characteristics of a

BJT configuration having a current gain lesser than unity and with low input and

high output resistances (minimum of 5 readings have to be taken for both input and

output characteristics). Also compute the values of input impedance and output

admittance.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

16. By conducting a suitable experiment plot the V-I characteristics of a semiconductor

device widely used to generate sawtooth waveform (minimum of 5 readings have to

be taken for both forward and reverse biased conditions) and denote the various

regions of operation in the V-I characteristics.

Aim


Viva Total



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Procedure Execution

10 25 25 20 10 10 100

17. Conduct an experiment to obtain the forward and reverse characteristics of a semiconductor

device widely used as a controller rectifier and denote the value of minimum current to

turn-on the device in the V-I characteristics (minimum of 5 readings have to be taken for

both forward and reverse biased conditions).

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

18. By conducting a suitable experiment obtain the characteristics of a semiconductor device in

which the current flow is controlled by an electric field (minimum of 5 readings have to be

taken for both forward and reverse biased conditions). Using the characteristic plot,

compute the values of transconductance, drain resistance and amplification factor. Also

denote the various regions of operation in the characteristics.

Aim


Viva Total


Procedure Execution

10 25 25 20 10 10 100

19. By conducting a suitable experiment obtain the V-I characteristics of a two

terminal

semiconductor device which acts as a bidirectional switch. Also conduct an

experiment to plot the V-I characteristics of a three terminal bidirectional

semiconductor device used as a switch under forward and reverse biased conditions


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(minimum of 5 readings have to be taken for both forward and reverse biased

conditions)

Aim

Circuit Connection Inference

Viva Total

diagram & & & Result

Procedure Execution

10 25 35 20 10 100

20. By conducting a suitable experiment plot the V-I characteristics of a two terminal (100)

and three terminal semiconductor devices which are used as photoconductors and

by subsequently varying the intensity of light source obtain another V-I

characteristics. What can be inferred by comparing the two V-I characteristics?

Aim

Circuit Connection Inference

Viva Total

diagram & & & Result

Procedure Execution

10 25 35 20 10 100

EDC Lab Manual

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