ECEN689: Special Topics in Optical Interconnects Circuits ...spalermo/ecen689_oi/lecture5_ee689...T...

Sam PalermoAnalog & Mixed-Signal Center

Texas A&M University

Lecture 5: Transimpedance Amplifiers (TIAs)

ECEN689: Special Topics in Optical Interconnects Circuits and Systems

Spring 2020

Announcements• Reading

• Sackinger Chapter 5• Razavi Chapter 4

2

Agenda• Optical Receiver Overview• Transimpedance Amplifiers

• Common-Gate TIAs• Feedback TIAs• Common-Gate & Feedback TIA Combinations• Differential TIAs

• Integrating Optical Receivers• Equalization in Optical Front-Ends

3

Optical Receiver Technology• Photodetectors convert optical

power into current• p-i-n photodiodes• Waveguide Ge photodetectors

• Electrical amplifiers then convert the photocurrent into a voltage signal• Transimpedance amplifiers• Limiting amplifiers• Integrating optical receiver

4

TIA Output

LA Output

• Key design objectives• High transimpedance gain• Low input resistance for high bandwidth and efficient gain

• For large input currents, the TIA gain can compress and pulse-width distortion/jitter can result

Transimpedance Amplifier (TIA)

5

T

i

oT

ZivZ

log20by dB of unitsin expressed Also

anceTransimped

• Input Overload Current• The maximum peak-to-peak input current for which we can

achieve the desired BER• Assuming high extinction ratio

• Maximum Input Current for Linear Operation• Often quantified by the current level for a certain gain

compression (1dB)

Maximum Currents

6

ovlppovl PRi 2

ppovl

pplin ii

Resistive Front-End

• Direct trade-offs between transimpedance, bandwidth, and noise performance

7

DLDinpdB

LinT

CRCRBW

RRR11

3

L

Drmsinn

DLL

outninn

DLTnoutn

RCKT

I

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RkTdfZIV

,,

22

2,2

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4

D

in

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2n,out

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[Razavi]




8

Common-Gate TIA

• Input resistance (input bandwidth) and transimpedance are decoupled

9

mombm

Doin

DT

grggRrR

RR1

1

m i o mb i D

out

i

in

in

[Razavi]

Common-Gate TIA Frequency Response

• Often the input pole may dominate due to large photodiode capacitance (100 – 500fF)

10

outDmbm

in

D

in

out

CsRgg

Cs

Riv

11:

11

r transistor Neglecting o

Bin

B

D

out

in

out

[Razavi]

Common-Gate TIA Noise• Both the bias current source

and RD contribute to the input noise current

• RD can be increased to reduce noise, but voltage headroom can limit this

• Common-gate TIAs are generally not for low-noise applications

• However, they are relatively simple to design with high stability

11

HzA

HzV

r transistor Neglecting

2

2

o

Dminn

DD

mDRDnMnoutn

RgkTI

RR

gkTRIIV

1324

1324

:

22,

22

22,

22,

2,

[Razavi]

Regulated Cascode (RGC) TIA

12

[Park ESSCIRC 2000]• Input transistor gm is boosted by common-source amplifier gain, resulting in reduced input resistance

• Requires additional voltage headroom

• Increased input-referred noise from the common-source stage

CMOS 20GHz TIA

13333222 RgARgA mm

• An additional common-gate stage in the feedback provides further gm-boosting and even lower input resistance

• Shunt-peaking inductors provide bandwidth extension at zero power cost, but very large area cost

[Kromer JSSC 2004]




14

Feedback TIA w/ Ideal Amplifier

• Input bandwidth is extended by the factor A+1• Transimpedance is approximately RF• Can make RF large without worrying about voltage

headroom considerations 15

IDFTinp

FT

Fin

pTT

CCRA

CR

RA

AR

ARR

sRsZ

11

1

1

11

:AmplifierBandwidth InfiniteWith

Feedback TIA w/ Finite Bandwidth Amplifier

16

1

1

11

11

11

22

ARR

TCRTCRA

Q

TCRA

RA

AR

sQsRsZ

sTA

sAsA

Fin

ATF

ATF

ATFo

FT

ooTT

A

A

: AmplifierBandwidth Finite With

• Finite bandwidth amplifier modifies the transimpedancetransfer function to a second-order low-pass function

Feedback TIA w/ Finite Bandwidth Amplifier

17

• Non-zero amplifier time constant can actually increase TIA bandwidth!!

• However, can result in peaking in frequency domain and overshoot/ringing in time domain

• Often either a Butterworth (Q=1/sqrt(2)) or Bessel response (Q=1/sqrt(3)) is used• Butterworth gives maximally flat

frequency response• Bessel gives maximally flat group-

delay Butterworth

Bessel

[Sackinger]

-A(s)

CDiin

RF

vout

CI

Feedback TIA Transimpedance Limit

18

• Maximum RT proportional to amp gain-bandwidth product• If amp GBW is limited by technology fT, then in order to

increase bandwidth, RT must decrease quadratically!

3dB

03dB

11

bandwidthgiven afor possible maximum theyields expression above into 1

Plugging

1 of case 0n larger tha times2211

:responseh Butterwort aFor

21 2

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:responsefrequency flat mazimally for responseh Butterwort a assume weIf

TT

A

TFT

TFA

TFTF

A

TFAA

CRA

AA

RRA

AR

CRAT

CRAA

CRA

CRA

TQ

23dBT

AT C

AR

Maximum [Mohan JSSC 2000]

Feedback TIA

19

Dmmout

Dm

Fin

FDm

DmT

Dm

RggR

RgRR

RRg

RgR

RgA

12

1

1

1

1

11

1

1

1 of gain ideal an hasfollower source thethat Assuming

F

D

A

in

D

out

• As power supply voltages drop, there is not much headroom left for RD and the amplifier gain degrades

• CMOS inverter-based TIAs allow for reduced voltage headroom operation

• Cascaded inverter-gm + TIA stage provide additional voltage gain

• Low-bandwidth feedback loop sets the amplifier output common-mode level

CMOS Inverter-Based Feedback TIA

20

[Li JSSC 2014]

• TIA noise is modeled with an input-referred noise current source that reproduces the output TIA output noise when passed through an ideal noiseless TIA

• This noise source will depend on the source impedance, which is determined mostly by the photodetector capacitance

Input-Referred Noise Current

21

Hz

pA2

• Input-referred noise current spectrum typically consists of uniform, high-frequency f2, & low-frequency 1/f components

• To compare TIAs, we need to see this noise graph out to ~2X the TIA bandwidth• Recall the noise bandwidth tables

Input-Referred Noise Current Spectrum

22

Hz

pA2

• The input-referred rms noise current can be calculated by dividing the rms output noise voltage by the TIA’s midbandtransimpedance value

Input-Referred RMS Noise Current

23

BW

TIAnTT

rmsTIAn dffIfZ

Ri 2

02,

2,

1

• If we integrate the output noise, the upper bound isn’t too critical. Often this is infinity for derivations, or 2X the TIA bandwidth in simulation

• This rms current sets the TIA’s electrical sensitivityrms

TIAnppsens Qii ,2

• To determine the total optical receiver sensitivity, we need to consider the detector noise and responsivity

• TIA noise performance can also be quantified by the averaged input-referred noise current density

Averaged Input-Referred Noise Current Density

24

dB

rmsTIAnavg

TIAn BWi

i3

,,

bandwidth.TIA over the

spectrum, noise referred-input theaveragingthan different is thisNote,

.Hz

pA of units hasquantity This

2, fI TIAn

• The feedback resistor and amplifier front-end noise components determine the input-referred noise current spectrum

FET Feedback TIA Input-Referred Noise Current Spectrum

25

fIfIfI frontnresnTIAn2,

2,

2,

• The feedback resistor component is uniform with frequency

F

resn RkTfI 42

,

FET Feedback TIA Input-Referred Noise Current Spectrum

26

• Gate current-induced shot noise

designs CMOSfor small typicallyis This

22, GGn qII

• FET channel noise

process. on the depending 3-0.7 typicallyfactor, noise channel theis

42,

mDn gkTI

Input-Referring the FET Channel Noise

27

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, calculate could we this,do To

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is noise channel FET referred-input thefunction, transfer pass-high thisUsing

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11

calculate andoutput theground to)equivalent (andeasier isit But

fgCkT

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ii

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ii

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TIAn

Dn

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FT

TIAnmTIAnmDn

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Uniform and f2 component!

Total Input-Referred FET Feedback TIA Noise

28

22

22,

241424 fgCkT

RgkTqI

RkTfI

m

T

FmG

FTIAn

Feedback Resistor Gate Shot Noise FET Channel Noise

• Note that the TIA input-referred noise current spectrum begins to rise at a frequency lower than the TIA bandwidth




29

Common-Gate & Feedback TIA

30

• Recall that the feedback TIA stability depends on the ratio of the input pole (set by CD) and the amplifier pole• Large variation in CD can degrade amplifier stability

• Common-gate input stage isolates CD from input amplifier capacitance, allowing for a stable response with a variety of different photodetectors

• Transimpedance is still approximately RFA/(1+A)

Common-Gate

Feedback TIA

[Mohan JSSC 2000]

RF RF

BJT Common-Base & Feedback TIA

31

• Transformer-based negative feedback boosts gm with low power and noise overhead

• Input series peaking inductor isolates the photodetectorcapacitance from the TIA input capacitance

• High frequency techniques allow for 26GHz bandwidth with group delay variation less than 19ps

[Li JSSC 2013]




32

Differential TIAs

33

• Differential circuits have superior immunity to power supply/substrate noise

• A differential TIA output allows easy use of common differential main/limiting amplifiers• This comes at the cost of higher

noise and power• How to get a differential output

with a single-ended photocurrent input?• Two common approaches, based on

the amount of capacitance applied at the negative input

Balanced TIA

34

• A balanced TIA design attempts to match the capacitance of the two differential inputs

DX CC

• This provides the best power supply/substrate noise immunity, as the noise transfer functions are similar

• Due to double the circuitry, the input-referred rms noise current is increased by sqrt(2)

design ended-single theasfunction transfer Same

11

1

andamplifierBW high an Assuming

ARsC

RA

A

ivvsZ

CCC

FT

F

i

ONOPT

IDT

Pseudo-Differential TIA

35

• A pseudo-differential TIA design uses a very large capacitor at the negative input, such that it can be approximated as an AC ground XC

• While not good to reject power supply/substrate noise, it does provide significant filtering of the RF’ noise

• The differential transimpedanceis approximately doubled relative to the single-ended case

12

1

22

andamplifierBW high an Assuming

ARsC

RA

A

ivvsZ

CCC

FT

F

i

ONOPT

IDT

Offset Control

36

• Due to the single-ended photodetector signal, the differential output signal swings from 0 to Vppd, which can limit the dynamic range

• Adding offset control circuitry can allow for an output swing of ±Vppd/2

Differential Shunt Feedback TIA

37




38

39

Optical RX Scaling Issues

Traditionally, TIA has high RT and low Rin

AARR FT 1

INFdB CR

A

13

Headrooom/Gain issues in 1V CMOS• A ≈ 2 – 3

Power/Area Costs 4

32 TIA dBINTD fCRI

23 LA dBD fI

VDDVVV GSGSA *8.021

VOD

VDDVOD

VVDDRgA ADm

*2.01

40

Integrating Receiver Block Diagram

[Emami VLSI 2002]

41

Demultiplexing Receiver

• Demultiplexing with multiple clock phases allows higher data rate̶ Data Rate = #Clock Phases x Clock Frequency̶ Gives sense-amp time to resolve data̶ Allows continuous data resolution

42

1V Modified Integrating Receiver

Differential BufferFixes sense-amp common-mode input for improved

speed and offset performanceReduces kickback chargeCost of extra power and noise

Input Range = 0.6 – 1.1V

43

Receiver Sensitivity Analysis

mVC

kT

sampsamp 92.02

mVbuffer 03.1 mVSA 45.0

Residual SA Offset = 1.15mV

Max Vin(IAVG) = 0.6mV

16Gb/sat 65.0 NoiseJitter Clock mVvT b

b

jclk

mVclkSAbuffersamptot 59.1 NoiseInput Total 2222

Vb for BER = 10-10 = 6.4tot + Offset = 11.9mV

b

inpdbavg T

CCVP

Gb/s Pavg (dBm)

10 -9.816 -7.8

44

Integrating Receiver Sensitivity

• Test Conditions̶ 8B/10B data patterns

(variance of 6 bits)̶ Long runlength data

(variance of 10 bits)

• BER < 10-10

[Palermo JSSC 2008]

45

Integrating RX with Dynamic Threshold

• Dynamic threshold adjustment allows for un-coded data

[Nazari ISSCC 2012]

46

Integrating RX with Dynamic Threshold

[Nazari ISSCC 2012]




47

Low-BW TIA & CTLE Front-End

48

• Improved sensitivity is possible by increasing the first stage feedback resistor, resulting in a high-gain low-bandwidth TIA

• The resultant ISI is cancelled by a subsequent CTLE

[Li JSSC 2014]

Active CTLE Example

49

Din- Din+

Vo-Vo+


50

• Significant reduction in feedback resistor noise

• Low-frequency input and post amplifier noise is also reduced

[Li JSSC 2014]


51

[Li JSSC 2014]

25Gb/s Eye Diagram

Low-BW TIA & DFE RX

52

• In a similar manner, a high-gain low-bandwidth TIA is utilized

• The resultant ISI is cancelled by a subsequent 1-tap loop-unrolled DFE

[Ozkaya JSSC 2017]

DFE Example

53

• If only DFE equalization, DFE tap coefficients should equal the unequalized channel pulse response values [a1 a2 … an]

• With other equalization, DFE tap coefficients should equal the pre-DFE pulse response values

• DFE provides flexibility in the optimization of other equalizer circuits

• i.e., you can optimize a TX equalizer without caring about the ISI terms that the DFE will take care of

a1

a2

[w1 w2]=[a1 a2]

Low-BW TIA & DFE RX

54

• As RF is increased, the main cursor increases and the SNR improves is ISI is cancelled by a DFE

• Large performance benefit with a low-complexity 1-tap DFE

[Ozkaya JSSC 2017]

Low-BW TIA & DFE RX

55

• Self-referenced TIA is used for differential generation

• Actual 64Gb/s pulse response has a significant pre-cursor ISI tap, which requires a 2-tap TX FFE

[Ozkaya JSSC 2017]

64Gb/s Pulse Response & Timing Margin

Next Time• Main/Limiting Amplifiers

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