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Introduction

ECE 637 ECE 637 Integrated VLSI Integrated VLSI CircuitsCircuits

IntroductionIntroduction

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Introduction

Course DetailsCourse DetailsInstructor

Mohab Anis; manis@vlsi.uwaterloo.caText

Digital Integrated Circuits, Jan Rabaey, Prentice Hall, 2nd edition

Grading Project 35%, Presentation 15%, Final 50%

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Introduction

Course OutlineCourse OutlineIntroduction – this lecture (1)Diode (3)

Static behavior; Parasitic capacitances and dynamic behavior; Secondary effects & SPICE model

MOS Transistor (6)Static behavior; Parasitic capacitances and dynamic behavior; Short channel effects; scaling; SPICE MOS models; Process variations & process impact

MOS Inverter (7)Properties; Static behavior; Dynamic behavior; Power, energy consumption and power-delay, energy-delay products; Layout considerations/design rules

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Introduction

Course Outline (Contd.)Course Outline (Contd.)Combinational Circuits (8)

Implementation styles - static, ratioed, pass transistor; CPL, dynamic logic ; Signal integrity issues in dynamic circuits; Cascading dynamic circuits; Low power, high performance circuits

Sequential Circuits (6)Timing metrics for sequential circuits; Static and dynamic flip-flops and latches; High speed pipeline circuits

Arithmetic Circuits (6)Adder, circuits and architectures

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Introduction

ProjectProjectTopics

Design of a high performance 16-b adder64-b priority encoder

Project requirementsIndividual effortAll project must involve circuit design,

transistor sizing, simulations

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Introduction

Project (Contd.)Project (Contd.)Deadlines

1 page proposal that states: objectives, project outline, milestones, workload distribution (week 3)2 page progress report (week 8)<20 pages project report (week 13); single report per project

What will you learn?What will you learn?

§ Understanding, designing, and optimizing digital circuits in the deep-submicron regime with respect to different quality metrics: cost, speed, power dissipation, and reliability

IntroductionIntroduction

qWhy is designing digital ICs different today than it was before?

qWill it change in future?

Intel 4004 MicroIntel 4004 Micro--Processor (1971)Processor (1971)

19711000 transistors1 MHz operationNMOS only replacing PMOS based integrated circuits (higher speed)

Intel Pentium (IV) microprocessor (2000)Intel Pentium (IV) microprocessor (2000)

In the early 1970s, CMOS technology replaced NMOS-only logic which started suffering from high power consumption. Ever since, CMOS has been the dominant digital technology. Interestingly enough, power consumption concerns are rapidly becoming dominant in CMOS designs as well, and this time there does not seem to be a new technology around the corner to alleviate this problem.

Issues in Digital IC Design Issues in Digital IC Design -- Moore’s LawMoore’s LawlIn 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months (# of transistors that can be integrated on a single die would grow exponentially with time).

1 61 51 41 31 21 11 0

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Electronics, April 19, 1965.

Transistor CountsTransistor Counts

Courtesy, Intel

An intriguing case study is offered by the microprocessor. From its inception in theearly seventies, the microprocessor has grown in performance and complexity at a steadyand predictable pace. The number of transistors and the clock frequency for a number oflandmark designs are collected in Figure 1.3. The million-transistor/chip barrier wascrossed in the late eighties. Clock frequencies double every three years and have reached

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Transistors on Lead Microprocessors double every 2 yearsTransistors on Lead Microprocessors double every 2 years

Die Size GrowthDie Size Growth

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~7% growth per year~2X growth in 10 years

Die size grows by 14% to satisfy Moore’s LawDie size grows by 14% to satisfy Moore’s Law

Courtesy, Intel

FrequencyFrequency

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Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years

Doubles every2 years

Courtesy, Intel

Clock frequencies doubled every 3 years in the past decade and have reached the GHz range.

This trend has not shown any signs of a slowdown.

Impact on Design => Hierarchical approachImpact on Design => Hierarchical approachCustom/HandcraftedThis revolution has had a profound impact on how digital circuits are designed. Early designs were truly hand-crafted. Every transistor was laid out and optimized individually and carefully fitted into its environment, for example the design of the Intel 4004 microprocessor. This approach is, obviously, not appropriate when more than a million devices have to be created and assembled. With the rapid evolution of the design technology, time-to-market is one of the crucial factors in the ultimate success of a component.

HierarchicalDesigners have, therefore, increasingly adhered to rigid design methodologies and strategies that are more amenable to design automation. The impact of this approach is apparent from the layout of one of the later Intel microprocessors, the Pentium IV. Instead of the individualized approach of the earlier designs, a circuit is constructed in a hierarchical way: a processor is a collection of modules, each of which consists of a number of cells on its own. Cells are reused as much as possible to reduce the design effort and to enhance the chances for a first-time-right implementation. The fact that this hierarchical approach is at all possible is the key ingredient for the success of digital circuit design and also explains why, for instance, very large scale analog design has never caught on.

Design Abstraction LevelsDesign Abstraction Levels

n+n+S

GD

+

DEVICE

CIRCUIT

GATE

MODULE

SYSTEM

Question: Why hierarchal design approach is feasible in digital world and not in analog designs?

Answer: Abstraction ! At each design level, the internal details of a complex module can be abstracted away and replaced by a black box view or model. This model contains virtually all the information needed to dealwith the block at the next level of hierarchy. For instance, once a designer has implemented a multiplier module, its performance can be defined very accurately and can be captured in a model. The performance of this multiplier is in general only marginally influenced by the way it is utilized in a larger system. For all purposes, it can hence be considered a black box with known characteristics. As there exists no compelling need for the system designer to look inside this box, design complexity is substantially reduced.

(Analogous to to a library of software routines)

Cell libraries: contain complete documentation and characterization of the behavior of the cells. Typically stacked in rows and interconnected by routing channels.

This abstraction facilitated the design of Computer-aided frameworks for digital ICs

Design MetricsDesign Metrics

q How to evaluate performance of a digital circuit (gate, block, …)?§ Reliability§ Scalability§ Speed (delay, operating frequency) § Power dissipation§ Energy to perform a functionDepending on the application, more significance is

given to one design criterion over another.

Power DissipationPower Dissipation

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Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase

Courtesy, Intel

Power will be a major problemPower will be a major problem

5KW 18KW

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Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive

Courtesy, Intel

Power densityPower density

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Hot Plate

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Power density too high to keep junctions at low tempPower density too high to keep junctions at low temp

Courtesy, Intel

Not Only MicroprocessorsNot Only Microprocessors

Digital Cellular Market(Phones Shipped)

1996 1997 1998 1999 2000

Units 48M 86M 162M 260M 435M Analog Baseband

Digital Baseband

(DSP + MCU)

PowerManagement

Small Signal RF

PowerRF

(data from Texas Instruments)(data from Texas Instruments)

CellPhone

Challenges in Digital DesignChallenges in Digital Design

“Microscopic Problems”• Ultra-high speed design• Interconnect• Noise, Crosstalk• Reliability, Manufacturability• Power Dissipation• Clock distribution.

Everything Looks a Little Different

“Macroscopic Issues”• Time-to-Market• Millions of Gates• High-Level Abstractions• Reuse & IP: Portability• Predictability• etc.

…and There’s a Lot of Them!

?

SummarySummary

q Digital integrated circuits have come a long way and still have quite some potential left for the coming decades

q Some interesting challenges ahead§ Getting a clear perspective on the challenges and

potential solutions is the purpose of this course

q Understanding the design metrics that govern digital design is crucial§ Reliability, speed, power and energy dissipation