ECE 3110: Introduction to Digital Systems Introduction (Contd.)
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Transcript of ECE 3110: Introduction to Digital Systems Introduction (Contd.)
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ECE 3110: Introduction to Digital Systems
Introduction (Contd.)
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Previous class Summary Digital devices Digial vs analog Why digial
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Digital Devices Gates: has one or more inputs and
produces an output that is a function of the current input values. AND, OR, NOT…
Flip-flop: a device that stores 0 or 1. A FF can be built from a collection of gates.
Combination circuit: gates Sequential circuit:FFs+gates, has a
memory of past events.
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Digital Logic Binary system -- 0 & 1, LOW & HIGH,
negated and asserted. Basic building blocks -- AND, OR,
NOT
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Electronic aspect of digital design
Digital abstraction
Range
Noise margin
Invalid range
SpecificationsElectronic Circuit Designer, Digital Designer
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Software aspect of digital design
Digital design need not involve any software tools.
But: modern design, software tools are essential.
Examples: Schematic entry, HDLs (platform compilers,
simulators, synthesis tools),simulators, test benches, timing analyzers and verifiers, word processors, high-level languages, CAD
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Integrated Circuits (IC) A collection of one or more gates
fabricated on a single silicon chip. Wafer, die
Copyright © 2001 Fine Arts Photographics
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Integrated Circuits (IC) Small-scale integration (SSI): 1-20
DIP: dual in-line-pin package Pin diagram, pinout
MSI: 2-200 gates LSI: 200-200,000
VLSI: >100,000, 50million (1999)
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DIP
pinout
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Programmable Logic Device (PLD) ICs which Logic function can be
programmed after manufacture. 2-level AND-OR gates using user-
programmable connections PLAs: programmable Logic Arrarys. PALs: programmable array logic devices Programmable logic devices (PLDs)
CPLD: complex PLD FPGA: Field-Programmable Gate Array
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CPLD vs FPGA
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Application-Specific ICs (ASIC) Semicustom IC: chips designed for a
particular, limited product/application Reducing chip count, size, power
consumption Higher performance. NRE: nonrecurring engineering cost
Standard cells: library Gate arrary: an IC with internal structure as
an array of gates, unspecified interconnection
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Printed-Circuit Board PCB or PWB (printed-wiring board) Mount Ics so that an IC can
connect to other Ics in a system. SMT: Surface-mount technology MCM: multichip modules: high
speed and density.
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Digital Design Levels Many representations of digital logic Device Physics and IC manufacturing
Moore’s Law [1965, Gordon Moore]:
Transistor level --->Logic design, functional building blocks
The number of transistors per square inch in an IC doubles every year [18months].
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Digital Design Levels Transistor-level circuit diagrams Example: Multiplexor
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Truth tables
Gate-level Logic diagrams
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Prepackaged building blocks, e.g. multiplexer
Equations: Z = S A+ S B
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Various hardware description languages ABEL
VHDL
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Summary Electronics/sw aspects of digital
design Integrated Circuits
(wafer,die,SSI,MSI,LSI,VLSI) PLDs: PLAs,PALs,CPLD,FPGA ASIC Digital Design Levels
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Next… Number systems
Reading: Wakerly chapter 2
HW #1 Assign Thursday 01/22/2004:
Work Wakerly problems 1.3, 1.5, 1.6
Due: Tuesday 01/27/2004