Eca Labmanual Multisim

SRINIVASA INSTITUTE OF TECHNOLOGY AND SCIENCE,KADAPA

1

ELECTRONIC CIRCUIT ANALYSIS

LABORATORY MANUAL

DEPARTMENT

OF

ELECTRONICS & COMMUNICATION ENGINEERING


2

INDEX

S.NO NAME OF THE EXPERIMENT PAGE.NO

SOFT WARE

1. COMMON EMITTER AND COMMON SOURCE 1

AMPLIFIER.

2. TWO STAGE RC COUPLED AMPLIFIER. 9

3. CURRENT SHUNT AND FEED BACK AMPLIFIER 16

4. RC PHASE SHIFT OSCILLATOR. 21

5. CLASS A AND CLASS AB POWER AMPLIFIERS 25

6. HIGH FREQUENCY COMMON BASE AMPLIFIER. 32

HARD WARE

7. TWO STAGE RC COUPLED AMPLIFER 38

8. CURRENT SHUNT AND FEED BACK AMPLIFIER 41

9. CLASS A AND CLASS AB POWER AMPLIFIERS. 44

10. SINGLE TUNED VOLTAGE AMPLIFIER 48

11. SERIES VOLTAGE REGULATOR 50

12. SHUNTVOLTAGE REGULATOR. 52


3

COMMON EMITTER AND COMMON SOURCE AMPLIFIER

AIM: To design CE single stage amplifier with potential divider circuit using

NPN Transistor 2N2923 for the specifications : IC= 3 mA, Vce = 10v,β = 190,

& IR1 = 32IB .verify DC values (Voltage and current) at various nodes using

MULTISIM.

APPARATUS: - Multisim Soft ware.

DESIGN PROCEDURE: Vcc = 25V

Select VRE ≤ VCE

Select VRE = 5V

∴ RE

= VRE

I C

= 5

= 1.66K (select 2.00K ) 3m

& VRC=VCC-VCE-VRE=25-10-5=10V

∴ RC

= VRC

I C

= 10

3m

= 3.33K�

I = I

C

B β =

3m

190

= 15�A

∴ I R1 = 32I B = 32 ×15� = 480�A

∴ I R 2 = I R1 − I B = 480 − 15 = 465�A

& VB = VBE + VRE = 0.65 + 5 = 5.65V

∴ R2 = VB

I R 2

= 5.65

465�

= 12.15K�

VCC

R1 = − VB

= 25 − 5.65

= 40.3125K� I

R1 480�


4

CIRCUIT DIAGRAM:-

VCC

25V

R1 VCC R4

40.2kOhm_1% 40.2kOhm_1%

9

V3

0V V2

4 0V

V1

0V

3 R2

V4 10

0V

7 Q1

2N2923 11

2

R3

2.00kOhm_1% 12kOhm_5%

0

PROCEDURE:- 1. Rig up the circuit using multisim software and verify the

results using DC operating point analysis (simulate ---- analysis ----- DC

operating point).


5

2.Rig up the circuit using multisim software and verify the results using DC

transfer characteristic analysis(simulate ---- analysis ----- DC sweep)

Out put voltage VCE variation with V CC (0 to 25V)

RESULT:- The CE single stage amplifier is designed. The D.C voltages and

currents at various nodes are observed. The D.C transfer characteristic is

plotted.


6

V21

COMMON SOURCE AMPLIFIER

AIM: a) To design a single stage FET Common Source amplifier with potential

divider circuit using 2n4861 FET-N channel for the following specifications:

VDD = 24V,ID = 1ma,VGS=2V,VPMAX =13V,RL=1K.

b) To observe dc operating point, frequency response, DC transfer characteristic

& C.R.O waveforms.

APPARATUS: Multisim soft ware.

DESIGN PROCEDURE:

VDSmin = VPmax + 1 - VGS

= 13 + 1 - 2

= 12V

VS = VRD = VDD

− VDS min

2 =

24 −12 = 6

2

RD = RS

V 6 = RD =

I D 1m

= 6K�(Use s tan dard

value6.3K�)

VG = VS − VGS = 6 − 2 = 4V = VR 2

Select R2 =1M�

V R = R1 × R

R2

VR1

∴R1

= VDD − VG = 24 − 4

= 20 ×1M

= 5M� 4

= 20

(Use s tan dard value which is less than or equal to 5M i.e. 4.7M )


7

CIRCUIT DIAGRAM:


results using DC operating point analysis (simulate----analysis ---- DC operating

point)


8

2.Rig up the circuit using multisim software and verify the results using DC

transfer characteristic analysis(simulate ---- analysis ----- DC sweep)

3. Rig up the circuit using multisim software and verify the results using AC

analysis (Simulate ---- analysis ----- AC analysis)


9

4.Rig up the circuit using multisim software and verify the results using

Oscilloscope

RESULT: The CS single stage amplifier is designed with the given

specifications. The D.C operating point analysis is performed. The frequency

response is plotted and the Band width is found.


10

TEST YOUR SELF

1. What is meant by Q- point?

2. What is the need for biasing a transistor?

3. What factors are to be considered for selecting the operating point Q for

an amplifier?

4. Distinguish between D.C. and A.C load lines.

5. What are the reasons for keeping the operating point of a transistor as

fixed?

6. What is thermal runaway? How can it be avoided?

7. What are the factors which contribute to thermal instability?

8. Define ‘Stability Factor’. Why would it seem more reasonable to call this

an instability factor?

9. How will be the output voltage in a CS amplifier?

10.To have good voltage gain and high input resistance which FET amplifier

is to be used?


11

2

TWO STAGE RC COUPLED AMPLIFIER

Q1) Design a single stage transistor amplifier with potential divider circuit

(using an npn si transistors) with following specifications.

IC=1.6ma,VCE=7.6v,RC=2.2k,VCC=12v, I1=10IB and β=54. Verify the DC values (Voltage and current) at various nodes using Multisim software

DESIGN: IB=IC/β = 1.62/54=0.03ma VCC=IC(RC+RE)+VCE ; 12=1.62(2.2+RE)+7.6 ; RE=0.516k

V2=VBE+ICRE ; V2=0.7+1.62*0.516=1.536v

V2=I1R2 ; R2=V2/(I1=10IB) ; 1.536/0.3=5.12k

I1=VCC/(R1+R2) ; (R1+R2)=12/0.3=38.1k ; R1=38.1-5.12=32.98k

CIRCUIT DIAGRAM:

VCC 12V

R1

32.98kohm

5V1 0V

V3 8

4 0V

R2

5.1kohm

R3

2.2kohm

V2

0V

1 BC107BP

Q1

R4

516ohm

0


12

PROCEDURE: Rig up the circuit using multisim software and verify the

results using DC operating point analysis (simulate analysis DC

operating point)

DC Operating Point (Results)

1 8.05632v

2 928.05352mv

4 1.58077v

Vv1#branch 315.92573µa

Vv2#branch 1.79258ma

vcc 12.00000v

vccvcc#branch -2.10851ma

Q2) Design a single stage transistor amplifier with potential divider circuit

(using an npn si transistors) with following specifications.

IC=2.32ma,VCE=5.7v,RC=2.2k,VCC=12v, I1=10IB and β=33. Verify the DC

values (Voltage and current) at various nodes using Multisim software

DESIGN:

IB=IC/β = 2.32/33=0.07ma

VCC=IC(RC+RE)+VCE ; 12=2.32(2.2+RE)+5.7 ; RE=0.51k

V2=VBE+ICRE ; V2=0.7+2.32*0.51=1.88v

V2=I1R2 ; R2=V2/(I1=10IB) ; 1.88/0.7=2.68k

I1=VCC/(R1+R2) ; (R1+R2)=12/0.7=17.14k ; R1=17.14-2.68=14.46k


13

CIRCUIT DIAGRAM:

VCC 12V

R1

14.46kohm

5 V1 0V

R3

2.2kohm

V2

12 0V

V3

3

0V

R2

2.68kohm

BC107BP

Q1

2 R4

510ohm

0


results using DC operating point analysis (simulate analysis DC

operating point)


1 6.84857v

2 1.19817v

3 1.85869v

vv2#branch 2.34156ma

vcc 12.00000v

vccvcc#branch -3.04290ma

vv1#branch 701.33569µa

vv3#branch -7.79614µa


14

Q3) Cascade above two stages and find overall gain (choose Cc=4.7�f,

Ce=470�f, hfe=50) find the frequency response, DC operating points and parameter sweep of load resister.

ANALYSIS: Stage-2: AI2= -hfe/(1+hoeRL2) ; -50/(1+2/40) = -47.62

Ri2 = hie+hreAI2RL2 ;1.1+2.5e-4*-47.62*2 = 1.076k;

Av2= -AI2*RL2/Ri2 ; -47.62*2/1.076 = -88.51

Stage-1: RL1 = 2.2k||14.2||2.5||1.076 = 0.54k AI1 = -50/(1+0.54/40) = -49.3 Ri1 = 1.1+2.5e-4*-49.3*0.54 = 1.106k Av1 = -49.3*0.54/1.106 = -24.07 Overall gain Av = Av1*Av2 = 24.07*88.51= 2130.4 Avs = Av*Ri’/(Ri’+RS) ; Ri’ = 1.106||33||5.1= 0.88k

=2130.4*0.88/(0.88+15) =118

CIRCUIT DIAGRAM:

VCC 12V

R1

33kOhm_5%

VCC

Rc1

14.0kOhm_1%

R12

Rc2

2.2kOhm_5% C5

2.2kOhm_5%

C3

10

47uF 14 9

5 C1 Q3

4.7uF

Q1

BC107BP

R10

Rs

135kOhm_51% 2 4.7uF

V1

Re1

BC107BP

2.55kOhm_1% R22

11 Re2

C4

22kOhm_5%

1mV R2 15 C2

0.71mV_rm5.s1kOhm_5% 510Ohm_5% 1000Hz 0Deg

470uF

470Ohm_5% 470uF

0

XSC1

G

T

A B


15

Note: In above two stage CE amplifier, all resistor values are same as trainer kit

values.

PROCEDURE:1. Rig up the circuit using multisim software and verify the

results using DC operating point analysis (simulate------- analysis -------

DC operating point and AC analysis)


Node no Voltage 2 1.57966

9 8.01593

15 926.65516m

5 1.83114

11 1.16896

10 6.54642

2. Rig up the circuit using multisim software and verify the results using Parameter Sweep(Simulate------ analysis ------- Parameter sweep)


16

RESULTS: Observed the DC voltages/currents for single stage and two stage

amplifiers. It is observed that Two stage amplifier gives a mid band gain of

1220.It is also observed that as load resistance is nearer to RC2, the out put

voltage is decreasing, since net load resistance is decreasing.


17

TEST YOUR SELF

1. What do you mean by a multi stage amplifier? Mention its need.

2. What are the objectives of coupling elements?

3. What are the effects of bandwidth in multistage amplifier?

4. What is the expression for the band width of multistage amplifier?

5. Why RC coupling is popular?

6. What are the advantages & disadvantages of RC coupled amplifier?

7. Define the terms BW, gain BW product and dynamic range of an

amplifier?

8. What is the effect of By pass capacitor in a RC coupled amplifier?

9. What is the use of transformer coupling in the output stage of multistage

amplifier?

10.What is a DC amplifier? What are its advantages and drawbacks?


18

I

CURRENT SHUNT FEEDBACK AMPLIFIER

AIM: Design current shunt feed back amplifier with a feedback resistance 5K

using transistor BC 107. Obtain DC operating point and frequency response.

APPARATUS: Multisim software.

DESIGN PROCEDURE:

β = − I F

I E

= R

E

RF + R

E

= 470

5K + 470

= 0.085

A = I

R = − I

C 2 × I

B 2 × I

C1 × I

B1

I S

I B 2 I

C1 I B1

I S

I C 2

I B 2

= −hFE = −50, I

C1 = hFE = 50 I

B1

I C 2

I C1

= − R

C1

RC1 + R

I 2

= 2.2K

2.2K +1.076K

= 0.67151

I B1 =

I S

R =

R + hie

4K

4K +1.1K

= 0.8;Where R = RS

//(470 + 5K ) = 4K

AI = −(−50)(0.67151)(50)(0.8) = 1.343K

D = 1 + βAI = 1 + (0.085)(1.343K ) = 115.15

AIF =

AI

D =

1.343K = 11.66

115.15

∴ AVF

= V

0

VS

= I

O

I S

RC 2

RS

= AIF

RC 2

RS

= 11.66 × 2.2K

= 1.71 15K


19

CIRCUIT DIAGRAM:

VCC 12V

VCC R3

33kohm

R4

2.2kohm

R7

14kohm

C4

R9

2.2kohm

C2

4.7uF

7

Q2 47uF

C1 4 R1 BC107BP

BC107BP 11

15kohm 2 4.7uF

Q1 R10 6

5kohm 8

R11

22kohm

1 V1 3

5 C3

R6 R8 1mV 0.71mV_rms 1000Hz 0Deg

R2

5.1kohm

R5

510ohm

470uF 2.55kohm470ohm

0

XSC1

G

T A B


20


results using DC operating point analysis (simulate ---- analysis ----- DC

operating point)

2. Rig up the circuit using multisim software and verify the results using

Oscilloscope


21


analysis (simulate----- analysis----AC analysis)

4. Rig up the circuit using multisim soft ware and verify the results using

Parameter Sweep(Simulate ---- analysis ----- Parameter Sweep)

RESULT: The current shunt feed back amplifier is designed with feed back

resistance of 5K� . The DC operating point values are obtained and the

frequency response is plotted.


22

TEST YOUR SELF

1. What is feedback in Amplifiers?

2. Explain the terms feed back factor and open loop gain.

3. What are the types of feedback?

4. Explain the term negative feedback in amplifiers?

5. What are the disadvantages of negative feedback?

6. What are the advantages of negative feedback?

7. When will a negative feedback amplifier circuit be unstable?

8. Compare the negative feedback and Positive feedback.

9. Give the expression for closed loop gain for a negative feed back

amplifier?

10.How does negative feedback reduce distortion in an amplifier?

11.How does series feedback differ form shunt feedback?

12.What is the difference between voltage feedback and current feedback?


23

AIM:

RC PHASE SHIFT OSCILLATOR

a) Design RC phaseshift oscillator to have resonant frequency of 6KHz.

Assume R1 = 100k, R2 = 22K, RC = 4 K ,RE =1K & VCC = 12V.

b) Obtain hfe for the above designed value for AV > - 29, R≥ 2 RC.


DESIGN PROCEDURE:

a) Let R = 10K

f r =

2π RC

1

6 + 4K

When K = R

C

R

∴ C = 1

2π × 10K × 6K

6 + 4 ×

4K

10K

= 0.962nF ≈ 1nF (Select s tan dard )

∴ R = 10K ; C = 1nF

b) hfe ≥ 23 = 29

+ 4K K

for

sustained oscillation

= 97.1


24

G

T

A

B

CIRCUIT DIAGRAM:

VCC 12V

VCC

10uF

R1

100kohm 4

R3 10

Q2

2N2222A

C2 10uF

XSC1

12

R2

22kohm

11 R4

1kohm

C3

100uF

0

C6 C5 C4

1.0nF6

9 R7 R6

1.0nF 7 1.0nF R5

10kOhm_5% 10kOhm_5% 10kOhm_5%


25


results using Oscilloscope.

RESULT: RC phase shift oscillator with fr =6KHz is designed. The value of hfe

for the designed value is computed.


26

TEST YOUR SELF

1. What is an Oscillator circuit?

2. What is the main difference between an amplifier and an oscillator?

3. State Barkhausen criterion for oscillation.

4. State the factors on which oscillators can be classified.

5. Give the expression for the frequency of oscillation and the minimum

gain required for sustained oscillations of the RC phase shift oscillator.

6. Why three RC networks are needed for a phase shift oscillator? Can it be

two or four?

7. What are the merits and demerits of phase shift oscillator?

8. At low frequency which oscillators are found to be more suitable?

9. What are the two important RC oscillators?

10.What makes Quartz produce stable oscillations?

11.What are the factors which contribute to change in frequency in

oscillators?


27

AIM : CLASS A,AB,B,C POWER AMPLIFIERS

To study the operation of Class A, Class AB, Class B, Class C power

amplifiers.

APPARATUS: Multisim soft ware.

CIRCUIT DIAGRAM:

12V V2

R2

1kohm

R5

1kohm

47CuF2

R1

100ohm

V1

50mV

47uF

C1

R3

30kohm

Q1

PN2369A

R4

XSC1

G

T A B

35.36mV_rms 1000Hz 0Deg

100ohm

THEORY:

The classification of amplifiers is based on the position of the quiescent

point and extent of the characteristics that is being used to determine the method

of operation.

There are 4 classes of operations.They are

1.Class A 2.Class AB 3.Class B 4.Class C


28

CLASS A:- In class A operation the quiescent point and the input signal are

such that the current in the output circuit (at the collector) flows for all times.

Class A amplifier operates essentially over a linear portion of its characteristic

there by giving rise to minimum of distortion .

CLASS B:- In class B operation , the quiescent point is at an extreme end of the

characteristic , so that under quiescent conditions the power drawn from the dc

power supply is very small .If the input signal is sinusoidal, amplification takes

place for only half cycle.

CLASS AB:- A class AB amplifier is the one that operates between the two extremes defined for class A and Class B. Hence the output signal exists for

more than 1800

of the input signal.

CLASS C :- In class C operation, the quiescent operating point is chosen such

that output signal (voltage or current)is zero for more than on half of the input

sinusoidal signal cycle.

PROCEDURE:

1. An input sine wave (peak-peak)of 50mV is applied to the circuit.

2. connect the output to the C.R.O.

3. varying R3 value, observe and record the output waveforms for different

classes of operation.

4. Also observe the Vi & Vo waveforms using parameter sweep for different

classes of operation.


29

OBSERVATIONS:

CLASS A:

CLASS AB :


30


31

CLASS B :


32

CLASS C :

RESULT :

1. In class A amplifier output current flows for whole 3600

2. In class AB power amplifier output current flows between 1800

and 3600

3. In class B power amplifier output current flows for 1800

4. In Class C power amplifier output current flows for less than 1800.


33

TRY YOUR SELF

1. How do you bias class A operation?

2. What is conversion efficiency?

3. Define Class B mode of operation.

4. What are the advantages & disadvantages of Class B mode of operation?

5. Distinguish between voltage and power amplifier?

6. Which power amplifier gives minimum distortion?

7. What are the drawbacks of class C amplifier?

8. In Which class of amplifier, the efficiency is high? And why?

9. Classify power amplifiers on the basis of the mode of operation.

10.Give two drawbacks of Class A power amplifier.


34

HIGH FREQUENCY COMMON BASE AMPLIFIER

AIM - Design a common Base high frequency amplifier with a over all gain of

30 and Lower cut off frequency of 130 Hz and Higher cut frequency 10 MHz .

Transistor Specifications: hib = 22.6, hfb = -0.98, hrb = 2.9 × 10-4 ,

hob = 0.49 � s,

IC = 1.35ma = -IE, VCE = 5.85V, VEB = 0.6V, VCB = 5.25V.

Verify the DC values (Voltage and current) at various nodes using Multisim

software


DESIGN PROCEDURE:

1. DESIGN OF BIASING CIRCUIT :

VBE = 0.6V, VCE = 5.85V, IC = 1.35mA = -IE

VCB = 5.25V


35

Find the value of Re :

KVL to Input:

-2v – Re(1.35ma) + 0.6 = 0

Re = 1.4

1.35ma =1.03 K �

Find the value of RC :

KVL to Output :

Vcc – ICRC - VCB = 0

12 – 1.35ma RC – 5.25 = 0

1.35mRc = 6.75

RC = 5k �

2.DESIGN OF AMPLIFIER CIRCUIT :

1.To find Cb

Assume Rs = 100 � Calculate the value of Cb

fL = 1

2π (Rs + Ri)Cb

; 130= 1

6.28(100 + 22.6�)Cb

Cb = 1

6.28(100 + 22.6)130

= 9.9 ×10-6

≈ 10 � f


36

RL

2.To Calculate RL

AV = -hfb RL'

Ri

= 0.98 × RL'

22.6

Ri

Overall gain = AVS = Av

Ri + Rs

For above circuit Ri 1

= Ri=hib

AVS = -hfb

RL = 15k �

RL'

Ri + Rs

1 = RL 11 RC =3.75k

3. To Calculate Shunt Capacitance Csh

fh = 1

2πRL × C sh

C sh =

2π ×10

1

×106 × 3.75k�

= 4.24 pf ≈ 4pf

The Internal junction capacitance Cb’c ≈ 3pf C’sh = Cb’c + Csh

4.24 = 2.9pf + Csh

Csh = 1.34pf ≈ 2pf


37

CIRCUIT DIAGRAM :

XSC1

Rs

11000ohm

Cb

10uF

11 12

BC107BP

10uF

G

T A B

Cb1

3

V1 Re 1kohm

Q1 Rc 8

5kohm R5

Csh

10mV 7.07mV_rms 1000Hz 0Deg

7 VEE

2V

12V 6

VCC

15kohm 2pF

0

PROCEDURE: 1.Rig up the circuit using multisim software and verify the

results using DC operating point analysis (Simulate ------Analysis------ DC

operating point)


38


analysis (Simulate--- Analysis--- AC analysis)


39

RESULTS: The common base high frequency amplifier is designed. Also DC

voltages / currents are observed. The Bandwidth is far greater than the

bandwidth of the CE amplifier.


40

TEST YOUR SELF

1. What are the factors to be taken into account in the high frequency model

of a transistor?

2. What are α and β cut off frequencies? 3. What is unity gain small signal band width?

4. What is the relation between fT & fβ? 5. What is the expression for trans conductance gm in the high frequency

model?

6. What is the expression for input conductance gb e in terms of gm ? 7. What is base spreading resistance?

8. Give the expressions for the hybrid ∏ capacitances.


41

TWO STAGE RC COUPLED AMPLIFIER

AIM: 1. To study the Two-stage RC coupled amplifier.

2. To measure the voltage gain of the amplifier at 1KHz.

3. To obtain the frequency response characteristic and the band width of the

amplifier.

EQUIPMENT: Two stage RC coupled amplifier, trainer.

1. Signal Generator.

2. C.R.O

3. Connecting patch cords.

CIRCUIT DIAGRAM:

VCC

12V

R1

33kohm

RC

2.2kohm CC

R3

15kohm

R6

2.2kohm

C2

C1 Q1 10uF Q2 10uF RG

15kohm

10uF

BC107BP BC107BP

C3 OUTPUT INPUT V

50mV

R2

5.1kohm

CE

RE 10uF

R4 2.7kohm

R5

1kohm

10uF VO

510ohm


42

PROCEDURE: 1.Switch ON the power supply.

2. Connect the signal generator with sine wave output 50mV p-p at the

input terminals.

3. Connect the C.R.O at output terminals of the module.

4. Measure the voltage at the second stage of amplifier.

5. Now vary the input frequency from 10Hz to 1MHz in steps,and for every

value of input frequency note the output voltage keeping the input

amplitude at constant value.

6. Calculate the gain magnitude of the amplifier using the formula

Gain = Vo/Vi

Gain in dB= 20 log (Vo / Vi )

7. Plot a graph of frequency versus gain (dB) of the amplifier. Sample

frequency response graph is as shown in fig. Below.

OBSERVATION: Vi = 50mV(p-p)

Frequency

VO Gain =20 log

(Vo/Vi)dB


43

FL FH

FREQUENCY RESPONSE:

0.707 VO/VI

Gain VO/VI

FL FH Frequency

RESULT:

The gain of the amplifier at 1 KHz is ------

The BW of the amplifier is -------


44

CURRENT SHUNT FEEDBACK AMPLIFIER

AIM: 1. To study the current shunt feedback amplifier

2. To measure the voltage gain of the amplifier at 1KHz.

3. To obtain the frequency response characteristic and the band width

of the amplifier.

EQUIPMENT: Current shunt feed back amplifier trainer.

4. Signal Generator.

5. C.R.O


CIRCUIT DIAGRAM:


45

PROCEDURE: 1. Switch ON the power supply.

2. Connect the signal generator with sine wave output 50mV p-p at the

input terminals.

3. Connect the C.R.O at output terminals of the module.

4. Measure the voltage at the second stage of amplifier.

5. Now vary the input frequency from 10Hz to 1MHz in steps, and for

each value of input frequency note the output voltage keeping the

input amplitude at constant value.

6. Calculate the gain magnitude of the amplifier using the formula

Gain = Vo/Vi

Gain in dB= 20 log (Vo / Vi )

7. Plot a graph of frequency versus gain (dB) of the amplifier. Sample

frequency response graph is as shown in fig. Below.

OBSERVATIONS :

Vi = 50mV(p-p)

Frequency VO Gain =20 log (Vo/Vi)dB


46


47

FREQUENCY RESPONSE:

RESULT: The gain of the amplifier at 1 KHz is ------

The BW of the amplifier is -------


48

CLASS A/B/C/AB POWER AMPLIFIER

AIM: To study the operation of Class A, Class B, Class AB and Class C power

amplifiers.

EQUIPMENT: 1.Class/A/B/C/AB amplifier trainer

2.Function generator.

3.C.R.O


CIRCUIT DIAGRAM:


49

PROCEDURE:

1.Connect the circuit as shown in the circuit diagram, and get the circuit

verified by your Instructor.

2. Connect the signal generator with sine wave at 1KHz and keep the

amplitude at .5V (peak-to-peak)

3. Connect the C.R.O across the output terminals.

4. Now switch ON the trainer and see that the supply LED glows.

5. Keep the potentiometer at minimum position, observe and record

the waveform from the C.R.O.

6. Slowly varying the potentiometer, observe the outputs for the

Class A/B/AB/C amplifiers as shown in fig.

CLASS A:


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CLASS B:

CLASS AB:


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CLASS C :

RESULT: It is observed that for class A amplifier, the transistor conducts for

360deg, for class AB more than 180deg and for Class C less than 180 deg.


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SINGLE TUNED VOLTAGE AMPLIFIER

AIM: 1.To calculate the resonant frequency of tank circuit.

2. To plot the frequency response of the tuned amplifier.

EQUIPMENT:

1. Tuned voltage amplifier trainer.

2. Function generator.

3. C.R.O.


CIRCUIT DIAGRAM:


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PROCEDURE:

1.Connect the circuit as shown in fig and get the circuit verified by

your Instructor.

2. Connect the signal generator with sine wave at the input and

keep the amplitude to minimum position, and connect a C.R.O at

output terminals of the circuit.

3. Apply the amplitude between 1.6v to 4.4v to get the distortion

less output sine wave.

4. Now, vary the input frequency in steps and observe and record

The output voltage.

5. Calculate the gain of the tuned RF amplifier using the formula

Gain = out put voltage/ input voltage.

6. plot a graph with input frequency versus gain (in dBs)

Gain (in dBs) = 20 log (Vo/Vi)

Graph :-

Gain

Frequency

RESULT:

The tuned amplifier offers maximum gain at resonant frequency of the

tank circuit.


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SERIES VOLTAGE REGULATOR

AIM : To study and design a Series voltage regulator and to observe the load

regulation feature.

EQUIPMENT :

1. Series voltage regulated power supply trainer.

2. Multimeter.

3. Patch chords.

CIRCUIT DIAGRAM:

3055 + -

560E IL

Rs + -

IR + Un Regulated - IZ 500E VO

Input

50%

VZ=12V

PROCEDURE:

1. Switch ON the power supply.

2. Observe the Unregulated voltage at the output of rectifier.

3. Connect this voltage to the input of series voltage regulator circuit.

4. Keep the load resistance 1K at constant.

5. Observe the output voltage VO = VZ-VBE


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6. And also observe the voltage across RS,and values of IR,IL and IZ.

7. Compare the practical values with theoretical values.

8. By changing the load resistance, observe the output voltage and various

currents.

OBSERVATIONS:

RL VO IR IZ IL

LOAD REGULATION :

VO

RL

RESULT: The regulator maintains a constant output voltage inspite of the

changes in load conditions.


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SHUNT VOLTAGE REGULATOR

AIM : To study and design a Shunt Regulator and to observe the load

regulation feature.

EQUIPMENT :

1. Shunt regulated power supply trainer.

2. Multimeter.

3. Patch chords.

CIRCUIT DIAGRAM: RS

+ - + -

220E IL

+ Un Regulated 8.2V IC 1K

In put - RL VO

3055

PROCEDURE:

50%

1. Switch On the main power supply.

2. Observe the unregulated voltage at the output of rectifier.

3. Connect this voltage to the input of shunt Regulator circuit

4 .Keep the load resistance 1K constant.

5. Observe the output voltage across the load resistor V0 =VZ + VBE


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6. Also observe IL, IS & IC.

7. Compare the practical values with theoretical values.

8. By changing the load resistance, observe the output voltage and

various currents.

OBSERVATIONS:

RL VO IS IC IL

LOAD REGULATION:

VO

RL

RESULT:

The regulator maintains a constant output voltage inspite of the

changes in load conditions.

Eca Labmanual Multisim

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