EC6412_Orientation.pptx

8/18/2019 EC6412_Orientation.pptx

1/77

LINEAR INTEGRATED CIRCUITSLABORATORYEC6412REGULATION: 2013

2nd

year 4th

e!eterDe"art!ent #$ ECE

%re"ared &y'

(ayaee)an*('

D+neh S,ndar* S'

Br+-ht %ra&a.ar*%

A+tant "r#$e#r #$ ECE


2/77

COURSE OBJECTIVES

To expose the students to linear and integrated circuits

To understand the basics of linear integrated circuits and

available ICs

To understand characteristics of operational apli!er"

To appl# operational apli!ers in linear and nonlinear

applications"

To ac$uire the basic %no&ledge of special function IC"

To use 'ICE soft&are for circuit design


3/77

COURSE OUTCO(ES

At the end #$ the /#,re' the t,dent h#,)d &e a&)e t#:

)esign oscillators and apli!ers using operational apli!ers"

)esign !lters using Op*ap and perfor experient on

fre$uenc# response"

+nal#,e the &or%ing of '-- and use '-- as fre$uenc# ultiplier"

)esign )C po&er suppl# using ICs"

+nal#,e the perforance of oscillators and ultivibrators using

S'ICE


4/77

-IST O. E/'ERI(E0TS1 C2C-E 3

DESIGN AND TESTING O

1* Inert+n-' N#n +nert+n- and D+erent+a) a!")+er*

2* Inte-rat#r and D+erent+at#r*

3* Intr,!entat+#n a!")+er

4* A/t+e )#5"a' +-h5"a and &and5"a )ter*


5/77

-IST O. E/'ERI(E0TS1 C2C-E 4

DESIGN AND TESTING O

5" +stable 6 (onostable ultivibrators and Schitt Triggerusing op*ap"

7" 'hase shift and 8ien bridge oscillators using op*ap"

9" +stable and onostable ultivibrators using 0E555 Tier"

:" '-- characteristics and its use as .re$uenc# (ultiplier"

;" )C po&er suppl# using -(


6/77

-IST O. E/'ERI(E0TS1 C2C-E <

SI7ULATION USING S%ICE

33" Siulation of Experients ?> 5> 7 and 9"

34" )@+ and +@) converters ASuccessive approxiation

3 0+0) and 0OR


7/77

-+B EUI'(E0T

LAB E8UI%7ENT OR A BATC O 3 STUDENTS 92t,dent "er E"er+!ent;

CRO A(in Resistors>

Capacitors> diodes> Gener diodes> Bread Boards> Transforers>&ires> 'o&er transistors> 'otentioeter> +@) and )@+convertors> -E)s 5? 0ote1 Op*+ps u+9?3> -( -( -( -( +) 7

-( 575 a# be used"


8/77

STUDY OF OP-AMP

S t u d y o f o p - a m p

B l o c k s c h e m a t i c o f o p - a m p

1

2

4

3 6

7

8

N o n I n v e r t i n gi / p

N / C

O / p

V +

O f f s e t N u l l5

O f f s e t N u l l

I n v e r t i n g i / p

V -

I C 7 4 1

D i f f

! p

D i f f

! p

" u f f e r # l e v e l

t r n s l t o r

O / p

$ r i v e r+

-V 2

V 1 V%


9/77

E/" 0O1 3)ESIF0 +0) TESTI0F O. I0VERTI0F> 0O0*I0VERTI0F+0) )I..ERE0TI+- +('-I.IERS

+i1

To design Inverting> 0on*inverting and diHerential apli!ersusing op*ap and test its perforance"

+pparatus re$uired1

S*N

#

C#!"#nent Ran-e 8,ant+ty

3" Op*ap IC 9?3 3 4" )ual trace suppl# A=*


10/77

+ I0VERTI0F +('-I.IER1 C-OSE) -OO' CO0.IFUR+TIO0

De+-n:

+C- K Vo@Vin K * Rf @ RinL

+ssue +C- K 4=

=> * Rf @ Rin K *4=

0o& +ssue Rf K 44%M

Rin K 3"3%M≈3%M


11/77

CIRCUIT )I+FR+( 6(O)E- FR+'D1

(V)

Vin

Vo(V)

t(sec)

t(sec)

Inverting amp

CRO

+

~

+

–

–

+12V

7

6

4

v0

-12V

Rf

= 22k

IC741

2

3

Rin

= 1k

F.G


12/77

B) NON INVERTING AMPLIFIER: [CLOSED LOOP CONFIGURATION]

Design:

ACL = Vo / Vin = 1 + Rf / Rin;

Assume ACL = 10;

=> 10 = 1 + Rf / Rin Assume Rf = 10kΩ

=> Rin= 1.1kΩ


13/77

CIRCUIT DIAGRAM& MODEL GRAPH:

CRO

+

~

+

–

–

+12V

7

6

4

v0

-12V

2

3

F.G

Rin

= 1k

(V)

Vin

Vo(V)

t(sec)

t(sec)

Non-Inverting amp


14/77

C) DIFFERENTIAL AMPLIFIER: [CLOSED LOOP

CONFIGURATION]

Design:

To design an differential amplifier for a gain of 1.

The voltage gain for an Non-inverting amplifier

is Av= V out/Vin= (Rf/Ri) when Rf=R L; Rf= Rg

For a gain of 1, Let RL =10KΩ

1=Rf/10KΩ=>Rf= 10KΩ & Rg=10KΩ


15/77

CIRCUIT DIAGRAM

IC741

7

4

6

2

3

R1 = 1k

R1=1k

R2=10k

R2=10k

D

M

M

V1

V2

+12V

-12V


16/77

EX.NO: 2

DESIGN AND TESTING OF INTEGRATOR AND DIFFERENTIATOR Aim:

To design Integrator and Differentiator using op-amp and test its performance.

Apparatus required:

S*N

#


3" Op*ap IC 9?3 3 4" )ual trace suppl# A=*


17/77


18/77


Vin

RL

R1

+12V

-12V

Cf

Rf

Vo = -Rf C1[dVin/dt]

Rcomp

C1

+

-

IC 741

3

2

6

7

4

0

I V

V i n

V o

t

t

- I V

M o d e l g r a p h

I V

V i n

V o

t

t

- I V

M o d e l g r a p h

2 V

- 2 V


19/77

B) INTEGRATOR:

Design:

Generally the value of the fa and in turn R1Cf and RfCf

values should be selected such that fa < fb. From the

frequency response we can observe that fa is the

frequency at which the gain is 0 db and fb is thefrequency at which the gain is limited. Maximum inputsignal frequency = 1 KHz.

Condition is time period of the input signal is largerthan or equal to RfCf (i.e.) T

fb = KHz ; fa = fb /10; Rf = 10R1;

RCOMP = R1;RL & R1 = 10KΩ

fa = 1/ [2πRfCf];RfCf = 1msec &; Cf = 1msec/100K


20/77


Vin

RL

+12V

-12V

Rcomp = Rf

+

-

IC 741

3

2

6

7

4

0

R1 = 1.5kΩ Cf K ="3µ.

Rf = 15MΩ

µ+9?3

V i n

V o

t

t

M o d e l g r a p h

t

t


21/77

EX.NO:3

DESIGN AND TESTING OF INSTRUMENTATION AMPLIFIER

AIM:

To design and test the operation ofInstrumentation Amplifier for various gainvalues.

APPARATUS REQUIRED :

IC 741 – 3 NO.

Resistors

RPS, DMM


22/77


23/77

CIRCUIT DIAGRAM

RESULT:

Thus the instrumentation amplifier is designed,constructed and tested

IC741

7

4

6

2

3

100k

100k

100k

3

100k

D

M

M

+12V

-12V

IC741

7

4

6

2

3

100k

V1

V2

+12V

-12V

IC741

7

4

6

2

3

470k

+12V

-12V

470k


24/77

EX.NO:4 (A)

FREQUENCY RESPONSE OF 2ND ORDER LPF & HPF

Aim:-

To design and test the frequency response of asecond order LPF and HPF.

Components Required:-

S"0o Coponents Range uantit#3" Op*ap IC 9?3 34" Resistors


25/77

THEORY

LPF:-

A LPF allows only low frequency signals up to a certainbreak-point fH to pass through, while suppressing high

frequency components. The range of frequency from 0 tohigher cut off frequency f

His called pass band and the range

of frequencies beyond fH is called stop band.

The following steps are used for the design of active LPF,

The value of high cut off frequency fH is chosen.

The value of capacitor C is selected such that its value is

≤1µF. By knowing the values of fHand C, the value of R can be

calculated using

Finally the values of R1 and Rf are selected depending on

the designed pass band gain by using

+=

1

1 R

f R

A


26/77

CIRCUIT DIAGRAM& MODEL

GRAPH

+ 1 0 V

+

-

L M 7 4 1 C3

26

7 1

4 5

R = 7 . 9 5 k

R f = 1 0 k

R

0 . 0 1 u f

R = 7 . 9 5 k

F u n c i o n ! " n " # $ o #

- 1 0 V

V o

0 . 0 1 u f

R = 1 0 k

& i n i n $ '

fre in ()f ()

4% $'/ $e*$e


27/77

DESIGN& TABULATION


28/77

SECOND ORDER HPF

Theory:-

The high pass filter is the complement of thelow pass filter.

Thus the high pass filter can be obtained byinterchanging R and C in the circuit of low passconfiguration.

A high pass filter allows only frequenciesabove a certain bread point to pass through andat terminates the low frequency components.

The range of frequencies beyond its lower cutoff frequency fL is called stop band.


29/77

CIRCUIT DIAGRAM& MODEL

GRAPH

+

-

L M 7 4 1 C3

2

6

7 1

4 5

F u n c i o n ! " n " # $ o #

R = 1 0 k

0 . 0 1 u f

R f = 1 0 k

R

- 1 0 V

0 . 0 1 u f

R = 7 . 9 5 k R = 7 . 9 5 k

+ 1 0 V

V o

& i n i n $ '

fre in()

f+

4% $'/$e*$e


30/77


31/77

PROCEDURE

LPF:-

1. Connections are given as per the circuit diagram.

2. Input signal is connected to the circuit from the signal generator.

3. The input and output signals of the filter channels 1 and 2 of the CRO are connected.

4. Suitable voltage sensitivity and time-base on CRO is selected.

5. The correct polarity is checked.

6. The above steps are repeated for second order filter.

HPF:-

7. Connections are given as per the circuit diagram.

8. Input signal is connected to the circuit from the signal generator.

9. The input and output signals of the filter channels 1 and 2 of the CRO are connected.

10.Suitable voltage sensitivity and time-base on CRO is selected.11.The correct polarity is checked.

12.The above steps are repeated for second order filter.

Result:-

Thus the second order Low pass filter and High pass filter were designed using Op-ampand its cut off frequency was determined


32/77

EX.NO:4 (B)

FREQUENCY RESPONSE OF 2ND ORDER BSF & BPF

Aim:-

To design and test the frequency response of asecond order LPF and HPF.

Components Required:-

S"0o Coponents Range uantit#3" Op*ap IC 9?3 <4" Resistors

O"=5µf 4?" CRO 3

5" 'o&er Suppl# N 35V 37" 'robe 4

9" Bread Board 3


33/77

THEORY

BSF:-

BSF is the logical inverse of band pass filter which does not allows aspecified range of frequencies to pass through. It has two pass bands inthe range of frequencies between 0 to fL and beyond fH. The band

between fL and fHis called stop band. BSF is also called Band Reject

Filter (BRF) or Band Elimination Filter (BEF).

BPF:-

The BPF is the combination of high and low pass filters and this allowsa specified range of frequencies to pass through. It has two stop bandsin range of frequencies between 0 to fL and beyond fH. The band b/w fL

and fHis called pass band. Hence its bandwidth is (fL-fH). This filter hasa maximum gain at the resonant frequency (fr) which is defined as

The figure of merit (or) quality factor Q is given by

L H r f f f =

BW

f

f f

f Q r

L H

r =−

=


34/77

CIRCUIT DIAGRAM& SAMPLE

GRAPH- BPF

%7%7V

V

& i n i n D "

fre in 3

stop 'n$ pss 'n$ stop 'n$C = 0 . 0 1

C

= 0

. 0 1

R f = 1 0

f n ! " n

C = 0 . 0 1R = 7 . 9 5

V o

R = 1 0

C

= 0

. 0 1

R = 1 0

R

= 7

. 9 5

R = 7 . 9 5

+

-

L M 7 4 1

3

26

7 1

4 5

R = 1 0

R = 1 0

R

= 7

. 9 5

+

-

L M 7 4 1

3

26

7 1

4 5


35/77

DESIGN

BSF:-

fH=200Hz

fL=1kHz

Low pass section:-fH=200Hz

Let C1=0.05µfThen,

f C

K R

R

c f R

H

µ

π

π

%5%

.15

,1%%5%,-2%%-2

1

2

1

1

1

6

1

1

1

=

Ω=

×=

=

−


36/77

High Pass Section:-

Gain, Av=2 for each section

( )ΚΩ=

××=

=

=

ΚΗΖ =

−

./15

1%%1/%1%1-21

2

1

%1/%

1

6,3

R

C f R

f C

f

L

L

π

π

µ

ΚΩ====∴ 1%11

11 f f R R R R


37/77

CIRCUIT DIAGRAM& SAMPLE

GRAPH- BSF

+

-

L M 7 4 1

3

26

7 1

4 5

+

-

L M 7 4 13

26

7 1

4 5

C

=

0

. 0

5

R = 1 0C = 0 . 0 5

R = 1 5 . 9

R f = 1 0

R = 1 5 . 9

R

=

1

5

. 9

f n ! " n

C = 0 . 0 1C = 0 . 0 1

R

L

=

1

0

R = 1 0

R = 1 0

V o

R = 1 0

R = 3 . 3

R f = 1 0

R

=

1

5

. 9

R = 1 0

+

-

L M 7 4 1

3

26

7 1

4 5

1141

V2

& i n i n D "

fre in 3

ree*t 'n$ pss 'n$ pss 'n$


38/77

TABULATION


39/77

PROCEDURE

BSF,BPF:-

The input signal is connected to the circuit fromthe signal generator.

The input and output signals are connected tothe filter.

The suitable voltage is selected.

The correct polarity is checked.

The steps are repeated.Result:-

Thus the frequency response of second orderBPF and BSF filter was designed and tested.


40/77

EX. NO:5

ASTABLE AND MONOSTABLE MULTIVIBRATORS USING OP-AMP

Aim

To design Astable and monostable Multivibrators &Schimitt Trigger using op-amp and to plot its

waveforms. Apparatus Required:

S"0o Coponent Range uanti

t#

3" Op ap IC 9?3 3

4" )TS A=*


41/77

DESIGN

1. Monostable Multivibrators:

β = R2 /R1+R2 [β = 0.5 & R1 = 10 K]

Find R2 = ; R3 = 1K; R4 = 10K;

Let F =_____KHz ; C= 1mfd; C4 = 0.1mfd

Pulse width, T = 0.69RC

Find R =

Procedure:

Make the connections as shown in circuit diagram.

A trigger pulse is given through differentiator circuitthrough pin no.3

Observe the pulse waveform at pin no.6 using CRO andnote down the time period.

Plot the waveform on the graph.


42/77

CIRCUIT DIAGRAM & MODEL GRAPH

C R O

+

–

+ 1 0 V

7

4

- 1 0 V

2

3

I C 7 4 1

R

V s a t

C 4 D 2

R 4

D 1C

V C

6R 3

V O

R 1

R 2

V in

V in

V C

V O

V s a t

V s a t

V D

t

t

t

T – V s a t

T P


43/77

2. Astable Multivibrators:

Design:

T = 2RC

R1= 1.16 R2

Given fO= _______KHz

Frequency of Oscillation fo = 1 / 2 RC if R1 = 1.16R2

Let R2 = 10 K Ohm R1= 10Ohm

Let C = 0.05 Micro F

R = 1 / 2 fC = 1/ (2 )

Procedure:

Make the connections as shown in the circuit diagram

Keep the CRO channel switch in ground and adjust the horizontal line on the x axis so that

it coincides with the central line.Select the suitable voltage sensitivity and time base on the CRO.

Check for the correct polarity of the supply voltage to op-amp and switch on power supply

to the circuit.

Observe the waveform at the output and across the capacitor. Measure the frequency of

oscillation and the amplitude. Compare with the designed value.

Plot the Waveform on the graph.


44/77


2

+ 1 0 V

I C 7 4 1

R

+

C R O

C

3

– 1 0 V

1 0

R 1

R 2

1 1 . 6

V O4

7 –

6

1 0 k

0 . 0 5 µ f

V o % $ ! " i n & o % '

V o % $ ! " $ c # o ' ' ( " c $ p $ c i o #

) m ' " *

& o


45/77

DESIGN

3) Schmitt Trigger:

Design

VCC= 12 V; VSAT = 0.9 VCC;R1= 47KΩ; R2 = 120Ω

VUT = + [VSAT R2] / [R1+R2] & VLT = - [VSAT R2] / [R1+R2] &

HYSTERSIS [H] = VUT - VLT Procedure

Connect the circuit as shown in the circuit

Set the input voltage as 5V (p-p) at 1KHz. (Input should bealways less than Vcc)

Note down the output voltage at CROTo observe the phase difference between the input and theoutput, set the CRO in dual Mode and switch the triggersource in CRO to CHI.

Plot the input and output waveforms on the graph.


46/77


Result:

Thus Astable & MonostableMultivibrators and Schimitt trigger were

designed using op-amp and the waveforms

were plotted.

V i n

+ 1 2 V

R 1

- 1 2 V

R 2

0

+

-

3

26

7

4

R L = 1 0


47/77

EXP.NO: 6

MULTIVIBRATORS USING IC 555

Aim:

To design and test an Astable and MonostableMultivibrators using 555 timer with duty cycles ratio.

Apparatus Required:

S*N

#

C#!"#nen

t

Ran-e 8,ant+t

y3" 555 TI(ER 34" Resistors


48/77

ASTABLE MULTIVIBRATORS USING 555

Pin diagram:

DESIGN:

Design an Astable Multivibrators for a frequency of ______KHz with a duty

cycle ratio of D = 50fo = 1/T = 1.45 / (R A+2RB)C

Choosing C = 1 F;R A = 560

D = RB / R A +2RB= 0.5 [50%]

RB = ______

V C C

D i s ! " a # $ %

T " # % s " & ' (

C & n t # & ' V & ' t a $ %

T # i $ $ % #

O ) t * ) t

R % s % t

G # & ) n (


49/77


V OD

R ,

6 . k

V ! !

+ V

0 . 0 1 µ F

0 . 1 µ F

R

3 . 3 k

7

2

6

1

4

3

V !

t / s 1

V 2 T

V 2 T

t " i $ "

t '& 3

t / s 1

V O


50/77


V O

R ,

1 0 k

V ! !

+ V

0 . 0 1 µ F

0 . 1 µ F

7

6

1

4

3

2T # i $ $ % # i *

0 . 0 1 µ F

V ! !

0 V

/ i 1 T # i $ $ % # i n * ) t

/ i i 1 O ) t * ) t

/ i i 1 C a * a ! i t & #

V & ' t a $ %

0 V

0 V

V ! !


51/77

MONOSTABLE MULTIVIBRATORS

USING 555

Design:

Given a pulse width of duration of 100s

Let C = 0.01 mfd; F = _________KHz

Here, T= 1.1 R AC So, R A =

Result:

Thus the Astable Multivibrators and

Monostable Multivibrators using 555 timer isdesigned and tested.


52/77

EXP.NO.:7

OSCILLATORS USING OPERATIONAL AMPLIFIER

Aim:To design the following sine wave oscillators WeinBridge Oscillator with the frequency of 1 KHz. RCPhase shift oscillator with the frequency of 200 Hz.

Components Required:

S*N#


3" Op*ap IC 9?3 34" )ual trace suppl# A=*


53/77

WEIN BRIDGE OSCILLATOR:

Design:

Gain required for sustained oscillation is Av = 1/β = 3

(PASS BAND GAIN) (i.e.) 1+Rf /R1 = 3

∴ Rf = 2R1

Frequency of Oscillation fo = 1/2π R C

Given fo = 1 KHz

Let C = 0.05µF∴ R = 1/2π foC

R = 3.2 KΩ

Let R1 = 10 KΩ ∴ Rf = 2 * 10 KΩ


54/77


C R O

+

–

+ 1 0 V

7

6

4

- 1 0 V

2

3

I C 5 4 1

R 1 = 1 0 k R f = 2 0 k

3 . 2 k R

C

0 . 0 µ f

3 . 2 k R =C 0 . 0

µ

f

V O

t

+ V *

V O

– V *


55/77

RC PHASE SHIFT OSCILLATORS:

Design:

Frequency of oscillation fo = 1/(√6*2*Π*RC)

Av = [Rf/R1] = 29

R1 = 10 R

Rf = 29 R1

Given fo = 200 Hz.

Let C = 0.1µF

( )

( )6

1 / 6 2 fo C

1/ 6 2 2%% %1 1%

7

8o prevent te lo$ing of !plifier '9 C net:or;0 1 1%

1 1% 7


56/77


C R O

+

–

+ 1 0 V

7

6

4

- 1 0 V

2

3

I C 7 4 1

R 1 1

3 . 3 k

C

V O 0 . 0 1 µ f

CC

RRR 3 . 3 k 3 . 3 k

0 . 0 1 µ f 0 . 0 1 µ f

3 2 k

3 3 k R f

D R

V O

t


57/77

Observation:

Peak to peak amplitude of the sine wave = Volts

Frequency of Oscillation (obtained) =Hz.

Result:

Thus wien bridge oscillator and RC Phaseshift oscillator was designed using op-amp andtested.


58/77

EXP.NO.:8

VOLTAGE REGULATION USING IC LM723

AIM :

To design a high current, low voltage and highvoltage linear variable dc regulated power supplyand test its line and load regulation.

COMPONENTS REQUIRED :S"0O CO('O0E0TS S'ECI.IC+TIO0 U+0TIT2

3" Transistors TI'344>40


59/77

430

1k

0.52N3055Unregulated

DC Poer

!u""l# 12 11

$

5

R1

R2

V+ V%Vo

C&

C!

'NV

C()PV-

N'

Vref

0*1

U

,'P122

100"

R-%

10

2

3

.

13/

&oad

+ -

V

+

-

I L

V 0 V 0

V in

Lo$, #"!u%$ion Lin" #"!u%$ion


60/77

DESIGNDESIGN:Output voltage VO

Reference voltage VrefR-protect Minimum Resistance to protect the output from short circuit.

Low Voltage Regulator :

Given : Vo=5V, Vref = 7.15 V

To calculate R1, R2 ,R3 and Rsc.

Vo = Vref ( R2 / ( R1 + R2 ) )

5 / 7.15 = ( R2 / ( R1 + R2 ) )

( R1 + R2 ) 0.699= R2

0.699R1 = 0.301 R2 ,R1 = 0.4306 R2

SelectR2 = 1 K

R1 = 1 KΩ * 0.4306 = 430ΩR1 = 430

R3 = R1 * R2 / ( R1 + R2) , R3 = 430.6 *1000 /(430.6+1000 )

R3 = 300

Rsc = Vsense / Ilimit= 0.5 /1A = 0.5Ω ,Rsc = 0.5 Result :

Thus the line and load regulation of a high current, low voltage and high voltage linear variable dcregulated power supply was designed and tested.

S"0o -o& Voltage Regulator Digh Voltage

RegulatorQ Voltage Regulation


61/77

EX.NO:9FREQUENCY MULTIPLIER USING PLL IC

AIM:

To study the operation of NE 565 PLL as a

frequency multiplier.

APPARATUS REQUIRED:

i. RPS

ii. Resistors, Capacitors

iii. IC NE565, IC 7490

iv. Transistor 2N3391

v. Breadboard, connecting wires.


62/77

RESULT:

The frequency multiplier using PLL principle is

studied and the output waveform is observed.


63/77

12. STUDY OF PSPICEAI7:

To stud# the 'spice orcad progra"

SOT


64/77

13.SIMULATION OF

INSRUMENTATIONAL AMPLIFIER.AI7:

To siulate an instruentation +pli!er using 'spice"

S"0O +pparatus 0ae -ibrar#

3"

O'* +('

O'*+('

4" RESISTOR +0+-OF


65/77

CIRCUIT DIAGRAM

•%r#/ed,re:3" To open capture c is> start *progra*Orcad;"4fail#*capturCIS"4" In the !le enu bar> ne& proect option is selected"


66/77

SI7ULATED OUT%UT:

RESULT: Thus instruentation +pli!er constructed and siulated using 'spice"


67/77

14.SIMULATION OF ACTIVE LOWPASS,

HIGHPASS AND BANDPASS FILTER

S"0O +pparatus -ibrar#

0ae

3"

O'* +('

O'*+('

4" RESISTOR +0+-OF

given a nae6 create a no& blan% proect" In the enu> place*part option is chosen a no of folders appears on the screen" The librar# re$uire for particular option is chosen" Then the coponents are placed on the scheatic screen according to the circuit diagra"

+ll the coponents are placed in the gae anner and interconnections are ade using &ire" The ensure proper interconnections not list is created" The errors are connected &hile creating the not list" .or doing tie +C supplies +nal#sis select" pspice*no& stiulation pro!le and the speci!ed the starting fre$uenc# 3==DG to ending

fre$uenc# as 3=DG" pspice*no& stiulation pro!le and the speci!ed the starting fre$uenc# set t&o call a per

ar%er at the output 6 select pspice run the circuit" 'lot the &ave for b# ta%ing aplitude at #* axis6 fre$uenc# in x*axis"

+fter the necessar# voltage ar%ers are placed at re$uired terinals" Then the progra is toget desired output"


68/77

CIRCUIT DIAGRAM & SIMULATED OUTPUT:

L%:

%:

B%:


69/77

B%:

RESULT: Thus an active lo& pass> high pass and band pass !lter &as constructed and siulated using

'spice"

15.SIMULATION OF ASTABLE AND


70/77

MONOSTABLEMULTIVIBRATOR,

SCHMITT TRIGGER USING IC741


0ae

3"

O'* +('

O'*+('

4" RESISTOR +0+-OF

place*part option is chosen6 the necessar# librar# are added" Then the coponents> librar# can be placed on the scheatic screen according to the circuit

diagra" To ensure proper interconnections not list is created to errors are connected &hile creating the

not list" .or doing tie doain anal#sis select 'spice * ho& siulation pro!le in that dialog box> set the

run !le as coes"

Set the voltage ar%er at the output side and 'spice run"

ASTABLE


71/77

ASTABLE:

SC7ITT TRIGGER:

7ONOSTABL

E:

RESULT: Thus the +ST+B-E and (O0OST+B-E (U-TIVIBR+TOR> SCD(ITT TRIFFER &as constructed and siulated using

'spice


72/77

16.SIMULATION OF RC PHASESHIFT

AND WEIN BRIDGE OSCILLATOR


0ae

3"

O'* +('

O'*+('

4" RESISTOR +0+-OF

!le is given a nae6 create a ne& blan% proect is chec%ed" In the enu> place*part option is chosen a no of folders appears on the screen" The librar# re$uire for particular option is chosen"

Then the coponents are placed on the scheatic screen according to the circuit diagra" +ll the coponents are placed in the gae anner and interconnections are ade using &ire" The errors are connected b# creating the not list" To create a siulation pro!le pspice ne& siulation pro!le is selected" +fter the necessar# voltage ar%ers are placed at re$uired terinals" Then the progra is run 6soe

odi!cation is done to get desired output"

CIRCUITDIAGRAM&SIMULATED


73/77

CIRCUIT DIAGRAM & SIMULATED

OUTPUT

RC "hae h+$t:


74/77

16.SIMULATION OF ASTABLE AND MONOSTABLEMULTIVIBRATOR

USING IC555


0ae

3"

O'* +('

O'*+('

4" RESISTOR +0+-OF


75/77

CIRCUIT DIAGRAM & SIMULATED OUTPUT:ASTABLE:

7ONOSTABLE:


76/77

RESULT: Thus an +ST+B-E and (O0OST+B-E (U-TIVIBR+TOR using IC 555 8as constructed and siulated using

'spice"


77/77

EC6412_Orientation.pptx

Documents

Transcript of EC6412_Orientation.pptx