Easily Build Designs Using Altera’s Video and Image Processing Framework

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© 2010 Altera Corporation—Public Easily Build Designs Using Altera’s Video and Image Processing Framework 2010 Technology Roadshow

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Easily Build Designs Using Altera’s Video and Image Processing Framework. 2010 Technology Roadshow. Agenda. What is the video framework?                 Six steps to building a video system Video design demo using SOPC Builder Summary    . Altera Video Design Framework. - PowerPoint PPT Presentation

Transcript of Easily Build Designs Using Altera’s Video and Image Processing Framework

© 2010 Altera Corporation—Public

Easily Build Designs Using Altera’s Video and Image Processing Framework

2010 Technology Roadshow

© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Agenda

What is the video framework?                 Six steps to building a video system Video design demo using SOPC Builder Summary                      

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© 2010 Altera Corporation—Public

Altera Video Design Framework

© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Altera Video Design Framework

Higher Designer Productivity = Faster Time to Market

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Video IP Building Blocks: IPS-Video

‘Interlacer’ core in v10.1

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Open, Low-Overhead, Interface Standard:Avalon Streaming (ST) Video

Open Interface Protocol for Streaming Video Datapaths and Memory-Mapped Control Paths

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Portfolio of Reference Designs

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© 2010 Altera Corporation—Public

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Video Development Kits

Cyclone III FPGA, $1,895

Stratix IV FPGA, $4,995

Cyclone III FPGA, $2,995Arria II GX FPGA, $2,995

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© 2010 Altera Corporation—Public

Six Steps to Building a Video System

© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

General Video System Design Flow

Full Software Implementation

Design Specification

No

Yes

Project complete

Software Implementation for System Bring Up

OK?

Hardware Implementation

OK?

No

No OK?

Yes

Yes

Software only change?

Yes

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Implementation Build system incrementally in six steps

Always follow the steps!

1. Implement top-level HDL 2. Implement video output3. Add soft processor for control and debug

Can be removed later if not required4. Implement video input5. Implement frame sync and memory interface6. Integrate video processing functions

Full Software Implementation

Design Specification

No

Yes

Project complete

Software Implementation for System Bring Up

OK?

Hardware Implementation

OK?

No

No OK?

Yes

Yes

Software only change?

Yes

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Hardware Implementation—Video Output

Test Pattern Generator

Use a TPG Instead of Video Source to Test Video Output

Clocked Video Output

Top level (HDL)

PLLs

SDI-Rx

VCXO

PFD

SDI-TxSDI TX

SDI RX

DVI RX

DVI TxDVI TX

SOPC Builder

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Hardware Implementation—Nios II Processor

Test Pattern Generator

Clocked Video Output

Top level (HDL)

PLLs

SDI-Rx

VCXO

PFD

SDI-TxSDI TX

SDI RX

DVI RX

DVI TxDVI TX

SOPC Builder

Nios II Processor

Add Nios II processor. Write Software for Control and Debug

LEDs JTAG UART Buttons

Add Board Peripherals

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Hardware Implementation—Video Input

Test Pattern Generator

Clocked Video Output

Top level (HDL)

PLLs

SDI-Rx

VCXO

PFD

SDI-TxSDI Tx

SDI Rx

DVI Rx

DVI TxDVI Tx

SOPC Builder

Nios II ProcessorLEDs JTAG UART Buttons

Clocked

Video Input

Terminator

Add Video Input(no datapath yet)

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Hardware Implementation – Memory Controller

Test Pattern Generator

Clocked Video Output

Top level (HDL)

PLLs

SDI-Rx

VCXO

PFD

SDI-TxSDI Tx

SDI Rx

DVI Rx

DVI TxDVI Tx

SOPC Builder

Nios IILEDs JTAG UART Buttons

Clocked

Video Input

Terminator

DDRX Memory Controller

Frame Buffer

Add Frame Buffer and Memory Controller

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Hardware Implementation – Video Processing

Clocked Video Output

Top level (HDL)

PLLs

SDI-Rx

VCXO

PFD

SDI-TxSDI Tx

SDI Rx

DVI Rx

DVI TxDVI Tx

Nios IILEDs JTAG UART Buttons

Clocked Video Input

Add Video Processing Functions

DDRX Memory Controller

Chroma Resamp

ler

CSCFrame BufferDeinterlace

rScaler

SOPC Builder

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Video Design Demo Using

SOPC Builder

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© 2010 Altera Corporation—Public

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Summary Altera video design framework enables rapid

development Mix and match existing IP—leverage Altera’s open interface

standard Automatically integrate embedded processors and arbitration

logic Leverage building block IP provided by Altera Use existing reference designs as starting points

Rapid prototyping Implement design using the appropriate development boards Test the design with actual video signals

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© 2010 Altera Corporation—Public

Thank You!

For more information visit: www.altera.com