Dynamic power supply design for high-efficiency wireless ...
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Centro de Electrónica Industrial (CEI) | Universidad Politécnica de Madrid | [email protected] | www.cei.upm.es The topic of this project is application of GaN FETs and filter design methodology in a dynamic power supply for highly efficient wireless transmitters. The main objectives of the filter design are generation of the envelope reference with minimum possible distortion and high efficiency of the amplifier obtained by the optimum trade-off between conduction and switching losses. This optimum point was determined using power losses model for synchronous buck with sinusoidal output voltage. On the other hand, application of GaN FETs showed significant efficiency enhancement comparing to the prototypes with Si MOSFETs with good values for FOM. Efficiency measurements The obtained efficiency measurements showed significant efficiency enhancement by application of GaN FETs comparing to standard Si MOSFETs. For 64QAM and WCDMA signals, EPC1014 prototype showed around 5% higher efficiency comparing to fast switching Si BSC016N04LSG, at 5MHz of switching frequency. Filter design methodology for optimum trade-off between the bandwidth and efficiency was proposed and experimentally verified for sinusoidal output voltage. CONCLUSIONS Modeling of GaN devices Project sponsored by Dynamic power supply design for high-efficiency wireless transmitters using GaN FETs Envelope Tracking and Envelope Elimination and Restoration techniques o Wireless and broadband services – growing on a daily basis o Radio base stations – low efficiency! o The main reason – poor efficiency of linear amplifier o ET and EER – efficiency increasement techniques Envelope Amplifier needs to have • Fast dynamic response (bandwidth and slew rate) • High efficiency Proposed topology: Synchronous Buck with GaN FETs GaN devices – significantly better FOM! Device Type Vds_max [V] Ron[mΩ] QG[mΩ] (Vgs=5V) FOM EPC1015 GaN 40 4 11.6 46.4 EPC1014 GaN 40 16 3 48 BSC016N04LSG Si 40 2.3 60 138 Static characteristics: Vin=24V, Rload=4Ω, variable duty cycle 0 10 20 30 40 50 60 70 80 90 0 5 10 15 20 25 30 35 Efficiency [%] Pout [W] LDMOS 10MHz EPC1015 GaN 10MHz BSC016N04LSG at10MHz EPC 1014 at 10MHz 10MHz Dynamic measurements: 64QAM and WCDMA, switching frequency: 5MHz 64QAM, BW=1MHz R LOAD = 4Ω EPC1014 EPC1015 PD57070 BSC016N04LSG Pout, avg[W] 41.1 43.3 42.8 42.7 Eff [%] 87.6 85.9 78 84.2 WCDMA, BW=500kHz R LOAD = 3Ω EPC1014 EPC1015 PD57070 BSC016N04LSG Pout, avg[W] 31.2 32.3 31.8 32.6 Eff [%] 87.2 79.8 79.3 82.6 Filter design methodology VOUT ICOUTX 1x COUTX 2n ESR=1u ILOAD 3m 10p Q2 IC_VGS=10 1x 3m 10p Q1 IC_VGS=0 1x ILOUT1 IDQ1 Vin LOUT1 DCR=1m 12.7u IDQ2 R1 18 0 2 10 6 4 10 6 6 10 6 8 10 6 1 10 5 0 0.2 0.4 0.6 0.8 1 Vout (j2π ) = A Design parameter How to minimize the losses by filter design? The optimum trade-off between the conduction and switching losses. 50 55 60 65 70 75 80 1 1,2 1,4 1,6 1,8 2 Efficiency [%] Filter Design parameter, A Efficiency model Efficiency experimental R=15Ω Modeling of GaN devices Switch-based large signal model: losses & performance prediction of our topology A physical model that provides a dependence of the switching behaviour and power losses on the technological parameters of the transistor Developed high frequency black box model for commercially available EPC GaN FETs 40 50 60 70 80 5 7 9 11 13 15 Efficiency Pout (W) The prototype with EPC 1015, 4MHz Measured Model D. Cucak Motivation and Objective Synchronous Buck as Envelope Amplifier GaN FETs Two main goals
Transcript of Dynamic power supply design for high-efficiency wireless ...
Centro de Electrónica Industrial (CEI) | Universidad Politécnica de Madrid | [email protected] | www.cei.upm.es
The topic of this project is application of GaN FETs and filter design methodology in a dynamic power supply for highly efficient wireless transmitters. The main objectives of the filter design are generation of the envelope reference with minimum possible distortion and high efficiency of the amplifier obtained by the optimum trade-off between conduction and switching losses. This optimum point was determined using power losses model for synchronous buck with sinusoidal output voltage. On the other hand, application of GaN FETs showed significant efficiency enhancement comparing to the prototypes with Si MOSFETs with good values for FOM.
Efficiency measurements
The obtained efficiency measurements showed significant efficiency enhancement by application of GaN FETs comparing to standard Si MOSFETs. For 64QAM and WCDMA signals, EPC1014 prototype showed around 5% higher efficiency comparing to fast switching Si BSC016N04LSG, at 5MHz of switching frequency. Filter design methodology for optimum trade-off between the bandwidth and efficiency was proposed and experimentally verified for sinusoidal output voltage.
CONCLUSIONS
Modeling of GaN devices
Project sponsored by
Dynamic power supply design for high-efficiency wireless transmitters using GaN FETs
Envelope Tracking and Envelope Elimination and Restoration techniques
o Wireless and broadband services – growing on a daily basis o Radio base stations – low efficiency! o The main reason – poor efficiency of linear amplifier o ET and EER – efficiency increasement techniques
Envelope Amplifier needs to have • Fast dynamic response (bandwidth and slew rate) • High efficiency
Proposed topology: Synchronous Buck with GaN FETs GaN devices – significantly better FOM!
Device Type Vds_max [V] Ron[mΩ] QG[mΩ] (Vgs=5V) FOM
EPC1015 GaN 40 4 11.6 46.4
EPC1014 GaN 40 16 3 48
BSC016N04LSG Si 40 2.3 60 138
Static characteristics: Vin=24V, Rload=4Ω, variable duty cycle
0
10
20
30
40
50
60
70
80
90
0 5 10 15 20 25 30 35
Effi
cie
ncy
[%
]
Pout [W]
LDMOS 10MHz
EPC1015 GaN 10MHz
BSC016N04LSG at10MHz
EPC 1014 at 10MHz10MHz
Dynamic measurements: 64QAM and WCDMA, switching frequency: 5MHz
64QAM, BW=1MHz RLOAD = 4Ω EPC1014 EPC1015 PD57070 BSC016N04LSG
Pout, avg[W] 41.1 43.3 42.8 42.7
Eff [%] 87.6 85.9 78 84.2
WCDMA, BW=500kHz RLOAD = 3Ω EPC1014 EPC1015 PD57070 BSC016N04LSG
Pout, avg[W] 31.2 32.3 31.8 32.6
Eff [%] 87.2 79.8 79.3 82.6
Filter design methodology
VOUT
ICOUTX
1x
COUTX
2n
ESR=1u
ILOAD
3m
10p
Q2
IC_VGS=10
1x
3m
10p
Q1
IC_VGS=0
1x ILOUT1
IDQ1
Vin
LOUT1
DCR=1m
12.7uIDQ2
R1
18
0 2 106
4 106
6 106
8 106
1 105
0
0.2
0.4
0.6
0.8
1
Vout
(j2π
) = A
Design parameter How to minimize the losses by filter design? The optimum trade-off between the
conduction and switching losses.
50
55
60
65
70
75
80
1 1,2 1,4 1,6 1,8 2
Effi
cie
ncy
[%
]
Filter Design parameter, A
Efficiency model
Efficiency experimental
R=15Ω
Modeling of GaN devices
Switch-based large signal model: losses & performance prediction of our topology
A physical model that provides a dependence of the switching behaviour and power losses on the technological parameters of the transistor
Developed high frequency black box model for commercially available EPC GaN FETs
40
50
60
70
80
5 7 9 11 13 15
Effi
cie
ncy
Pout (W)
The prototype with EPC 1015, 4MHz Measured
Model
D. Cucak
Motivation and Objective
Synchronous Buck as Envelope Amplifier
GaN FETs
Two main
goals
