DVD4250D Servis Manual
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Transcript of DVD4250D Servis Manual
1
DVD4250D DVD PLAYER
SERVICE MANUAL
2
1. GENERAL DESCRIPTION 1.1 ES66x8
The ES66x8 Vibratto II processor is a highly integrated single-chip DVD solution that integrates read
channel, ECC, Servo DSP, MCU, and MPEG-2/MPEG-4/DivX decoder that has a state-of-the-art 480p/576p progressive-scan video feature to provide brilliant and sharp, flicker-free video output to the display, and with built-in gamma correction and S/PDIF input and output support. The 66x8 performs audio/video stream data processing, TV encoding, Macrovision copy protection, DVD system navigation, system control, and housekeeping functions.
The Vibratto II DVD processor is built on the ESS proprietary dual CPU Programmable Multimedia
Processor (PMP) core consisting of 32-bit RISC and 64-bit DSP processors and offers the best DVD feature set. These features can be listed as follows:
General Features: − Single -chip DVD processor incorporating all front-end and back-end functions. − Unified memory architecture. − Built-in ADCs and DACs for servo control signals . − DVD-Video, DVD-VR, VCD 1.1 and 2.0 and SVCD − Proven ECC, EFM/EFM+ demodulation, and EDC circuit . − Direct interface of 16-bit DRAM up to 128-Mb capacity. − Direct interface of 8- or 16-bit SDRAM up to 128-Mb capacity. − Direct interface for up to 4 banks of 8-bit EPROM or Flash EPROM for up to 4 MB per bank. − Direct interface to the ES6603 servo AFE chip. Video Related Features: − Integrated NTSC/PAL encoder with pixel-adaptive de-interlacer and five 10-bit 54 MHz video DACs . − DivX and MPEG-4 Advanced Simple Profile at full screen. − Media playback with CD-ROM, CD-R/RW, DVD-R/RW and DVD+R/RW. − Macrovision 7.1 for NTSC/PAL interlaced video. − Macrovision NTSC/PAL (480p/576p) progressive scan video. − Simultaneous composite, S-video and YUV outputs. − CCIR656/601 YUV 4:2:2 output. − OSD controller supports 256 colors in 8 degrees of transparency. − JPEG digital photo CD support ( Kodak Picture CD and Fujifilm FujiColor CD ).
3
Audio Related Features: − Full DVD-Audio support including MLP and LPCM decode, CPPM decryption, and watermark detection. − Up to 7.1 channel audio outputs . − Bass management. − Dolby Digital ( AC-3 ), Dolby Pro Logic, and Pro Logic II. − DTS surround ( ES6698 only ). − S/PDIF digital audio input and output . − SRS TruSurround. − Professional karaoke with full scoring scheme. 1.2 MEMORY
1.2.1 System SRAM Interface The system SRAM interface controls access to optional external SRAM, which can be used for RISC
code, stack, and data. The SRAM bus supports four independent address spaces, each having programmable bus width and wait states. The interface can support not only SRAM, but also ROM/EPROM and memory-mapped I/O ports for standalone applications are supported.
1.2.2 DRAM Memory Interface The Vibratto II provides a glueless 16-bit interface to DRAM memory devices used as video memory for a DVD player. The maximum amount of memory supported is 16 MB of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 128-Mb addressing. The memory interface controls access to both external SDRAM or EDO memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers. 1.3 FRONT PANEL
The front panel is based around an Futaba VFD and a common front panel controller chip, (uPT6311). The ES66x8 controls the uPT6311 using several control signals, (clock, data, chip select). The infrared remote control signal is passed directly to the ES66x8 for decoding. 1.4 REAR PANEL A typical rear panel is included in the reference design. This rear panel supports: - six channel and two channel audio outputs - Optical and coax S/PDIF outputs. - Composite, S-Video, and SCART outputs The six-video signals used to provide CVBS, S-Video, and RGB are generated by the ES66x8’s internal video DAC. The video signals are buffered by external circuitry. Six channel audio output by the ES66x8 in the form of three I2S (or similar) data streams. The S/PDIF serial stream is also generated by the ES66x8 output by the rear panel. A six channel audio DAC are used for six channel audio output with ES66x8, and similarly one Audio DAC is used for two channel audio output with ES66x8.
4
2. System Block D iagram and ES66x8 Pin Description 2.1 ES66x8 Pin Description
5
6
7
8
9
2.1 SYSTEM BLOCK DIAGRAM A sample system block diagram for the ES66x8 Vibratto II DVD player board design is shown in the
following figure:
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3. AUDIO OUTPUT The ES66x8 supports two-channel analog audio output while ES66x8 supports six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The ES6008 also provides digital output in S/PDIF format. The board supports both optical and coaxial S/PDIF outputs.
3. AUDIO DACS
The ES66x8 supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the ES66x8 internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-channel DAC is an CS4392. The DACs support up to 192kHz sampling rate. The outputs of the DACs are differential, not single ended so a buffering circuit is required. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering. 5 VIDEO INTERFACE 5.1 Video Display Output The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the Vibratto II. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode.
11
The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4:2:2 to YUV4:2:0 component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation. Video Bus The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR1656 pixel format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many chrominance lines as luminance. Video Post-Processing The Vibratto II video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through a combination of special hardware and software. Horizontal up-sampling and filtering is done with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable scaling ratio. Video Timing The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically is used for TV displays, the single for computer displays. 6 SDRAM MEMORY The memory bus interface generates all the control signals to interface with external memory. The Vibratto II supports different configurations using the memory configuration bits SDCFG[1:0] (bits 12:11), the SD8BIT bit (bit 14), and SD64M bit (bit 15) in the BUSCON_DRAM_CONTROL register. Configurations can be implemented in many ways. The following table lists the typical SDRAM configurations used by the Vibratto II. Typical SDRAM Configurations:
The memory interface controls access to both external SDRAM or EDO memories, which can be the sole unified external read/write me mory acting as program and data memory as well as various decoding and display buffers. At high clock speeds, the Vibratto II memory bus interface
12
has sufficient bandwidth to support the decoding and displaying of CCIR1656/601 resolution images at full frame rate. 7 FLASH MEMORY The decoder board supports AMD class Flash memories. Currently 4 configurations are supported: FLASH_512K_8b FLASH_1024K_8b FLASH_512Kx2_8b FLASH_512Kx2_16b The Vibratto II permits both 8- and 16-bit common memory I/O accesses with a removable storage card via the host interface. 8 SERIAL EEPROM MEMORY
An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup,
etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent. 9 AUDIO INTERFACE AUDIO SAMPLING RATE AND PLL COMPONENT CONFIGURATION
The ES66x8 Vibratto II audio mode configuration is selectable, allowing it to interface directly with
low-cost audio DACs and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew. The transmit I2S interface supports the 128, 192, 256, 384, and 512 sampling frequency formats, where sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S transmit interface can be 16, 18, 20, 24, and 32-bit samples.
For Linear PCM audio stream format, the Vibratto II supports 48 kHz and 96 kHz. Dolby Digital audio only supports 48 kHz. The ES6008/18 Vibratto II incorporates a built-in programmable analog PLL in the device architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or an input to the ES66x8 Vibratto II . Audio data out (TSD) and audio frame sync (TWS) are clocked out of the Vibratto II based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in (RSD) and audio receive frame sync (RWS).
10 FRONT PANEL 10.1 VFD CONTROLLER
The VFD controller is a PTC PT6311. This controller is not a processor, but does include a simple state
machine which scans the VFD and reads the front panel button matrix. The 6311 also includes RAM so it can store the current state of all the VFD icons and segments. Therefore, the 6311 need only be accessed when the VFD status changes and when the button status is read. The ES66x8 can control this chip directly using PIO pins or can allow the front panel PIC to control the VFD.
11 MISCELLANEOUS FUNCTIONS 11.1 RESET CIRCUITRY
Two different chips are supported to provide the power-on-reset and pushbutton reset function:
AAT3521 or V6300.
13
12 CONNECTORS 12.1 SCART CONNECTORS Pinout of the scart connector: 1 ? Audio Right Out 2 ? Audio Right In 3 ? Audio Left / Monu Out 4 ? Audio Gnd 5 ? Blue Gnd 6 ? Audio Left / Mono In 7 ? Blue 8 ? Control Voltage 9 ? Green Gnd 10 ? Comms Data 2 11 ? Green 12 ? Comms Data 1 13 ? Red Gnd 14 ? Comms Data Gnd 15 ? Red 16 ? Fast Blanking 17 ? Video Gnd 18 ? Fast Blanking Gnd 19 ? Composite Video In 20 ? Composite Video Out 21 ? Shield Some cheaper SCART cables use unshielded wires, which is just about acceptable for short cable lengths. For longer lengths, shielded coax cable become essential.
Scart Signals:
Audio signals 0.5V RMS, <1K output impedance, >10K input impedance. Red, Green, Blue 0.7Vpp ? 2dB, 75R input and output impedance. Note that the Red connection (pin 20) can alternatively carry the
S-VHS Chrominance signal, which is 0.3V.
Composite Video / CSync 1Vpp including sync, ?2dB, 75R input and output impedance.Bandwidth = 25Hz to 4.8MHz for normal TV Video de-emphasis to CCIR 405.1 (625-line TV) Fast Blanking 75R input and output impedance. This control voltage allows devices to over-ride the composite video input with RGB inputs, for example when inserting closed caption text. It is called fast because this can be done at the same speeds as other video signals, which is why it requires the same 75R impedances.
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0 to 0.4V: TV is driven by the composite video input signal (pin 19). Left unconnected, it is pulled to 0V by its 75R termination. 1V to 3V: the TV is driven by the signals Red, Green, Blue and composite sync. The latter is sent to the TV on pin 19. This signal is useful when using a TV to display the RGB output of devices such as home computers with TV-compatible frame rates. Tying the signal to 5V via 100R forms a potential divider with the 75R termination, holding the signal at around 2V. Alternatively, if a TTL level (0 to 5V) negative sync pulse is available, this will be high during the display periods, so this can drive the blanking signal via a suitable resistor.
Control Voltage
0 to 2V = TV, Normal. 5 to 8V = TV wide screen 9.5 to 12V = AV mode
13. CIRCUIT DESCRIPTION 13.1 POWER SUPPLY: − Socket PL2 is the 220VAC input. − Socket PL3 is used for the power button on the front panel. − 3.15A fuse F1 is used to protect the device against short circuit. − Voltage is rectified by using diodes D1, D2, D3 and D4. Using capacitor C33 (47?f) a DC voltage is
produced. (310- 320VDC). − The current in the primary side of the transformer TR2 comes to the SMPS IC (TNY267P). It has a built-in
oscillator, over current and thermal protection circuitry and runs at 133kHz. It starts with the current from the primary side of the transformer and follows the current from the feedback winding.
− Voltages on the secondary side are as follows: 12 Volts at pin11 at C42, 5 Volts at C40,3.3 Volts at C38,
-22Volts at C44,-12 Volts at D22.
− D14 TL431 is a constant current regulator. TL431 watches the 5 volts and supplies the required current to IC2. There are a LED and a photo transistor in IC2. The LED inside the IC2 transmits the value of the current from D25 to phototransistor. Depending on the current gain of the phototransistor IC3 keeps the voltage on the 5-volt-winding constant.
− –22 Volts is used to feed the VFD (Vacuum Fluorescent Display) driver IC on the front panel.
15
Functional Block Diagram of Switcher 13.2 FRONT PANEL: − All the functions on the front panel are controlled by U1 (ES66x8) on the mainboard. − U1 sends the commands to IC2 PT6311 via socket J2 (pins 3,4 and 5). − There are 48 keys scanning function, 5 LED outputs, 1 Stand-by output and VFD drivers on PT6311. − Vacuum fluorescent display is specially designed for DVD. − The scanned keys are transmitted via PT6311 to U1 on the mainboard. − IR remote control receiver module sends the commands from the remote control directly to U1. 13.3 BACK PANEL: − There are 1 SCART connector (con24), 2 pieces RCA audio jacks for audio output, 1 coaxial digital audio
output and 1 laser digital audio output on the back panel. − MOFT3C2 is used for laser output. − Left and right audio outputs are on RCA Conn 6. − LUMA and CHROMA signals of S-Video are transmitted to P1 via transistors Q39 and Q37 respectively.
16
CD Update Procedure of 4250D 1. Download the update file from the convenient link according to your default language choice. 2. While there is no CD in the DVD (No Disc Mode) , press “Menu 1 3 5 7” buttons on the remote control
in order to reach the Service Menu of DVD Player:
2.1. Note the software version described as “b.xx “ to be able to compare the sw. Version after update process.
3. Copy the update file to the desktop and rename it according to the update file name in the hidden menu of the device. For example If C2M1AS__ is written then rename it like C2M1AS__.rom If P6M1AS__ is written then rename it like P6M1AS__.rom (If you receive the update file already renamed (with addition of .rom) from the customer technical support department by giving the SAP code of the product then burn the already renamed file with nero program as it is shown below.)
4. Burn the renamed files by Nero program with below set up.
5. After burning process is completed, place the update CD into the DVD tray and press play button. 6. Wait to see the update process steps as shown below. When the sw. Update is completed unit will switch
itself to standby mode.
7. Finally, press the eject button and take out the update CD while DVD Player remains at stand by Mode. 8. Updating process has been completed. To check whether it is updated correctly or not, repeat the first step
for comparing software version 9. If the previous and letter names are different, CD is update has completed successfully. If the name remains
same than go through the steps from the beginning. IMPORTANT NOTE: If the AC source breaks down while the updating the unit (main board) will be totally out of order. This kind of units/boards is out of Warranty.
17
Brief Information of Naming the File
Software version differs from each other depending on front models. 23xx and 24xx are called Old VFD and 25xx and 26xx are called Mini VFD. Each character in the file name is an abbreviation of a description as illustrated below.
C2M1AS__
Progressive Option (with progressive : P, without progressive: _ )
DMR option (with DMR:R, without DMR:_ )
Loader Type (S loader:s W loader:w)
Flash Type ( AMD:A, Intel:I )
Language group
VFD type
DAC channel (2, 6)
DAC Type
18
Pay attention the left side. Select CD and CD_ROM (ISO) on the upper left side of screen
19
Select No Multisession
20
Format is Mode 1
21
22
Leave the dates as it is
23
Leave it as it is
24
Click the “New” on the upper right corner of the screen
25
Select your file from file browser then you will see your file in the “Name” section on the right side and then copy the files to under “Name” section on the left side.(this is just an example you will see your file name when you are doing this process)
26
Click the “Burns the current compilation”
27
Then you will see this screen and click the “Burn” on the right upper side of screen
28
You will see this screen and tray will open itself on computer ,then place the CD in CD-ROM And it will start writing. At the end you will see “burn complited”
.
TMS2
8F40
0Axy
4-PIN EXTENSION FOR ROM EMULATOR INTERFACE
32/64MBIT SDRAM
EM-MARINRESET IC
SERIAL EEPROM
reserved 50
4.25
114.75
121.5
bypass
1
4.250
PLL0
108
0 1
162
1
11NA
0135
S-CHIP
0
NA3.75
PLL2
1
Frequency
0
4148.5
4
1121.5
0
101.25
reserved
1 27bypass
06
DEFAULTPLL1
5.5
DEFAULT
1
4.754.501
MULTI
0S-CHIP
114.75
1
1
128.25
108
3.5
4.5NA
94.5
0
0
PLL3
0
CLK SOURCE1
CRSTAL OSCDCLK INPUT
Vibratto-II
FLASHR34, R68EPROM
R32, R35
INSTALL REMOVE TYPER34, R68 R32, R35
Y G
BC
CVBS CVBSYDAC
BFDAC
U
S-VIDEO + RGB
Y
CVBS
CDACU
VDAC
C
Y
CVBS + S-VIDEO or CVBS + YUV
CVBS
CVBS + RGB
VIDEO OUTPUT TABLE
VG
CVBS
R R
CVBS + YUV
VUDAC
SERVO MCUDEBUGHEADER
VFD-DATA
GND
IR+5V
VFD-CSVFD-CLK
V6300 OPENAAT3521
0
R370
U10OPENR36
AM5868 BA5954
CC28 0.015U7.5nF
VESTEL-4250H-A1 A1
Vibratto-ll ES66X8
VESTEL
C
2 5Wednesday, March 03, 2004
Title
Size Document Number Rev
Date: Sheet of
SLDC
DEFCTSPDON
LA16
LA11
LA19
DWE#
SFGIN
DB6
DB1
LD1
LA12
VCC33V
LA13
FOCUS
RFRP
XFLAG2
MA8
MA
1LD6
LA4
LA18
SCLK
LA6
SLEGP
DIP
DB12
MA2
WRLL#
MA
6
SPINDLE
LA3
SCSJ
LD1LA1
FEI
XFLAG3RFO
MA5
MA11
MA
4
LA17
LA2
SPDON
TR1
DB3
LD0LA6LA7
LA19
WRLL#
LA14
RFO
SBAD
MA
0
LA1
SDATA
FOCUS
LCS3#
LD5
LA15
LA10
WRLL#
LCS2#
DB14
DB10
DB5
LA21
MA
7
LA0
LA5
LA11
LA8
DIN
DSCK
VFD-CLK
MA10
XFLAG1
LD5
LD2
LA10SPINDLE
LD3
LA5
LA3
MA9
MA0
MA
8
TESTAD
FEI
DQM
DB15
DB13
DB9
MA6
MA
2
LOE#
LD0
CAS#
RAS1#
MA
10
LD7
RESET#
SVREF15
LA17
LOE#
LA12
SLEGN
DB11
RESET#
LA9
TRACK
XFLAG0
LD4
LA14
LA9
RAS0#
TEI
MA
5
MIRR
LA7
VFD-CS
IR
DOE#
DB8
MA3DB4
DB0
LD3
LD7LD6
LD2
LA4
LA2
LA0
LA18
RAS2#
MA4
DB2
MA
9
LD4
DA
DA
TEICEI
DIN
CEI
VFD-DATA
CS0#
MA7
MA
3
LA8
TRACK
MA1
DB7
MA
11
LA13
LA15LA16
DIP
RF
RP
LA13
DS
CK
RA
S0#
DM
A3
SLEGPWRLL#
LA4
DB
15RESET#
DEFCT
RX
D
LD4
LCS3#
RFGND
FDAC1
SLDC
TR1
TX
D
TB
CK
LA0
LA3
LA6
LA10LA11
LA17
DB
1
DM
A6
DB
3
DB
0
DM
A1
SP
DIF
FD
AC
1
DQM
DO
E#
RA
S2#
TS
D0
CO
MP
LD1LD0
LCS2#
LA21
DB
10
DB
6
TR2
UDAC1
VS
33_P
L2
LOE#
LA7
DB
8
DM
A10
XSDATA
SFGIN
TR2
SV
RE
F15
LD7
LA15
DB
12
DB
5
DW
E#
DM
A5
SVREF15
UD
AC
1
LA5
LA12
DB
11
CA
S#
DM
A2
DM
A0
TS
D1
TWS
GN
DV
RS
ET
VR
EF
VD33_PL1
LD3
VDAC1
DC
LK
TE
ST
AD
XFL
AG
2
LA14
DB
14
RA
S1#
DM
A4
YDAC1
SPDON
XSCSJ
XFL
AG
1
LA2
LA18LA19
DB
13
DB
4
CS
0#
DM
A11
CD
AC
1
LD5
LA8
DB
2
DM
A9
DM
A7
SVREF15
CDAC1
XFL
AG
3
VD
AC
1
LA1
DB
9
XO
UT
XFL
AG
0
MC
LK
YD
AC
1
VC
C33
V
LA9
LA16
DB
7
DM
A8
XSCLK
TS
D2
LD6
LD2X
IN
LA20
LA20
LA20
RXDRS232_DETTXD
VFD-CSVFD-CLK
VCCVFD-DATA
IR
RESET#
SLEGN
LCS2#RS232_DET
RS232_DET
SVREF21
SV
RE
F21
SV
RE
F09
EAUX40EAUX41
EAUX43EAUX42
TESTAD
RFRP
LCS3#
SPINDLE(3)
SDEFCT (3)SPDON (3)
OPEN(3)
SLDC (3)
FOCUS(3)
SVREF15(3)
TRACK(3)
SLEGN(3)
MIRR(3)
TEI(3)
RFO(3)
CEI(3)
DIN(3)
FEI(3)
DIP(3)
SBAD(3)
SCSJ(3)SDATA(3)SCLK(3) INSW(3)
HOMESW(3)CLOSE(3)OUTSW(3)DRVSB(3)
UDAC (5)
YDAC (5)
VDAC (5)
FDAC (5)
SPDIF (5)TBCK (4)MCLK (4)
TSD2 (4)TSD1 (4)TSD0 (4)TWS (4)
NN(5)
SCART-ON(5)
EAUX41(4)EAUX42(4)
EAUX40(4)
EAUX43(4)
CDAC (5)
MOCTL(3)
SVREF21(3)
RESET# (3)
ATR_OP(3)
PLL33V
RF33V
VCC33VCC
GND
VCC33
GND
VCC
GND
GNDVGNDV
GNDVGNDV
GNDVGNDV
GNDVGNDV
GNDVGNDV
GNDVVCCV
VCCV
VCCV
VCCV
VCCV
GND GNDGND
GND
VCC
VCCV VCC
GND
VCC20
VCC33V
RFGND
RFGND
RFGND
VCC33
GND
GND
PLLGNDRFGND
GNDV
GNDV
GNDV
GNDV
VC
C20
GNDV
GNDV
GNDV
GNDV
GNDV
GNDV
VCC33
VCC
GND
GND
VCC
GND
VCC
VCC
GNDGND GNDGND GND
VCC33
VCC33 VCC33VCC33VCC33
D13
1N6263
21
D1
1N6263
21
R41 33
R42 100K
U7
ROM EMULATOR SOCKET
1 23 4
RESET CLK/CE1WE ADDR/CE1
CC310.015U
CC14
0.1U
R68 0 OHM
RR22 6.8K
L22.4UH
CC32
0.015U
R6
75 OHM
R521K
CC121U
R47 33
R61
75 OHMCC22
0.1U
D10
1N6263
21
C4470PF
CC201U
CC15
0.1U
CC461U
RR96 0
C11470PF
Y1
27M
RR27 33
L5 2.4UHR
3133
TP19CEI
TP4FLAG3
RN
310
x4
18
27
36
45
R34 0 OHM
R48 0
R430
R104.7K
TP20XSPDON
CC554700P
TP5RFO
TP15SSPINDLE
R32 OPEN
CC8 4.7U
R45 OPEN
CC584700P
RR10 0
TP1FLAG0
R54
33
CC25
47P
RR3 3.3K
RR24 5.1K
R17 0
L3 2.4UH
TP38
XS
C9470PF
RR17 10K
R19 100K
D8
1N6263
21
R50 0 OHM
RN
210
x4
18
27
36
45 U10
AAT3521 SOT-23(5pin)
12345
RESETGND
NCEN
VCC
R1OPEN
FB43.3UH
RR14 R
R531K
U11
AAT3520 SOT-23(3pin)
123
GNDRESET
VCC
CC24
0.1U U2123456789
101112131415161718192021222324 25
2627282930313233343536373839404142434445464748A15
A14A13A12A11A10A9A8NCNCWRPVPPDU/WPNCNCA17A7A6A5A4A3A2A1 A0
EGND
GDQ0DQ8DQ1DQ9DQ2
DQ10DQ3
DQ11VCCDQ4
DQ12DQ5
DQ13DQ6
DQ14DQ7
DQ15/A_1GND
BYTEA16
C3470PF
RR1 4.7K
TP9DIP
CC59C
CC30
560P
R26 33
C6470PF
R40 33
CC176800P
RR87 0
CC19C
R35 OPEN
RR6 3.3K
R54.7K
TP2FLAG1
CC50.1U
R2OPEN
CC37
33P
TP36
XS
TP21FGIN
C1470PF
RR4 3.3K
CC11000P
D11
1N6263
21
TP6TESTAD
RR8 68K
D3
1N6263
21
R37OPEN\0
C7 0.1U
R3OPEN
R44 33
CC23560P
D2
1N6263
21
FB2
FERB
D4
1N6263
21
R36OPEN\0
RR18 5.1K
RR16 1.2K
R51 0
R60
4.7K
C12470PF
CC33
560P
CC28
0.015U
CC13
0.1U
R62
75 OHM
TP12SFOCUS
L12.4UH
R63
75 OHM
R11
75 OHM
TP16MIRR
J2
HDR6-100
123456
CC210.047U
CC21000P
R4OPEN
TP17TEI TP18
FEI
C5470PF
RR21 6.8K
CC16
C L4 2.4UH
CC31000P
TP14SSLEGN
R69 33
CC18C
RR12 R
R59 390
C10470PF
RR2 4.7K
R55
33
U1ES66x8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
5354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
VD
33X
INX
OU
TD
CLK
DM
A0
DM
A1
DM
A2
DM
A3
VS
33V
D33
DM
A4
DM
A5
DM
A6
DM
A7
DM
A8
DM
A9
DM
A10
VS
33V
D33
DM
A11
DC
AS
DC
S0
DC
S1
DR
AS
0D
BA
NK
0/ D
RA
S1
VS
SV
DD
DB
AN
K1/
DR
AS
2D
CK
E/D
OE
/TD
MT
SC
DW
ED
B0
DB
1D
B2
VS
33V
D33
DB
3D
B4
DB
5D
B6
DB
7D
B15
DB
14V
S33
VD
33D
B13
DB
12D
B11
DB
10D
B9
DB
8D
SC
KV
S33
VD33DQMLA21LA20LA19LA18LA17LA16VS33VD33LA15LA14LA13LA12LA11LA10
LA9VSSVDDLA8LA7LA6LA5LA4LA3
VS33VD33
LA2LA1LA0
LCS0LCS1LCS2VSSVDD
LCS3LWRLL
LOELD0LD1LD2LD3
VS33VD33
LD4LD5LD6LD7
RSD/TDMDRRBCK/TDMCLK
RWS/TDMFSVD33_PLL
VS
33_P
LY
UV
1/V
RE
FY
UV
3/C
OM
PY
UV
4/R
SE
TY
UV
7/F
DA
CY
UV
6/V
DA
CV
D33
_DA
VS
33_D
AY
UV
5/Y
DA
CY
UV
2/C
DA
CY
UV
0/U
DA
CTW
S/S
EL_
PLL
2TS
D0/
SE
L_P
LL0
TSD
1/S
EL_
PLL
1V
S33
TS
D2
TS
D3
MC
LKT
BC
KS
PD
IF/S
EL_
PLL
3S
PD
IFIN
VD
33V
S33
XS
WB
LCLK
XS
WB
LX
SLG
XS
IP2
XS
IP1
XS
FLA
G[0
]X
SFL
AG
[1]
XS
FLA
G[2
]X
SFL
AG
[3]
VS
SV
DD
XS
TE
XI
XS
TE
ST
AD
XS
SB
AD
XS
FE
IA
VS
S_A
DX
SC
EI
XS
TE
IX
SR
FR
PA
VD
D3_
AD
XS
VR
EF[
21]
XS
VR
EF[
09]
XS
VR
EF[
15]
XS
IRE
FA
VD
D3_
DS
XS
IPIN
XS
RF
INX
SR
FIP
XS
DS
SLV
AVSS_DSAVSS_PLXSPDOFTR1XSFDOXSFTROPIAVDD3_PLXSPLLFTR1XSPLLFTR2XSVREF0XSAWRCAVSS_DAXSRFRPCTRXSTRAYAVDD3_DAXSSPINDLEXSFOCUSXSSLEGPXSSLEGNXSTRACKXSTESTDAXSFGINXSPHOISXCSJXSDATAXSCLKXSDFCTXSLDCXSSPDONVD33VS33XGPIO[9]XGPIO[8]XGPIO[7]XGPIO[6]XGPIO[5]XGPIO[4]EAUX03EAUX02EAUX01EAUX00VSSVDDAUX0AUX1AUX2/ HSYNCAUX3/ VSYNCAUX4AUX5AUX6AUX7RESETVS33
CC41000P
CC61C
R23 33TP
37
XS
RR5 3.3K
CC270.1U
CC35
33P
RN4
10x4
18273645
C13
27PF
U3
24C01A
1234 5
678S0
S1S2GND SDA
SCLWC
VCC
C2470PF
D12
1N6263
21
CC36
33P
R33 33
RR9 20K
R56
33
U5
4Mx16 SDRAM (9ns)
1
24
6
57
3
810
12
1113
9
15
16
17
18
19
3522
23242526
14
28
293031323334
36
37
38
39
40
43
4244
46
4547
49
4850
52
5153
41
2021
27
54
VCC
DQ0DQ1
VSSQ
DQ2DQ3
VCCQ
DQ4DQ5
VSSQ
DQ6DQ7
VCCQ
DQML
WE
CAS
RAS
CS
A11A10
A0A1A2A3
VCC
VSS
A4A5A6A7A8A9
NC
CKE
CLK
DQMH
NC
VCCQ
DQ8DQ9
VSSQ
DQ10DQ11
VCCQ
DQ12DQ13
VSSQ
DQ14DQ15
VSS
BA0BA1
VCC
VSS
TP11STRACK
RR15 33K
R74.7K
RR28 33
R46 33
R94.7K
C8 0.1U
R84.7K
R57 33
RR26 6.8K
RR29 33
U4
27C040/080-90
121110
98765
27262325
42829
3
1314151718192021
2
2224
3130
1
32
16
A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15
D0D1D2D3D4D5D6D7
A16
CEOE
A18A17
A19
VCC
GND
D9
1N6263
21
TP13SSLEGP
CC26
0.1U
RN
110
x4
18
27
36
45
FB1FERB
JJ1
RS232 CONNECTOR 2.54MM
12345
TP3FLAG2
R58 33
R65 33
RR25 6.8K
JP1
1 2 3
RR7 10K
C14
27PF
R18 OPEN
R64 33
TP8RFRP
C151000PF
TP10DIN
TP7DA
VESTEL-4250H-A1 A1
ES6603 & Motor Drivers
VESTEL
C
3 5Wednesday, March 03, 2004
Title
Size Document Number Rev
Date: Sheet of
TRACK+
TRACK1
SLED+
FOCUS1
SLED-
CON2
FOCUS-1
LOAD+/DCMO+
TRACK-1
STBY
CON1
FOCUS+
FOCUS-
RF50V
SBA
SVREF15
SCLK
CDMDI
SCSJ
PVC
CE
RF5
0V
FE
SDATA
DVDMDI
TE
DC
A
RF50V
CDLDDVDLD
DVDLDO
RFGND
RF50V
RF50V
LINK
SVREF21SCLKSCSJ
SVREF15
SDATASBA
MEVO
OP2IN+
OP2OUT
OP2IN-
DCLOAD+
LOAD-/DCMO-
DCLOAD-
LOAD-/DCMO-
RFGND
DCLOAD-DCLOAD+
HOMESW
SLED+SLED-
SLED+SLED-
LOAD+/DCMO+LOAD-/DCMO-
SPINDLE1
OPEN
CLOSE-1
RFOUT
B
F
E
TRACK-
LOAD+/DCMO+
TRACK-DCLOAD-
DCLOAD+
SVREF15
OPEN
FOCUS-
CLOSE-1
OP2OUT
A
C
TRACK-TRACK+
RFOUT
PVC
D
DVDLDO
CDMDI
FOCUS+DVDMDI
E
FOCUS-
B
CDLDO
F
CDLDO
SVREF15
LINK
MEVO
SLEGN(2)
TRACK (2)
FOCUS(2)
SDATA (2)
DIN (2)
MIRR (2)
SCSJ (2)
SLDC (2)
SCLK (2)
SDEFCT (2)
DIP (2)
RFO (2)
TEI (2)FEI (2)CEI (2)
SBAD (2)
MOCTL (2)
SPINDLE (2)
SVREF15(2)
CLOSE (2)
OPEN (2)
INSW (2)
OUTSW (2)
HOMESW (2)
SPDON(2)
SVREF21(2)
DRVSB(2)
SVREF21(2)
ATR_OP (2)
BEFR_OP (2)
RF33V
RF50V
RF50V
RF50V
S12V
RFGND
RFGND
RFGND
RFGND
RFGND
RFGND
MGND
MGND
MGND
MGND
MGND
MGND
MGND
MGND
MGND
MVCC
MVCC
MVCC
MVCC
RFGND
RFGND
MVCC
MVCC
MVCCMGND
MVCC
MVCC
MGND
RFGND
RF50V
RFGND
RR764.7K
RR11 56K
LL10 FB (0805)
RR56 1K
RR35 100
CC400.1U
RR7422K
RR102 0
RR73 1M
TP24DEFCT
UU3BA5954FP/AM5868(OPEN)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
29 30
VINFC
CFCERR1
CFCERR2
VINSL+
VINSL-
VOSL
VNFFC
VCC
PVCC1
PGND
VOSL-
VOSL+
VOFC-
VOFC+
STBY
BIAS
VINTK
CTKERR1
CTKERR2
VINLD
PREGND
PVCC2
VNFTK
PGND
VOLD-
VOLD+
VOTK-
VOTK+
GN
DG
ND
DD1 IN41481
RR52
33
CC85
C
CC60.1U RR75
R
RR47 33K
RR37 3.3K
CC84
C
LL13 FB (0805)
+
-
UU4B
TL3472
5
67
84
TP23MNTR
RR108 0
RR58 0
RR109 0(OPEN)
CC450.01U
RR107 0(OPEN)
DD5OPEN
1
RR41 0
RR85
R
RR83 10K
RR59 0
CC670.01U
CC82
C
RR80
R
LL6 FB1 2
CC532200P
CC68100U/16V
RR51 33K
CC750.1U
RR81 0
CC69100U/16V
CC43470P
RR67 1(0805)RR66 1(0805)
RR78
OPEN
CC440.1U
RR46 10
CC600.1U
CC420.1U
RR97 R
CC540.047U
CC48820P
CC65160P
RR88 1K
DD3 IN4148
1
RR101 OPEN
+
-
UU4A
TL3472
3
21
84
TP33SCLK
RR34 12K(1%)
TP32SCSJ
CC500.1U
DD2OPEN1RR60 0
CC512200P
CC562200P
CC390.1U
RR43 1K
RR98 R
QQ12SB1132
1
32
RR113 OPEN
CC34 33P
RR105 0
RR68 1(0805)
RR112 OPEN
RR36 100
RR89 1K
CC70100P
RR791.5K
RR114 0
RR106 0(OPEN)CC770.1U
RR115 OPEN
TP30SBAD
UU5
BA6287F ROHM
1
2
3
4 5
6
7
8OUT1
VM
VCC
FIN RIN
VREF
OUT2
GND
CC734700P
RR55 3.3K
RR72 R
RR7010K
CC9100U/16V
CC29
0.47U
JJ2
2.0MM
12
12
CC641000P
TP31SDATA
RR711.5K
RR54 47K
RR5312K
CC72100P
RR40 R
CC41470P
QQ22SB1132 1
32
CC6633000P
RR49 47K
CC711000P
RR104 OPEN
RR45 10
CC57120P
+ CC78
100U/10V
CC380.1U
RR48 22K
RR103 0
UU2
ES6603
123456789
10111213141516
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48474645444342414039383736353433
DVDFRPDVDRFNA2B2C2D2CPCNDCBACD_DCD_CCD_BCD_A
CD
_FC
D_E
VP
BV
CD
VD
LDC
DLD
DV
DP
DC
DP
DV
NB
LDO
NM
IRR
MP
MB
MLP
FM
INM
EV
O
RF
DC
RF
SIN
AT
OP
AT
ON
AIN
AIP
VP
AR
FA
CB
YP
DIN
DIP
FN
PF
NN
VN
AM
EV
RX
SDENSDATA
SCLKV33LCPLCN
MNTRCEFETEPI
V25V125TPHDFT
LINK
CC62
0.1U
RR84 470K
CC80
0.1U
CC81
0.1U
DD4OPEN
1
RR7710K
TP34SVREF09
CC522200P
TP35SVREF15
RR39 3.3K
RR116 0
CC100
RR69 1(0805)TP25LINK
RR50 5.1K
RR8222K
CC630.22U
CN1HOP-1200 PUH (JP24-0.5MM)
242322212019181716151413121110987654321
2526
2728
TR-TR+FO-FO+
PD(MONITOR)VCC
VRGND
LD(DVD)LD(CD)
VRGND(NC)
PDGND
RFOUTCBADFE
VCCVS(VCC)
GND
GN
DG
ND
GN
DG
ND
J12
2.0MM
123456789
1011
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3.3V REGUALTOR
EZ1085
No need to installEZ1085 circuitry ifJ12 provide +3.3V
ES66x8
ADJ(100UF)
24C01
OUT
SDRAM
ESS CONFIDENTIALThe information has been checked and is believed to be reliable. However, no responsibility is assumed for inaccuracies. Circuit diagrams are provided as a means of illustrating typical applications; consequently complete information for construction purposes is not necessarily given. ESS reserves the right to make changes at any time in order to improve the design.
INP
FRONT
(EZ1085)
2-CHANNEL AUDIO OUT
WOLFSON 2-CHANNEL AUDIODAC
WOLFSON 6-CHANNEL AUDIODAC
6-CHANNEL AUDIO OUT
TYP 2.5V ( 2.3V -- 2.7V )
VESTEL-4250H-A1 A1
MISC
VESTEL
C
4 5Wednesday, March 03, 2004
Title
Size Document Number Rev
Date: Sheet of
U2
EAUX40EAUX42EAUX43
MCLKTBCKTWS
U2U1
U2U1
TSD1TSD0
U1
U1
TSD2
EAUX41
TBCK(2)TWS(2)MCLK(2)
TSD0(2)
AOUT0R- (5)
AOUT0L+ (5)
AOUT0R+ (5)
AOUT0L- (5)
EAUX41(2)EAUX40(2)
EAUX42(2)
EAUX43(2)
MCLK(2)TWS(2)TBCK(2)
EAUX42(2)
EAUX40(2)EAUX41(2)
EAUX43(2)TSD0(2) AOUT0L- (5)
AOUT0R- (5)
TWS(2)
TSD1(2)TSD0(2)
TBCK(2)TSD2(2)
MCLK(2)
EAUX43(2)EAUX42(2)
EAUX40(2)EAUX41(2)
AOUT0R- (5)
AOUT1L- (5)AOUT1R- (5)
AOUT0L- (5)
AOUT2R- (5)AOUT2L- (5)
AOUT2L- (5)
AOUT0L- (5)AOUT2R- (5)
AOUT1L- (5)AOUT1R- (5)
AOUT0R- (5)
GND
GND
GND
GND
VCC
GND
GND
VCC33
GND
VCC
VCC33
VCC VCC33
GNDA
+12V VCC33
GND
VCCA
-12V+5V
VCC
GNDAGND
+3.3VVCCA
VCC20
RF50V +5V
GNDAGNDA GNDA
+3.3V
GNDA GNDA
GNDA
GNDA
VCCA
GND
MGND GND GND
GND
GNDA
GND GND GND
S12V
VCC33VCC33V
VCC33RF33V
VCC33PLL33V
VCC20
VCC33
GND
MVCC
RFGNDRFGND
RFGND
GND
GNDGNDV
RFGND
VCCA
GNDA
GNDA
VCCA
GNDA
VCCA
GNDA GNDA GNDA
U38
CS4392
765
128
19201
2
1415
181716
34
910
13
11
M3MCLKLRCK
CMOUTM2
AUTA-AMUTECRST
VL
AOUTB-AOUTB+
AUTA+VA
GND
SDATASCLK
M1M0
BMUTEC
FILT+
LL1FERB
2
B370.1UF
LL8 OPEN2
C256
0.1UF
B5510UF
B290.1UF
C23OPEN(10UF)
LL5FERB
2
CC1260.1
B5110UF
JS32.54MM
12345678
R71 33
CC1250.1
B430.1UF
B4220UF
D23IN4148
1
B280.1UF
B610.1UF
U31CS4360
765
12
8
1920
12
14 15
181716
34
910
13
11
262524232221
2827
MCLKLRCKSCLK
DIF0
VD
AOUTB3AOUTA3
VLSSDIN1
VLC M2
MUTEC3VQ
FILT+
SDIN2SDIN3
GNDRST
M1
DIF1
AOUTB1MUTC2
AOUTA2AOUTB2
VAGND
MUTC1AOUTA1
B600.1UF
B150.1UF
B220.1UF
B360.1UF
U9AMS1117
32
1
4INOUT
AD
JOUT
B200.1UF
+CC7100/10
LL12 FERB2
B410.1UF
B160.1UF
B300.1UF
B4010UF
R67412(1%)
LL2FERB
2
U30CS4340
87
124
6
91011
123
5
16
13
1514
DEM0DIF0
AOUTRLRCK
DIF1
FILT+VQ
REF-GND
RSTSDATASCLK/DEM1
MCLK
MUTEC
VSS
AOUTLVCCA
CC1290.1
B450.1UF
LL14 FERB2
LL15FERB
2
R66250(1%)
C2720.1UF
B210.1UF
B170.1UF
D24IN4148
1
B230.1UF
C25810UF
C25910UF
R39OPEN1%(681 OHM)
B6210UF
LL7 OPEN2
B240.1UF
B180.1UF B2
OPEN
B1220UF
CC110.1
C273
0.1UF
CC1270.1
B190.1UF
CC1280.1
B350.1UF
B500.1UF
C160.1UF(OPEN)
T3
TP
B3220UF
B380.1UF
Q2 OPEN3 2
1
IN OUT
AD
J
T2
TP
B340.1UF
T1
TP
B250.1UF
U32PCM1606
765
128
19201
2
1415
181716
34
910
13
11
AGNDZEROAFMT2
VOUT3VOUT5
BCKSCKIDATA1
DATA2
VCOMVCC
LRCKDEMP1DEMP0
DATA3FMT1
VOUT6VOUT1
VOUT4
VOUT2
B3310UF
C260
10UF
T4
TP
B3110UF
B3210UF
+CC130100U
C274
0.1UF
LL3 OPEN2
LL11 FERB2
R38OPEN1%(412 OHM)
LL9 OPEN2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VESTEL-4250H-A1 A1
OUTPUT
VESTEL
C
5 5Wednesday, March 03, 2004
Title
Size Document Number Rev
Date: Sheet of
QUIET0
QUIET0
CHROMA-OUT
CVBS-OUT
LUMA-OUT
FR
B-OUT
CVBS-OUT
FL
CVBS-OUT LUMA-OUT
R-OUT
G-OUT
CHROMA-OUT
G-OUTR-OUT
QUIET0
FR
FR
LS
FL
RS CC
SU
B
FL
B-OUT
CC
RS
QUIET0
QUIET0
QUIET0
Rs_OUT
LS
SUB
QUIET0
LFE_OUT
Ls_OUT
C_OUT
SPDIF(2)
AOUT0R+(4)
AOUT0L-(4)
AOUT0L+(4)
AOUT0R-(4)
NN(2)
SCART-ON (2)
SCART-ON(2)
UDAC(2)
FDAC(2)
YDAC(2)VDAC(2)
CDAC(2)
AOUT1L-(4)
AOUT1R+(4)
AOUT2R-(4)
AOUT1R-(4)
AOUT2L-(4)
AOUT2R+(4)
AOUT1L+(4)
AOUT2L+(4)
+12V
-12V
+12V
-12V
-12V
+12V
GNDV
+12V
-12V
VCC
GND
VCC
GND
+5VA
+5VA
+5VA
+5VA
+12V
+12V
GND
GND GND
GND
GND
GND
VCCV
GNDVGNDVGNDVGNDV
VCCV
GNDVGNDV
VCCV
GNDVGNDV
VCCV
GND
+5VA
GND
GNDV
VCCV
GNDV+12V
-12V
-12V
+12V
+12V
+12V
-12V
-12V
C285
10UF
C211
680PF
R42475
1
D25IN4148
1
R337680
C2913300PF
R170 1K1
C300100uF/25
1
Q338550
2
1 3
C17010UF
R412
10K
1
R171
1K
1
P1
6
5
4
3
21
6
5
4
3
21
C281
10UF
R1672.2K
1
R4331K8
1
R164
4701
R4186801
C228
0.1UF
C21722PF
R15 6801
R400
10K
1
R4371K8
1
Q37BC848B
2
13
R197
680
1
C290680PF
C17610UF
R21680
1
R276801
R172 1M
1
R160100K
1
R29
10 OHM1
R43675
1
C292
10UF
C180 680PF
R419
10K
1
C26310UF
Q36BC848B
2
13
R148
10 OHM1
R162
4701
R13
10K
1
R43275
1
C227220uF/25
1
C16910UF
Q202SC3327
2
13
C286680PF
V+
V-
U24-1OPA2134UA
3
21
84
C1730.1UF
C214
10UF
R414
10K
1
R2210K1
C172
680PF
R4231K8
1
R40710K1
R40110K
1
Q272N3904
2
13
C282
680PF
R16 10K1
C2360.1UF
C277
680PF
R156
10 OHM1
Q258550
2
13
C289
10UF
R151100K
1
R4212K2
1
C21822PF
R163
4701
R4292K2
1
R176
470
1
R18768 OHM
1
P2
MOFT3C2
1
2
3
VIN
VCC
GND
R410680
1
C26210UF
C189open
C298100uF/25
1
R161100K
1
R12
10K
1
C184
680PF
C1910.1UF
R178
330 OHM
1
Q232SC3327
2
13
R399680
1
C22322PF
R4251K8
1
R402
10K
1
R397680
1
R152
4701
R40610K 1
C288
10UF
V+
V-
U25-1OPA2134UA
3
21
84
L21
47UH
P3
RCA CONN 6
1 2 5 6 97 83 4
R4382K2
1
C221
10UF
R415680
1
R44175
1
C275
680PF
C284
10UF
Q242SC3327
2
13
Q308550
2
1 3
R42875
1
C2320.1UF
C188
680PF
Q38BC848B
2
13
U27E
7404
11 10
R405100K
1
C235open
P9RCA CONN
1
2
3
4
C226
470uF
1
C215
10UF
R154
10K
1
R416
10K
1
R43475
1
R149100K
1
C2763300PF
C178680PF
R409
10K
1
R42775
1
R40410K
1
C22422PF
R175
10K
1
C230
0.1UF
R150100K
1
R398
10K
1
C21622PF
R157
10 OHM1
R173
OPEN
1
Q132SC3327
2
13
C2800.1UF
12
C177open
Q352N3904
2
13
D6IN4148
1
C297100uF/25
1
R4302K2
1
R174
100K
1
R33810K
Q312N3904
2
1 3
V+
V-
U23-1OPA2134UA
3
21
84
Q342N3904
2
13
U27D
7404
9 8
U27F
7404
13 12
C22522PF
C1740.1UF
R186
680
1
C1930.1UF
C2953300PF
V+
V-
U25-2OPA2134UA
5
67
84
Q222SC3327
2
13
R159100K
1
C299100uF/25
1
R153
470
1
Q328550
2
1 3
D7
IN4148
1
R25
680
1
R30
10 OHM1
R44575
1
R4311K8
1
Q268550
2
13
R16610M
1
C294
680PF
R420
10K
1
C181
open
R40810K 1
C190
open
Q40BC848B
2
13
R1656.8K
1
R17991 OHM
1
R158
10 OHM1
Q39BC848B
2
13
C2873300PF
R155
4701
R339
10K
C1280.1UF
U27A
7404
1 2
R43575
1
R42675
1
C213
10UF
R24
10K
1
R20
10K
1
C26110UF
C2833300PF
C279
10UF
R14
10K
1
C2783300PF
R44475
1
U27C
7404
5 6
J1
CON24
1234567891011
R2810K1
V+
V-
U24-2OPA2134UA
5
67
84
R417
10K
1
C301100uF/25
1
R4131.2K
1
C219
10UF
R195
10K
1
U27B
7404
3 4
Q212SC3327
2
13
C293
10UF
D5IN4148
1
R353
10K
R4222K2
1
R411820
1
C17510UF
V+
V-
U23-2OPA2134UA
5
67
84
C296
10UF
R403330 1
C185
open
C220
10UF
R33110K
FB3 FB
2
R196
11K
1