Dual, Wideband, High Output Current Operational … 2 SBOS126I SPECIFIED PACKAGE TEMPERATURE PACKAGE...
Transcript of Dual, Wideband, High Output Current Operational … 2 SBOS126I SPECIFIED PACKAGE TEMPERATURE PACKAGE...
OPA2677
OPA2677
Dual, Wideband, High Output CurrentOperational Amplifier
OPA2677
SBOS126I – APRIL 2000 – REVISED JULY 2008
www.ti.com
Copyright © 2000-2008, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FEATURES WIDEBAND +12V OPERATION: 200MHz (G = +4) UNITY-GAIN STABLE: 220MHz (G = +1)
HIGH OUTPUT CURRENT: 500mA OUTPUT VOLTAGE SWING: ±5V HIGH SLEW RATE: 1800V/µs LOW SUPPLY CURRENT: 18mA FLEXIBLE SUPPLY RANGE:
+5 to +12V Single Supply±2.5 to ±6V Dual Supplies
APPLICATIONS xDSL LINE DRIVER CABLE MODEM DRIVER MATCHED I/Q CHANNEL AMPLIFIER BROADBAND VIDEO LINE DRIVER ARB LINE DRIVER POWER LINE MODEM HIGH CAP LOAD DRIVER
DESCRIPTIONThe OPA2677 provides the high output current and low distortionrequired in emerging xDSL and Power Line Modem driverapplications. Operating on a single +12V supply, the OPA2677consumes a low 9mA/ch quiescent current to deliver a very high500mA output current. This output current supports even themost demanding ADSL CPE requirements with > 380mA mini-mum output current (+25°C minimum value) with low harmonicdistortion. Differential driver applications will deliver < –85dBcdistortion at the peak upstream power levels of full rate ADSL.The high 200MHz bandwidth will also support the most demand-ing VDSL line driver requirements.
Specified on ±6V supplies (to support +12V operation), theOPA2677 will also support a single +5V or dual ±5V supply.Video applications will benefit from its very high outputcurrent to drive up to 10 parallel video loads (15Ω) with< 0.1%/0.1° dG/dP nonlinearity.
The OPA2677 is available in either an SO-8 or QFN-16 and anHSOP-8 PowerPAD package.
OPA2677 RELATED PRODUCTS
SINGLES DUALS TRIPLES NOTES
OPA691 OPA2691 OPA3691 Single +12V Capable
— THS6042 — ±15V Capable
— OPA2674 — Single +12V Capablewith current limit
All trademarks are the property of their respective owners.
Single-Supply ADSL CPE Driver
82.5Ω2kΩ
2kΩ 1µF
17.4Ω
100Ω2VPP
AFEOutput
324Ω
20Ω
324Ω
1/2OPA2677
1/2OPA2677
+12V
1:1.7
15VPP Twisted Pair17.7VPP
20Ω
17.4Ω
+6.0V
PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.
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OPA26772SBOS126Iwww.ti.com
SPECIFIEDPACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY
OPA2677 SO-8 D –40°C to +85°C OPA2677U OPA2677U Rails, 100" " " " " OPA2677U/2K5 Tape and Reel, 2500
OPA2677 HSOP-8 DDA –40°C to +85°C OP2677 OPA2677IDDA Rails, 75" " " " " OPA2677IDDAR Tape and Reel, 2500
OPA2677 QFN-16 RGV –40°C to +85°C OPA2677 OPA2677IRGVT Tape and Reel, 250OPA2677IRGVR Tape and Reel, 2500
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply ............................................................................... ±6.5VDC
Internal Power Dissipation .......................... See Thermal CharacteristicsDifferential Input Voltage .................................................................. ±1.2VInput Common-Mode Voltage Range ................................................. ±VS
Storage Temperature Range: U, DDA, RGV ................. –65°C to +125°CLead Temperature (soldering, 10s) .............................................. +300°CJunction Temperature (TJ ) ........................................................... +150°CESD Rating:
Human Body Model (HBM)(2) ....................................................... 2000VCharge Device Model (CDM) ....................................................... 1000VMachine Model (MM) ..................................................................... 100V
NOTES: (1) Stresses above these ratings may cause permanent damage.Exposure to absolute maximum conditions for extended periodsmay degrade device reliability.
(2) Pins 2 and 6 on SO-8 and HSOP-8 packages, and pins 2 and11 on QFN-16 package > 500V HBM.
PIN CONFIGURATIONS
Top View
ELECTROSTATICDISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-ments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handlingand installation procedures can cause damage.
ESD damage can range from subtle performance degradationto complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametricchanges could cause the device not to meet its publishedspecifications.
PACKAGE/ORDERING INFORMATION(1)
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site atwww.ti.com.
1
2
3
4
12
11
10
9
NC
–In B
+In B
NC
16 15 14 13
Out
A
NC
+V
S
Out
B
5 6 7 8
NC
NC
–VS
NC
OPA2677RGV
QFN-16
NC
–In A
+In A
NC
1
2
3
4
8
7
6
5
+VS
Out B
–In B
+In B
OPA2677U, DDA
SO-8, HSOP-8
Out A
–In A
+In A
–VS
NOTE: Exposed thermal pad on HSOP-8 and QFN-16 must be tied to –VS.
OPA2677 3SBOS126I www.ti.com
OPA2677U, DDA, RGV
TYP
0°C to –40°C to MIN/ TESTPARAMETER CONDITIONS +25°C +25°C(1) 70°C(2) +85°C(2) UNITS MAX LEVEL(3)
AC PERFORMANCE (see Figure 1)Small-Signal Bandwidth (VO = 0.5VPP) G = +1, RF = 511Ω 220 MHz min B
G = +2, RF = 475Ω 200 170 168 165 MHz min BG = +4, RF = 402Ω 200 170 168 165 MHz min BG = +8, RF = 250Ω 250 225 205 200 MHz min B
Peaking at a Gain of +1 G = +1, RF = 511Ω 0 dB typ CBandwidth for 0.1dB Gain Flatness G = +4, VO = 0.5VPP 80 36 32 30 MHz min BLarge-Signal Bandwidth G = +4, VO = 5VPP 200 MHz typ CSlew Rate G = +4, 5V Step 2000 1500 1450 1400 V/µs min BRise-and-Fall Time G = +4, VO = 2V Step 1.75 ns typ CHarmonic Distortion G = +4, f = 5MHz, VO = 2VPP
2nd-Harmonic RL = 100Ω –72 –70 –69 –68 dBc max BRL ≥ 500Ω –82 –80 –79 –78 dBc max B
3rd-Harmonic RL = 100Ω –81 –80 –79 –78 dBc max BRL ≥ 500Ω –93 –91 –90 –89 dBc max B
Input Voltage Noise f > 1MHz 2 2.6 2.9 3.1 nV/√Hz max BNoninverting Input Current Noise f > 1MHz 16 20 21 22 pA/√Hz max BInverting Input Current Noise f > 1MHz 24 29 30 31 pA/√Hz max BNTSC Differential Gain NTSC, G = +2, RL = 150Ω 0.03 % typ C
NTSC, G = +2, RL = 37.5Ω 0.05 % typ CNTSC Differential Phase NTSC, G = +2, RL = 150Ω 0.01 degrees typ C
NTSC, G = +2, RL= 37.5Ω 0.04 degrees typ CChannel-to-Channel Crosstalk f = 5MHz, Input Referred –92 dB typ C
DC PERFORMANCE(4)
Open-Loop Transimpedance Gain VO = 0V, RL = 100Ω 135 80 76 75 kΩ min AInput Offset Voltage VCM = 0V ±1.0 ±4.5 ±5 ±5.3 mV max AAverage Offset Voltage Drift VCM = 0V ±4 ±10 ±10 ±12 µV/°C max BNoninverting Input Bias Current VCM = 0V ±10 ±30 ±32 ±35 µA max AAverage Noninverting Input Bias Current Drift VCM = 0V ±5 ±50 ±50 ±75 nA/°C max BInverting Input Bias Current VCM = 0V ±10 ±35 ±40 ±45 µA max AAverage Inverting Input Bias Current Drift VCM = 0V ±10 ±100 ±100 ±150 nA°/C max B
INPUT(4)
Common-Mode Input Range (CMIR)(5) ±4.5 ±4.1 ±4.0 ±3.9 V min ACommon-Mode Rejection Ratio (CMRR) VCM = 0V, Input Referred 55 51 50 49 dB min ANoninverting Input Impedance 250 || 2 kΩ || pF typ CMinimum Inverting Input Resistance Open-Loop 22 12 Ω min BMaximum Inverting Input Resistance Open-Loop 22 35 Ω max B
OUTPUT(4)
Voltage Output Swing No Load ±5.1 ±4.9 ±4.8 ±4.7 V min ARL = 100Ω ±5.0 ±4.8 ±4.7 ±4.5 V min ARL = 25Ω ±4.8 V typ C
Current Output VO = 0 ±500 ±380 ±350 ±320 mA min APeak Current Output, Sourcing(6) VO = 0 1.2 A typ CPeak Current Output, Sinking(6) VO = 0 –1.6 A typ CClosed-Loop Output Impedance G = +4, f ≤ 100kHz 0.003 Ω typ C
POWER SUPPLYSpecified Operating Voltage ±6 V typ CMaximum Operating Voltage ±6.3 ±6.3 ±6.3 V max AMinimum Operating Voltage ±2 V typ CMaximum Quiescent Current VS = ±6V, Both Channels 18 18.6 18.8 19.5 mA max AMinimum Quiescent Current VS = ±6V, Both Channels 18 17.4 16.5 16.0 mA min APower-Supply Rejection Ratio (PSRR) f = 100kHz, Input Referred 56 51 49 48 dB min A
THERMAL CHARACTERISTICSSpecification: U, DDA, RGV –40 to +85 °CThermal Resistance, θJA Junction-to-Ambient
U SO-8 125 °C/W typ CDDA HSOP-8 Exposed Slug Soldered to Board 55 °C/W typ CRGV QFN-16 Exposed Slug Soldered to Board 50(7) °C/W typ C
MIN/MAX OVER TEMPERATURE
ELECTRICAL CHARACTERISTICS: VS = ±6VBoldface limits are tested at +25°C.At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 1 for AC performance only.
NOTES: (1) Junction temperature = ambient for +25°C specifications.(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over temperature
specifications.(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.(4) Current is considered positive out of node. VCM is the input common-mode voltage.(5) Tested < 3dB below minimum CMRR specifications at ±CMIR limits.(6) Peak output duration should not exceed junction temperature +150°C for extended periods.(7) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (θJA).
OPA26774SBOS126Iwww.ti.com
AC PERFORMANCE (see Figure 3)Small-Signal Bandwidth (VO = 0.5VPP) G = +1, RF = 536Ω 160 MHz min B
G = +2, RF = 511Ω 150 120 118 115 MHz min BG = +4, RF = 453Ω 150 130 128 125 MHz min BG = +8, RF = 332Ω 160 130 128 125 MHz min B
Peaking at a Gain of +1 G = +1, RF = 511Ω 0 dB typ CBandwidth for 0.1dB Gain Flatness G = +4, VO = 0.5VPP 70 23 20 19 MHz min BLarge-Signal Bandwidth G = +4, VO = 2VPP 100 MHz typ CSlew Rate G = +4, 2V Step 1100 830 827 825 V/µs min BRise-and-Fall Time G = +4, VO = 2V Step 2 ns typ CHarmonic Distortion G = +4, f = 5MHz, VO = 2VPP
2nd-Harmonic RL = 100Ω –67 –65 –64 –63 dBc max BRL ≥ 500Ω –71 –68 –67 –66 dBc max B
3rd-Harmonic RL = 100Ω –72 –70 –69 –68 dBc max BRL ≥ 500Ω –74 –71 –70 –69 dBc max B
Input Voltage Noise f > 1MHz 2 2.6 2.9 3.1 nV/√Hz max BNoninverting Input Current Noise f > 1MHz 16 20 21 22 pA/√Hz max BInverting Input Current Noise f > 1MHz 24 29 30 31 pA/√Hz max BChannel-to-Channel Crosstalk f = 5MHz, Input Referred –92 dB typ C
DC PERFORMANCEOpen-Loop Transimpedance Gain VO = 0V, RL = 100Ω 110 72 70 68 kΩ min AInput Offset Voltage VCM = 0V ±0.8 ±3.5 ±4.0 ±4.3 mV max AAverage Offset Voltage Drift VCM = 0V ±4 ±10 ±10 ±12 µV/°C max BNoninverting Input Bias Current VCM = 0V ±10 ±30 ±32 ±35 µA max AAverage Noninverting Input Bias Current Drift VCM = 0V ±5 ±50 ±50 ±75 nA/°C max BInverting Input Bias Current VCM = 0V ±10 ±30 ±40 ±45 µA max AAverage Inverting Input Bias Current Drift VCM = 0V ±10 ±100 ±100 ±150 nA°/C max B
INPUTMost Positive Input Voltage 3.7 3.3 3.2 3.1 V min AMost Negative Input Voltage 1.3 1.7 1.8 1.9 V min ACommon-Mode Rejection Ratio (CMRR) VCM = 2.5V, Input Referred 52 49 48 47 dB min ANoninverting Input Impedance 250 || 2 kΩ || pF typ CMinimum Inverting Input Resistance Open-Loop 25 15 kΩ min BMaximum Inverting Input Resistance Open-Loop 25 40 kΩ max B
OUTPUTMost Positive Output Voltage No Load 4.1 3.9 3.8 3.6 V min A
RL = 100Ω 3.5 3.8 3.7 3.5 V min ALeast Positive Output Voltage No Load 0.8 1.0 1.1 1.3 V min A
RL = 100Ω 1.0 1.1 1.2 1.5 V min ACurrent Output VO = 0 ±300 ±200 ±180 ±100 mA min AClosed-Loop Output Impedance G = +4, f ≤ 100kHz 0.02 Ω typ C
POWER SUPPLYSpecified Operating Voltage +5 V typ CMaximum Operating Voltage 12.6 12.6 12.6 V max AMinimum Operating Voltage +4 V typ CMaximum Quiescent Current VS = ±5V, Both Channels 13.6 14.8 15.2 15.6 mA max AMinimum Quiescent Current VS = ±5V, Both Channels 13.6 12.0 11.7 11.4 mA min APower-Supply Rejection Ratio (PSRR) f = 100kHz, Input Referred 52 dB typ C
THERMAL CHARACTERISTICSSpecification: U, DDA, RGV –40 to +85 °CThermal Resistance, θJA Junction-to-Ambient
U SO-8 125 °C/W typ CDDA HSOP-8 Exposed Slug Soldered to Board 55 °C/W typ CRGV QFN-16 Exposed Slug Soldered to Board 50(4) °C/W typ C
OPA2677U, DDA, RGV
TYP
0°C to –40°C to MIN/ TESTPARAMETER CONDITIONS +25°C +25°C(1) 70°C(2) +85°C(2) UNITS MAX LEVEL(3)
ELECTRICAL SPECIFICATIONS: VS = +5VBoldface limits are tested at +25°C.At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω, unless otherwise noted. See Figure 3 for AC performance only.
MIN/MAX OVER TEMPERATURE
NOTES: (1) Junction temperature = ambient for +25°C specifications.(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +9°C at high temperature limit for over temperature
specifications.(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.(4) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (θJA).
OPA2677 5SBOS126I www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6VAt TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
NONINVERTING SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
6
3
0
–3
–6
–9
–12
–15
–18
Nor
mal
ized
Gai
n (d
B)
VO = 0.5VPP
See Figure 1
G = +8RF = 250Ω
G = +2RF = 475Ω
G = +4RF = 402Ω
G = +1RF = 511Ω
INVERTING SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
6
3
0
–3
–6
–9
–12
–15
–18
Nor
mal
ized
Gai
n (d
B)
VO = 0.5VPP
G = –1, RF = 475Ω
G = –2, RF = 422Ω
G = –8, RF = 280Ω
G = –4, RF = 383Ω
See Figure 2
NONINVERTING LARGE-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
18
15
12
9
6
3
0
–3
–6
–9
–12
–15
Gai
n (d
B)
G = +4, See Figure 1
VO = 10VPP
VO = 8VPP
VO = 2VPP
VO ≤ 1VPP
See Figure 1
INVERTING LARGE-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
18
15
12
9
6
3
0
–3
–6
–9
–12
–15
Gai
n (d
B)
G = –4RF = 383Ω VO = 8VPP
VO = 10VPP
VO = 5VPP
VO ≤ 1VPP
See Figure 2
NONINVERTING PULSE RESPONSE
Time (5ns/div)
Out
put V
olta
ge (
1V/d
iv)
Out
put V
olta
ge (
100m
V/d
iv)
4VPP
G = +4
200mVPP
Left Scale
Large Signal
Right Scale
Small Signal
See Figure 1
INVERTING PULSE RESPONSE
Time (5ns/div)
Out
put V
olta
ge (
1V/d
iv)
Out
put V
olta
ge (
100m
V/d
iv)
4VPPLeft Scale
Large Signal
Right Scale
G = –4
200mVPP
Small Signal
See Figure 2
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TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 1 2010
–60
–65
–70
–75
–80
–85
–90
–95
–100
Har
mon
ic D
isto
rtio
n (d
Bc)
VO = 2VPPRL = 100Ω
Single Channel—see Figure 1
2nd-Harmonic
3rd-Harmonic
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (VPP)
0.1 1 10
–60
–65
–70
–75
–80
–85
–90
–95
–100
Har
mon
ic D
isto
rtio
n (d
Bc)
F = 5MHzRL = 100Ω 2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 1
HARMONIC DISTORTION vs NONINVERTING GAIN
Gain Magnitude (V/V)
1
–60
–65
–70
–75
–80
–85
–90
–95
–10010
Har
mon
ic D
isto
rtio
n (d
Bc)
VO = 2VPPf = 5MHzRL = 100Ω 2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 1
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 100 1000
–60
–65
–70
–75
–80
–85
–90
–95
–100
Har
mon
ic D
isto
rtio
n (d
Bc)
Single Channel—see Figure 1
VO = 2VPPf = 5MHz
2nd-Harmonic
3rd-Harmonic
2-TONE, 3rd-ORDERINTERMODULATION SPURIOUS
Single-Tone Load Power (dBm)
–10 0 5–5 10
–60
–65
–70
–75
–80
–85
–90
–95
–100
3rd-
Ord
er S
purio
us L
evel
(dB
c)
See Figure 1 20MHz
5MHz 1MHz
Single Channel—see Figure 1
10MHz
HARMONIC DISTORTION vs INVERTING GAIN
Gain Magnitude |(V/V)|
1
–60
–65
–70
–75
–80
–85
–90
–95
–10010
Har
mon
ic D
isto
rtio
n (d
Bc)
VO = 2VPPf = 5MHzRL = 100Ω
2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 2
OPA2677 7SBOS126I www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
MAXIMUM OUTPUT SWINGvs LOAD RESISTANCE
Load Resistance (Ω)
10
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6100 1000
Out
put V
olta
ge (
V)
See Figure 1
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
IO (mA)
–600
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–60 200 400–200–400 600
VO (
V)
RL = 10Ω
RL = 25Ω
RL = 50ΩRL = 100Ω
1W Internal PowerSingle Ch
1W Internal PowerSingle Ch
INPUT VOLTAGE AND CURRENT NOISE DENSITY
Frequency (Hz)
100
100
10
1100k 1M10k1k 10M
Vol
tage
Noi
se n
V/√
Hz
Cur
rent
Noi
se p
A/√
Hz
Inverting Current Noise 24pA/√Hz
16pA/√Hz
2nV/√HzVoltage Noise
Noninverting Current Noise
CHANNEL-TO-CHANNEL CROSSTALK
Frequency (Hz)
1M 10M 100M
–60
–65
–70
–75
–80
–85
–90
–95
–100
Cro
ssta
lk, I
nput
Ref
erre
d (d
B)
Input Referred
RECOMMENDED RS vs CAPACITIVE LOAD
Capacitive Load (pF)
1 10 100 1000
90
80
70
60
50
40
30
20
10
0
RS (
Ω)
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (Hz)
1M
2
0
–2
–4
–6
–8
–1010M 100M 1G
Nor
mal
ized
Gai
n to
Cap
aciti
veLo
ad (
dB)
CL = 10pF
CL = 22pFCL = 100pF
CL = 47pF1/2OPA2677
402Ω
RS
133Ω
1kΩCL
1kΩ is optional.
OPA26778SBOS126Iwww.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
CMRR AND PSRR vs FREQUENCY
Frequency (Hz)
1k
70
60
50
40
30
20
10
010k 100k 1M 10M 100M
Pow
er-S
uppl
y R
ejec
tion
Rat
io (
dB)
Com
mon
-Mod
e R
ejec
tion
Rat
io (
dB)
CMRR
–PSRR
+PSRR
OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE
Frequency (Hz)
10k 100k 1M 10M 100M 1G
120
100
80
60
40
20
0
Tra
nsim
peda
nce
Gai
n (2
0dB
Ω/d
iv)
0
–45
–90
–135
–180
–225
–270
Tra
nsim
peda
nce
Pha
se (
45°/
div)
CLOSED-LOOP OUTPUT IMPEDANCEvs FREQUENCY
Frequency (Hz)
10k 100k 1M 10M 100M 1G
100
10
1
0.1
0.01
0.001
Out
put I
mpe
danc
e M
agni
tude
(Ω
)
COMPOSITE VIDEO dG/dφ
Number of 150Ω Loads
1 2 3 4 5 6 7 8 9 10
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
dG/d
φ (%
/°)
G = +2RF = 475ΩVS = ±5V dφ, Negative Video
dφ, Positive Video
dG, Positive Video
dG, Negative Video
8
6
4
2
0
–2
–4
–6
–8
NONINVERTING OVERDRIVE RECOVERY
Time (20ns/div)
Out
put V
olta
ge (
2V/d
iv)
4
3
2
1
0
–1
–2
–3
–4
Inpu
t Vol
tage
(1V
/div
)
G = +4RL = 100ΩSee Figure 1
Input
Output
8
6
4
2
0
–2
–4
–6
–8
INVERTING OVERDRIVE RECOVERY
Time (20ns/div)
Out
put V
olta
ge (
2V/d
iv)
4
3
2
1
0
–1
–2
–3
–4
Inpu
t Vol
tage
(1V
/div
)Input
Output See Figure 2
G = –4RL = 100Ω
OPA2677 9SBOS126I www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
TYPICAL DC ERROR DRIFTvs TEMPERATURE
Ambient Temperature (°C)
–55
10
8
6
4
2
0
–2
–4
–6
–8
–10–35 –15 5 25 45 65 85 105 125
Inpu
t Offs
et V
olta
ge (
mV
)In
put B
ias
Cur
rent
(µA
)
Noninverting Bias Current
Input Offset Voltage
Inverting Bias Current
SUPPLY AND OUTPUT CURRENTvs TEMPERATURE
Temperature (°C)
–55
600
550
500
450
400
350
300
250
200
150
100–35 –15 5 25 45 65 85 105 125
Out
put C
urre
nt (
mA
)
50
40
30
20
10
0
Out
put C
urre
nt (
mA
)
Sourcing Output Current
Sinking Output Current
Supply Current
CMIR AND OUTPUT VOLTAGEvs SUPPLY VOLTAGE
Supply Voltage (±V)
2 3 4 5
6
5
4
3
2
1
06
Vol
tage
Ran
ge (
±V) ± Output Voltage
No Load
+V Input Voltage
–V Input Voltage
OPA267710SBOS126Iwww.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)At TA = +25°C, Differential Gain = +9, RF = 300Ω, and RL = 70Ω, unless otherwise noted. See Figure 5 for AC performance only.
DIFFERENTIAL SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
5 10010 500
3
0
–3
–6
–9
Nor
mal
ized
Gai
n (d
Bc)
RL = 70ΩVO = 200mVPP
GD = +2,RF = 442Ω
GD = +5,RF = 383Ω
GD = +9,RF = 300Ω
See Figure 5
DIFFERENTIAL LARGE-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
4 10010 400
20
19
18
17
16
15
14
Gai
n (d
B)
0.2VPPRL = 70ΩGD = +9
5VPP
2VPP
1VPP
See Figure 5
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 1k100
–65
–70
–75
–80
–85
–90
–95
Har
mon
ic D
isto
rtio
n (d
B) 2nd-Harmonic
3rd-Harmonic
f = 5MHzGD = +9VO = 2VPP
See Figure 5
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 101 100
–60
–65
–70
–75
–80
–85
–90
–95
–100
Har
mon
ic D
isto
rtio
n (d
B) 2nd-Harmonic
3rd-Harmonic
GD = +9
RL = 70ΩVO = 2VPP
See Figure 5
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (Vp-p)
0.1 101 100
–64
–66
–68
–70
–72
–74
–76
–78
–80
Har
mon
ic D
isto
rtio
n (d
B)
f = 5MHzG = +9RL = 70Ω
2nd-Harmonic
3rd-Harmonic
See Figure 5
MULTITONE POWER RATIO(VS = ±6V, 13dBm Output Power)
Frequency (kHz)
0 20 40 60 80 100 120 140 160
10
0
–10
–20
–30
–40
–50
–60
–70
–80
Pow
er (
dB)
See Figure 5
OPA2677 11SBOS126I www.ti.com
TYPICAL CHARACTERISTICS: VS = +5VAt TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted.
NONINVERTING SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 50 100 150 200 250
6
3
0
–3
–6
–9
–12
–15
–18
Nor
mal
ized
Gai
n (d
B)
See Figure 3
G = +1RF = 536Ω
G = +2RF = 511Ω
G = +4RF = 453Ω
G = +8RF = 332Ω
INVERTING SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
0 50 100 150 200 250
6
3
0
–3
–6
–9
–12
–15
–18
Nor
mal
ized
Gai
n (d
B)
G = –8RF = 332Ω
G = –4RF = 453Ω
G = –2RF = 511Ω
G = –1RF = 536Ω
See Figure 4
400
300
200
100
0
–100
–200
–300
–400
SMALL-SIGNAL PULSE RESPONSE
Time (5ns/div)
Out
put V
olta
ge (
100m
V/d
iv)
VO = 500mVPP
See Figure 3
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
LARGE-SIGNAL PULSE RESPONSE
Time (5ns/div)
Out
put V
olta
ge (
400m
V/d
iv)
VO = 2VPP
See Figure 3
RECOMMENDED RS vs CAPACITIVE LOAD
Capacitive Load (pF)
1 10 100 1000
50
45
40
35
30
25
20
15
10
5
0
RS (
Ω)
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (Hz)
1M
2
0
–2
–4
–6
–8
–1010M 100M 1G
Nor
mal
ized
Gai
n to
Cap
aciti
veLo
ad (
dB)
CL = 10pF
CL = 22pF
CL = 47pF453Ω
150Ω
804Ω
804Ω
1kΩ
1kΩ Load Optional.
1/2OPA2677
VI
+5V
0.1µF
VORS
CL
0.1µF
CL = 100pF
OPA267712SBOS126Iwww.ti.com
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 1 2010
–50
–55
–60
–65
–70
–75
–80
–85
–90
Har
mon
ic D
isto
rtio
n (d
Bc)
VO = 2VPPRL = 100Ω to VS/2
Single Channel—see Figure 3
2nd-Harmonic
3rd-Harmonic
HARMONIC DISTORTION vs NONINVERTING GAIN
Gain Magnitude (V/V)
1
–50
–55
–60
–65
–70
–75
–80
–85
–9010
Har
mon
ic D
isto
rtio
n (d
Bc)
2nd-Harmonic
3rd-Harmonic
VO = 2VPPf = 5MHzRL = 100Ω to VS/2
Single Channel—see Figure 3
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (VPP)
0.1 1 2
–50
–55
–60
–65
–70
–75
–80
–85
–90
Har
mon
ic D
isto
rtio
n (d
Bc)
f = 5MHzRL = 100Ω to VS/2
Single Channel—see Figure 3
3rd-Harmonic
2nd-Harmonic
HARMONIC DISTORTION vs INVERTING GAIN
Gain (V/V)
–1
–50
–55
–60
–65
–70
–75
–80
–85
–90–10
Har
mon
ic D
isto
rtio
n (d
Bc)
2nd-Harmonic
3rd-Harmonic
VO = 2VPPf = 5MHzRL = 100Ω to VS/2
Single Channel—see Figure 4
2-TONE, 3rd-ORDER SPURIOUS LEVEL
Single-Tone Load Power (dBm)
–10 0 5–5 10
–50
–55
–60
–65
–70
–75
–80
–85
–90
3rd-
Ord
er S
purio
us L
evel
(dB
c)
20MHz
5MHz
1MHz
Single Channel—see Figure 3
10MHz
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 100 1000
–50
–55
–60
–65
–70
–75
–80
–85
–90
Har
mon
ic D
isto
rtio
n (d
Bc)
Single Channel—see Figure 3
VO = 2VPPf = 5MHz
2nd-Harmonic
3rd-Harmonic
OPA2677 13SBOS126I www.ti.com
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)At TA = +25°C, Differential Gain = +9, RF = 316Ω, and RL = 70Ω, unless otherwise noted.
RLRG
CG
VOVI
GD = 1 + 2 • RF
RG
RF300Ω
RF300Ω
1/2OPA2677
1/2OPA2677
=VO
VI
DIFFERENTIAL SMALL-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
10 100 200
3
0
–3
–6
–9
–12
Nor
mal
ized
Gai
n (d
B)
RL = 70Ω
GD = +2RF = 511Ω
GD = +5RF = 422Ω
GD = +9RF = 316Ω
DIFFERENTIAL LARGE-SIGNALFREQUENCY RESPONSE
Frequency (MHz)
10 100
20
19
18
17
16
15
14
Gai
n (d
B)
RL = 70ΩGD = +9
0.2VPP
1VPP
2VPP
5VPP
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 101 100
–60
–65
–70
–75
–80
–85
Har
mon
ic D
isto
rtio
n (d
Bc)
3rd-Harmonic
2nd-Harmonic
GD = +9RL = 70ΩVO = 2VPP
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 1k100
–65
–70
–75
–80
–85
–90
–95
Har
mon
ic D
isto
rtio
n (d
Bc)
2nd-Harmonic
3rd-Harmonic
GD = +9f = 5MHzVO = 2VPP
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Differential Output Voltage (VPP)
0.1 101
–65
–70
–75
–80
–85
Har
mon
ic D
isto
rtio
n (d
B)
f = 5MHzG = +9RL = 70Ω 3rd-Harmonic
2nd-Harmonic
DIFFERENTIAL PERFORMANCETEST CIRCUIT
OPA267714SBOS126Iwww.ti.com
APPLICATION INFORMATIONWIDEBAND CURRENT-FEEDBACK OPERATION
The OPA2677 gives the exceptional AC performance of awideband current-feedback op amp with a highly linear, high-power output stage. Requiring only 9mA/ch quiescent cur-rent, the OPA2677 swings to within 1V of either supply railand delivers in excess of 380mA at room temperature. Thislow-output headroom requirement, along with supply voltageindependent biasing, gives remarkable single (+5V) supplyoperation. The OPA2677 delivers greater than 150MHz band-width driving a 2VPP output into 100Ω on a single +5V supply.Previous boosted output stage amplifiers typically suffer fromvery poor crossover distortion as the output current goesthrough zero. The OPA2677 achieves a comparable powergain with much better linearity. The primary advantage of acurrent-feedback op amp over a voltage-feedback op amp isthat AC performance (bandwidth and distortion) is relativelyindependent of signal gain. Figure 1 shows the DC-coupled,gain of +4, dual power-supply circuit configuration used asthe basis of the ±6V Electrical and Typical Characteristics.For test purposes, the input impedance is set to 50Ω with aresistor to ground and the output impedance is set to 50Ωwith a series output resistor. Voltage swings reported in theelectrical characteristics are taken directly at the input andoutput pins, whereas load powers (dBm) are defined at amatched 50Ω load. For the circuit of Figure 1, the totaleffective load is 100Ω || 535Ω = 84Ω.
Figure 2 shows the DC-coupled, bipolar supply circuit con-figuration used as the basis for the Inverting Gain ±6VTypical Characteristics. Key design considerations of theinverting configuration are developed in the Inverting Ampli-fier Operation section.
Figure 3 shows the AC-coupled, gain of +4, single-supplycircuit configuration used as the basis of the +5V Electricaland Typical Characteristics. Though not a rail-to-rail design,the OPA2677 requires minimal input and output voltageheadroom compared to other very wideband current-feed-back op amps. It will deliver a 3VPP output swing on a single+5V supply with greater than 100MHz bandwidth. The keyrequirement of broadband single-supply operation is to main-tain input and output signal swings within the usable voltageranges at both the input and the output. The circuit of Figure 3establishes an input midpoint bias using a simple resistivedivider from the +5V supply (two 806Ω resistors). The inputsignal is then AC-coupled into this midpoint voltage bias. Theinput voltage can swing to within 1.3V of either supply pin,giving a 2.4VPP input signal range centered between thesupply pins. The input impedance matching resistor (57.6Ω)used for testing is adjusted to give a 50Ω input match whenthe parallel combination of the biasing divider network isincluded. The gain resistor (RG) is AC-coupled, giving thecircuit a DC gain of +1—which puts the input DC bias voltage(2.5V) on the output as well. The feedback resistor value isadjusted from the bipolar supply condition to re-optimize fora flat frequency response in +5V, gain of +4, operation.Again, on a single +5V supply, the output voltage can swingto within 1V of either supply pin while delivering more than200mA output current. A demanding 100Ω load to a midpointbias is used in this characterization circuit. The new outputstage used in the OPA2677 can deliver large bipolar outputcurrents into this midpoint load with minimal crossover distor-tion, as shown by the +5V supply, harmonic distortion plots.
1/2OPA2677
+6V
+
–6V
50Ω Load
50Ω50ΩVOVI
50Ω Source
RG133Ω
RF402Ω
+6.8µF
0.1µF 6.8µF
0.1µF
+VS
–VS
1/2OPA2677
+5V
–5V
50Ω Load50ΩVO
VI
50ΩSource
RM100Ω
RF402Ω
RF402Ω
Power-supplydecouplingnot shown.
FIGURE 1. DC-Coupled, G = +4, Bipolar Supply, Specifica-tion and Test Circuit.
FIGURE 2. DC-Coupled, G = –4, Bipolar Supply, Specifica-tion and Test Circuit.
OPA2677 15SBOS126I www.ti.com
The last configuration used as the basis of the +5V Electricaland Typical Characteristics is shown in Figure 4. Designconsiderations for this inverting, bipolar supply configurationare covered either in single-supply configuration (as shownin Figure 3) or in the Inverting Amplifier Operation section.
where the input is brought into the OPA2677. Each has itsadvantages and disadvantages. Figure 5 shows a basicstarting point for noninverting differential I/O applications.
DIFFERENTIAL INTERFACE APPLICATIONS
Dual op amps are particularly suitable to differential input todifferential output applications. Typically, these fall into eitherAnalog-to-Digital Converter (ADC) input interface or linedriver applications. Two basic approaches to differential I/Oare noninverting or inverting configurations. Since the outputis differential, the signal polarity is somewhat meaningless—the noninverting and inverting terminology applies here to
1/2OPA2677
+5V
VS/2806Ω
VI
100ΩVO
806Ω
RF453Ω
RM88.7Ω
6.8µF+
0.1µF
0.1µFRG
113Ω
This approach provides for a source termination impedancethat is independent of the signal gain. For instance, simpledifferential filters may be included in the signal path right upto the noninverting inputs without interacting with the gainsetting. The differential signal gain for the circuit of Figure 5is:
AD = 1 + 2 • RF/RG
Since the OPA2677 is a current feedback (CFB) amplifier, itsbandwidth is principally controlled with the feedback resistorvalue; Figure 5 shows a value of 300Ω for the AD = +9design. The differential gain, however, may be adjusted withconsiderable freedom using just the RG resistor. In fact, RG
may be a reactive network providing a very isolated shapingto the differential frequency response.
Various combinations of single-supply or AC-coupled gaincan also be delivered using the basic circuit of Figure 5.Common-mode bias voltages on the two noninverting inputspass on to the output with a gain of 1 since an equal DCvoltage at each inverting node creates no current throughRG. This circuit does show a common-mode gain of 1 frominput to output. The source connection should either removethis common-mode signal if undesired (using an input trans-former can provide this function), or the common-modevoltage at the inputs can be used to set the output common-mode bias. If the low common-mode rejection of this circuitis a problem, the output interface may also be used to rejectthat common-mode. For instance, most modern differentialinput ADCs reject common-mode signals very well, while aline driver application through a transformer will also attenu-ate the common-mode signal through to the line.
RL
RF300Ω
RF300Ω
–6
+6
1/2OPA2677
1/2OPA2677
RG75Ω
CG
VOVI
GD = 1 + =2 • RF
RG
VO
VI
FIGURE 3. AC-Coupled, G = +4, Single-Supply, Specifica-tion and Test Circuit.
FIGURE 4. AC-Coupled, G = –4, Single-Supply, Specifica-tion and Test Circuit.
FIGURE 5. Noninverting Differential I/O Amplifier.
1/2OPA2677
+5V+VS
VS/2806Ω
100ΩVOVI 57.6Ω
806Ω
RF453Ω
RG150Ω
0.1µF
0.1µF
6.8µF+
0.1µF
OPA267716SBOS126Iwww.ti.com
SINGLE-SUPPLY ADSL UPSTREAM DRIVER
Figure 6 shows an example of a single-supply ADSL up-stream driver. The dual OPA2677 is configured as a differen-tial gain stage to provide signal drive to the primary windingof the transformer (here, a step-up transformer with a turnsratio of 1:1.7). The main advantage of this configuration is thecancellation of all even harmonic distortion products. Anotherimportant advantage for ADSL is that each amplifier needsonly to swing half of the total output required driving the load.
OPA2677 HDSL2 UPSTREAM DRIVER
Figure 7 shows an HDSL2 implementation of a single-supplyupstream driver.
The two designs differ by the values of their matchingimpedance, the load impedance, and the ratio turns of thetransformers. All these differences are reflected in the higherpeak current and thus, the higher maximum power dissipa-tion in the output of the driver.
The analog front end (AFE) signal is AC-coupled to thedriver, and the noninverting input of each amplifier is biasedto the mid-supply voltage (+6V in this case). In addition toproviding the proper biasing to the amplifier, this approachalso provides a high-pass filtering with a corner frequency,set here at 5kHz. As the upstream signal bandwidth starts at26kHz, this high-pass filter does not generate any problemand has the advantage of filtering out unwanted lower fre-quencies.
The input signal is amplified with a gain set by the followingequation:
GR
RDF
G= + •
12
(1)
With RF = 324Ω and RG = 82.5Ω, the gain for this differentialamplifier is 8.85. This gain boosts the AFE signal, assumedto be a maximum of 2VPP, to a maximum of 17.3VPP.
Refer to the Setting Resistor Values to Optimize Bandwidthsection for a discussion on which feedback resistor value tochoose.
The two back-termination resistors (17.4Ω each) added ateach terminal of the transformer make the impedance of themodem match the impedance of the phone line, and alsoprovide a means of detecting the received signal for thereceiver. The value of these resistors (RM) is a function of theline impedance and the transformer turns ratio (n), given bythe following equation:
RZ
MLINE
n=
2 2 (2)
RG82.5Ω
2kΩ
2kΩ
1µF
0.1µF
0.1µFRM
17.4Ω
100Ω
ZLINEAFE2VPPMax
Assumed
RF324Ω
20Ω
20Ω
324Ω
RF
1/2OPA2677
1/2OPA2677
+12V
1:1.7
17.7VPP
IP = 128mA
IP = 128mA
RM17.4Ω
+6V82.5Ω
2kΩ
2kΩ
1µF
0.1µF
0.1µFRM
11.5Ω135Ω
ZLINEAFE2VPPMax
Assumed
324Ω
20Ω
20Ω
324Ω
1/2OPA2677
1/2OPA2677
+12V
1:2.4
17.3VPP
IP = 185mA
IP = 185mA
RM11.5Ω
+6V
LINE DRIVER HEADROOM MODEL
The first step in a transformer-coupled, twisted-pair driverdesign is to compute the peak-to-peak output voltage fromthe target specifications. This is done using the followingequations:
PV
mW RLRMS
L= • ( ) •
101
2log (3)
with PL power at the load, VRMS voltage at the load, and RL
load impedance; this gives the following:
V mW RRMS L
PL
= ( ) • •1 10 10 (4)
V Crest Factor V C VP RMS F RMS= =• • (5)
with VP peak voltage at the load and CF Crest Factor.
VLPP = 2 • CF • VRMS (6)
with VLPP: peak-to-peak voltage at the load.
Consolidating Equations 3 through 6 allows expressing therequired peak-to-peak voltage at the load as a function of thecrest factor, the load impedance, and the power at the load.
Thus, V CF mW RLPP L
PL
= • • ( ) • •2 1 10 10 (7)
This VLPP is usually computed for a nominal line impedanceand may be taken as a fixed design target.
The next step in the design is to compute the individualamplifier output voltage and currents as a function of VPP on
FIGURE 6. Single-Supply ADSL Upstream Driver. FIGURE 7. HDSL2 Upstream Driver.
OPA2677 17SBOS126I www.ti.com
the line and transformer turns ratio. As this turns ratiochanges, the minimum allowed supply voltage changes alongwith it. The peak current in the amplifier output is given by:
± = • • •IVn RP
LPP
M
12
2 14 (8)
with VPP as defined in Equation 7, and RM as defined inEquation 2 and shown in Figure 8.
TOTAL DRIVER POWER FOR xDSL APPLICATIONS
The total internal power dissipation for the OPA2677 in anxDSL line driver application will be the sum of the quiescentpower and the output stage power. The OPA2677 holds arelatively constant quiescent current versus supply voltage—giving a power contribution that is simply the quiescentcurrent times the supply voltage used (the supply voltage willbe greater than the solution given in Equation 10). The totaloutput stage power may be computed with reference toFigure 10.
With the previous information available, it is now possible toselect a supply voltage and the turns ratio desired for thetransformer as well as calculate the headroom for theOPA2677.
The model, shown in Figure 9, can be described with thefollowing set of equations:
1) As available output swing:
VPP = VCC – (V1 + V2) – IP • (R1 + R2) (9)
2) Or as required supply voltage:
VCC = VPP + (V1 + V2) + IP • (R1 + R2) (10)
The minimum supply voltage for a power and load require-ment is given by Equation 10.
RM
RM
VLppn VLppRL
2VLppnVpp =
VO
R1
V1
+VCC
R2
V2
IP
FIGURE 8. Driver Peak Output Voltage.
FIGURE 9. Line Driver Headroom Model.
V1 R1 V2 R2
+5V 0.9V 5Ω 0.8V 5Ω+12V 0.9V 2Ω 0.9V 2Ω
TABLE I. Line Driver Headroom Model Values.
V1, V2, R1, and R2 are given in Table I for both +12V and +5Voperation.
FIGURE 10. Output Stage Power Model.
The two output stages used to drive the load of Figure 8 canbe seen as an H-Bridge in Figure 10. The average currentdrawn from the supply into this H-Bridge and load will be thepeak current in the load given by Equation 8 divided by thecrest factor (CF) for the xDSL modulation. This total powerfrom the supply is then reduced by the power in RT to leavethe power dissipated internal to the drivers in the four outputstage transistors. That power is simply the target line powerused in Equation 3 plus the power lost in the matchingelements (RM). In the examples here, a perfect match istargeted giving the same power in the matching elements asin the load. The output stage power is then set by Equation 11.
PICF
V POUTP
CC L= × – 2 (11)
The total amplifier power is then:
P I VICF
V PTOT q CCP
CC L= × + × – 2 (12)
For the ADSL CPE upstream driver design of Figure 6, thepeak current is 128mA for a signal that requires a crest factorof 5.33 with a target line power of 13dBm into 100Ω (20mW).With a typical quiescent current of 18mA and a nominalsupply voltage of +12V, the total internal power dissipationfor the solution of Figure 6 will be:
(13)
P mA VmA
V mW mWTOT = ( ) + ( ) ( ) =18 12128
5 3312 2 20 464
.–
RT
+VCCIAVG =
IPCF
OPA267718SBOS126Iwww.ti.com
DESIGN-IN TOOLSDEMONSTRATION FIXTURES
A printed circuit board (PCB) is available to assist in the initialevaluation of circuit performance using the OPA2677. Thefixture is offered free of charge as unpopulated PCB, deliv-ered with a user’s guide. The summary information for thisfixture is shown in Table II.
The buffer gain is typically very close to 1.00 and is normallyneglected from signal gain considerations. It sets the CMRR,however, for a single op amp differential amplifier configura-tion. For a buffer gain α < 1.0, the CMRR = –20 • log (1 – α)dB.
RI, the buffer output impedance, is a critical portion of thebandwidth control equation. The OPA2677 inverting inputresistor is typically 22Ω.
A current-feedback op amp senses an error current in theinverting node (as opposed to a differential input error volt-age for a voltage-feedback op amp) and passes this on to theoutput through an internal frequency dependent transimped-ance gain. The Typical Characteristics show this open-looptransimpedance response, which is analogous to the open-loop voltage gain curve for a voltage-feedback op amp.Developing the transfer function for the circuit of Figure 11gives Equation 14:
VV
RR
R RRR
Z s
NGR R NG
Z s
NGRR
O
I
F
G
F IF
G
F I
F
G
=+
++ +
=+ +
= +
•α
α1
1
1 1
1
( )
( )
(14)
This is written in a loop-gain analysis format where the errorsarising from a non-infinite open-loop gain are shown in thedenominator. If Z(s) is infinite over all frequencies, the denomi-nator of Equation 14 reduces to 1 and the ideal desired signalgain shown in the numerator is achieved. The fraction in thedenominator of Equation 14 determines the frequency re-sponse. Equation 15 shows this as the loop-gain equation:
Z sR R NG
Loop GainF I
( )+
= (15)
If 20log(RF + NG • RI) is drawn on top of the open-looptransimpedance plot, the difference between the two wouldbe the loop gain at a given frequency. Eventually, Z(s) rolls offto equal the denominator of Equation 15, at which point theloop gain has reduced to 1 (and the curves have intersected).This point of equality is where the amplifier closed-loop
VO
RG
VI
RI
Z(S) IERR
α
RF
IERR
FIGURE 11. Current Feedback Transfer Function AnalysisCircuit.TABLE II. Demonstration Fixtures by Package.
ORDERING LITERATUREPRODUCT PACKAGE NUMBER NUMBER
OPA2677U SO-8 DEM-OPA-SO-2A SBOU003OPA2677IDDA HSOP-8 Not Available Not Available
OPA2677T SO-16 Not Available Not AvailableOPA2677IRGV QFN-16 Not Available Not Available
This demonstration fixture can be requested at the TexasInstruments web site (www.ti.com) through the OPA2677product folder.
MACROMODELS AND APPLICATIONS SUPPORT
Computer simulation of circuit performance using SPICE isoften useful when analyzing the performance of analogcircuits and systems. This is particularly true for video and RFamplifier circuits where parasitic capacitance and inductancecan have a major effect on circuit performance. A SPICEmodel for the OPA2677 is available through the TI web site(www.ti.com). This model does a good job of predictingsmall-signal AC and transient performance under a widevariety of operating conditions, but does not do as well inpredicting the harmonic distortion or dG/dP characteristics.This model does not attempt to distinguish between thepackage types in small-signal AC performance, nor does itattempt to simulate channel-to-channel coupling.
OPERATING SUGGESTIONSSETTING RESISTOR VALUES TOOPTIMIZE BANDWIDTH
A current-feedback op amp like the OPA2677 can hold analmost constant bandwidth over signal gain settings with theproper adjustment of the external resistor values, which isshown in the Typical Characteristics; the small-signal band-width decreases only slightly with increasing gain. Thesecurves also show that the feedback resistor is changed foreach gain setting. The resistor values on the inverting side ofthe circuit for a current-feedback op amp can be treated asfrequency response compensation elements, whereas theirratios set the signal gain. Figure 11 shows the small-signalfrequency response analysis circuit for the OPA2677.
The key elements of this current-feedback op amp model are:
α → Buffer gain from the noninverting input to the inverting input
RI → Buffer output impedance
iERR → Feedback error current signal
Z(S) → Frequency dependent open-loop transimpedancegain from iERR to VO
OPA2677 19SBOS126I www.ti.com
frequency response given by Equation 14 starts to roll off, andis exactly analogous to the frequency at which the noise gainequals the open-loop voltage gain for a voltage-feedback opamp. The difference here is that the total impedance in thedenominator of Equation 15 may be controlled somewhatseparately from the desired signal gain (or NG). The OPA2677is internally compensated to give a maximally flat frequencyresponse for RF = 402Ω at NG = 4 on ±6V supplies. Evaluat-ing the denominator of Equation 15 (which is the feedbacktransimpedance) gives an optimal target of 490Ω. As thesignal gain changes, the contribution of the NG • RI term inthe feedback transimpedance changes, but the total can beheld constant by adjusting RF. Equation 16 gives an approxi-mate equation for optimum RF over signal gain:
RF = 490 – NG • RI (16)
As the desired signal gain increases, this equation eventuallypredicts a negative RF. A somewhat subjective limit to thisadjustment can also be set by holding RG to a minimum valueof 20Ω. Lower values load both the buffer stage at the inputand the output stage if RF gets too low—actually decreasingthe bandwidth. Figure 12 shows the recommended RF versusNG for both ±6V and a single +5V operation. The values forRF versus gain shown here are approximately equal to thevalues used to generate the Typical Characteristics. Theydiffer in that the optimized values used in the Typical Char-acteristics are also correcting for board parasitic not consid-ered in the simplified analysis leading to Equation 16. Thevalues shown in Figure 12 give a good starting point fordesigns where bandwidth optimization is desired.
The total impedance going into the inverting input may be
1/2OPA2677
RF392Ω
VO
VI
RG97.6Ω
+6V
–6V
50Ω50Ω Load
VO
Power-supply decoupling notshown.
VI
50ΩSource
RM102Ω
RF
RG= – = –4
FIGURE 13. Inverting Gain of –4 with Impedance Matching.600
500
400
300
200
Noise Gain
0 2510 15 205
Fee
dbac
k R
esis
tor
(Ω)
+5V
±5V
FIGURE 12. Feedback Resistor vs. Noise Gain.
is essential for power-supply ripple rejection, noninvertinginput noise current shunting, and to minimize the high-frequency value for RI in Figure 11.
INVERTING AMPLIFIER OPERATION
The OPA2677 is a general-purpose, wideband current-feed-back op amp; most of the familiar op amp application circuitsshould be available to the designer. Those dual op ampapplications that require considerable flexibility in the feed-back element (for example, integrators, transimpedance, andsome filters) should consider a unity-gain stable, voltage-feedback amplifier such as the OPA2822, because the feed-back resistor is the compensation element for a current-feedback op amp. Wideband inverting operation (and espe-cially summing) is particularly suited to the OPA2677. Figure13 shows a typical inverting configuration where the I/Oimpedances and signal gain from Figure 1 are retained in aninverting circuit configuration.
In the inverting configuration, two key design considerations
used to adjust the closed-loop signal bandwidth. Inserting aseries resistor between the inverting input and the summingjunction increases the feedback impedance (denominator ofEquation 15), decreasing the bandwidth. The internal bufferoutput impedance for the OPA2677 is slightly influenced bythe source impedance looking out of the noninverting inputterminal. High-source resistors have the effect of increasingRI, decreasing the bandwidth. For those single-supply appli-cations which develop a midpoint bias at the noninvertinginput through high-valued resistors, the decoupling capacitor
must be noted. The first is that the gain resistor (RG)becomes part of the signal source input impedance. If inputimpedance matching is desired (which is beneficial when-ever the signal is coupled through a cable, twisted pair, longPC board trace or other transmission line conductor), it isnormally necessary to add an additional matching resistor toground. RG, by itself, is not normally set to the required inputimpedance since its value, along with the desired gain, willdetermine an RF, which may be non-optimal from a fre-quency response standpoint. The total input impedance forthe source becomes the parallel combination of RG and RM.
The second major consideration, touched on in the previousparagraph, is that the signal source impedance becomespart of the noise gain equation and has a slight effect on thebandwidth through Equation 15. The values shown in Figure12 have accounted for this by slightly decreasing RF (fromthe optimum values) to re-optimize the bandwidth for thenoise gain of Figure 12 (NG = 3.98). In the example of Figure13, the RM value combines in parallel with the external 50Ωsource impedance, yielding an effective driving impedance of50Ω || 102Ω = 33.5Ω. This impedance is added in series withRG for calculating the noise gain—which gives NG = 3.98.This value, along with the inverting input impedance of 22Ω,are inserted into Equation 16 to get a feedback
OPA267720SBOS126Iwww.ti.com
transimpedance nearly equal to the 402Ω optimum value.Note that the noninverting input in this bipolar supply invert-ing application is connected directly to ground. It is oftensuggested that an additional resistor be connected to groundon the noninverting input to achieve bias current error can-cellation at the output. The input bias currents for a current-feedback op amp are not generally matched in either magni-tude or polarity. Connecting a resistor to ground on thenoninverting input of the OPA2677 in the circuit of Figure 13actually provides additional gain for that input bias and noisecurrents, but does not decrease the output DC error since theinput bias currents are not matched.
OUTPUT CURRENT AND VOLTAGE
The OPA2677 provides output voltage and current capabili-ties that are unsurpassed in a low-cost dual monolithic opamp. Under no-load conditions at 25°C, the output voltagetypically swings closer than 1V to either supply rail; tested at+25°C swing limit is within 1.1V of either rail. Into a 6Ω load(the minimum tested load), it delivers more than ±380mAcontinuous and > ±1.2A peak output current.
The specifications described above, though familiar in theindustry, consider voltage and current limits separately. In manyapplications, it is the voltage times current (or V-I product) thatis more relevant to circuit operation. Refer to the Output Voltageand Current Limitations plot in the Typical Characteristics. TheX and Y axes of this graph show the zero-voltage output currentlimit and the zero-current output voltage limit, respectively. Thefour quadrants give a more detailed view of the OPA2677output drive capabilities, noting that the graph is bounded by asafe operating area of 1W maximum internal power dissipation(in this case for 1 channel only). Superimposing resistor loadlines onto the plot shows that the OPA2677 can drive ±4V into10Ω or ±4.5V into 25Ω without exceeding the output capabilitiesor the 1W dissipation limit. A 100Ω load line (the standard testcircuit load) shows the full ±5.0V output swing capability, asshown in the Electrical Characteristics tables. The minimumspecified output voltage and current over temperature are set byworst-case simulations at the cold temperature extreme. Only atcold startup will the output current and voltage decrease to thenumbers shown in the Electrical Characteristics tables. As theoutput transistors deliver power, the junction temperaturesincreases, decreasing the VBEs (increasing the available outputvoltage swing), and increasing the current gains (increasing theavailable output current). In steady-state operation, the avail-able output voltage and current will always be greater than thatshown in the over-temperature specifications, since the outputstage junction temperatures will be higher than the minimumspecified operating ambient. To maintain maximum outputstage linearity, no output short-circuit protection is provided.This is normally not a problem because most applicationsinclude a series-matching resistor at the output that limits theinternal power dissipation if the output side of this resistor isshorted to ground. However, shorting the output pin directly tothe adjacent positive power-supply pin (8-pin package), will inmost cases, destroy the amplifier. If additional short-circuitprotection is required, consider using the equivalent OPA2674that includes output current limiting. Alternatively, a small series
resistor may be included in the supply lines. Under heavy outputloads this will reduce the available output voltage swing. A 5Ωseries resistor in each power-supply lead will limit the internalpower dissipation to less than 1W for an output short circuitwhile decreasing the available output voltage swing only 0.5Vfor up to 100mA desired load currents. Always place the 0.1µFpower-supply decoupling capacitors after these supply currentlimiting resistors directly on the supply pins.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common loadconditions for an op amp is capacitive loading. Often, thecapacitive load is the input of an analog-to-digital (A/D)converter—including additional external capacitance that maybe recommended to improve the A/D converter linearity. Ahigh-speed, high open-loop gain amplifier such as theOPA2677 can be very susceptible to decreased stability andclosed-loop response peaking when a capacitive load isplaced directly on the output pin. When the amplifier open-loop output resistance is considered, this capacitive loadintroduces an additional pole in the signal path that candecrease the phase margin. Several external solutions to thisproblem have been suggested.
When the primary considerations are frequency response flat-ness, pulse response fidelity, and/or distortion, the simplest andmost effective solution is to isolate the capacitive load from thefeedback loop by inserting a series isolation resistor betweenthe amplifier output and the capacitive load. This does noteliminate the pole from the loop response, but rather shifts it andadds a zero at a higher frequency. The additional zero acts tocancel the phase lag from the capacitive load pole, thusincreasing the phase margin and improving stability. The Typi-cal Characteristics show the recommended RS vs CapacitiveLoad and the resulting frequency response at the load. Parasiticcapacitive loads greater than 2pF can begin to degrade theperformance of the OPA2677. Long PC board traces, un-matched cables, and connections to multiple devices can easilycause this value to be exceeded. Always consider this effectcarefully, and add the recommended series resistor as close aspossible to the OPA2677 output pin (see the Board LayoutGuidelines section).
DISTORTION PERFORMANCE
The OPA2677 provides good distortion performance into a100Ω load on ±6V supplies. Relative to alternative solutions,it provides exceptional performance into lighter loads and/oroperation on a single +5V supply. Generally, until the funda-mental signal reaches very high frequency or power levels,the 2nd-harmonic dominates the distortion with a negligible3rd-harmonic component. Focusing then on the 2nd-har-monic, increasing the load impedance improves distortiondirectly. Remember that the total load includes the feedbacknetwork—in the noninverting configuration (see Figure 1),this is the sum of RF + RG, whereas in the inverting configu-ration it is just RF. Also, providing an additional supplydecoupling capacitor (0.01µF) between the supply pins (forbipolar operation) improves the 2nd-order distortion slightly(3dB to 6dB).
OPA2677 21SBOS126I www.ti.com
In most op amps, increasing the output voltage swing in-creases harmonic distortion directly. The Typical Character-istics show the 2nd-harmonic increasing at a little less thanthe expected 2x rate whereas the 3rd-harmonic increases ata little less than the expected 3x rate. Where the test powerdoubles, the difference between it and the 2nd-harmonicdecreases less than the expected 6dB, whereas the differ-ence between it and the 3rd-harmonic decreases by lessthan the expected 12dB. This also shows up in the 2-tone,3rd-order intermodulation spurious (IM3) response curves.The 3rd-order spurious levels are extremely low at low-outputpower levels. The output stage continues to hold them loweven as the fundamental power reaches very high levels. Asthe Typical Characteristics show, the spurious intermodulationpowers do not increase as predicted by a traditional interceptmodel. As the fundamental power level increases, the dy-namic range does not decrease significantly. For 2-tonecentered at 20MHz, with 10dBm/tone into a matched 50Ωload (that is, 2VPP for each tone at the load, which requires8VPP for the overall 2-tone envelope at the output pin), theTypical Characteristics show 63dBc difference between thetest-tone power and the 3rd-order intermodulation spuriouslevels. This exceptional performance improves further whenoperating at lower frequencies.
NOISE PERFORMANCE
Wideband current-feedback op amps generally have a higheroutput noise than comparable voltage-feedback op amps.The OPA2677 offers an excellent balance between voltageand current noise terms to achieve low output noise. Theinverting current noise (24pA/√Hz) is significantly lower thanearlier solutions whereas the input voltage noise (2.0nV/√Hz) is lower than most unity-gain stable, wideband voltage-feedback op amps. This low input voltage noise is achievedat the price of higher noninverting input current noise (16pA/√Hz). As long as the AC source impedance looking out of thenoninverting node is less than 100Ω, this current noise doesnot contribute significantly to the total output noise. The opamp input voltage noise and the two input current noiseterms combine to give low output noise under a wide varietyof operating conditions. Figure 14 shows the op amp noiseanalysis model with all the noise terms included. In thismodel, all noise terms are taken to be noise voltage orcurrent density terms in either nV/√Hz or pA/√Hz.
RG
RF
RS
EO2
Driver
ERS
EN
IN
IN
√4kTRS
√4kTRF
√4kTRFRF
RS
ERS
EN
IN
IN
√4kTRS
√4kTRG
FIGURE 15. Differential Op Amp Noise Analysis Model.
The total output spot noise voltage can be computed as thesquare root of the sum of all squared output noise voltagecontributors. Equation 17 shows the general form for theoutput noise voltage using the terms shown in Figure 13.
(17)
E E I R kTR I R kTR NGO NI BN S S BI F F= + •( ) + + •( ) +
2 2 24 4
Dividing this expression by the noise gain (NG = (1 + RF/RG))gives the equivalent input referred spot noise voltage at thenoninverting input, as shown in Equation 18.
(18)
E E I R kTRI R
NGkTRNGN NI BN S S
BI F F= + •( ) + + •
+
2 2
2
44
Evaluating these two equations for the OPA2677 circuit andcomponent values (see Figure 1) gives a total output spotnoise voltage of 13.5nV/√Hz and a total equivalent input spotnoise voltage of 3.3nV/√Hz. This total input referred spot noisevoltage is higher than the 2.0nV/√Hz specification for the opamp voltage noise alone. This reflects the noise added to theoutput by the inverting current noise times the feedbackresistor. If the feedback resistor is reduced in high-gain con-figurations (as suggested previously), the total input referredvoltage noise given by Equation 18 approaches just the 2.0nV/√Hz of the op amp. For example, going to a gain of +10 usingRF = 298Ω gives a total input referred noise of 2.3nV/√Hz.
DIFFERENTIAL NOISE PERFORMANCE
As the OPA2677 is used as a differential driver in xDSLapplications, it is important to analyze the noise in such aconfiguration. Figure 15 shows the op amp noise model forthe differential configuration.
FIGURE 14. Op Amp Noise Analysis Model.
4kTRG
RG
RF
RS
1/2OPA2677
IBI
EO
IBN
4kT = 1.6E –20Jat 290°K
ERS
ENI
√4kTRS
√4kTRF
OPA267722SBOS126Iwww.ti.com
As a reminder, the differential gain is expressed as:
GR
RDF
G= + •
12
(19)
The output noise can be expressed as shown below:
(20)
E G e i R kTR iR kTR GO D N N S S I F F D= • • + •( ) +
+ ( ) + ( )2 4 2 2 42 2 2 2
Dividing this expression by the differential noise gain(GD = (1 + 2RF/RG)) gives the equivalent input referredspot noise voltage at the noninverting input, as shown inEquation 21.
(21)
E e i R kTRiRG
kTRGO N N S S
I F
D
F
D= • + •( ) +
+
+
2 4 2 242 2
2
Evaluating these equations for the OPA2677 ADSL circuitand component values of Figure 6 gives a total output spotnoise voltage of 31.8nV/√Hz and a total equivalent input spotnoise voltage of 3.6nV/√Hz.
In order to minimize the output noise due to the noninvertinginput bias current noise, it is recommended to keep thenoninverting source impedance as low as possible.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp such as the OPA2677 providesexceptional bandwidth in high gains, giving fast pulse settlingbut only moderate DC accuracy. The Electrical Characteris-tics show an input offset voltage comparable to high-speed,voltage-feedback amplifiers; however, the two input biascurrents are somewhat higher and are unmatched. Whilebias current cancellation techniques are very effective withmost voltage-feedback op amps, they do not generally re-duce the output DC offset for wideband current-feedback opamps. Because the two input bias currents are unrelated inboth magnitude and polarity, matching the input sourceimpedance to reduce error contribution to the output isineffective. Evaluating the configuration of Figure 1, usingworst-case +25°C input offset voltage and the two input biascurrents, gives a worst-case output offset range equal to:
VOFF = ± (NG • VOS(MAX)) + (IBN • RS/2 • NG) ± (IBI • RF)
where NG = noninverting signal gain
= ± (4 • 4.5mV) + (30µA • 25Ω • 4) ± (402Ω • 30µA)
= ±18mV + 3mV ± 12.06mV
VOFF = –29.06mV to +35.06mV
THERMAL ANALYSIS
Due to the high output power capability of the OPA2677, heat-sinking or forced airflow may be required under extremeoperating conditions. Maximum desired junction temperaturesets the maximum allowed internal power dissipation as de-scribed below. In no case should the maximum junction tem-perature be allowed to exceed 175°C. Operating junctiontemperature (TJ) is given by TA + PD • θJA. The total internal
power dissipation (PD) is the sum of quiescent power (PDQ) andadditional power dissipation in the output stage (PDL) to deliverload power. Quiescent power is the specified no-load supplycurrent times the total supply voltage across the part. PDL
depends on the required output signal and load, but for agrounded resistive load, PDL is at a maximum when the outputis fixed at a voltage equal to 1/2 of either supply voltage (forequal bipolar supplies). Under this condition, PDL = VS
2 /(4 • RL)where RL includes feedback network loading. Note that it is thepower in the output stage and not into the load that determinesinternal power dissipation. As a worst-case example, computethe maximum TJ using an OPA2677 SO-8 in the circuit ofFigure 1 operating at the maximum specified ambient tempera-ture of +85°C with both outputs driving a grounded 20Ω load to+2.5V.
PD = 12V • 18mA + 2 • [62 / (4 • (20Ω || 534Ω))] = 882mW
Maximum TJ = +85°C + (0.83 • 125°C/W) = 170°C
This absolute worst-case condition exceeds specified maxi-mum junction temperature. This extreme case is not normallyencountered. Where high internal power dissipation is antici-pated, consider the thermal slug package version.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a high-frequency am-plifier like the OPA2677 requires careful attention to boardlayout parasitic and external component types. Recommen-dations that optimize performance include:
a) Minimize parasitic capacitance to any AC ground for allof the signal I/O pins. Parasitic capacitance on the output andinverting input pins can cause instability; on the noninvertinginput, it can react with the source impedance to causeunintentional band limiting. To reduce unwanted capaci-tance, a window around the signal I/O pins should be openedin all of the ground and power planes around those pins.Otherwise, ground and power planes should be unbrokenelsewhere on the board.
b) Minimize the distance (< 0.25") from the power-supplypins to high-frequency 0.1µF decoupling capacitors. At thedevice pins, the ground and power plane layout should notbe in close proximity to the signal I/O pins. Avoid narrowpower and ground traces to minimize inductance betweenthe pins and the decoupling capacitors. The power-supplyconnections (on pins 4 and 7) should always be decoupledwith these capacitors. An optional supply decoupling capaci-tor across the two power supplies (for bipolar operation)improves 2nd-harmonic distortion performance. Larger (2.2µFto 6.8µF) decoupling capacitors, effective at lower frequency,should also be used on the main supply pins. These can beplaced somewhat farther from the device and may be sharedamong several devices in the same area of the PCB.
c) Careful selection and placement of external compo-nents preserve the high-frequency performance of theOPA2677. Resistors should be a very low reactance type.Surface-mount resistors work best and allow a tighter overalllayout. Metal film and carbon composition axially leadedresistors can also provide good high-frequency performance.
OPA2677 23SBOS126I www.ti.com
Again, keep leads and PCB trace length as short as possible.Never use wire-wound type resistors in a high-frequencyapplication. Although the output pin and inverting input pinare the most sensitive to parasitic capacitance, always posi-tion the feedback and series output resistor, if any, as closeas possible to the output pin. Other network components,such as noninverting input termination resistors, should alsobe placed close to the package. Where double-side compo-nent mounting is allowed, place the feedback resistor directlyunder the package on the other side of the board betweenthe output and inverting input pins. The frequency responseis primarily determined by the feedback resistor value asdescribed previously. Increasing the value reduces the band-width, whereas decreasing it gives a more peaked frequencyresponse. The 402Ω feedback resistor used in the TypicalCharacteristics at a gain of +4 on ±6V supplies is a goodstarting point for design. Note that a 511Ω feedback resistor,rather than a direct short, is recommended for the unity-gainfollower application. A current-feedback op amp requires afeedback resistor even in the unity-gain follower configura-tion to control stability.
d) Connections to other wideband devices on the boardmay be made with short direct traces or through onboardtransmission lines. For short connections, consider the traceand the input to the next device as a lumped capacitive load.Relatively wide traces (50mils to 100mils) should be used,preferably with ground and power planes opened up aroundthem. Estimate the total capacitive load and set RS from theplot of Recommended RS vs Capacitive Load. Low parasiticcapacitive loads (< 5pF) may not need an RS because theOPA2677 is nominally compensated to operate with a 2pFparasitic load. If a long trace is required, and the 6dB signalloss intrinsic to a doubly-terminated transmission line isacceptable, implement a matched impedance transmissionline using microstrip or stripline techniques (consult an ECLdesign handbook for microstrip and stripline layout tech-niques). A 50Ω environment is normally not necessary onboard; in fact, a higher impedance environment improvesdistortion (see the distortion versus load plots). With acharacteristic board trace impedance defined based on boardmaterial and trace dimensions, a matching series resistorinto the trace from the output of the OPA2677 is used, as wellas a terminating shunt resistor at the input of the destinationdevice. Remember also that the terminating impedance isthe parallel combination of the shunt resistor and the inputimpedance of the destination device.
This total effective impedance should be set to match thetrace impedance. The high output voltage and current capa-bility of the OPA2677 allows multiple destination devices tobe handled as separate transmission lines, each with theirown series and shunt terminations. If the 6dB attenuation ofa doubly-terminated transmission line is unacceptable, along trace can be series-terminated at the source end only. FIGURE 16. Internal ESD Protection.
Treat the trace as a capacitive load in this case and set theseries resistor value as shown in the plot of RS vs CapacitiveLoad. However, this does not preserve signal integrity as wellas a doubly-terminated line. If the input impedance of thedestination device is low, there is some signal attenuationdue to the voltage divider formed by the series output into theterminating impedance.
e) Socketing a high-speed part like the OPA2677 is notrecommended. The additional lead length and pin-to-pincapacitance introduced by the socket can create an ex-tremely troublesome parasitic network, which can make italmost impossible to achieve a smooth, stable frequencyresponse. Best results are obtained by soldering the OPA2677directly onto the board.
f) Use the –VS plane to conduct heat out of theHSOP-8 PowerPAD package (OPA2677IDDA) or theQFN-16 (OPA2677IRGV). These packages attach the diedirectly to an exposed thermal pad on the bottom, whichshould be soldered to the board. This pad must be connectedelectrically to the same voltage plane as the most negativesupply applied to the OPA2677 (in Figure 6, this would beground), which must have a minimum area of 3.5" x 3.5"(88.9mm x 88.9mm) to produce the θJA values in the Electri-cal Characteristics tables.
INPUT AND ESD PROTECTION
The OPA2677 is built using a very high-speed complemen-tary bipolar process. The internal junction breakdown volt-ages are relatively low for these very small geometry devicesand are reflected in the absolute maximum ratings table. Alldevice pins have limited ESD protection using internal diodesto the power supplies, as shown in Figure 16.
These diodes provide moderate protection to input overdrivevoltages above the supplies as well. The protection diodescan typically support 30mA continuous current. Where highercurrents are possible (for example, in systems with ±15Vsupply parts driving into the OPA2677), current-limiting se-ries resistors should be added into the two inputs. Keepthese resistor values as low as possible, since high valuesdegrade both noise performance and frequency response.
ExternalPin
+VS
–VS
InternalCircuitry
OPA267724SBOS126Iwww.ti.com
DATE REVISION PAGE SECTION DESCRIPTION
Changed Storage Temperature Range from −40°C to +125°C to−65°C to +125°C.
3 Electrical Characteristics Added Both Channels; Power Supply section under Conditions.
4 Electrical Characteristics Added +5V and Both Channels; Power Supply section under Conditions.
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
H3/08
7/08 I 2 Abs Max Ratings
PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
OPA2677IDDA ACTIVE SO PowerPAD DDA 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677
OPA2677IDDAG4 ACTIVE SO PowerPAD DDA 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677
OPA2677IDDAR ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677
OPA2677IDDARG4 ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR -40 to 85 OP2677
OPA2677IRGVT ACTIVE VQFN RGV 16 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA2677
OPA2677IRGVTG4 ACTIVE VQFN RGV 16 250 Green (RoHS& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA2677
OPA2677U ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR OPA2677U
OPA2677U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA2677U
OPA2677UG4 ACTIVE SOIC D 8 75 Green (RoHS& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA2677U
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 2
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
OPA2677IDDAR SOPower PAD
DDA 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA2677IRGVT VQFN RGV 16 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2
OPA2677U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Aug-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2677IDDAR SO PowerPAD DDA 8 2500 367.0 367.0 35.0
OPA2677IRGVT VQFN RGV 16 250 210.0 185.0 35.0
OPA2677U/2K5 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Aug-2017
Pack Materials-Page 2
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.Refer to the product data sheet for package details.
DDA 8 PowerPAD TM SOIC - 1.7 mm max heightPLASTIC SMALL OUTLINE
4202561/G
www.ti.com
PACKAGE OUTLINE
C TYP6.2
5.8
1.7 MAX
6X 1.27
8X 0.510.31
2X3.81
TYP0.250.10
0 - 80.150.00
2.62.0
3.12.5
0.25GAGE PLANE
1.270.40
A
NOTE 3
5.04.8
B 4.03.8
4221637/B 03/2016
PowerPAD SOIC - 1.7 mm max heightDDA0008JPLASTIC SMALL OUTLINE
NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.5. Reference JEDEC registration MS-012, variation BA.
PowerPAD is a trademark of Texas Instruments.
TM
18
0.1 C A B
54
PIN 1 IDAREA
NOTE 4
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL ATYPICAL
SCALE 2.400
EXPOSEDTHERMAL PAD
4
1
5
8
www.ti.com
EXAMPLE BOARD LAYOUT
(5.4)
0.07 MAXALL AROUND
0.07 MINALL AROUND
8X (1.55)
8X (0.6)
6X (1.27)
(2.95)NOTE 9
(4.9)NOTE 9
(2.6)
(3.1)SOLDER MASK
OPENING
( ) TYPVIA
0.2
(1.3) TYP
(1.3)TYP
4221637/B 03/2016
PowerPAD SOIC - 1.7 mm max heightDDA0008JPLASTIC SMALL OUTLINE
SYMM
SYMM
SEE DETAILS
LAND PATTERN EXAMPLESCALE:10X
1
4 5
8
SOLDER MASKOPENING
METAL COVEREDBY SOLDER MASK
SOLDER MASKDEFINED PAD
NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).9. Size of metal pad may vary due to creepage requirement.
TM
METALSOLDER MASKOPENING
NON SOLDER MASKDEFINED
SOLDER MASK DETAILS
OPENINGSOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASKDEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
8X (1.55)
8X (0.6)
6X (1.27)
(5.4)
(2.6)
(3.1)BASED ON
0.127 THICKSTENCIL
4221637/B 03/2016
PowerPAD SOIC - 1.7 mm max heightDDA0008JPLASTIC SMALL OUTLINE
2.20 X 2.620.1752.37 X 2.830.150
2.6 X 3.1 (SHOWN)0.1252.91 X 3.470.1
SOLDER STENCILOPENING
STENCILTHICKNESS
NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design.
TM
SOLDER PASTE EXAMPLEEXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREASCALE:10X
SYMM
SYMM
1
45
8
BASED ON0.125 THICK
STENCIL
BY SOLDER MASKMETAL COVERED SEE TABLE FOR
DIFFERENT OPENINGSFOR OTHER STENCILTHICKNESSES
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