Dual-mode design of fully differential circuits usingfully balanced operational amplifiers

E.M. Spinelli, M.A. Mayosky and C.F. Christiansen

Abstract: Fully differential (F-D) analogue circuits are usually designed focusing only on theirdifferential-mode (DM) behaviour, without considering common-mode (CM) responses. Atechnique is presented for the design of both DM and CM circuit responses, using fully balancedoperational amplifiers (FBOAs) as analogue building blocks. FBOAs work with CM and DMvoltages as a whole, having an ideally infinite gain for both modes. This allows independentdesign of CM and DM dynamics. Inverting and non-inverting F-D topologies can be implementedin a simple way, similar to the implementation of their single-ended counterparts. Some typicalapplication circuits are analysed and discussed and, as a design example, a ‘double-mode oscil-lator’ (a circuit that has independent CM and DM oscillations) was built and experimentallyevaluated.

1 Introduction

Fully differential (F-D) analogue circuits are usuallydesigned departing from a single-ended (S-E) prototype[1–3]. This procedure guarantees a desired differential-mode (DM) response, but does not take into account thecommon-mode (CM) transfer function [3, 4]. The latter isimportant, for example, in modern instrumentation circuits,which pick up signals from a differential output sensor andprovide conditioned voltages to a differential inputanalogue-to-digital converter (ADC). These applicationsrequire F-D circuits to conditioning both CM and DMsensors’ output to levels and bandwidths compatible withthe ADC used.Implementation of F-D circuits relays on already available

building blocks. For example, by using fully differentialoperational amplifiers (FDOAs) [5], only inverting ampli-fiers can be synthesised. If a non-inverting topology isneeded, a fully differential difference operational amplifier(FDDOA) is required. This latter building block giveshigher design flexibility [6, 7], but a limitation persists:only theDM response is taken into account as a design target.In order to design both CM and DM circuit behaviours –

for inverting and non-inverting schemes – a fully balancedoperational amplifier (FBOA) [8] is proposed as an ana-logue building block. The resulting circuits do not requirea CM feedback loop, because CM dynamics become partof the circuit design. Design of F-D analogue circuitsusing FBOA is similar to that of their S-E counterpartsand does not rely on state-space techniques [9].

# The Institution of Engineering and Technology 2008

doi:10.1049/iet-cds:20070280

Paper first received 21st May and in revised form 16th October 2007

E.M. Spinelli is with the Laboratorio de Electronica Industrial Control eInstrumentacion (LEICI), Facultad de Ingenierıa, Universidad Nacional de LaPlata (UNLP) and Consejo Nacional de Investigaciones Cientıficas yTecnicas (CONICET) CC 91, 1900 La Plata, Argentina

M.A. Mayosky is with LEICI, UNLP and Comision de InvestigacionesCientıficas de la Provincia de Buenos Aires (CICPBA), CC 91, (1900)La Plata, Argentina

C.F. Christiansen is with LEICI and UNLP, CC 91, (1900) La Plata, Argentina

E-mail: spinelli@ing.unlp.edu.ar

IET Circuits Devices Syst., 2008, 2, (2), pp. 243–248

2 F-D circuit model

A voltage-mode F-D circuit has two inputs viH, viL and twooutputs voH, voL and works with both DM and CM voltages.DM and CM voltages are applied at its input and the sameresult at its output (Fig. 1).The input–output voltage relationship of these circuits

can be characterised by a matrix gain G [10]

voDvoC

� �¼

GDD GDC

GCD GCC

� �viDviC

� �(1)

Defining the DMand the CMvoltages of a balanced signal as atwo-element vector V, (1) can be written in a compact form as

V o ¼ GV i (2)

Design of F-D circuits implies fulfilling a required matrix gainG, and the target design parameters are the direct gains GDD

and GCC. In the procedure presented here, only these transferfunctions are taken into account (diagonal G matrix). Thecross-terms GDC and GCD, related to mode’s transformations,are ideally zero, but in practice they have non-null valuesdue to component unbalances.

3 Fully-balanced operational amplifier

A scheme of the proposed FBOA is shown in Fig. 2a.It has two differential inputs (an inverting and a non-invertingdifferential input) and a differential output. The balancedinverting input voltage is denoted as Vi2 ¼ [viD2 viC2]

T,the non-inverting input as Viþ ¼ [viDþ viCþ]

T and thebalanced output as Vo ¼ [voD voC]

T

FDOA and FDDOA amplify only DM signals, whereasan FBOA amplifies both modes. Assuming that no modetransformation happens inside the FBOA, the relationshipsbetween the inputs and outputs are as follows

voD ¼ A(viDþ � viD�)

voC ¼ A(viCþ � viC�)(3)

243

Using matrix notation

V o ¼A 0

0 A

� �(V iþ � V i�) (4)

Given that an operational amplifier (OA) is intended towork in feedback schemes, its open-loop gain A is ideallyinfinite. From (3), this condition implies

viDþ ¼ viD�

viCþ ¼ viC�(5)

which can be written as

V iþ ¼ V i� (6)

So, by using FBOAs, the ‘virtual ground’ concept is validfor DM voltages as in [6] but also for CM voltages, thusallowing ‘dual-mode’ analysis and design of F-D circuits.

3.1 Device implementation

The FBOA can be implemented as a monolithic circuit but itcan also be easily built by using standard S-E OAs con-nected as shown in Fig. 2b. It is straightforward to verifythat this circuit works in agreement with (3).

4 Design of F-D circuits with FBOA

Like the standard AO for S-E circuits, the FBOA allowsimplementing inverting and non-inverting feedback topolo-gies for amplifiers using the general schemes shown inFig. 3. Note that they can be seen as natural F-D extensionsof their S-E counterparts.

4.1 Inverting amplifier

An F-D feedback inverting topology is shown in Fig. 3a.The virtual ground at the non-inverting input gives

IoAjVo¼0 ¼ �I iBjVi¼0 (7)

where IoA is the network A output current vector and IiB thenetwork B input current vector. Equation (7) can beexpanded as

ioDAioCA

� �����voDA¼voCA¼0

¼ �iiDBiiCB

� �����viDB¼viCB¼0

(8)

Fig. 1 General scheme of an F-D circuit

Fig. 2 Scheme of the proposed FBOA

a Symbol used to represent an FBOAb FBOA implementation using standard S-E OA

244

Using (32), (8) becomes

y21DA 0

0 y21CA

� �viDviC

� �¼ �

y12DB 0

0 y12CB

� �voDvoC

� �(9)

Solving (9) for the output voltages leads to

voDvoC

� �¼ �

y21DAy12DB

0

0y21CAy12CB

264

375 viD

viC

� �(10)

resulting in

GDD ¼ �y21DAy12DB

, GCC ¼ �y21CAy12CB

(11)

and the direct transfer functions GDD and GCC can beexpressed as functions of the DM and CM admittanceparameters (defined in Section 10) of networks A andB. Practical implementation alternatives for dual-modeinverting amplifiers are shown in Fig. 4.The inverting amplifier shown in Fig. 4a presents a DM

gain lower than its CM gain (GDD , GCC). Replacing in(11) the network parameters of the feedback networks Aand B presented in Section 10 for R2 � R1, it result in

GDD ¼ �R4

R2

1

(1þ 2R1=R3)

GCC ¼ �R4

R2

(12)

Using the circuit shown in Fig. 4b, a DM gain greater thanthe CM gain (GDD . GCC) can be obtained. This feature canbe useful, for example, to manage high CM voltages.Assuming R2 � R4, the circuit’s gains are given by

GDD ¼ �R2

R1

1þ2R4

R3

� �

GCC ¼ �R2

R1

(13)

If R3 is omitted, GDD and GCC are equal and the circuit canbe seen as two non-coupled S-E inverting amplifiers.

Fig. 3 General scheme of dual-mode F-D feedback amplifiers

a Inverting amplifierb Non-inverting amplifier

Fig. 4 Circuit implementations of F-D inverting amplifier

a GDD , GCC

b GDD . GCC

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

4.2 Non-inverting amplifier

An F-D feedback non-inverting topology is shown inFig. 3b. Applying the virtual ground concept given by (6)to the scheme shown in Fig. 3b results in

bV o ¼ V i (14)

where b is the open-circuit transfer-function matrix of thefeedback network (Appendix). Solving the output voltagefrom (14) gives

V o ¼ b�1V i (15)

Assuming a diagonal b matrix (this implies a perfectlybalanced feedback network), (15) becomes

V o ¼1=bDD 0

0 1=bCC

� �V i (16)

So, by comparison with (1), the DM-to-DM gain GDD andthe CM-to-CM gain GCC results in

GDD ¼1

bDD

, GCC ¼1

bCC

(17)

This equation shows that the closed-loop gains GDD andGCC can be fixed by the proper design of the CM and DMfeedback’s network gain. For example, using the F-Dattenuator shown in Fig. 5, the feedback gains (Section10) are

bDD ¼R1

R1 þ 2R2

bCC ¼ 1

(18)

leading to

GDD ¼ 1þ2R2

R1

, GCC ¼ 1 (19)

It is worth noting that for this circuit, the FBOA’s open-loopgain must be stable for unity gain, because CM signals havea unity feedback gain. Otherwise, CM stability problemsarise [11].Departing from the circuit shown in Fig. 5a and replacing

the FBOA by its implementation with standard OA shownin Fig. 2b, the well-known two-OA F-D amplifier results(Fig. 5b), which composes the first stage of the standardthree-OA instrumentation amplifier.

4.3 F-D integrator

Integrators are very often used in analogue signal proces-sing and there are many ways to implement dual-mode inte-grators using FBOA. Some of them are shown in Fig. 6.

Fig. 5 Feedback gains using the F-D attenuator

a FBOA-based non-inverting amplifierb Implementation with standard OAs

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

An integrator with GDD , GCC can be implementedusing the circuit shown in Fig. 6a. Considering R2 � R1,and replacing in (11) the network parameters detailed inSection 10, results in

GDD ¼ �1

sR2C1(1þ 2R1=R3), GCC ¼ �

1

sR2C1

(20)

If a GDD . GCC is required, the circuit shown in Fig. 6c canbe used. Regarding C1 � C2, the direct gains are

GDD ¼ �sR1C2

1þ 2C3=C1

� ��1

, GCC ¼ �(sR1C2)�1 (21)

Integrators with GDD ¼ GCC can be implemented using thecircuit shown in Fig. 6b. This circuit can be reduced to a pairof non-coupled S-E integrators, with direct gains given by

GDD ¼ GCC ¼ �1

sR1C1

(22)

Using FBOA, it is possible to implement selective-modescale factors and also selective-mode functions. Forexample, the circuit shown in Fig. 6d works as an integratorfor DM signals, whereas it works as a single-pole low-passfilter for CM voltages. Replacing in (11) the parameters ofthe feedback network (they can be found in Section 10 andan explanation in [12]), it results in

GDD ¼ �1

sR1C1

, GCC ¼ �R2=R1

1þ sR2C2

(23)

4.4 Double-mode oscillator

Using FBOAs, both GDD and GCC gains can be designedindependently. In order to show this feature, a dual-modeoscillator will be presented. An F-D scheme of a ‘doubleintegrator’ oscillator is shown in Fig. 7. It consists of twocascaded F-D integrators and a negative feedback gain bthat determines the frequency of oscillation according to

fo ¼

ffiffiffib

p

2pRiCi

(24)

Fig. 6 Four versions of F-D integrators using FBOA

a GDD , GCC

b GDD ¼ GCC

c GDD . GCC

Circuits a–c work as integrators for both CM and DM voltagesCircuit d works as an integrator for DM signals, whereas it implementsa single-pole low-pass filter for CM voltages

245

A second feedback path (indicated in grey in Fig. 7) isusually added to ensure oscillator start up. Note that theF-D integrator scheme used has equal gain for bothmodes, whereas the feedback block b is mode selective: ithas different gains for CM and DM voltages according to(12). Therefore the F-D oscillator presents two oscillationfrequencies: a DM frequency foD and a CM frequency foC.These frequencies are given by

foD ¼

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffið1=(1þ 2R1=R3Þ)(R4=R2)

p2pRiCi

, foC ¼

ffiffiffiffiffiffiffiffiffiffiffiffiR4=R2

p2pRiCi

(25)

For this example, the following values were adopted

Ri ¼ 18:5 kV, Ci ¼ 100 nF, R1 ¼ 910V

R3 ¼ 220V, R2 ¼ 30 kV, R4 ¼ 30 kV

R1S ¼ 3:3 kV, R3S ¼ 3 kV, R2S ¼ 770 kV

(26)

resulting in

foD ffi 28Hz, foC ffi 86Hz (27)

4.5 Low-power circuits

F-D circuits are appropriate for use in low-power battery-powered applications, due to their higher dynamic rangeand power supply rejection, compared with their S-Ecounterparts. The proposed FBOA is well suited for thesecases, because it can be built using standard S-E OAs,which are widely available in the low-power and rail-to-railversions. Commercial F-D amplifiers are usually intendedfor high-speed applications that consume tens of mA,being a non-suitable choice for portable devices.In low-power circuits, where high-value resistors are

usual, it is important to take into account the parasitic capa-citances, which can significantly affect circuit’s transferfunctions. These capacitances must be regarded as part ofthe networks, prior to the calculation of its parameters asshown in Section 10.

5 Mode transformation in F-D circuits

As it was previously stated, only the direct transferfunctions GDD and GCC were taken into account for thedesign procedure. In practice, the involved F-D networksare not perfectly symmetric and mode transformations(CM-to-DM and DM-to-CM) happen inside them. This

Fig. 7 Schematic diagram of the designed F-D oscillator

Note the F-D implementation of the integrators and inverting feedbackblock

246

leads to no-null cross-gains GDC and GCD and,consequently, to a non-infinite CM rejection ratio (CMRR).Using non-inverter topologies, it is possible to build F-D

circuits with a very high CMRR, even in the presence ofcomponent’s unbalances. The key is to design circuitswithout any connection to ground, as shown in the amplifierin Fig. 5a [12, 13]. If a CM voltage ViC is applied to thesecircuits, no path to ground exists and no currents due tothis voltage are produced: all the circuit’s nodes take poten-tial ViC and no differential voltages appear at the circuitoutput, resulting in an ideally infinite CMRR. The cost topay is a design restriction: the CM-to-CM gain GCC

becomes strictly unitary.

6 Experimental results

The dual-mode oscillator described in Section 4.4, whichincludes F-D integrators and an F-D inverting amplifier,was built using general purpose LF353 OAs composingthe FBOA according to Fig. 2b, 1% tolerance resistorsand 5% tolerance capacitors.The voltages experimentally obtained at the circuit’s

output voH and voL (ground referenced) are shown inFig. 8. These signals include CM and DM oscillations thatcan be separated measuring the DM (by using a differentialamplifier) and CM voltages (by using an average net). Thesemeasurements are shown in Fig. 9, where CM and DMoscillations are evident. CM and DM oscillators are inde-pendent, but they coexist on the same circuit.Replacing one of the integrators by the DM integrator

shown in Fig. 6d, the system presents only DM oscillations,because the scheme shown in Fig. 6d is not an integrator forCM signals and for this mode, it works as a single-polefilter, leading to decreasing CM responses.

Fig. 9 DM (voD) and CM (voC) voltages at oscillator output

Fig. 8 Voltages obtained at oscillator’s outputs voH and voL

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

7 Conclusions

FBOA allow designing F-D circuits in a simple way, similarto the S-E counterparts. Differences are not conceptual butdimensional: scalar gain becomes a matrix, scalar voltagesbecomes vectors and so on. Moreover, the virtual groundconcept remains as a useful tool for F-D circuit analysis.Unlike standard mirroring techniques, the proposed design

procedure takes into account the CM and DM dynamics,ensuring stability and an appropriate CM response.The resulting circuits can be implemented using general-

purpose S-E OAs. As an example, a circuit thatpresents independent CM and DM oscillations was builtand tested.

8 Acknowledgment

This work was supported in part by Grants UNLP-I097,CONICET-PIP5551 and ANPCyT-PICT14111.

9 References

1 Casas, O., and Pallas-Areny, R.: ‘Basis of analog differential filters’,IEEE Trans. Instrum. Meas., 1996, 45, (1), pp. 275–279

2 Horrocks, D.H.: ‘Fully balanced second order active filter circuitshaving few op-amps’. Proc. IEEE ISCAS’ 94, 1994, vol. 3,pp. 759–762

3 Czarnul, Z., Itakura, T., Dobashi, N. et al.: ‘Design of fully balancedanalog systems based on ordinary and/or modified single-endedopamps’, Analog Integr. Circuit Signal Process., 2000, 25,pp. 189–207

4 Van Peteghem, P.M., andDuque-Carrillo, J.F.: ‘A general description ofcommon-mode feedback in fully-differential amplifiers’. Proc. IEEE Int.Symp. Circuits and Systems 1990, 1990, vol. 4, pp. 3209–3212

5 Karki, J.: ‘Fully differential amplifiers’. Texas InstrumentsApplication Report SLOA054D, 2003, pp. 1–28

6 Sackinger, E., and Guggenbuhl, W.: ‘A versatile building block: theCMOS differential difference amplifier’, IEEE J. Solid-StateCircuits, 1987, 22, (2), pp. 287–294

7 Alzaher, H., and Ismail, M.: ‘A CMOS fully balanced differentialdifference amplifier and its applications’, IEEE Trans. Circuit Syst.II, 2001, 48, (6), pp. 614–620

8 Spinelli, E., and Mayosky, M.: ‘A fully-balanced operationalamplifier’, IEEE Latin Am. Trans., in press

9 Spinelli, E., and Mayosky, M.: ‘Independent common mode anddifferential mode design of fully-differential analog circuits’, IEEETrans. Circuits Syst. II, 2006, 53, (7), pp. 572–576

10 Pallas Areny, R., and Webster, J.: ‘Analog signal processing’ (Wiley,USA, 1999)

11 White, R.: ‘Phase compensation of the three op ampinstrumentation amplifier’, IEEE Trans. Instrum. Meas., 1987, 36,(3), pp. 842–844

12 Spinelli, E., Mayosky, M., and Pallas-Areny, R.: ‘AC-coupledfront-end for biopotential measurements’, IEEE Trans. Biomed.Eng., 2003, 50, (3), pp. 391–395

13 Spinelli, E., Martinez, N., Mayosky, M. et al.: ‘A novelfully-differential biopotential amplifier with DC suppression’, IEEETrans. Biomed. Eng., 2004, 51, (8), pp. 1444–1448

14 Seshu, S., and Balabanian, N.: ‘Linear network analysis’ (Wiley,New York, 1959)

10 Appendix: Fully balanced network analysis

An F-D network has four ports: two input ports (iH and iL)and two output ports (oH and oL) (Fig. 1). The relationshipbetween voltages and currents at its terminals can be writtenin matrix form as [14]

iiHioHiiLioL

2664

3775 ¼ Y

viHvoHviLvoL

2664

3775 (28)

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

The ground-referenced voltages and currents can beexpressed as functions of their CM and DM componentsby applying the linear transformation P

iiDioDiiCioC

2664

3775 ¼ P

iiHioHiiLioL

2664

3775,

viDvoDviCvoC

2664

3775 ¼ P

viHvoHviLvoL

2664

3775 (29)

where P is given by

P ¼

1 0 �1 0

0 1 0 �1

0:5 0 0:5 0

0 0:5 0 0:5

2664

3775 (30)

Applying P to (28) gives

iiDioDiiCioC

2664

3775 ¼ PYP

�1

viDvoDviCvoC

2664

3775 (31)

If an ideally balanced network is assumed, nointeraction between modes will happen and it is possibleto write

iiDioDiiCioC

2664

3775 ¼

y11D y12D 0 0

y21D y22D 0 0

0 0 y11C y12C0 0 y21C y22C

2664

3775

viDvoDviCvoC

2664

3775 (32)

The main parameters for feedback network design are theshort-circuit transconductances y21D and y21C and the open-circuit voltage ratio bDD and bCC. The values of these

Fig. 10 Circuit parameters of some useful F-D networks

The approximation (1) is valid for R2 � R1 and(2) for C1 � C2

All these networks are reciprocal (y21 ¼ y12)

247

parameters are defined as

y21D ¼ioDviD

����voD¼0

, y21C ¼ioCviC

����voC¼0

(33)

bDD ¼voDviD

����ioD¼0

, bCC ¼voCviC

����ioC¼0

(34)

248

Assuming that reciprocal feedback networks are used (i.e.linear passive circuits), reverse transconductances areequal to the direct transconductances (y21D ¼ y12D,y21C ¼ y12C). Fig. 10 includes the calculatedparameters of some useful F-D networks used in theexamples.

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008