Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio...
-
Upload
lauren-dixon -
Category
Documents
-
view
215 -
download
1
Transcript of Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio...
![Page 1: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/1.jpg)
Dual Core System-on-Chip Design to Support Inter-Satellite Communications
Liza RodriguezAurelio Morales
EEL 6935 - Embedded SystemsDept. of Electrical and Computer
EngineeringUniversity of Florida
![Page 2: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/2.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 2 of 30
OutlineOutline
• IntroductionIntroduction• Picosatellite Demostrator DesignPicosatellite Demostrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 3: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/3.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 3 of 30
OutlineOutline
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 4: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/4.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 4 of 30
• Satellites that provide multi-point sensing• Low cost, redundancy, flexibility• Types of DSS:
• Formation Flying: strict formation• Clustering Mission: satellites are loosely coupled
around each other• Virtual Satellite Mission (fractioned mission): a
satellite has its subsystems divided onto multiple crafts (computing, imaging, etc.)
Distributed Satellite System (DSS)Distributed Satellite System (DSS)
IntroductionIntroduction
![Page 5: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/5.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 5 of 30
IntroductionIntroduction
DSS in Low Earth Orbit (LEO)DSS in Low Earth Orbit (LEO)
• Small satellites deployed at the same time in multiple orbits• Use for disaster monitoring prevention• Ad-hoc network for multipoint sensing like WSN• Challenges:
• Attitude and orbit control, intersatellite links, on-board computing
• Deal with perturbations: Earth’s geophysical forces, solar radiation
• Network connectivity and topology over time
![Page 6: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/6.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 6 of 30
Distributed Computing RequirementsDistributed Computing Requirements
IntroductionIntroduction
• Node LevelNode Level• At Individual satellite level• Store and forward data using the network:
• High priority apps using Client/Server. Payload data through the network such imaging data
• Low priority apps using Peer-to-Peer telemetry. Location and velocity changes, “byte” size payload data (GPS)
• Network LevelNetwork Level• Applied to multiple satellites• Provide adaptable and redundant ground-link
communication schemes, main “sink” to ground• React proactively and reactively to their environment
![Page 7: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/7.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 7 of 30
IntroductionIntroduction
MotivationMotivation
• Meet requirements for processing and network capabilities in “cluster” of satellites in the presence of space disturbances
ProposalProposal
• Dual core System-on-Chip design using a general purpose soft-core processor and a specific core for real-time applications, such as agents
![Page 8: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/8.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 8 of 30
AgendaAgenda
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 9: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/9.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 9 of 30
• Use of embedded hardware technology• Standard picosatellite platform CubeSat• For fast prototype, COTS components/boards:
• Flight OBC and satellite chassis from Pumpkin• Power module from Clyde-Space• SGR-05 GPS module from SSTL• MHX transceiver from Microhard Systems• PF5100 Virtex-4 FPGA FX60 Board for SoC• IEEE 802.11 PC/104 Board from Elcard
Picosatellite Demonstrator DesignPicosatellite Demonstrator Design
PrototypePrototype
![Page 10: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/10.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 10 of 30
PrototypePrototype
CubeSat Platform with Flight Module, IEEE 802.11, FPGA and development boards
![Page 11: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/11.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 11 of 30
PrototypePrototype
MHX 900 MHz Transceiver PF5100 Board with Virtex-4 FPGA
SGR-05U – Space GPS ReceiverFlight module and
satellite Chassis
Power Module
IEEE 802.11 Board
![Page 12: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/12.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 12 of 30
• 1999, CalPoly and Stanford University developed specs to help universities worldwide perform space exploration.
• Very small satellite • Use COTS components• 10x10x10 cm structure• Weight of 1 Kg• Also in 2U and 3U sizes
CubeSatCubeSat
![Page 13: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/13.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 13 of 30
Demonstrator Satellite Architecture
• FPGA board, IEEE 802.11 board, camera as payloads.
• Architecture controlled by the Flight OOn-BBoard CComputer (FM430 OBC)
• SoC to act as HW/SW mediator for:
• Hard and soft resets• Sleep mode
• SoC also used as interface between various buses
Demonstrator Satellite ArchitectureDemonstrator Satellite Architecture
![Page 14: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/14.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 14 of 30
AgendaAgenda
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 15: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/15.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 15 of 30
Dual Core Processor DesignDual Core Processor Design
LEON3 ProcessorLEON3 Processor
• Synthesisable VHDL model of 32-bit processor compliant with SPARC V8 architecture
• Suitable for SoC designs
JOP ProcessorJOP Processor
• JJava OOptimized PProcessor• Enables real-time Java functionality• Smallest and fastest Java core
![Page 16: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/16.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 16 of 30
LEON3 ProcessorLEON3 Processor
Dual Core Processor DesignDual Core Processor Design
![Page 17: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/17.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 17 of 30
Dual Core Processor DesignDual Core Processor Design
LEON3 core and JOP core in a FPGA
FPGA SoC designFPGA SoC design
AMBA = AAdvanced MMicrocontroller BBus AArchitecture
APB = AAdvanced PPeripheral BBus
![Page 18: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/18.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 18 of 30
Design ConsiderationsDesign Considerations
Dual Core Processor DesignDual Core Processor Design
• Memory sharing system between LEON3 and JOP for access to external RAM
• Cache between cores must maintain coherency
• Reconfiguration in cases of single event upsets (SEUs) or single event latch-ups (SELs)
![Page 19: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/19.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 19 of 30
• System must have low low memory footprintmemory footprint, including OS and network stack
• System must be real-timereal-time• CLDCCLDC and pjavapjava are designed
for devices with intermittent network connection, slow processors, limited memory (e.g. mobile phones, PDAs), making them ideal for JOP core
Memory Footprint Comparison
CLDC = CConnection LLimited DDevice CConfiguration
pjava = PersonalJava
JADE= JJava AAgent DEDEvelopment Framework
LEAP =LLight EExtensible AAgent PPlatform
CORBA = CCommon OObject RRequest BBroker AArchitecture
Multi-layer software designMulti-layer software design
Dual Core Processor DesignDual Core Processor Design
![Page 20: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/20.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 20 of 30
Hardware and software layer designHardware and software layer design
Dual Core Processor DesignDual Core Processor Design
LEON3 and JOP in FPGA:
• Reduce memory footprint• Increase FPGA utilization• Enable Java apps, such as
Agents, for real-time apps
RTEMS = RReal-TTime EExceutive for MMultiprocessor SSystems
![Page 21: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/21.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 21 of 30
System-on-Chip Block DiagramSystem-on-Chip Block Diagram
Detailed System-on-Chip designDetailed System-on-Chip design
Dual Core Processor DesignDual Core Processor Design
![Page 22: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/22.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 22 of 30
OutlineOutline
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 23: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/23.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 23 of 30
• Max Frequency of 37.398 MHz• WCET found between:
• LEON3 and AMBA memory controller• LEON3 and JOP AHB Master• JOP cache and JOP address bus
• Speed optimization is needed to satisfy IEEE 802.11 MAC. Trade-off between area and speed
Dual Core Processor ImplementationDual Core Processor Implementation
Timing ResultsTiming Results
![Page 24: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/24.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 24 of 30
Dual Core Processor ImplementationDual Core Processor Implementation
• On-chip or off-chip memory?• Speed and power requirements• On-chip: fast but increase power consumption and area• Power consumption of SoC design: 2.33W (1.76W in
memory interfacing), using XPower from Xilinx
Memory Trade-offMemory Trade-off
Resource UtilizationResource Utilization
![Page 25: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/25.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 25 of 30
OutlineOutline
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 26: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/26.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 26 of 30
ProcedureProcedure
Network Topology ReconfigurationNetwork Topology Reconfiguration
• HW & SW are discovered• Network topology can be reconfigured
• Stage 1: Startup FPGA Bus System & LEON3• LEON3 started, id and starting tasks discovered
• Stage 2: Startup JOP & JADE-LEAP• Start Java application with argument passing to main
host and services required• Stage 3: Network Topology Refresh
• Initialize, check or change the network topology
![Page 27: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/27.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 27 of 30
OutlineOutline
• IntroductionIntroduction• Picosatellite Demonstrator DesignPicosatellite Demonstrator Design• Dual Core Processor DesignDual Core Processor Design• Dual Core Processor ImplementationDual Core Processor Implementation• Network Topology ReconfigurationNetwork Topology Reconfiguration• ConclusionsConclusions
![Page 28: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/28.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 28 of 30
• A COTS solution for picosatellite including a SoC design that meets CubeSat platform was introduced.
• LEON3 IP and JOP IP cores were used to meet strict requirement of low memory footprint, Java functionality and real-time operation
• An Java agent software was proposed to support inter-satellite communication based on IEEE 802.11 wireless connectivity
ConclusionsConclusions
![Page 29: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/29.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 29 of 30
ReferencesReferences
• http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4584273 http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4584273 • http://www.cubesat.org/ http://www.cubesat.org/ • http://en.wikipedia.org/wiki/CubeSat http://en.wikipedia.org/wiki/CubeSat • http://www.cubesatkit.com/index.html http://www.cubesatkit.com/index.html • http://www.derivation.com/products/pf5100.htmlhttp://www.derivation.com/products/pf5100.html • http://www.clyde-space.com/products/electrical_power_systems/cubesat_power http://www.clyde-space.com/products/electrical_power_systems/cubesat_power • http://www.sstl.co.uk/assets/Downloads/SGR-05U%20v1_13.pdf http://www.sstl.co.uk/assets/Downloads/SGR-05U%20v1_13.pdf • http://www.data-connect.com/Microhard_MHX-910.htm http://www.data-connect.com/Microhard_MHX-910.htm • http://www.gaisler.com/doc/leon3_product_sheet.pdf http://www.gaisler.com/doc/leon3_product_sheet.pdf
![Page 30: Dual Core System-on-Chip Design to Support Inter- Satellite Communications Liza Rodriguez Aurelio Morales EEL 6935 - Embedded Systems Dept. of Electrical.](https://reader035.fdocuments.us/reader035/viewer/2022062516/56649db45503460f94aa4a48/html5/thumbnails/30.jpg)
EEL 6935 Dual Core SoC Design to Support Inter-Satellite Communications 30 of 30
Questions?Questions?