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    DUAL TONE MULTI FREQUENCY (DTMF) REMOTE CONTROL SYSTEM

    A PROJECT REPORT

    Submitted by

    SANTOSH.G (41502105062)

    VARUN.D (41502105082)

    ROOP KUMAR.P (41502105503)

    RAMA KONDA REDDY.L (41502105504)

    in partial fulfillment for the award of the degree

    of

    BACHELOR OF ENGINEERING

    in

    ELECTRICAL AND ELECTRONICS ENGINEERING

    SRM ENGINEERING COLLEGE,KATTANKULATHUR-603 203, KANCHEEPURAM DISTRICT.

    ANNA UNIVERSITY: CHENNAI 600 025

    APRIL 2006

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    ANNA UNIVERSITY: CHENNAI 600 025

    BONAFIDE CERTIFICATE

    Certified that this project report DUAL TONE MULTI FREQUENCY (DTMF)

    REMOTE CONTROL SYSTEM is the bonafide work of SANTOSH.G

    (41502105062), VARUN.D (41502105082), ROOP KUMAR.P (41502105503), RAMA

    KONDA REDDY.L (41502105504)

    who carried out the project work under my supervision.

    Signature of HOD Signature of supervisor

    Prof.R.CHIDAMBARAM Ms.K.S.VIDHYA

    HEAD OF THE DEPARTMENT Lecturer

    Electrical And Electronics Engineering Electrical and Electronics Engineering

    S.R.M.Engineering College S.R.M.Engineering College

    Kattankulathur-603 203 Kattankulathur-603 203

    Kancheepuram District Kancheepuram District

    Signature of Internal Examiner Signature of External Examiner

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    ACKNOWLEDGEMENT

    We take sincere efforts to acknowledge the guidance and the advice of all the people

    who have helped us in completing this project successfully.

    We grab this opportunity to thank our revered director Dr.T.P.Ganesan, for

    providing us with an opportunity to carry on with the project.

    We take immense pleasure in expressing our thanks to our respected Principal,

    Prof.R.Venkataramani,who has alwaysbeen a source of inspiration for all of us.

    We are greatly obliged to Prof.R.Chidambaram, Head of Department, Electrical

    and Electronics Engineering for his constant encouragement throughout the course of our

    project.

    We express our gratitude to our guide Ms.K.S.Vidhya, Lecturer, Department of

    Electrical and Electronics Engineering, for her guidance and timely suggestions that helped

    us go through the tough times in our project work.

    ABSTRACT

    Remote control through the telephone line is an interesting proposition. Although

    the concept is new, and control circuits based on the same were developed almost ten yearsback, it is however became more popular with the introduction of Dual-Tone Multi-

    Frequency (DTMF) mode of dialing. Single-chip DTMF encoders/decoders are available

    today, which make the designing of such systems easy and reliable.

    The switching unit described here is capable of controlling up to 7 mains-powered

    loads with aid of commands received via telephone. Any tone dialing (DTMF) telephone set

    or hand-held tone dialer may be used to send commands to the switching units. With

    personal access code.

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    The circuit is connected to the telephone network just like any normal telephone set.

    On being called, the circuit waits a predetermined number of ring signals, and then answers

    the call (electrically, it lifts the receiver). Next, it waits for a pre-programmed system access

    code. Reception of the correct system code is acknowledged with a short tone, which the

    caller can hear. Next, load number 1, for instance, a coffee machine can be switched on by

    pressing the 1 key twice. The same can be switched off by dialing 1 and then 0. The

    status of the load 1 (on/off) may be called up by pressing 1 and then 2 on the DTMF

    keypad. The control of the other six loads is identical to that of load 1, i.e., the channel

    (load) number is dialed first, then 0 or 1 for switching off or on, or 2 to request the

    channel status. An exception is formed by number 8: dialing this number allows you to

    switch all channels on/off simultaneously. On/off status requesting does not work in this

    mode.

    LIST OF TABLES

    T.No. TITLE PAGE No.3.1 FUNCTIONAL DECODE TABLE 14

    LIST OF FIGURES

    F.No. TITLE PAGE No.

    1.1 DIFFERENT TELEPHONELINE CONDITIONS 2

    1.2 STANDARD DTMF FREQUENCY SPECTRUM 3

    1.3 DTMF KEYPAD MATRIX 4

    2.1 GENERAL BLOCK DIAGRAM 7

    3.1 FUNCTIONAL BLOCK DIAGRAM OF DTMF IC 11

    3.2 STEERING CIRCUIT 13

    4.1 MASTER UNIT CIRCUIT 17

    4.2 RELAY CIRCUIT 20

    4.3 POWER SUPPLY CIRCUIT 21

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    1. INTRODUCTION

    The aim of the project is to control the home appliances through a telephone

    (DTMF telephone) line. So, first let us know the basics of the telephone line and DTMF

    signaling.

    1.1 Basic Telephone Line

    A telephone line basically carries voice and various signaling information between

    the subscriber telephone instrument and exchange. Suitable protection circuitry on both

    ends of the line protects the exchange equipment and the telephone instrument against

    damage from lightning, high-voltage transients and polarity reversal. Signaling information is

    required to inform the subscriber and exchange about on-hook, off-hook, busy/not busy

    and out of orderconditions of the telephone/line. The ringing signal from the exchange to

    the subscriber is of 70-90V RMS, 20-25Hz.

    The outgoing signal refers to signals reaching the exchange from the subscribers

    telephone, indicating on-hook, off-hook, hang-up dialing etc. Outgoing signals can be of two

    types: Line signaling and Register signaling. Line signaling encompasses on-hook, off-

    hook, hang-up state signals, while register signaling refers to dialing, where in digits of the

    destination or the called party are passed on to the exchange for establishing a connection.

    When the telephone is in on-hook condition, the cradle switch is in open condition.

    There is no flow of current in the telephone circuit. When the telephone handset is lifted off

    the cradle, the cradle switch closes to form a closed-loop circuit with the exchange battery

    and the telephone circuit. This circuit is also referred to as local loop circuit. Exchange

    battery voltage is typically 48V. The loop current is used by the exchange to establish

    on/off-hook status of the telephone. (If the loop current is 13.5mA to 60mA the exchange

    detects it as off-hook condition, and if the loop current is less than 7.5mA the exchange

    interprets it as on-hook condition.)

    Different line conditions are depicted in the figure.1. The open circuit line voltage is

    about 50V DC. Incoming voice voltage to the telephone instrument varies from 0.5V to 1V

    and the maximum outgoing voice voltage is about 2V RMS. The ringing signal is 70-90V

    RMS at 20-25Hz. In pulse dialing telephones, register signaling is known as DC loop

    signaling. In this case, the dialed number is conveyed to the exchange by make and break

    of the loop circuit.

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    1.2 DTMF Signaling

    AC register signaling is used in DTMF telephones. Here, tones rather than

    make/break pulses are used for dialing. Each dialed digit is uniquely represented by a pair of

    sine wave tones. These tones (one from lower group for row and other from high group for

    column) are sent to the exchange when a digit is dialed by pushing the key. These tones lie

    within the speech band of 300 to 3400Hz, and are chosen so as to minimize the possibility

    of any valid frequency pair existing in the normal speech simultaneously. Actually, this

    minimization is made possible by forming pairs with one tone from the higher group and the

    other from the lower group of frequencies. The DTMF spectrum is shown in the figure.2.

    A valid DTMF signal is the sum of two tones, one from the lower group (697-

    941Hz) and the other from the higher group (1209-1663). Each group contains four

    individual tones. The DTMF signaling scheme is shown in figure.3. This scheme allows 16

    unique combinations. Ten of these codes represent digits 0 through 9. The remaining six are

    reserved for special purpose dialing.

    Tones in the DTMF dialing are so chosen that none of the tones is harmonic of any

    other tone. Therefore there is no chance of distortion caused by harmonics. Each tone is

    sent as long as the key remains pressed.

    The DTMF coding scheme ensures that each signal contains only one component

    from each of the high and low groups. This significantly simplifies decoding because the

    f(Hz)

    LOGARITHMIC

    TONESGENERATEDFROMATELEPHONETYPICALLYHAVE-2dBTWIST

    (PRE-EMPHASIS)APPLIEDTOCOMPENSATEFORHIGHFREQUENCY

    ROLLOFFALONGTHETELEPHONELINE.

    DCBA2dB

    AMPLITUDE

    16331477133612099418527706971659

    16071501

    14531358

    131412291189957925

    867837784756709685

    Figure1.2StandardDTMFfrequencyspectrum+(1.5%+2Hz).Secondharmonicsofthelowgroup(possiblycreateddue

    toanon-linearchannel)fallwithinthepassbandofhighgroup(indicatedbyA,B,C,D).Thisisapotentialsourceof

    interference.

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    composite DTMF signal may be separated with band pass filters into single frequency

    components, each of which may be handled individually. As a result, the DTMF coding

    scheme is a flexible signaling scheme with high reliability, hence motivating innovative and

    competitive decoder design.

    1.3 Microcontroller Systems

    Microcontrollers (MCUs) are intelligent electronic devices used for performing

    operations. They deliver functions similar to those performed by a microprocessor (CPU)

    inside a computer. MCUs are slower and can address less memory than CPUs, but are

    designed for real-world control problems.

    The microcontroller used here is AT89C51 which is one of the members of family of

    8051microcontroller. So, let us know first about the 8051 microcontroller.

    1.3.1 A brief history of the 8051

    In 1981, Intel Corporation introduced an 8-bit microcontroller called the 8051. This

    microcontroller had 128 bytes of RAM , 4K bytes of on-chip ROM, two timers, one serial

    port, and four ports (each 8-bits wide) all on a single chip. At the time it was also referred to

    as a system on a chip. The 8051 is an 8-bit processor, meaning that the CCPU can work

    only 8 bits of data at a time. Data larger than 8 bits has to be broken in to 8-bit pieces to be

    processed by the CPU. The 8051 has a total of four I/O port, each 8-bit wide. Although the

    Note:ColumnH4isnormallynotavailable

    onatelephonekeypad.

    HIGHGROUPTONES

    LOWGROUP

    TONES

    H4=

    1633

    Hz

    H3=

    1477

    Hz

    H2=

    1336

    Hz

    H1=

    1209

    Hz

    L4=941Hz

    L3=852Hz

    L2=770Hz

    L1=697Hz

    D

    C

    B

    A

    #* 0

    987

    654

    321

    Figure1.3TonesassociatedwithkeysontelephoneDTMFkeypadmatrix

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    8051 can have a maximum of 64K bytes of on-chip ROM, many manufacturers have put

    only 4K bytes on the chip.

    The 8051 became widely popular after Intel allowed other manufacturers to make

    and market any flavor of the 8051 they please with the condition that they remain code-

    compatible with the 8051. This has led to many versions of 8051 with different speeds and

    amounts of on-chip ROM marketed by more than half a dozen manufacturers. It is

    important to note that although there are different flavors of the 8051 in terms of speed and

    amount of on-chip ROM, they are all compatible with the original 8051 as far as the

    instructions are concerned. This means that if you write your program for one, it will run on

    any one of them regardless of the manufacturer. The 8051 is the original member of the

    8051 family. Intel refers to it as MCS-51. Although the 8051 is the most popular member of

    the 8051 family, you will not see 8051 in the part number. This is because the 8051 is

    available in different memory types, such as UV-EPROM, flash, and NV-RAM, all of which

    have different part numbers.

    1.3.2 AT89C51 from Atmel Corporation

    This popular 8051 chip has on-chip ROM in the form of flash memory. This is ideal

    for fast development since flash memory can be erased in seconds compared to the twenty

    minutes or more needed for the 8751 (one of other members of the 8051 family). AT89C51

    is used in the place of the 8751 to eliminate the waiting time needed to erase the chip and

    thereby speed up the development time. To use the AT89C51 to develop a microcontroller-

    based system requires a ROM burner that supports flash memory: however, a ROM eraser is

    not needed. Notice that in flash memory you must erase the entire contents of ROM in

    order to program it again. This erasing of flash is done by the PROM burner itself and this is

    why a separate eraser is not needed. To eliminate the need for a PROM burner Atmel is

    working on a version of the AT89C51 that can be programmed via the serial COM port of

    an IBM PC.

    2. OVERVIEW

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    2.1 General block diagram of DTMF Remote Control System:

    2.2 Working mechanism

    The ring detector circuit detects ring signals that enable the unit to answer the call atright moment.

    The ring detector circuit is nothing but an optocoupler circuit. When the call is done, the LED in the optocoupler glows and the phototransistor

    sends a signal call of to the microcontroller.

    SWITCHING

    UNIT

    RING

    DETECTOR

    REMOTE

    TELEPHONE

    TELEPHONECONNECTED

    TOCONTROLLINGCIRCUIT

    5V&12VREGULATED

    POWERSUPPLY

    ON/OFFCONTROL

    CIRCUIT

    TELEPHONE

    INTERFACINGCIRCUIT

    DTMF

    DECODER

    MONOSTA

    BLE

    MULTIVIBRATOR

    89C51

    MICR

    OCONTROLLER

    Figure2.1

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    The microcontroller enables the switching unit to attend the call. (Electrically, it liftsthe call)

    The integrated DTMF receiver and decoder decodes the tone dialing codes or tonedialing frequencies received via the telephone line in to a bit pattern of 4-bit BCD

    code.

    Depending on the signals given through the DTMF keypad or a telephone keypad,the microcontroller fetches the instructions from the inbuilt EPROM and controls

    the devices connected through relays.

    For example,Suppose that you are going to control a coffee machine (let it be the device number

    one). Now to after the access code, if the key 1 is pressed twice, the device is switched ON,

    and it is switched OFF by pressing 1 and then 0. This is fed to the microcontroller in the

    form of an 8421 code.

    3. DTMF UNIT

    3.1 DTMF Tone Generator

    They stand for dual tone multi frequency. DTMF is the generic communications

    term for touch-tone. Touch-tone is a registered trademark of ATT; everyone in the

    communication industry refers it as DTMF. Our Touch-tone phone is technically a DTMF

    generator; it produces DTMF tones as we press the buttons.Many eons ago, the engineers at the Bell Lab figured out that the dial pulse system

    was not the best for long distances, reliability, using over microwave systems and so on.

    Their Research showed that you could use tones to represent the digits that the person was

    dialing. You could have a separate tone for each digit, but there is always a chance that a

    random sound will be on the same frequency and trip up the system. So, they reasoned, if

    you have two tones to represent a digit, then a false signal is likely to occur. This is the basis

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    for the Dual Tone in the DTMF. The basic details of the DTMF keypad matrix are already

    discussed in chapter.1.

    So when you press the digit 1 on your telephone you generate the tones 1209Hz &

    597Hz. So if you press the digit 2 will now generate the tones 1336Hz & 697Hz.Sure, the

    tone 697 Hz is the same but it takes two tones to make a digit and the telephone equipment

    knows the difference.

    3.2 8870 DTMF Receiver and Decoder

    3.2.1 Features:

    Complete DTMF receiver Low power consumption Internal gain setting amplifier Adjustable guard time Central office quality Power down mode Inhibit mode Backward compatible with 8870C/8870C-1

    3.2.2 Applications:

    Receiver system for British telecom

    Repeater systems/Mobile radio Credit card systems Remote control Personal computers Telephone answering machine

    3.2.3 Description:

    The 8870D/8870D-1 is a complete DTMF receiver integrating both the band split

    filter and digital decoder functions. The filter section uses switched capacitor techniques for

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    high and low group filters; the decoder uses digital counting techniques to detect and decode

    all 16 DTMF tone pairs into a 14 bit code. External component count is minimized by on

    chip provision of a differential input amplifier, clock oscillator and latched three state bus

    interfaces.

    3.2.4 Functional Block Diagram:

    Q4

    Q3

    Q2

    Q1

    TOALL

    CHIP

    CLOCKS

    ZEROCROSSING

    DETECTORS

    VRef

    BUFFER

    INH

    VRef

    VSS

    VDD

    CHIP

    BIAS

    CH

    IP

    POW

    ER

    TOE

    STD

    EST

    St/GT

    OSC2

    OSC1

    ST

    GT

    STEERING

    LO

    GIC

    CODE

    CONVERTER

    ANDLATCH

    DIGITAL

    DETECTION

    ALGORITHM

    DIAL

    TONE

    FILTER

    LOWGROUP

    FILTE

    R

    HIGHGROUP

    FILTE

    R

    BIAS

    CIRCUIT

    FIGURE3

    .1

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    3.2.5 Functional Description:

    The MT8870D/MT8870D-1 monolithic DTMF receiver offers small size, low

    power consumption and high performance. Its architecture consists of a band split filter

    section, which separates the high and low group tones, followed by a digital counting section

    which verifies the frequency and duration of the received tones before passing the

    corresponding code to the output bus.

    Filter Section

    Separation of the low-group and high group tones is achieved by applying the

    DTMF signal to the inputs of two sixth-order switched capacitor band pass filters, the

    bandwidths of which correspond to the low and high group frequencies. The filter section

    also incorporates notches at 350 and 440 Hz for exceptional dial tone rejection. Each filter

    output is followed by a single order switched capacitor filter section, which smoothes the

    signals prior to limiting. Limiting is performed by high-gain comparators, which are provided

    with hysteresis to prevent detection of unwanted low-level signals. The outputs of the

    comparators provide full rail logic swings at the frequencies of the incoming DTMF signals.

    Decoder Section

    Following the filter section is a decoder employing digital counting techniques to

    determine the frequencies of the incoming tones and to verify that they correspond to

    standard DTMF frequencies. A complex averaging algorithm protects against tone

    simulation by extraneous signals such as voice while providing tolerance to small frequency

    deviations and variations. This averaging algorithm has been developed to ensure an

    optimum combination of immunity to talk-off and tolerance to the presence

    of interfering frequencies (third tones) and noise. When the detector recognizes the presence

    of two valid tones (this is referred to as the signal condition in some industry specifications)

    the early Steering (ESt) output will go to an active state. Any subsequent loss of signal

    condition will cause ESt to assume an inactive state (see steering Circuit).

    Steering Circuit:

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    Before registration of a decoded tone pair, the receiver checks for a valid signal

    duration (referred to as character recognition condition). This check is performed by an

    external RC time constant driven by ESt. Logic high on ESt causes Vc to raise as the

    capacitor discharges. Provided signal VDD condition is maintained (ESt remains high) for

    the validation period (tGTP), Vc reaches the threshold (VTSt) of the steering logic to

    register the tone pair, latching its corresponding 4-bit code into the output latch. At this

    point the GT output is activated and drives Vc to VDD. GT continues to drive high as long

    as ESt remains high. Finally, after a short delay to allow the output latch to settle, the delayed

    steering output flag (StD) goes high, signaling that a received tone pair has been registered.

    The contents of the output latch are made available on the 4-bit output bus by raising the

    three state control input (TOE) to logic high. The steering circuit works in reverse to

    validate the interdigit pause between signals. Thus, as well as rejecting signals too short to be

    considered valid, the receiver will tolerate signal interruptions (dropout) too short to be

    considered a valid pause.

    Digit TOE INH Q4 Q3 Q2 Q1

    1 H X 0 0 0 1

    2 H X 0 0 1 0

    3 H X 0 0 1 1

    4 H X 0 1 0 0

    5 H X 0 1 0 1

    6 H X 0 1 1 0

    7 H X 0 1 1 1

    8 H X 1 0 0 0

    9 H X 1 0 0 1

    0 H X 1 0 1 0

    Figure 3.2 Steering circuit

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    . H X 1 0 1 1

    # H X 1 1 0 0

    A H L 1 1 0 1

    B H L 1 1 1 0

    C H L 1 1 1 1

    D H L 0 0 0 0

    Table 3.1 Functional decode table

    Guard Time Adjustment

    In many situations not requiring selection of tone duration and interdigital pause, the

    simple steering circuit is applicable. Component values are chosen according to the formula:

    tREC=tDP+tGTP

    tID=tDA+tGTA

    The value of tDP is a device parameter and tREC is the minimum signal duration to

    be recognized by the receiver. A value for C of 0.1 F is recommended for most

    applications, leaving R to be selected by the designer. Different steering arrangements may

    be used to select independently the guard times for tone present (tGTP) and tone absent

    (tGTA). This may be necessary to meet system specifications, which place both, accept and

    reject limits on both tone duration and interdigital pause. Guard time adjustment also allows

    the designer to tailor system parameters such as talk off and noise immunity. Increasing

    tREC improves talk-off performance since it reduces the probability that tones simulated by

    speech will maintain signal condition long enough to be registered. Alternatively, a relatively

    short tREC with a long tDO would be appropriate for extremely noisy environments where

    fast acquisition time and immunity to tone drop-outs are required. The 8870 DTMF IC

    consists of both the receiver and the decoder. The given frequency is decoded by means of a

    filter section and a decoder section and converted to the corresponding 8421 code by the IC

    to represent the key that has been pressed. This code acts as the input to the

    microcontroller. The microcontroller accepts the 8421 code as input. It is programmed to

    perform a specific operation for each possible key that may be pressed.

    For example,

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    Suppose that you are going to control a coffee machine (let it be the device number

    one). Now to after the access code, if the key 1 is pressed twice, the device is switched ON,

    and it is switched OFF by pressing 1 and then 0.

    4. MASTER UNIT

    4.1 Master Circuit of DTMF Remote Control System:

    17

    16

    1

    5 14

    13

    12

    11

    10

    8

    7

    654321

    4K7

    4K7

    4K7

    4K7

    4K7

    4K7

    4K7

    R23

    R22

    R21

    R20

    R19

    R18

    R17

    T3

    R16

    911

    10

    13

    651284

    1

    3

    21MR12

    10V

    4m7

    C7

    IC4

    CD4047 RSTQQ

    OSC

    CX

    RX

    RCC

    AST

    -TRET

    +T

    AST

    5V

    4M7R15

    100n

    C8

    D10

    390R14

    BC516

    1M

    2K7

    R13

    R11

    RELAY

    CIRCUIT

    IC3ULN2003A12V

    16

    15

    1413

    1211

    10

    9 8

    7654321

    OUT7

    OUT6

    OUT5

    OUT4

    OUT3

    OUT2

    OUT1

    IN7

    IN6

    IN5

    IN4

    IN3

    IN2

    IN1

    M8870

    IC2ST

    /G

    T

    OE

    ICICVREF

    GS

    IN-

    IN+

    OSC2

    OSC1

    Q4

    Q3

    Q2

    Q1

    STD

    EST

    D9

    D8

    3.579545MHz

    X1

    270KR36

    100n

    C18

    R10

    10K

    10m10V

    C4

    5V

    5V

    5V

    5V

    5V

    100n

    5V

    C11

    47p

    47p

    C6

    C5

    X2

    18

    19

    20

    X2

    X14

    0 IC189C51

    TXD

    RXD

    INT1

    INT0

    P1.7

    P1.6

    T1

    T0

    P1.5

    P1.4

    P1.3

    P1.2

    P1.1/T

    2X

    P1.0/T

    2

    RESET

    15

    14

    13

    12

    11

    109 87654321

    EA/V

    P

    33

    34

    35

    36

    37

    38

    39

    P0.6

    P0.5

    P0.4

    P0.3

    P0.2

    P0.1

    P0.0

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    4.2 CIRCUIT OPERATION:

    The heart of the circuit diagram is formed by an 89C51 micro controller. The

    computer control section sits between a telephone interface circuit and a power switching

    interface. The integrated DTMF decoder MV8870 decodes the tone dialing codes received

    via telephone line.

    The telephone line interface consists of two parts: one to detect the ring signals that

    enables the unit to answer the call at the right moment, and another to receive and transmit

    tones via the telephone lines

    The ringing signal detector is relatively simple. A bridge rectifier, D3-D6, connected

    to the telephone lines turns the ringing signal into a pulsating direct voltage, which is

    smoothened by C3, and limited, to 15V with the aid of zener diode D7. The direct voltage

    across D7 supplies the LED in optocoupler IC, with resistor R9 acting as current limiter.

    During the ringing signal, the collector of the photo transistor in the optocoupler

    (pin 8) is at ground potential. The microcontroller interrogates the state of the optocoupler

    output signal via port line P1.7. To suppress error pulses, the low level at the optocoupler is

    also used to trigger monostable multivibrator IC. The MMVs mono time is started by the

    ringing signal, and supplies a logic high level to microcontroller pin INT0/P3.2 for about ten

    seconds. This is the period available for transmitting codes to the switching unit. As long as

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    the circuit has not lifted the receiver, i.e., as long as relay Re1 is not energized, the MMV is

    triggered again via the RET connection.

    The coupling with R7-C2 ensures that the ringing signal detector responds to

    alternating voltage only. Any direct voltage levels that may exist between terminals a and b

    are ignored.

    When the microcontroller has counted the preprogrammed number of ringing

    pulses, it responds by pulling output P1.6 logic high, which causes relay Re1 to be energized

    via R6 and T1. This means that the switching unit lifts the receiver, i.e., answers the call.

    This energizes the relay coil connected to the telephone lines. The current flowing through

    this network is sufficiently large to maintain the connection. One end of the transformer

    secondary winding is connected to the positive supply voltage via R1, while the other end is

    connected to the ground via R2 and T2. This means that rectangular voltages generated by

    the controller on line T0/P3.4 are coupled directly on to the telephone network lines. Two

    zener diodes D1and D2 limit the voltage across the secondary winding to safe levels.

    The received DTMF signals are capacitively coupled to the decoder. The external

    components that enable the M8870 DTMF decoder to operate reliably are limited to four

    resistors, a capacitor and a quartz crystal. The four decoder outputs, Q1 to Q4, supply a bit

    pattern that corresponds to the received DTMF number, sign or letter. The structure of the

    bit pattern is given in the table below. The 4-bit DTMF code is applied to the

    microcontroller via port lines P1.0 to P1.3.

    The microcontroller has its external address (EA) line tied to ground, and fetches

    instructions from the inbuilt 128x8-bit internal RAM. The only two user programmable

    parameters, the number of ringing signals and the access code are also stored in the internal

    RAM. The output ports P0.0 to P0.6 are used to control relays through ULN2003A IC

    (Relay driver IC) based on the keys pressed on the DTMF keypad. All the relays are

    commoned to the 12v positive supply. The circuit diagram associated with relay connections

    is shown in the figure.4.2.

    RL1

    12V

    LOAD

    N/O

    N/C

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    The power supply of the telephone controlled switch is conventional, and based on

    fixed voltage regulator. The 12V and 5V supply voltages are used for the relay sections and

    are derived from a mains transformer with secondary voltage of 12V. The corresponding

    circuit diagram is shown in the figure below.

    12V

    1

    2

    3

    230VAC

    50Hz

    Tr2

    B1 -+

    1000m

    C25

    5VIC7805

    Figure 4.2 Relay circuit

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    5. SOFTWARE CODING

    5.1 Algorithm:

    Step 1: Start

    Step 2: Initialize data required

    Step 3: If the data logic ready signal is high, go to step 4

    Else go to step 3

    Step 4: Read the keys equivalent of BCD code received

    Step 5: If it is 11, go to step 6

    Else if it is 10, go to step 7

    Else if it is 21, go to step 8

    Else if it is 20, go to step 9

    Else if it is 31, go to step 10

    Else if it is 30, go to step 11

    Else if it is 41, go to step 12

    Else if it is 40, go to step 13

    Else if it is 51, go to step 14

    Else if it is 50, go to step 15

    Else if it is 61, go to step 16

    Else if it is 60, go to step 17

    Else if it is 71, go to step 18

    Figure 4.3 Power supply circuit

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    Else if it is 70, go to step 19

    Else if it is 81, go to step 20

    Else if it is 80, go to step 21

    Else if it is *1, go to step 22

    Else if it is *2, go to step 24

    Else, go to step 25

    Step 6: Switch ON device number 1

    Step 7: Switch OFF device number 1

    Step 8: Switch ON device number 2

    Step 9: Switch OFF device number 2

    Step 10: Switch ON device number 3

    Step 11: Switch OFF device number 3

    Step 12: Switch ON device number 4

    Step 13: Switch OFF device number 4

    Step 14: Switch ON device number 5

    Step 15: Switch OFF device number 5

    Step 16: Switch ON device number 6

    Step 17: Switch OFF device number 6

    Step 18: Switch ON device number 7

    Step 19: Switch OFF device number 7

    Step 20: Switch ON all devices

    Step 21: Switch OFF all devices

    Step 22: If it is #, go to step 23

    Else, read and store the data

    Step 23: Disable the personal access code

    Step 24: Read and store the data

    Step 25: If it is n2 (1

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    5.2 Flow chart:

    A

    START

    INITIALIZEREQUIREDDATA

    CHECK

    LOGICREADY

    READTHECORRESPONDINGKEYS

    OFTHEBCDCODERECEIVED

    SWITCHON

    DEVICENO.1

    SWITCHOFF

    DEVICENO.1

    SWITCHON

    DEVICENO.2

    SWITCHON

    DEVICENO.3

    SWITCHOFF

    DEVICENO.3

    SWITCHOFF

    DEVICENO.2

    CHECK

    IF

    11OR10

    CHECK

    IF

    21OR20

    CHECK

    IF

    31OR30

    LOW

    HIGH

    1011

    2021

    NO

    NO

    NO

    3031

    A

    SWITCHOFF

    DEVICENO.4

    SWITCHON

    DEVICENO.4

    SWITCHONDEVICENO.5

    SWITCHOFFDEVICENO.5

    SWITCHOFF

    DEVICENO.6

    SWITCHON

    DEVICENO.6

    CHECK

    IF

    41OR40

    CHECK

    IF

    51OR50

    CHECK

    IF

    61OR60

    CHECK

    IF

    71OR70

    NO

    NO

    NO

    71 70

    61 60

    50

    40

    51

    41

    B

    SWITCHOFF

    ALLDEVICES

    SWITCHON

    ALLDEVICES

    CHECKIF

    81OR80

    8081

    NO

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    5.3 Assembly Language Program:

    RAM0 DATA 30HRAM1 DATA 31H

    RAM2 DATA 32HRAM3 DATA 33HRAM4 DATA 34HRAM5 DATA 35HRAM6 DATA 36HRAM7 DATA 37HRAM8 DATA 38HRAM9 DATA 39HRAMA DATA 3AH

    ORG 00HLJMP J1LCALL SUB1LJMP J2

    ORG 0009HSUB1: CLR EA

    RETIORG 0100H

    J1:MOV A,#0FFH ; MOV DPTR,#8000HMOV P0,A ; CLR A

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    ;MOVX @DPTR,ACLR AMOV RAM1,A

    INC AMOV RAM2,AINC AMOV RAM3,AINC AMOV RAM4,AINC AMOV RAM5,AINC AMOV RAM6,AINC A

    MOV RAM7,AMOV RAM8,#0CHMOV RAM0,#06H

    J2: MOV SP,#07HLCALL SUB2LCALL SUB3

    J3: LCALL SUB4JB P1.7,J3

    J4: JB P1.7,J4LCALL SUB3JB P1.7,J4

    JNB P1.7,$LCALL SUB3DJNZ R0,J4SETB P1.6LCALL SUB3LCALL SUB4LCALL SUB5LCALL SUB3LCALL SUB3LCALL SUB3LCALL SUB3LCALL SUB3LCALL SUB4MOV A,#0CHCJNE A,RAM2,J5LCALL SUB5LJMP J6

    J5: LCALL SUB6CJNE A,RAM2,J7MOV A,#0CHCJNE A,RAM3,J8LCALL SUB5LJMP J6

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    J8: LCALL SUB6CJNE A,RAM3,J7MOV A,#0CH

    CJNE A,RAM4,J9LCALL SUB5LJMP J6

    J9: LCALL SUB6CJNE A,RAM4,J7MOV A,#0CHCJNE A,RAM5,J10LCALL SUB5LJMP J6

    J7: LCALL SUB7LJMP J2

    J10: LCALL SUB6CJNE A,RAM5,J7MOV A,#0CHCJNE A,RAM6,J11LCALL SUB5LJMP J6

    J11: LCALL SUB6CJNE A,RAM6,J7MOV A,#0CHCJNE A,RAM7,J12LCALL SUB5

    LJMP J6J12: LCALL SUB6CJNE A,RAM7,J7MOV A,#0CHCJNE A,RAM8,J13LCALL SUB5LJMP J6

    J13: LCALL SUB6CJNE A,RAM8,J7MOV A,#0CHCJNE A,RAM9,J14LCALL SUB5LJMP J6

    J14: LCALL SUB6CJNE A,RAM9,J7MOV A,#0CHCJNE A,RAMA,J7LCALL SUB5LJMP J6

    J6: LCALL SUB6CJNE A,#01,J50LCALL SUB6CJNE A,#0AH,J51

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    MOV A,RAM1ANL A,#0FEHMOV RAM1,A

    LCALL SUB8LCALL SUB7LJMP J6

    J51: CJNE A,#01,J15MOV A,RAM1ORL A,#01MOV RAM1,ALCALL SUB8LCALL SUB5LJMP J6

    J15: CJNE A,#02,J52

    MOV A,RAM1ANL A,#01JNZ J53LCALL SUB7LJMP J6

    J53: LCALL SUB5LJMP J6

    J52: LJMP J2J50: CJNE A,#02,J16

    LCALL SUB6CJNE A,#0AH,J17

    MOV A,RAM1ANL A,#0FDHMOV RAM1,ALCALL SUB8LCALL SUB7LJMP J6

    J17: CJNE A,#01, J18MOV A,RAM1ORL A,#02MOV RAM1,ALCALL SUB8LCALL SUB5LJMP J6

    J18: CJNE A,#02,J19MOV A,RAM1ANL A,#02JNZ J54LCALL SUB7LJMP J6

    J54: LCALL SUB5LJMP J6

    J19: LJMP J2J16: CJNE A,#03,J20

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    J58: LCALL SUB5LJMP J6

    J34: LJMP J2

    J31: CJNE A,#07,J35LCALL SUB6CJNE A,#0AH,J36MOV A,RAM1ANL A,#0BFHMOV RAM1,ALCALL SUB8LCALL SUB7LJMP J6

    J36: CJNE A,#01,J37MOV A,RAM1

    ORL A,#40HMOV RAM1,ALCALL SUB8LCALL SUB5LJMP J6

    J37: CJNE A,#02,J38MOV A,RAM1ANL A,#40HJNZ J60LCALL SUB7LJMP J6

    J60: LCALL SUB5LJMP J6J38: LJMP J2J35: CJNE A,#08,J39

    LCALL SUB6CJNE A,#0AH,J40MOV A,#00MOV RAM1,ALCALL SUB8LCALL SUB7LJMP J6

    J40: CJNE A,#01,J39MOV A,RAM1ORL A,#01MOV RAM1,ALCALL SUB8LCALL SUB3MOV A,RAM1ORL A,#02MOV RAM1,ALCALL SUB8LCALL SUB3MOV A,RAM1

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    ORL A,#04MOV RAM1,ALCALL SUB8

    LCALL SUB3MOV A,RAM1ORL A,#08MOV RAM1,ALCALL SUB8LCALL SUB3MOV A,RAM1ORL A,#10HMOV RAM1,ALCALL SUB8LCALL SUB3

    MOV A,RAM1ORL A,#20HMOV RAM1,ALCALL SUB8LCALL SUB3MOV A,RAM1ORL A,#40HMOV RAM1,ALCALL SUB8LCALL SUB5LCALL SUB4

    LJMP J6J39: CJNE A,#0BH,J42LCALL SUB6CJNE A,#01,J44LCALL SUB5LCALL SUB11LJMP J6

    J44: CJNE A,#02,J43LCALL SUB5LCALL SUB12LJMP J6

    J43: CJNE A,#03,J42LCALL SUB13LJMP J6

    J42: LCALL SUB7LJMP J2ORG 0466H

    SUB4:MOV IEN0,#00SETB P1.5CLR P1.5MOV IEN0,#81HRET

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    ORG 0471H

    SUB3:

    MOV R6,#0B1HJ62: MOV R7,#0FFH

    DJNZ R7,$DJNZ R6,J62RET

    ORG 047AHSUB2:

    MOV IEN0,#00MOV P1,#0BFHMOV R0,RAM0RET

    ORG 0483HSUB9:

    MOV R5,#03J64: MOV R6,#0FFHJ63: MOV R7,#0FFH

    SETB P3.4DJNZ R7,$MOV R7,#0FFHCLR P3.4DJNZ R7,$DJNZ R6,J63

    DJNZ R5,J64RETORG 0498H

    SUB8:CPL AMOV P0,A ;MOV DPTR,#8000H

    ;MOVX @DPTR,ARET

    ORG 049DHSUB6:

    JNB P1.4,$MOV A,P1ANL A,#0FHJB P1.4,$LCALL SUB4RET

    ORG 04ABH

    ORG 04BCHSUB7:

    LCALL SUB9LCALL SUB9

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    RETORG 04C3H

    SUB11:

    MOV R1,#41HJ66: LCALL SUB6

    LCALL SUB10CJNE A,#0CH,J65MOV @R1,A

    J67: MOV RAM2,41HMOV RAM3,42HMOV RAM4,43HMOV RAM5,44HMOV RAM6,45HMOV RAM7,46H

    MOV RAM8,47HMOV RAM9,48HMOV RAMA,49HLCALL SUB5RET

    J65:MOV @R1,AINC R1CJNE R1,#49H,J66MOV @R1,#0CHLJMP J67

    ORG 04F8HSUB12:

    LCALL SUB6CJNE A,#01,J68LJMP J69

    J68: CJNE A,#02,J70LJMP J69

    J70: CJNE A,#0AH,J71CLR A

    J69: RLC ARLC ARLC ARLC AMOV 41H,ALCALL SUB10LCALL SUB6CJNE A,#01,J72LJMP J73

    J72: CJNE A,#02,J74LJMP J73

    J74: CJNE A,#03,J75LJMP J73

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    J75: CJNE A,#04,J76LJMP J73

    J76: CJNE A,#05,J77

    LJMP J73J77: CJNE A,#06,J78

    LJMP J73J78: CJNE A,#07,J79

    LJMP J73J79: CJNE A,#08,J80

    LJMP J73J80: CJNE A,#09,J71J73: ADD A,41H

    MOV RAM0,ALCALL SUB5

    RETJ71: LCALL SUB7

    RETSUB14: MOV A,#05J82: LCALL SUB3

    DEC AJNZ J82RET

    ORG 055FHSUB13:

    LCALL SUB6J83: MOV 41H,ALCALL SUB10LCALL SUB14MOV A,41HDEC AJNZ J83RET

    END

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    6. CONCLUSION

    This project has primarily dealt with the control of home appliances using a

    telephone line. The choice of DTMF technology (which is used by the DTMF telephone

    line) over conventional RF technology has resulted in our model possessing superior features

    in the following ways

    Significantly lower cost. Use of a universally accepted technology. No imposition of limit on the distance. Relatively free from interference problems.

    We have used this telephone line method to place a call to another phone, which is

    connected to the main controlling circuit. When picked up, any key pressed generates a

    complex frequency or touch-tone. This is then decoded by means of a DTMF circuit to give

    the key pressed. This is given to the microcontroller, which then gives instructions to

    perform the task required. Thus, we see the model has been built using components, which

    are not only widely available, but also relatively cheap. A noteworthy point about this project

    is its wide and varied applications. As this process of controlling things using telephone linecould be used not only in industrial applications, but also domestic ones, this project has

    proved its ability to be used in a variety of applications.

    6.1 Future Enhancement

    Its utility is further enhanced by using devices such as LCDs etc mounted on the

    main circuit. The areas in which this model finds applications includes Caller IDs, Answering

    Machines.

    6.2 Applications

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    One of the primary applications of this project is the process of operation is very simple,

    so that every person could operate it very easily.

    Another important application of this is its wide use in industrial area. Not only inindustrial area, it can also be used widely in domestic applications.

    The applications of this project also extend in making caller IDs, AnsweringMachines, etc.

    Thus, it is seen that this project has not only proved itself superior in terms of

    effectiveness and cost, but also has utility in innumerable applications.

    Appendix 1

    Microcontroller: AT89C51

    Features

    Compatible with MCS-51 Products 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Programmable Serial Channel

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    Low-power Idle and Power-down Modes

    Description

    The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with

    4K bytes of Flash programmable and erasable read only memory (PEROM). The device is

    manufactured using Atmels high-density nonvolatile memory technology and is compatible

    with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the

    program memory to be reprogrammed in-system or by a conventional nonvolatile memory

    programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel

    AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective

    solution to many embedded control applications.

    Pin Diagram

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    The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes

    of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt

    architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the

    AT89C51 is designed with static logic for operation down to zero frequency and supports

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    Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output

    buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled

    high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are

    externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2

    emits the high-order address byte during fetches from external program memory and during

    accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this

    application, it uses strong internal pull-ups when emitting 1s. During accesses to external

    data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2

    Special Function Register. Port 2 also receives the high-order address bits and some control

    signals during Flash programming and verification.

    Port 3

    Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output

    buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled

    high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are

    externally being pulled low will source

    current (IIL) because of the pull-ups. Port 3 also serves the functions of various special

    features of the AT89C51 as listed below:

    Port 3 also receives some control signals for Flash programming and verification.

    RST

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    Reset input. A high on this pin for two machine cycles while the oscillator is running

    resets the device.

    ALE/PROG

    Address Latch Enable output pulse for latching the low byte of the address during

    accesses to external memory. This pin is also the program pulse input (PROG) during Flash

    programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator

    frequency, and may be used for external timing or clocking purposes. Note, however, that

    one ALE pulse is skipped during each access to external Data Memory. If desired, ALE

    operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is

    active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.

    Setting the ALE-disable bit has no effect if the microcontroller is in external execution

    mode.

    PSEN

    Program Store Enable is the read strobe to external program memory. When the

    AT89C51 is executing code from external program memory, PSEN is activated twice each

    machine cycle, except that two PSEN activations are skipped during each access to external

    data memory.

    EA/VPP

    External Access Enable. EA must be strapped to GND in order to enable the device

    to fetch code from external program memory locations starting at 0000H up to FFFFH.

    Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA

    should be strapped to VCC for internal program executions. This pin also receives the 12-

    volt programming enable voltage (VPP) during Flash programming, for parts that require

    12-volt VPP.

    XTAL1

    Input to the inverting oscillator amplifier and input to the internal clock operating

    circuit.

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    XTAL2

    Output from the inverting oscillator amplifier.

    Appendix 2

    CD4047BC

    Low Power Monostable/Astable Multivibrator

    General Description

    The CD4047B is capable of operating in either the monostable or astable mode. It

    requires an external capacitor (between pins 1 and 3) and an external resistor (between pins 2

    and 3) to determine the output pulse width

    in the monostable mode, and the output frequency in the astable mode. Astable operation is

    enabled by a high level on the astable input or low level on the astable input. The output

    frequency (at 50% duty cycle) at Q and Q outputs is determined by the timing components.

    A frequency twice that of

    Q is available at the Oscillator Output; a 50% duty cycle is not guaranteed.

    Monostable operation is obtained when the device is triggered by LOW-to-HIGH transition

    at trigger input or HIGH-to-LOW transition at

    trigger input. The device can be

    retriggered by applying a simultaneous LOW-to-HIGH transition to both the trigger and

    retrigger inputs. A high level on Reset input resets the outputs Q to LOW, Q to high.

    Monostable Multivibrator Features

    Positive- or negative-edge trigger Output pulse width independent of trigger pulse duration Retriggerable option for pulse width expansion Long pulse widths possible using small RC components by means of external

    counter provision

    Fast recovery time essentially independent of pulse width Pulse-width accuracy maintained at duty cycles approaching 100%

    Astable Multivibrator Features

    Free-running or gettable operating modes

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    50% duty cycle Oscillator output available Good astable frequency stability typical+/-2% 0.03%/`C @ 100 kHz

    frequency+/-0.5% 0.015%/`C @ 10 kHz deviation (circuits trimmed

    to frequency VDD=10V +/-10%)

    Features

    Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 VDD (typ.)

    Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS

    Special Features

    Low power consumption: special CMOS oscillator configuration Monostable (one-shot) or astable (free-running) operation True and complemented buffered outputs Only one external R and C required

    Applications

    Frequency discriminators Timing circuits Time-delay applications Envelope detection Frequency multiplication Frequency division

    Pin Diagram CD4047

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    Functional Block Diagram

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    Appendix 3

    ULN2003A-ULN2004A

    ULN2001A-ULN2002A

    SEVEN DARLINGTON ARRAYS

    Seven darlingtons per package Output current 500mA per driver (600mA peak) Output voltage 50V Integrated suppression diodes for inductive loads Outputs can be paralleled for higher current TTL/CMOS/PMOS/DTL compatible inputs Inputs pinned opposite outputs to simplify layout

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    DESCRIPTION

    The ULN2001A, ULN2002A, ULN2003 and ULN2004A are high voltage, high

    current Darlington arrays each containing seven open collector Darlington pairs with

    common emitters. Each channel rated at 500mA and can withstand peak currents of 600mA.

    Suppression diodes are included for inductive load driving and the inputs are pinned

    opposite the outputs to simplify board layout.

    The four versions interface to all common logic families:

    These versatile devices are useful for driving a wide range of loads including

    solenoids, relays DC motors; LED displays filament lamps, thermal printheads and high

    power buffers. The ULN2001A/2002A/2003A and 2004A are supplied in 16 pin plastic

    DIP packages with a copper lead frame to reduce thermal resistance. They are available also

    in small outline package (SO-16) as ULN2001D/2002D/2003D/2004D.

    Pin Connection

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    REFERENCES

    Books

    1. Muhammad Ali Mazidi & Janice Gillispie Mazidi (2005), The 8051 MicrocontrollerAnd Embedded Systems, Pearson Education.

    2. Kirk Zurell (2000), C Programming For Embedded systems, CMP Books, Edition2.

    Periodicals

    1. Electronics For You2. Elector India Electronics

    Websites

    1. http://www.eletronicsforu.com2. http://www.programmers heaven.com3. http://www.alldatasheets.com4. http://www.electorindiaelectronics.com