DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by...

34
8 2 1 3 4 5 6 7 A B C A B C D SHEET SIZE 7 RELEASE DATE SCALE DRAWING NO NONE DESIGN ACTIVITY APPROVAL OF 6 1 3 CONTRACT NO. ENGINEER QUALITY ASSURANCE 4 5 8 2 CONFIGURATION DESIGN APPROVAL PROJECT ENGINEER REV DRAWN BY D LM25-P0436-1 TITLE DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C 33 1 A TITLE DragonBoard 410c 14.6.2017 COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED. USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

Transcript of DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by...

Page 1: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

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1

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TITLE

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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13/05/2015:10:40

TITLE

DragonBoard 410c

14.6.2017

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

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Table_Of_Contents

SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC SHEET BLOCK SCHEMATIC1 \2 \3 \4 \5 \6 \7 \8 \9 \10 \11 \12 \13 \14 \15 \16 \17 \18 \19 \20 \21 \22 \23 \24 \25 \26 \27 \28 \29 \30 \31 \32 \33 \

TITLETABLE_OF_CONTENTSAPQ8016 - CONTROLAPQ8016 - EBI0-LPDDR3APQ8016 - GPIO 0-73APQ8016 - GPIO 74-121 / DNC APQ8016 - BOOT CONFIG SW APQ8016 - MIPI CSI/DSIAPQ8016 - RF INTERFACEAPQ8016 - PWR1APQ8016 - PWR2APQ8016 - PWR3APQ8016 - GNDAPQ8016 - DECOUPLINGEXTERNAL BUCK REGULATORS PM8916 - CONTROL/CLOCKS PM8916 - CHARGER/GPIOS/MPPS PM8916 - SMPSPM8916 - LDOSPM8916 - AUDIOMEMORY - LPDDR3 + EMMC - CONTR MEMORY - LPDDR3 + EMMC - POWER MEMORY - USD CONNECTORUSB - SWITCH / HUBUSB - CONNECTORSDISPLAY - DSI SWITCHDISPLAY - DSI TO HDMI BRIDGE SWITCHES/LEDSHS / LS EXPANSION CONNECTORS JTAG / UART / ANALOG EXPANSION WCN3620 - RF / CONTROLWCN3620 - PWR / GNDWGR7640 - GPS

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LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

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13/05/2015:10:401 LAST_EDITOR

SDC2_DATA_0

SDC2_DATA_1

SDC2_DATA_2

SDC2_DATA_3

SLEEP_CLK

SRST_N

TCK

TDI

TDO

TMS

TRST_N

SDC1_CLK

RESOUT_N

RESIN_N

MODE_0

PS_HOLD

PMIC_SPMI_DATA

PMIC_SPMI_CLKDNC

MODE_1

CXO

DNC

DNC

CXO_EN

WLAN_XO

VREF_EBI0_D0_D2

VREF_EBI0_CA

VREF_EBI0_D1_D3

USB2_HS_DM

USB2_HS_DP

NC

USB2_HS_TXRTUNE

USB2_HS_SYSCLOCK

SDC1_CMD

SDC1_DATA_0

SDC1_DATA_1

SDC1_DATA_2

SDC1_DATA_3

SDC1_DATA_4

SDC1_DATA_5

SDC1_DATA_6

SDC1_DATA_7

SDC2_CLK

SDC2_CMD

CONTROL

P3

R6

T7

P7

G36

K1

M1

M3

J2

L2

K3

AE36

AY35

BA36

A36

AV1

F35

AU32

E36

AJ36

AK37AN8

AT31

AL34

AR8

H21

J12

J26

AA40

AD35

AC40

AB39

AC38

AE38

AG34

AH37

AG40

AG38

AF39

AF35

R4

N6

AD37

AH35

APQ8016

U8

R2 0

C1

0.1UF

0R3

33PF

C2

DNI

BBCLK1

BBCLK1

SPMI_DATA

SDC1_CLK

VREF_LPDDR3

SPMI_CLK

APQ_RESIN_N

USB_HS_D_P

USB_HS_D_M

SDC1_DATA_1

SDC1_DATA_3

SDC1_DATA_4

SDC1_DATA_5

SDC1_DATA_6

SDC1_DATA_7

SDC1_DATA_2

SDC1_DATA_0

JTAG_SRST_N

JTAG_TMS

JTAG_TRST_N

JTAG_TDI

JTAG_TCK

APQ_BBCLK1_EN

APQ_RESOUT_N

JTAG_TDO

APQ_PS_HOLD

SLEEP_CLK SDC1_CMD

SDC2_CLK

SDC2_DATA_1

SDC2_DATA_2

SDC2_DATA_0

SDC2_CMD

SDC2_DATA_3

NC

CAD NOTE: Place R2, R3 close to APQ pin

CAD NOTE: Place R80 close to APQ pin

Install C2, C173 if SPMI_DATA/CLK signrals requires slew control

Route BBCLK1 as daisy chain.AD35 pin first and then AL34 second

NC

NC

NC

33PF

C173

DNI

R80

200

1%

USB2_HS_TXRTUNE

TP17

16-C7

16-C7,3-C6

21-C6

30-C7

16-C7

16-C7

21-C3

21-C3

21-C6

23-C6

21-C3

21-C3

21-C3

21-C3

23-C6

30-C7

16-C7

21-C3

30-B7,30-C7

16-C2,22-C8

24-C5

23-C630-C7

30-B6,30-C7

21-C7

16-C7,3-B3

23-C6

23-C6

16-C7

23-C6

21-C3

24-C5

30-C7

16-C2

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LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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EBI0_DQ_18

EBI0_DQ_19

EBI0_DQ_2

EBI0_DQ_20

EBI0_DQ_21

EBI0_DQ_22

EBI0_DQ_23

EBI0_DQ_24

EBI0_DQ_25

EBI0_DQ_26

EBI0_DQ_27

EBI0_DQ_28

EBI0_DQ_29

EBI0_DQ_3

EBI0_DQ_30

EBI0_DQ_31

EBI0_DQ_4

EBI0_DQ_5

EBI0_DQ_6

EBI0_DQ_7

EBI0_DQ_8

EBI0_DQ_9

EBI0_DQS_0

EBI0_DQS_1

EBI0_DQS_2

EBI0_DQS_3

EBI0_DQSB_1

EBI0_DQSB_0

EBI0_DQSB_2

EBI0_DQSB_3

EBI0_DQ_11

EBI0_DQ_10

EBI0_DQ_1

EBI0_DQ_0

EBI0_DM_3

EBI0_DM_2

EBI0_DM_1

EBI0_DM_0

EBI0_CA_0

EBI0_CA_1

EBI0_CA_2

EBI0_CA_3

EBI0_CA_4

EBI0_CA_5

EBI0_CA_6

EBI0_CA_7

EBI0_CA_8

EBI0_CA_9

EBI0_CAL

EBI0_CK

EBI0_CKB

EBI0_CKE_0

EBI0_CS_N_0

EBI0_CS_N_1

EBI0_CKE_1

EBI0_DQ_12

EBI0_DQ_13

EBI0_DQ_14

EBI0_DQ_15

EBI0_DQ_16

EBI0_DQ_17

EBI0

U8

APQ8016

B17

B15

E30

D29

C28

A30

A10

D15

C14

A20

B33

B21

D23

A34

E34

B35

D21

D35

C34

F33

C36

E16

D17

B23

A26

B29

B25

D19

D31

D25

E26

E18

E32

C24

A24

E28

C26

B13

C12

E6

E8

C6

D9

E10

B19

E24

F23

B31

E22

E20

D13

A8

B7

B9

D11

E14

F11

C10

B11

A14

A18

EBI_DQ(31:0)

R4

1% 0.050W

240

EBI_CKB

EBI_DQSB_3

EBI_CS0_N

EBI_CS1_N

EBI_CKE_0

EBI_DQS_2

EBI_DQS_1

EBI_DQSB_1

EBI_DQS_0

EBI_CK

EBI_DQS_3

EBI_DQSB_0

EBI_DQSB_2

EBI_CKE_1

EBI_DM(3)

EBI_DM(2)

EBI_DM(1)

EBI_DM(0)

EBI_CA(9)

EBI_CA(8)

EBI_CA(7)

EBI_CA(6)

EBI_CA(5)

EBI_CA(4)

EBI_CA(3)

EBI_CA(2)

EBI_CA(1)

EBI_CA(0)

EBI_DQ(0)

EBI_DQ(1)

EBI_DQ(10)

EBI_DQ(11)

EBI_DQ(12)

EBI_DQ(13)

EBI_DQ(14)

EBI_DQ(15)

EBI_DQ(16)

EBI_DQ(17)

EBI_DQ(18)

EBI_DQ(19)

EBI_DQ(2)

EBI_DQ(20)

EBI_DQ(21)

EBI_DQ(22)

EBI_DQ(23)

EBI_DQ(24)

EBI_DQ(25)

EBI_DQ(26)

EBI_DQ(27)

EBI_DQ(28)

EBI_DQ(29)

EBI_DQ(3)

EBI_DQ(30)

EBI_DQ(31)

EBI_DQ(4)

EBI_DQ(5)

EBI_DQ(6)

EBI_DQ(7)

EBI_DQ(8)

EBI_DQ(9)

EBI_DM(3:0)

EBI_CA(9:0)

CAD NOTE: Place R4 close to APQ PinEBI_CAL

21-C3

21-C6

21-B6

21-C6

21-C6

21-C6

21-B6

21-B6

21-B6

21-B6

21-B7

21-C6

21-B6

21-B6

21-C7

21-B6

21-C6

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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5APQ8016 - GPIO 0-73

AD

LAST_EDITOR

GPIO_27

GPIO_26

GPIO_25

GPIO_24

GPIO_23

GPIO_22

GPIO_21

GPIO_20

GPIO_2

GPIO_19

GPIO_4

GPIO_40

GPIO_41

GPIO_42

GPIO_43

GPIO_44

GPIO_45

GPIO_46

GPIO_47

GPIO_48

GPIO_9

GPIO_58

GPIO_59

GPIO_6

GPIO_60

GPIO_61

GPIO_62

GPIO_63

GPIO_64

GPIO_65

GPIO_66

GPIO_67

GPIO_68

GPIO_69

GPIO_7

GPIO_70

GPIO_71

GPIO_72

GPIO_73

GPIO_8

GPIO_28

GPIO_11

GPIO_49

GPIO_5

GPIO_50

GPIO_51

GPIO_52

GPIO_53

GPIO_54

GPIO_55

GPIO_56

GPIO_57

GPIO_12

GPIO_18

GPIO_17

GPIO_13

GPIO_14

GPIO_15

GPIO_16

GPIO_10

GPIO_1

GPIO_0

GPIO_29

GPIO_3

GPIO_30

GPIO_31

GPIO_32

GPIO_33

GPIO_34

GPIO_35

GPIO_36

GPIO_37

GPIO_38

GPIO_39

GPIO1

C4

E4

BC2

B37

APQ8016

U8

L38

J40

AV3

AN38

AR38

L36

AJ38

AK35

AL40

A4

D1

G4

F5

D3

B3

AY37

F3

BA38

K7

H1

BB39

AN36

G6

AM35

AN40

J6

AA36

G40

AM39

AU40

H5

Y37

E2

F1

Y35

AY1

AA34

AA38

L40

K39

H39

AT39

AK39

BA6

BB3

BA4

AW8

AY9G2

G34

AJ40

AH39

AL38

AY3

Y39

AY5

BD3

AT9

BB5

BB1

J4

AW6

AY7

AV35

AV7

AU4

AT5

BA2

H3

C2

VREG_L5_1P8 VREG_L5_1P8

I2C3_SCL

I2C3_SDA

I2C0_SCL

I2C0_SDA

I2C2_SCL

I2C2_SDA

I2C1_SDA

I2C1_SCL

LS_EXP_GPIO_G

LS_EXP_GPIO_C

FORCED_USB_BOOT

WCSS_BT_SSBI

WCSS_WLAN_DATA_2

WCSS_WLAN_DATA_1

WCSS_WLAN_DATA_0

WCSS_WLAN_CLK

WCSS_FM_SSBI

WCSS_BT_DAT_STB

CDC_PDM0_CLK

CDC_PDM0_TX0

I2C PULL-UP RESISTORS

UART0_RX

UART0_TX

UART0_CTS_N

UART0_RTS_N

UART1_TX

UART1_RX

I2C0_SDA

I2C0_SCL

SPI1_MOSI

SPI1_MISO

SPI1_CS_N

SPI1_CLK

UART0 (LS EXP CONN)

UART1 (LS EXP CONN)DEBUG UART

I2C0 (LS EXP CONN)SENSORS I2C

SPI1 (HS EXP CONN)

LS_EXP_GPIO_B (TS_RST_N)

(TS_INT_N)

I2C3_SDA

I2C3_SCLI2C3 (HS EXP CONN - OPT)DSI2HDMI, USB HUB (OPT)

I2C0 (LS EXP CONN)SENSORS I2C

I2C3 (HS EXP CONN - OPT)DSI2HDMIUSB HUB (OPT)

VREG_L5_1P8VREG_L5_1P8

SPI0_MOSI

SPI0_MISO

SPI0_CS_N

SPI0_CLK

SPI0 (LS EXP CONN)TOUCH SCREEN I2C

I2C1_SDA

I2C1_SCLI2C1 (LS EXP CONN)

I2C1 (LS EXP CONN)

(DSI_VSYNC)

LS_EXP_GPIO_H (DSI_RST)

CSI0_MCLK

CSI1_MCLK

LS_EXP_GPIO_K

LS_EXP_GPIO_I

I2C2_SDA

I2C2_SCL

DSI2HDMI_INT_N

DSI_SW_SEL_APQ

(CSI1_RST)

(CSI0_RST)

I2C2 (HS EXP CONN)CAMERA I2C

I2C2 (HS EXP CONN)CAMERA I2C

SD_CARD_DET_N

WCSS_WLAN_SET

WCSS_BT_DAT_CTL

WCSS_FM_SDI

WCSS (WLAN/BT/FM) SIGNALS

CDC_PDM0_SYNC

CDC_PDM0_RX0

CDC_PDM0_RX1

CDC_PDM0_RX2

LS_EXP_GPIO_D(MAG_INT)

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

PM8916 CODEC SIGNALS

LS_EXP_GPIO_L

LS_EXP_GPIO_J

HDMI_HPD_N

BLSP1

BLSP2

BLSP3

BLSP4

BLSP5

BLSP6

CCI

(CSI1_PWDN)

(CSI0_PWDN)

LS_EXP_GPIO_A (APQ_INT)

USR_LED_1_CTRL

R6

2K 2K

R9

2K

R10 R12

2K

R5

2K 2K

R13

2K

R14 R11

2K

26-A7,27-A4

29-C4,5-C7

29-C4,5-C7

11-B2,11-C2,14-C3

11-B2,11-C2,14-C3

11-B2,11-C2,14-C3

11-B2,11-C2,14-C3

27-D7,29-B5,5-C7

29-C4,5-D7

27-D7,29-B5,5-C729-C4,5-C7

29-B5,5-B7

29-B5,5-B7

29-B4

20-C6

20-C6

31-C6

31-C3

31-C3

31-C6

27-C7

29-C1

29-B4

31-C6

31-C3

31-C3

7-C4

27-D7,29-B5,5-A7

29-B1

29-C1

31-C6

20-B6

29-C1

29-C8

29-C4,5-A8 31-C3

31-C6

27-D7,29-B5,5-A7

26-A7

29-C4,5-A8

29-C4,5-A8

29-B1

23-C6

20-B6

29-C8

29-B1

29-B4

29-B5,5-A6

29-B4

29-B1

20-B6

29-C4,5-A8

20-C6

29-B5,5-A6

29-C4

29-C4

29-C4

29-C4

29-C4

29-C4

29-C4

29-C8

29-C8

29-C8

29-C8

29-C1

29-C1

28-D4

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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6 33APQ8016 - GPIO 74-121 / DNC

AD

GPIO_106

GPIO_107

GPIO_108

GPIO_109

GPIO_110

GPIO_111

GPIO_112

GPIO_113

GPIO_114

GPIO_115

GPIO_116

GPIO_117

GPIO_118

GPIO_119

GPIO_120

GPIO_121

GPIO_74

GPIO_75

GPIO_76

GPIO_77

GPIO_78

GPIO_79

GPIO_80

GPIO_81

GPIO_82

GPIO_83

GPIO_84

GPIO_85

GPIO_86

GPIO_87

GPIO_88

GPIO_89

GPIO_90

GPIO_91

GPIO_92

GPIO_93

GPIO_94

GPIO_95

GPIO_96

GPIO_97

GPIO_98

GPIO_99

GPIO_105

GPIO_104

GPIO_103

GPIO_102

GPIO_101

GPIO_100

GPIO2

AY39

H33

K35

J34

B39

C40

AW36

D39

E40

E38

AW38

AV37

AR36

BA40

F39

G38

AP37

AV39

AP35

BC4

BE4

BC6

BD5

BD7

BC38

BC40

BC8

BE6

BD39

BB37

BB35

BD35

BA32

BE38

AY33

BD33

BC34

BB31

BC32

C38

A38

BE34

AU36

AT35

BE32

BB33

BE36

APQ8016

U8

AW40

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNC

DNCDNC

DNC

DNC

NC_DNC

AD23

AD27

H23

AD31

AW18

H31

A2

AW20

H25

AB23

AJ6

H15

H19

H13

AC6

AD5

AD1

AP3

AN2

H7

H11

AW22

AD3

AK3

AL4

AK5

AL6

AN4

AP5

AU24

AW16

AV27

AV21

AU20

AV31

AV25

AP7

AT1

AT17

AT19

AT21

AU2

AT3

AU16

AU18

AM5

AN6

G22

M19

P19

AP25

AT25

AB11

AB19

P25

H29

AW24

A40

AK25

AK27

AM7

H27

AW26

AW28

AW30

AW32

AY15

B1

BA16

AY25

AY17

AY29

BA14

BB29

BA24

BA30

BB9

BC30

BD1

BD29

BD9

BE2

BE40

D33

F17

F15

D37

F21

APQ8016

U8

AV23

AM27

AV29 P23

G26

BOOT_CONFIG_3

BOOT_CONFIG_2

BOOT_CONFIG_1

BOOT_CONFIG_0

KEY_VOLP_N

(WDOG_DIS)

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

SSBI_GPS

LS_EXP_MI2S_DATA0

LS_EXP_MI2S_SCK(ALSP_INT)

LS_EXP_GPIO_E(GYRO_ACCL_INT_N)

NCDSI2HDMI_MI2S_WS

DSI2HDMI_MI2S_SCK

DSI2HDMI_MI2S_DATA0

LS_EXP_MI2S_WS0R74

NC

NC

NC

GPIO_110

0R158GPIO_121 USB_HS_ID

BOOT_CONFIG_5

USR_LED_2_CTRL

NC

NC

7-B4

7-B4

7-C4

7-B4

28-C3

25-C4

33-C6

29-B4

29-C1

29-C1

27-C6

27-C6

28-C4

29-C1

27-C6

7-A4

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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7 33APQ8016 - BOOT CONFIG SW

AD

0b010

0b000

(APQ_BOOT_CONFIG[1]) 0b011

BOOT CONFIGURATIONS

Default Boot Config (0b000) is eMMC on the SDC1

(APQ_BOOT_CONFIG[3])

BOOT_CONFIG[3:1]

(APQ_BOOT_CONFIG[0], WDOG_DISABLE)

SDC1 --> USB2.0

USB2.0

(APQ_BOOT_CONFIG[2])

SDC2 --> SDC1 --> USB2.0

BOOT OPTIONS

0b001

SDC1 --> SDC2 --> USB2.0

(APQ_FORCE_USB_BOOT)

DNI R17 10K

DNI R18 10K

10KR19

10KR20

DNI R21 10K

BOOT_CONFIG_0

BOOT_CONFIG_3

BOOT_CONFIG_2

VREG_L5_1P8

FORCED_USB_BOOT

BOOT_CONFIG_1

R127 0

DNI

DNI

0R128

Note 1: Short between resistors pads to force boot from USB when dip-switch is not installed

Note 2: Short between resistors pads to boot from uSD when dip-switch is not installed

Note 1

Note 2

BOOT_CONFIG_5R132 10K (APQ_BOOT_CONFIG[5], APPS BOOT FROM ROM) BOOT_CONFIG_5

72

S6

81

S6

(APQ GPIO_37)

(APQ GPIO_81)

(APQ GPIO_82)

(APQ GPIO_83)

(APQ GPIO_80)

(APQ GPIO_86)

6-C7

6-C7

6-C7

6-C7

5-D2

11-B2,11-C2,14-C3

6-C7

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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8 33APQ8016 - MIPI CSI/DSI

AD

MIPI_CSI0_LANE1_N

MIPI_CSI0_LANE1_P

MIPI_DSI0_LANE3_N

MIPI_DSI0_LANE2_P

MIPI_DSI0_LANE2_N

MIPI_DSI0_LANE1_P

MIPI_DSI0_LANE1_N

MIPI_DSI0_LANE0_P

MIPI_CSI0_LANE2_N

MIPI_CSI0_LANE2_P

MIPI_CSI0_LANE3_N

MIPI_CSI0_LANE3_P

MIPI_CSI0_LANE4_N

MIPI_CSI0_LANE4_P

MIPI_CSI1_LANE0_N

MIPI_CSI1_LANE0_P

MIPI_CSI1_LANE1_N

MIPI_CSI1_LANE1_P

MIPI_CSI1_LANE2_N

MIPI_CSI1_LANE2_P

MIPI_DSI0_LANE3_P

MIPI_DSI0_CLK_N

MIPI_DSI0_CLK_P

MIPI_DSI0_LANE0_N

MIPI_CSI0_LANE0_P

MIPI_CSI0_LANE0_N

MIPI

U8

U4

U6

AF1

AG2

AH1

AK1

AB1

AC2

AB3

AB5

Y1

AA2

Y5

AA6

V1

W2

T1

U2

AE2

AF3

AE4

AH3

AG4

AL2

V5

W6

APQ8016

MIPI_CSI0_DATA0_M

MIPI_CSI0_DATA0_P

MIPI_CSI0_CLK_M

MIPI_CSI0_CLK_P

MIPI_CSI0_DATA1_M

MIPI_CSI0_DATA1_P

MIPI_CSI0_DATA2_M

MIPI_CSI0_DATA2_P

MIPI_CSI0_DATA3_M

MIPI_CSI0_DATA3_P

MIPI_CSI1_DATA0_M

MIPI_CSI1_DATA0_P

MIPI_CSI1_CLK_M

MIPI_CSI1_CLK_P

MIPI_CSI1_DATA1_M

MIPI_CSI1_DATA1_P

MIPI_DSI0_DATA0_M

MIPI_DSI0_DATA0_P

MIPI_DSI0_CLK_M

MIPI_DSI0_CLK_P

MIPI_DSI0_DATA1_M

MIPI_DSI0_DATA1_P

MIPI_DSI0_DATA2_M

MIPI_DSI0_DATA2_P

MIPI_DSI0_DATA3_M

MIPI_DSI0_DATA3_P

29-C5

29-C5

29-C5

29-C5

29-C5

29-C5

29-C5

29-C5

29-B5

29-B5

29-B5

29-B5

29-B5

29-B5

29-B5

29-B5

26-C6

26-C6

26-C6

26-C6

26-B6

26-C6

26-B6

26-B6

26-B6

26-B6

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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1 LAST_EDITOR

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33

D A

APQ8016 - RF INTERFACE

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GPS_BBQ2

GPS_BBQ

GPS_BBI2

GPS_BBI

WLAN_RSET

WLAN_IN

WLAN_IP

WLAN_QN

WLAN_QP

RF_INTF

BA18

BB15

BE20

BE14

BD15

BB17

BC20

BB21

BA20

AU14

BD21

AY19

BC16

AR14

APQ8016

U8

AP15

AP13

AR12

AY27

AU26

BE26

BD25

AR26

BE24

BC24

AT23

AY23

BB23

AU22

BA26

BB13

BC14

BD11

BE12

WLAN_BB_Q_P

WLAN_BB_I_P

WLAN_BB_Q_M

WLAN_BB_I_M GPS_BB_I_P

GPS_BB_I_M

GPS_BB_Q_P

GPS_BB_Q_M

GPS IQ

CAD NOTE: Place R22 close to APQ Pin AU14

WLAN IQ

R22 3.92K

1%

WLAN_RSET

31-C3

31-C3

31-C3

31-C3

33-C2

33-C2

33-C2

33-C2

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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OF

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APQ8016 - PWR1

AD

LAST_EDITOR1 13/05/2015:10:40

10 33

VDDMX_1

VDDMX_TXDAC

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

VDD_APC

QFPROM_BLOW_VDD

MIPI_DSI_DCDC

VDDPX_VBIAS_UIM

VDDPX_VBIAS_SDC

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

VDDMX_1

PWR1

U8

APQ8016

M13

K27

J28

M17

T31

T23

T15

T13

V9

Y33

AB7

AJ8

AB25

AB27

Y31

Y29

Y27

Y25

V33

V31

V29

V27

V25

T33

T29

T27

T25

P33

P31

P29

P27

M33

M31

M29

M27

M25

M23

K33

K31

K29

AB31

AB29

AH15

AH13

AG28

AD11

AH23

AH25

AH27

AH29

AJ28

AL28

AM11

AM9

AN28

AP29

AU10

K25

M15

N14

AP27

Y19

VREG_L3_1P15C4

0.1UF

VREG_S2_1P15

VDD_PX_BIAS

VREG_L6_1P8R15 0

5% 0.050W

L12

2.2UH 20%

C145

2.2UF

MIPI_DSI_DCDC

QFPROM_BLOW_VDD

MIPI_DSI_DCDC_L

(PM MPP_1)

12-C2,14-D8,19-C1

14-B8,18-C2

17-B5

12-C8,16-C7,19-C1

12-D8

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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OF

3 2 1LAST EDIT DATE

33APQ8016 - PWR2

AD

LAST_EDITOR1 13/05/2015:10:40

11

VDDPX_5

VDDPX_6

VDDPX_7

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDCX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_1

VDDPX_2

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_3

VDDPX_4

VDDCX_1

VDDCX_1

PWR2

U8

APQ8016

U8

AF31

AB35

V7

J8

H17

F31

AU8

AU34

AU30

AT7

AT33

AT11

AP33

AK9

AG32

AA32

W8

K23

K19

K15

K11

J30

J24

J22

J20

J14

J10

Y9

Y17

Y15

Y13

Y11

U24

U22

T9

T21

T11

M9

M21

M11

AR10

AM19

AM17

AD13

AD15

AD17

AD25

AD29

AH11

AH17

AH19

AH21

AF33

AC34

L34

0.1UF

C5

0.1UF

C6

VREG_L5_1P8

VREG_L5_1P8

VREG_S1_1P15

VREG_L12_SDC

VREG_L2_1P214-C8,18-C2

11-B2,14-C3,19-C1

11-C2,14-C3,19-C1

19-C1,23-C5

12-D8,14-C3,19-C1

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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DRAWING NO

OF

3 2 1LAST EDIT DATE

D

3312

13/05/2015:10:401 LAST_EDITOR

A

APQ8016 - PWR3

GND

GND

VDDA_WLAN

VDDAH_BBRX_CH0_1

VDDAH_BBRX_CH2

GND

VDDAL_BBRX_CH2_GPSADC

USB2_HS_DVDD

USB2_HS_VDDA_1P8

USB2_HS_VDDA_3P3

VDDA_MIPI_DSI0_PLL

VDD_BIMC_PLL

VDD_SR_GPLL

VDD_SR_MODEM_PLL

VDD_SR2_APPS_PLL

VDDA_MIPI_CSI

VDD_SR2_PRONTO_PLL

VDDA_0P4_MIPI_DSI

VDDA_1P2_MIPI_DSI

VDDA_1P2_MIPI_DSI

VDDA_MIPI_CSI

VDD_SR2_MODEM_PLL1

PWR3

U8

W24

AG6

AE6

AE8

AB9

AP23

APQ8016

AP19

AP17

AR18

AR20

AT15

AR22

AR24

AE30

AD33

AC32

AH5

Y21

AG16

AE22

AC8

AN14

C10

0.1UF

0.1UF

C11

C12

0.1UF

0.1UF

C13

VREG_S3_1P3

VREG_L2_1P2

VREG_L7_1P8

0.1UF

C14

MIPI_DSI_DCDC

0.1UF

C16

0.1UF

C18

VREG_L6_1P8

C20

0.1UF

C21

0.1UF

C22

0.1UF

VREG_L3_1P15

VREG_L3_1P15

VREG_L6_1P8

VREG_L13_3P075

VREG_L7_1P8

VREG_L7_1P8

C119

0.1UF

C17

0.047UF

C15

0.047UF

C19

4700PF

18-C2,19-C8,32-C3

11-C2,14-C3,19-C1

12-C2,12-D2,19-C1

10-B2

10-C2,16-C7,19-C1

12-C2,12-C8,19-C1

12-C8,12-D2,19-C1

10-C7,12-C2,14-D8

19-C1

10-C7,12-C2,14-D8

Note : AP19 should be connected to VDD_A1 for analog circuits in MSM or GND for APQ.

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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OF

3 2 1LAST EDIT DATE

A

3313

13/05/2015:10:401 LAST_EDITOR

D

APQ8016 - GND

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSS1

AK17

AM33

AM25

AM29

AM31

AL30

AK29

AK31

AK33

AK23

AW10

AV33

AV5

AV9

AV11

AU12

AU38

AU6

AT29

AP9

AR4

AR6

AJ34

A6

AA24

A32

A16

A22

A28

BC36

B5

AK11

AK13

AK15

BA8

BB7

AF15

AF17

AF19

AF13

AB21

AD19

AF11

AB17

AA26

AA28

AA30

AB13

AB15

AF21

AF23

AF25

AF27

AF29

APQ8016

U8

AK19

AK21

J18

H35

H37

F7

G10

G14

G16

G18

G24

AF9

AG20

AH31

AH9

J16

G12

G20

C18

C20

C32

C8

D27

D5

D7

E12

F19

F25

F27

F29

F37

G8

AW2

AW34

AW4

J32

J36

J38

A12

BD37

BE10

BE8

AY11

G28

G30

G32

VSSX_0 VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSS2

W30

W32

W28

W34

W40

W36

W38

N26

N28

AA4

AA8

AC30

T19K5

T35

T37

T39

U26

U28

U30

U32

U34

U36

U38

U40

V11

V13

N30

N32

N34

N36

N38

N4

N40

N8

P11

P13

P15

P17

P35

P37

P21

N24

N22

N2

M7

M5

M39

M37

M35

L8

L6

L4

L32

L30

K21

K17

K9

K37

P39

P5

P9

R22

R24

R26

R28

R30

R32

R34

R36

R38

R40

R8

T17

V15

V17

V19

V35

V37

V39

W16

W26

AC4

AD21

AD7

AE16

AE20

AF5

AG18

AH7

AJ2

AJ4

AK7

AL8

AM1

AM13

AM15

AM21

AM23

AM3

U8

APQ8016

VSSX_0 VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSSX_0

VSS3

U8

APQ8016

BC22

W4

Y23

Y3

W22

AV13

V23

V3

AU28

AW12

AT13

AT27

AW14

AV19

AV17

AV15

BA12

AY13

BA28

BA22

AY21

BC18

BC12

BB19

BB27

T5

V21

BB25

T3

BE18

BE22

BE28

BD19

BD23

BE16

BD27

BD17

BC26

BC28

BD13

AN20

APQ / PM / DDR Circuitry Shield

SH2

50-NU856-P1

1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26DNI

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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1 LAST_EDITOR

APQ8016 - DECOUPLING

13/05/2015:10:40

D A

3314

1.0UF

C48

0.022UF

C47

0.1UF

C9C7

0.1UF

C229

0.022UF0.022UF

C228

0.01UF

C26C55

2200PF

C51

2200PF2200PF

C37

4700PF

C53

0.047UF

C23

C24

4700PF 1.0UF

C25

VREG_L2_1P2

4700PF

C54

1.0UF

C27

VREG_L3_1P15

1.0UF

C28

1.0UF

C29

1.0UF

C30

0.047UF

C31

C32

0.022UF0.022UF

C33

22UF

C57

22UF

C58

C59

22UF0.047UF

C34

1.0UF

C35

1.0UF

C36C40

0.047UF

C38

0.022UF 1.0UF

C39

0.022UF

C52

1.0UF

C41

C42

1.0UF

0.047UF

C43

C44

1.0UF

C45

0.047UF

C46

1.0UF

22UF

C60

VREG_S2_1P15

C49

4.7UF

1.0UF

C50

22UF

C61

1.0UF

C56

VREG_L5_1P8

VREG_S2_VSENSEJP2

C62

4.7UF

JP1

C210

1.0UF

VREG_S1_1P15

VREG_S1_VSENSE

(VDDPX_1)

Remote sense

(VDDDMX_1)

(VDD_APC)

(VDDPX_3)

(VDDCX_1)

Remote sense

11-C2,12-D8,19-C1

10-C7,12-C2,19-C1

10-C2,18-C2

11-C6,18-C2

11-B2,11-C2,19-C1

18-C2

18-C2

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 15: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

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A

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C

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TITLE

6

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8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

3315

13/05/2015:10:401 LAST_EDITOR

D A

EXTERNAL BUCK REGULATORS

1

3

2

PJ-041HJ1

3

2

1

J10

TSM-103-01-L-SH-P-TR

R710

100K

R76

SYS_DCIN_CONN

U12

6

2

3

1

4

5LX

IN

FB

GND

EN

BS

SY8104ADC

U13

6

2

3

1

4

5LX

IN

FB

GND

EN

BS

SY8104ADC

R80

R7

100K

20%4.7UH

L13

L14

4.7UH 20%

SYS_DCIN

PRE-BUCK - 3.7V

PRE-BUCK - 5.0V

SYS_5P0

DNI

DNI

FB1

BS1

BS2

FB2

LX1

LX2

C16710UF25V

C168

10UF

25V

C1220.1UF

50V

50V

0.1UFC123

C1350.1UF

10V

10V

0.1UFC136

C143

47UF10V

10V47UF

C160

R65

165K

1%

Vout=0.6V * (1+R_H / R_L)

PRE-BUCK 5.0V: R_H=165k , R_L=22.1k --> 5.08V

Vout=0.6V * (1+R_H / R_L)

PRE-BUCK 3.74V: R_H=115k , R_L=22.1k --> 3.72V

C196

47UF10V

DNI

DNI

C198

47UF10V

Idc = 5AIsat = 10A

Idc = 5AIsat = 10A

2P1206R

R108 0 VPH_PWR

R122 0SNS_P

0R123SNS_N

JP3 JP4

DCIN_SNS_P

DCIN_SNS_N

R124 0

0R125

JP10 JP11

VPH_PWR_SNS_P

VPH_PWR_SNS_N

DNI

DNI

BATT_ID

BATT_THERM

2P1206R

R136 0

VBATT_CONN

DNI

R64

115K

1%

R69

22.1K

1%

1%

22.1K

R66

PRE_BUCK_OUT

J14

5

6

4

3

2

1

CASE

78171-0004

To/From LS EXP CONN

C142

22PF

5%

25V

C137

47PF

5%

25V

ASSY OPTION

INSTALL J10

DNI J10

INSTALL R108DNI J14, R136

DNI R108INSTALL J14, R136

DNI

ARM ENERGY PROBE (PWR MEAS)

SUPPORTED

YES

NO

BOM CONFIG

Hx0x, HX5X

ASSY OPTION

VPH_PWR SOURCE

SUPPORTED

3.7V BUCK

BATTERYNONE

DNI

R77 0.100

2P1206R

16-A5

16-A3,16-C2

17-C6,18-C7,19-C8

25-B4,25-B6,25-C4

29-B1

17-C6

17-C6

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 16: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

14 356 28 7

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B

C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

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8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:40

16 33PM8916 - CONTROL/CLOCKS

U9

L10

F3

H3

K2

K3

C3

F2

A2

D2

D1

K1

G6

H2

J1

C2

F11

M11

G9

N14

G5

F5

K10

G4A10

J3

L1

B10

L2

N10

E4

J2GND_XO

BBCLK1_EN

XOADC_GND

RFCLK2

SPMI_DATA

RFCLK1

GND_RF

SPMI_CLK TEST_EN

KYPDPWR_N

PON_RESET_N

PS_HOLD

VREF_BAT_THERM

BAT_ID

BAT_THERM

PA_THERM

AVDD_BYP

XTAL19M2_IN

XTAL19M2_OUT

SLEEP_CLK1

VREG_XO

REF_BYP

REF_GND

VREF_LPDDR2

BBCLK1

RESIN_N

VREG_RF_CLK

XO_THERM

XOISOLATION_GND

BBCLK2

CBLPWR_N

HK

PM8916

Conenct C80 with dedicated via to main GND plane

6.3V1.0UF

C69

R28 100K

0.050W

DNI

C63

0.1UF

6.3V

6.3V

0.1UF

C646.3V

0.1UF

C65

C660.1UF6.3V

6.3V1.0UF

C71

APQ_PS_HOLD

PM_XO_THERM

VREG_L6_1P8

CLK_OUT_19M2_PM

CLK_IN_19M2_PM

PM_XO_THERM

VREF_LPDDR3

VREF_BATT_THERM

SPMI_DATA

SPMI_CLK

SLEEP_CLK

RFCLK2

RFCLK1

PM_RESIN_N

PHONE_ON_N

APQ_BBCLK1_EN

PM_BATT_THERM

BATT_ID

C801000PF50V

C195 1UF

10% 6.3V

AGND|XO_GND

VREG_RF_CLK

VREG_XO

AGND|GND_XO

Conenct C64, C69, C71 with dedicated via to main GND plane

0R104 CBLPWR_N

AGND|GND_REF

AGND|GND_RF

PM_BATT_THERM

BATTERY THERM BATTERY ID

BATT_THERM BATT_ID

VREF_BATT_THERM

BBCLK1

R134

68.1K

1%2P0402R

R135

100K

1%2P0402R

R133

90.9K

1%

R137 16.2K

1%

R129

100K

1%

R25 10K

R165 200JTAG_PS_HOLD

PM_PS_HOLD

APQ_RESIN_N PM_PON_RESET_N0R166

AGND|XO_GND

INSTALL R134,R135

DNI R134,R135

BOM CONFIG

Hx0x, HX5X

ASSY OPTION

VPH_PWR SOURCE

SUPPORTED

3.7V BUCK

BATTERYNONE

Y1

4

2

13

THRMSTR/GND

THRMSTR

19.2MHZ

EXS00A-CS04340

BBCLK2

16-B4,16-C7,20-B3

16-C2

28-B3,29-C1

28-D3,29-C1

30-B4,30-C7

15-A3

16-C7

3-B3

16-B5

3-C6

16-B7,16-C7,20-B3

10-C2,12-C8,19-C1

22-C8,3-B6

3-C6

3-C6

3-B3

15-A3,16-A3

31-C6

33-C6

16-B4,16-B7,20-B3

16-C7

3-B3,3-C6

16-A43-C6

15-A3,16-C2

16-C2

27-B7

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 17: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

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DRAWING NO

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3 2 1LAST EDIT DATE

LAST_EDITOR1 13/05/2015:10:40

17 33PM8916 - CHARGER/GPIOS/MPPS

AD

CHG_LED_SINKVBAT_SNS

VCOIN

VPRE_BYPUSB_IN

USB_IN

VBAT

OPTION2

OPTION1

VBAT

CHARGING

U9

PM8916

P12

D5

H5

N12

P13

N13 P14

L11

M12 M13

CMN_GND

CMN_GNDCMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

CMN_GND

GND

U9

PM8916

D7

D11

D10

H7

E9

G7

G10

G8

K5

H8

H10

H12

D6

J6

E7 K9

H11

GPIO2

GPIO4

GPIO3

GPIO1 MPP1

MPP3

MPP2

MPP4

UI

U9

J5

K4

J4

L4J7

N11

L8

H6

VDD_PX_BIAS

10V

2.2UF

C82

10V0.1UF

C89

6.3V0.1UF

10%C67

LS_EXP_GPIO_F

R68

100K

USB_VBUS_IN

WLAN_LED_CTRL

BT_LED_CTRL

(DSI_BLCTRL)

PRE_BUCK_OUT

6.3V

0.1UF

C70

PM_OPT1

2P0603R

C197

4.7UF16V

USR_LED_3_CTRL

USR_LED_4_CTRL

VBAT_SNS

2P0603R

R138 0VPH_PWR VBAT_PM

VBATT_CONN

R88 0

2P0402R

2P0402R

0R130

DNI

R106

0

2P0402R

USB_SW_SEL_PM

PM_VRE_BYP

PM_VCOINR105

47K

C81 47UF

20% 10V

USB_HUB_RESET_N_PM

INSTALL R106,R88DNI R130

DNI R106,R88INSTALL R130

BOM CONFIG

Hx0x, HX5X

ASSY OPTION

VPH_PWR SOURCE

SUPPORTED

3.7V BUCK

BATTERYNONE

10-C2

25-D3

29-B1

28-B4

28-A4

28-A4

15-C1,18-C7,19-C8

24-B7

24-C7

15-C3

28-C4

15-A3

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 18: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

GND_S3

VFB_S4

VSW_S4

VIN_S2

GND_S1

GND_S2

GND_S4

VSW_S2

VIN_S1

VIN_S1

VIN_S2

VIN_S3

VIN_S2

VIN_S3

VIN_S4

VSW_S4

VSW_S1

VSW_S2

VSW_S3

VSW_S4

VIN_S3

VSW_S1

GND_S1

VFB_S1

VIN_S4

GND_S2

VIN_S1

GND_S1

VSW_S2

GND_S3

VFB_S3

VFB_S2

GND_S2

VSW_S3

VSW_S1

VSW_S3

GND_S4

VIN_S4

VREG1

U9

P6

N8

N4

A5

M4

A9

F7

J8

P3

A8

A4

A6

B9

M6

E5

B4

B5

M5

N7

P4

C8

C5

P7

N6

P5

A7

N5

B7

C6

B6

B8

P8

C9

C4

C7

M7

K8

N3

PM8916

VREG_S2_1P15

VREG_S1_1P15

VREG_S3_1P3C83

10%

2.2UF

10V

10V

C84

10%

2.2UF

6.3V

22UF

20%

C90

C76

6.3V

22UF

C77

6.3V

22UF

C85

10%

2.2UF

10V

22UF

6.3V

C78

VREG_S4_2P1

2.2UF

10%

C86

10V

22UF

6.3V

C79

C91

20%

22UF

6.3V

VPH_PWR VREG_S1_VSENSE

VREG_S2_VSENSE

L1

1.0UH 20%

L2

1.0UH 20%

VSW_S3

VSW_S2

VSW_S1

VSW_S4

L3

2.2UH 20%

L4

2.2UH 20%

10-C2,14-B8

11-C6,14-C8

12-C8,19-C8,32-C3

19-C8,20-D2

15-C1,17-C6,19-C8

14-B8

14-C8

14 356 28 7

A

B

C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

REV

47 5

SHEET

8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

PM8916 - SMPS

AD

LAST_EDITOR1 13/05/2015:10:40

18 33

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 19: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

14 356 28 7

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B

C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

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SHEET

8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:40

19 33PM8916 - LDOS

VIN_GR3

VREG_L17

VREG_L18

VREG_L16

VREG_L14

GND_DRV

VREG_L9

VIN_GR7

VREG_L2

VREG_L11

VIN_GR5

VIN_GR5

VREG_L8

VREG_L10

VREG_L12

VREG_L5

VIN_GR4

VREG_L15

VIB_DRV_N

VIN_GR2

VREG_L3

VIN_GR4

VREG_L13

VREG_L1

VREG_L4

VREG_L6

VIN_GR1

VREG_L7VIN_GR3

VIN_GR6

VREG_L4

VREG2

U9

M10

M2

P9 L3

N2

M8

M9

P2

D3

E2

P1

N1

M14

G1

E1

P10

B3

D4

F1

B1

B2

G3

M1

M3

C1

L13

G2

E3

A1

A3

N9

PM8916

VREG_L3_1P15

VREG_L8_2P9

VREG_L6_1P8

VREG_L2_1P2

VREG_S3_1P3

VPH_PWR VREG_L9_3P3

VREG_S4_2P1

VREG_L17_3P3

VREG_L5_1P8

VREG_L11_SDC

VREG_S4_2P1

VREG_L1_1P225

VREG_L12_SDC

VREG_L13_3P075

VREG_L7_1P8

VREG_S4_2P1

VREG_L10_2P8

VREG_L18_2P7

VREG_L4_2P05

(WGR7640_1P3)

(MEMORY, MIPI DSI/CSI, VDDPX_1)

(VDDMX_1)

(1.8V I/O DOMAIN)

(MIPI DSI, QFPROM, 1.8V DSI to HDMI)

(1.8V MISC DOMAIN)

(EMMC)

(WIFI PA)

C146

1.0UF 1.0UF

C147 C148

1.0UF 1.0UF

C149 C150

1.0UF 1.0UF

C151 C152

1.0UF 1.0UF

C153 C154

1.0UF 1.0UF

C155

(SD Card)

(SD Card)

(USB, MIC Bias)

VREG_L14

VREG_L15_1P8

VREG_L16_1P8

(3.3V DSI to HDMI)

# # # # # # # # # # # # # # #

NOTES:Effective output capacitanceLDOs L1, L2, L3, L4, L8, L9, L11, L17 --> Cout_eff = 4.7uFLDOs L5, L6, L7, L10, L12, L13, L14, L15, L16, L18 --> Cout_eff = 1.0uF

PSEUDO CAPLESS LDOs (indicated by # near the capacitor)L4, L5, L6, L7, L8, L9, L10, L11, L12, L13, L14, L15, L16, L17, L18

(1.8V to LS EXP CONN - helper)

(1.8V to LS EXP CONN - main)

NC

4.7UF

C92C93

4.7UF 4.7UF

C94 C95

4.7UF

C157

4.7UF4.7UF

C156

4.7UF

C158 C159

4.7UF

29-B4

10-C7,12-C2,14-D8

22-C3

10-C2,12-C8,16-C7

11-C2,12-D8,14-C3

12-C8,18-C2,32-C3

15-C1,17-C6,18-C7 32-B3,32-B8

18-B2,19-C8,20-D2

27-B3,27-B8,27-C1

11-B2,11-C2,14-C3

23-C4

18-B2,19-C8,20-D2

33-C2

11-C2,23-C5

12-D2

12-C2,12-C8,12-D2

29-B4

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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EDITED BYVERSION

TITLE

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SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:40

20 33PM8916 - AUDIO

CDC_GND_CP

CDC_GND_SPKDRV

CDC_GND_CFILT

CDC_SPKDRV_M

CDC_SPKDRV_M

CDC_SPKDRV_P

CDC_VBAT

CDC_VDD_PA

CDC_PDM_CLK

CDC_VDD_CP

CDC_VDD_CP

CDC_VDDIO

CDC_PDM_SYNC

CDC_PDM_RX2

CDC_PDM_RX1

CDC_PDM_RX0

CDC_PDM_TX

CDC_NCP_VNEG

CDC_HPH_REF

CDC_GND_BOOST

CDC_EAR_P

CDC_HPH_L

CDC_VDD_SPKDRV

CDC_HS_DET

CDC_REF_GND

CDC_GND_BOOST

CDC_HPH_R

CDC_BOOST_SW1

CDC_BOOST_SW2

CDC_BOOST_VREG_5V

CDC_EAR_M

CDC_BOOST_VREG_5V

CDC_MIC_BIAS2

CDC_MIC_BIAS1

CDC_IN3_P

CDC_IN2_P

CDC_IN1_P

CDC_NCP_FLYN

CDC_NCP_FLYP

CDC_NCP_VNEG

CDC_PA_VNEG

CDC

U9

J14

D14

B14

C14

K13

K11

J10

L12

J11

A11

G13

B11

B12

A12

G12

A14

J12

K14

G14

F12

F13

B13

G11

D13

E11

E10

F10

F9

E8

D12

C12

C11

F8

H13

A13

F14

E12

E13

J13

E14

C13

PM8916

DNI

C96

470PF

C97

DNI

470PF

2P1206R

0R34

C87

2.2UF10V

120OHM@100MHZ

E1

C88

2.2UF

0R35

C72

1.0UF

0.1UF

C68

10UFC100

1.0UF

C75

VREG_L5_1P8

AGND|GND_REF

VPH_PWR

VPH_PWR

CDC_PA_VNEG

CDC_HPH_REF

CDC_NCP_FLYN

CDC_NCP_FLYP

CDC_NCP_VNEG

CDC_HPH_R

CDC_HPH_L

CDC_MIC2_P

SPKR_OUT_M

SPKR_OUT_P

CDC_HS_DET

CDC_MIC1_P

GND_CFILT

CDC_MIC3_P

CDC_MIC_BIAS1

Connect C13, E14, A14, B13 pins to the main ground directly.

CAD Note: Place C98 and C99 close to pin A11 and B11.Place C87 close to pin G14.

CDC_PDM0_RX0

CDC_PDM0_SYNC

CDC_PDM0_RX1

CDC_PDM0_RX2

CDC_PDM0_CLK

CDC_PDM0_TX0

L5

2.2UH 20%

C73

1.0UF10V

CDC_MIC1_P

DNI

C118

6.3V0.1UF

GND_CFILT

CAD NOTE:

Add shunt capacitor on MICBIAS signal if manufacturer requires it.NOTE:

Route two traces as differential and

CDC_MIC_BIAS1

C172

1.0UF

10V2P0402R

C99

22UF

10V 10V

22UF

C98

C170

470PF

VREG_S4_2P1

PWR

OUT

GNDJP9

GM1

SPU0410HR5H-PB-2

2,3

4

1

DNI

DNI DNI

DNI

ANALOG MIC

CDC_MIC_BIAS2

0R161

R162 0

DNI

C74

4.7UF

(APQ GPIO_63)

(APQ GPIO_64)

(APQ GPIO_65)

(APQ GPIO_66)

(APQ GPIO_67)

(APQ GPIO_68)

ASSY OPTION

INSTALL GM1

DNI GM1

ANALOG MIC

SUPPORTED

YES

NO

CR2

21

DNIDNI

CR1

12

DNI

5-C2

5-C2

5-C2

5-B2

5-B2

5-B2 20-A4,30-C430-C4

15-C1,17-C6,18-C7

30-C2

20-A4,30-C2

15-C1,17-C6,18-C7

16-B4,16-B7,16-C7

18-B2,19-C8

11-B2,11-C2,14-C3

30-C4

30-C1

30-C2

30-C2

30-C4

30-C4

20-A4

20-C6

30-C1

20-B3,30-C4

20-C6,30-C2

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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A

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EDITED BYVERSION

TITLE

6

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8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:41

21 33MEMORY - LPDDR3 + EMMC - CONTROL

240

1%

R43

10K

R44

DNIR163 0

DQ17

DQ18

DQ19

DQ20

DQ22

CLKM

DQS1_C

DQS2_C

CA3

CKE1

ODT DAT0

DQ31

DQ30

DQ28

DQ27

CMD

RST_N

CA5

CA4

DQ13

DQ12

DQ11

DQ21

DAT7

DQS0_C

DQ29

DQS3_C

DQ26

DQ25

DQ7

DQ6

DQ5

DQ4

DQ10

CS0_N

DQ2

DQ1

DQ23

CA0

DAT2

DAT1

CA9

CA2

CA8

DQ9

DQ8

DQS1_T

DQ0

DQ15

DQ16

DQ14

ZQ

DM2

CA6

CA7

DAT6

DQS0_T

DAT5

CLK_C

CLK_T

DS

DQ24

CA1

DM3

CKE0

CS1_N

DQ3

DM0

DM1

DAT4

DAT3

DQS3_T

DQS2_T

CONTROL

M9

N12

M13

J2

W2

H2

B10

C6

Y2

Y11

V11

V13

U3

M11

U13

T11

T13

R12

H13

G10

J9

F10

R9

B4

AA10

L13

L11

K11

V3

L3

C2

A6

G12

G13

F11

F12

A9P10

R2

W3

W9

N9

B8

Y13

AA12

AA13

AB10

AB11

U2

EMMC/LPDDR3

4GB/8GBIT

Y9

H9

B5

C9

N10

R10

U11

T3

T2

J10

Y3

H11

A7

P3

N3

A10

T9

A5

J3

K3

W10

G2

K13

AB12

J12

W12

SDC1_CLK

SDC1_DATA_1

SDC1_DATA_3

SDC1_DATA_4

SDC1_DATA_5

SDC1_DATA_6

SDC1_DATA_7

SDC1_DATA_2

SDC1_DATA_0

APQ_RESOUT_N

EBI_DM(3)

EBI_DM(2)

EBI_DM(1)

EBI_DM(0)

EBI_CA(9)

EBI_CA(8)

EBI_CA(7)

EBI_CA(6)

EBI_CA(5)

EBI_CA(4)

EBI_CA(3)

EBI_CA(2)

EBI_CA(1)

EBI_CA(0) EBI_DQ(0)

EBI_DQ(1)

EBI_DQ(10)

EBI_DQ(11)

EBI_DQ(12)

EBI_DQ(13)

EBI_DQ(14)

EBI_DQ(15)

EBI_DQ(16)

EBI_DQ(17)

EBI_DQ(18)

EBI_DQ(19)

EBI_DQ(2)

EBI_DQ(20)

EBI_DQ(21)

EBI_DQ(22)

EBI_DQ(23)

EBI_DQ(24)

EBI_DQ(25)

EBI_DQ(26)

EBI_DQ(27)

EBI_DQ(28)

EBI_DQ(29)

EBI_DQ(3)

EBI_DQ(30)

EBI_DQ(31)

EBI_DQ(4)

EBI_DQ(5)

EBI_DQ(6)

EBI_DQ(7)

EBI_DQ(8)

EBI_DQ(9)

EBI_CS0_N

EBI_CS1_N

EBI_CKB

EBI_CK

EBI_CKE_0

EBI_CKE_1

VREG_L5_1P8

SDC1_CMD

EBI_DQS_0

EBI_DQS_1

EBI_DQS_2

EBI_DQS_3

EBI_DQSB_0

EBI_DQSB_1

EBI_DQSB_2

EBI_DQSB_3

LPDDR_ZQ

EBI_DM(3:0)

EBI_CA(9:0)

EBI_DQ(31:0)

3-C3

4-C3

3-C3

4-C6

4-C6

3-C3

4-C6

3-C34-C6

3-C3

3-C3

3-C3

4-C6

11-B2,11-C2,14-C3

4-C6

3-C3

3-C6

3-C3

4-C6

4-B6

4-C6

4-B6

4-B6

4-C7

4-B7

3-C3

4-B6

4-C6

4-C6

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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6

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DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:41

22 33MEMORY - LPDDR3 + EMMC - POWER

VREF_LPDDR3

VREG_L5_1P8

VREG_L2_1P2

0.1UF

C102

C103

10%

0.1UF

C129

10%

1UF

0.1UF

C104

0.1UF

C105

0.1UF

10%

C106

C130

10%

1UF

C107

0.1UF

C108

0.1UF

1UF

10%

C131

C127

2.2UF

C109

0.1UF

0.1UF

10%

C110 C111

10%

0.1UF

0.1UF

10%

C112

0.1UF

C113

1UF

10%

C132

2.2UF

C128

C114

10%

0.1UF

C115

10%

0.1UF

C116

10%

0.1UF

0.1UF

10%

C117

EMMC_VCCI

VREG_L2_1P2

VREG_L8_2P9

L4

K9

J8

J4

H4

H10

H5

J13

K4

G8

G4

F13

A12

Y4

M8

N8

N13

B2

D6

C3

D3

A3

C5

C13

V9

C10

F2

G11

H3

AA8

A8

AB1

R13

T8

T4

U12

V4

R3

P12

P2

P9

P4

R4

R8

N4

Y10

AA1

D7

AA14

B14

AB14

A2

A13

B1

A1

AB2

D4

D2

AB13

B7

AA4

AA2

G3

K8

L12

AA11

W13

W8

V8

W4

M4

C8

D5

B11

A14

M3

U10

C12

L10

Y5

U4VSSD

VSSD

VSSD

VSSM

VSSD

VSSD

DNU

VSSM

DNU

VSSM

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

NC

VSSD

VSSD

VSSM

DNU

DNU

DNU

DNU

DNU

DNU

DNU

DNU

DNU

DNU

DNU

VSSM

DNU

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

DNU

VSSM

VSSD

VSSD

VSSD

VSSD

VSSM

VSSD

VSSM

VSSM

VSSM

DNU

VSSM

DNU

VSSM

VSSD

VSSD

VSSD

VSSD

VSSM

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

VSSD

GND_DNU_NC

U2

EMMC/LPDDR3

4GB/8GBIT

R5

M10

W11

L9

P5

N2

K2

P8

M5

N5

L2

L5

J5

K5

AB8

AB5Y12

Y8

T10

T12

U8

U9

P13

M2

F5

F8

B9

B6

F3

F4

B13

A4

R11

V2

H12

V10

V12

J11

AA3

AB3

AA9

V5

AB9

G9

H8

K10

K12

U2

P11

W5

AA5

U5

AB4

T5

C11

C7

M12

N11

D8

C4

F9

G5

B3

B12

A11

L8 VCCQD

VCCI

VCCM

VCCM

VCCD1

VCCD1

VCCM

VCCM

VCCQD

VCCQD

VCCQM

VCCQM

VCCD2

VCCD1

VCCD2

VCCD1

VCCD2

VCCD2

VCCCAD

VCCQD

VCCQD

VCCQD

VCCQD

VCCD1

VCCD2

VCCQD

VCCD1

VCCD1

VCCQD

VCCQD

VCCQD

VCCQD

VCCCAD

VCCQD

VCCQM

VCCM

VCCD1

VCCD1

VCCQM

VCCQM

VCCD2

VCCD2

VREFCA

VREFDQ

VCCQD

VCCQD

VCCQD

VCCQD

VCCQD

VCCQD VCCD2

VCCD2

VCCD2

VCCD2

VCCD2

VCCD2

VCCD2

VCCD2

VCCD2

VCCCAD

VCCCAD

VCCD2

VCCQD

VCCQD

VCCQD

VCCD2

PWR

U2

EMMC/LPDDR3

4GB/8GBIT

VREG_L2_1P2

VREG_L5_1P8

C133

4.7UF4.7UF

C134

19-C1

11-B2,11-C2,14-C3

11-C2,12-D8,14-C3

16-C2,3-B6

11-B2,11-C2,14-C3

11-C2,12-D8,14-C3

11-C2,12-D8,14-C3

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

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SHEET

8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

AD

LAST_EDITOR1 13/05/2015:10:41

23 33MEMORY - uSD CONNECTOR

DAT2

DAT1

DAT0

CLK

DAT3/CD

CMD

VSS

VDD

CASE

GND

GND

CD

COMMON

J5

SCHA4B0415

16

15

17

10

13

14

9

12

11

4

6

3

2

5

7

8

1

VREG_L5_1P8

DNI

10K

R45

C120

33PF

R48

1M

1.0UF

C124VREG_L12_SDC

VREG_L11_SDC

SDC2_CLK

SDC2_DATA_1

SDC2_DATA_2

SDC2_DATA_0

SDC2_CMD

SD_CARD_DET_N

SDC2_DATA_3

CARD NOT INSTALLED

CARD DETECT CASE

NOTE 1

CARD INSTALLED

CD-COMMON SW=OFF

ESD7C5.0DT5G

2

3

1

CR24

CD

COMMONCD-COMMON SW=ON

U15

6

9

5

4

10

2

7

3

1

8 IO6

IO1

IO3

IO5

IO2

VCC

NC

GND

NC

IO4

TPD6E001RSER

(APQ GPIO_38)

3-C3

11-B2,11-C2,14-C3

3-C3

19-C1

11-C2,19-C1

3-B3

5-D2

3-B3

3-B3

3-B3

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 24: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

TP18

S

OE_N

D-

GND

2D-

D+

1D+

2D+

1D-

VCC 9

7

2

1

3

6

4

5

8

10

TC7USB40MU

S1

3-B3

0R26

DNI

10KR1

24-D5,25-B6,25-D7

3-B3

SUSP_IND/LOCAL_PWR/NON_REM0

USBDP_UP

OCS_N2

USBDM_UP

TEST

SDA/SMBDATA/NON_REM1

RESET_N

SCL/SMBCLK/CFG_SEL0

RBIAS

HS_IND/CFG_SEL1

OCS_N1

XTALOUT

XTALIN/CLKIN

PRTPWR1/BC_EN1

PRTPWR2/BC_EN2

VBUS_DET

GNDPAD

VDDA33

VDDA33

VDDA33

VDD33

VDDA33

CRFILT

PLLFILT

VDD33

USBDP_DN2/PRT_DIS_P2

USBDM_DN2/PRT_DIS_M2

USBDP_DN1/PRT_DIS_P1

USBDM_DN1/PRT_DIS_M1

USBDP_DN3/PRT_DIS_P3

USBDM_DN3/PRT_DIS_M3

NC

PRTPWR3/BC_EN3

OCS_N3

NC

NC

NC21

20

9

19

18

8

6

7

1

2

3

4

15

34

14

5

23

29

10

36

37

27

16

12

33

32

13

25

35

24

26

22

11

30

17

31

28

U10

USB2513B-AEZC

R23

12K

1%

24-A5

R103

24-A5

17-B7

24-C3

24-C3

0R179

EN

IN OUT

GND

NR

U16TPS79333DBVR

3.3V

4

2

51

315-C1,17-C6,18-C7

C226

1.0UF

24-B1,24-B6

15-C1,17-C6,18-C7

S6

3 6

1.0UF

C227

Y2

24.000MHZ

7A-24.000MAAE-T21

17-B7

R24 1M

25-C3

25-C3

14 356 28 7

A

B

C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

REV

47 5

SHEET

8

SIZE

SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

USB - SWITCH / HUB

D A

13/05/2015:10:411 LAST_EDITOR

24 33

2KR145

200

R148

R112

100K

24-B1,24-B6,24-C6

C207

0.1UF

15-C1,17-C6,18-C7

0.1UF

C20324-B2,25-B6,25-D7

24-B1,24-B6,24-C6

R152

100K

27K

R151

DNI

R109

100K

100K

R111

C224

18PF

C225

18PF

29-B8

29-B8

25-B2,25-B6

25-B2,25-B6

25-A2,25-A6

25-A2,25-A6

C164

0.1UF0.1UF

C176

C199

0.1UF

C223

1.0UF

C101

4.7UF

0.1UF

C200C201

0.1UF0.1UF

C202

C219

0.1UF0.1UF

C220

24-B6,24-C6

VPH_PWR

VPH_PWR

VPH_PWR

USB_HS_D_M_HOST2

USB_HS_D_M_HOST1

USB_HS_D_P_HOST1

USB_HS_D_P

USB_HS_D_M

USB_HS_D_P_EXP

USB_HS_D_M_EXP

USB_HS_D_P_HOST2

USB_HS_D_P_HUB

USB_HS_D_P_HUB

USB_HS_D_M_HUB

USB_HS_D_M_HUB

NON_REM1

CFG_SEL0

USB_HUB_RBIAS

USB_HS_D_M_DEVICE

USB_HS_D_P_DEVICE

USB_HUB_RESET_N

USB_SW_SEL

USB_SW_SEL

USB_SW_SEL_PM

HUB_XTALINHUB_XTALOUT

PLLFILT

CRFILT

CFG_SEL1

HUB_VBUS_DET

USB_HUB_RESET_N_PM

VREG_HUB_3P3

VREG_HUB_3P3

VREG_HUB_3P3

VREG_HUB_3P3

NC

USB_SW_SEL

HIGH

LOW

USB Mode

DEVICE

HOST

NCNCNC

NCNCNC

NC

(PM GPIO_3)

(PM GPIO_4)

FORCE USB SELECTION TO USB HOST MODE

Note 1:REF_SEL[1:0] = '10' --> REFVLK=19.2MHz

Note 2:Add PDs at Pin 22 and Pin28 in future design LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 25: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

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D A

1 LAST_EDITOR

3325USB - CONNECTORS

1

2

3

4

5

J4

CASE

10118194-0001LF

6

7

8

9

10

11

DNI

R168

0

R140

1%

47K

D-

VOTG_IN

VBUS

GND

FLT_N

D+

VBUS

VOTG_IN

ADJ

ID

EN

DET

D2

A1

B3

C2

B2

D3

A3

B1

D1

C3

C1

A2

TPD4S214YFFR

U4

10V4.7UF

C191

CASE

J3

87520-0010BLF

6

4

5

1

2

3

DNI

0

R167

0

R169

R139 47K

1%

D-

VOTG_IN

VBUS

GND

FLT_N

D+

VBUS

VOTG_IN

ADJ

ID

EN

DET

B1

D1

A3

C2

C3

TPD4S214YFFR

B2

D3 B3

D2

U6

A2

A1

C1

C192

4.7UF10V0R141 DNI

C218

4.7UF10V

R142 10K

USB_VBUS_IN

4.7UF10V

C193

10V4.7UF

C194

CASE

1

2

3

4

6

5

87520-0010BLF

J2

100K

DNI

R149

G

D

S

RUM002N05T2L

Q7

1

3

2

R150

100K

1%

100KR146

VPH_PWR

USB_HS_D_M_HOST2

USB_HS_D_M_HOST2

USB_HS_D_M_HOST1

USB_HS_D_M_HOST1USB_HS_D_P_HOST1

USB_HS_D_P_HOST1

SYS_5P0

SYS_5P0

SYS_5P0

USB_HS_D_P_HOST2

USB_HS_D_P_HOST2

USB_HS_ID

USB_HS_VBUS_HOST2

USB_HS_VBUS_HOST1

USB_VBUS_IN_CONN

USB_HS_D_M_DEVICE

USB_HS_D_P_DEVICE

USB_SW_SEL

USB_SW_SEL

VBUS_HOST_SW_EN

USB_SW_SEL_N

USB2.0 Type A - HOST1

Notes:1. Current Limit = 55.358 / Radj [komh] = 1.18mA2. Connect USB ID pin on connector when uAB conenctor is used

Note 1

Note 1

USB2.0 Type A - HOST2

USB2.0 uB - DEVICE

(APQ GPIO_121)

R27 0

DNI

DNI

0R29

D-

ID

NC

GND

VBUS

D+

2

3

5

4

6

1

TPD4S012DRYR

U1R36 0

DNI

VBUS_DEVICE_EN_N0R37

DNI

DNI

DNI

USB_SW_SEL

HIGH

LOW ON

OFF

U17 (FPF1203L) STATE

10V4.7UF

C230OUT

ON

GND

IN

U17

FPF1203LUCX

A2

B1

B2

A1

DNI

6-C4

24-A2,25-A2

24-A2,25-A2

24-C3

24-C3

24-A2,25-B2

24-A2,25-B2 24-A2,25-B6

24-A2,25-B6

24-A2,25-A6

24-A2,25-A6

17-C6

15-D3,25-B4,25-B6

15-D3,25-B6,25-C4

15-D3,25-B4,25-C4

24-B2,24-D5,25-D7

24-B2,24-D5,25-B6

15-C1,17-C6,18-C7

R147 10K

R155

4.7K

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 26: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

D1P

DB1N

DA1N

D1N

DB2P

DA2P

D2P

DB2N

OE_N

SEL

DB3P

DA3P

D3P

DB3N

DA3N

D3N

DB4P

DA4P

D4P

DB4N

DA4N

D4N

VCC

DA2N

GND

CLKAN

CLKBN

NC

CLKP

CLKBP

CLKAP

NC

D2N

CLKN

DB1P

DA1P

FSA644UCXU11

A4

E6

A1

C1

C3

A3

D6

A2

D4

D5

B3

D3

A6

C4

E1

C6

F3

E2

C5

E3

D1

B6

F4

D2

B5

E4

F2

F1

F5

C2

A5

F6

B1

B4

E5

B2

VPH_PWR

14 356 28 7

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B

C

D

A

B

C

D

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DISPLAY - DSI SWITCH 3326

13/05/2015:10:411 LAST_EDITOR

R83 0

C171

0.1UF

MIPI_DSI0_CLK_P_BRG

MIPI_DSI0_CLK_M_BRG

MIPI_DSI0_DATA1_P_BRG

MIPI_DSI0_DATA2_P_BRG

MIPI_DSI0_DATA3_P_BRG

MIPI_DSI0_CLK_P_EXP_CONN

MIPI_DSI0_CLK_M_EXP_CONN

MIPI_DSI0_DATA0_P_EXP_CONN

MIPI_DSI0_DATA0_M_EXP_CONN

MIPI_DSI0_DATA1_P_EXP_CONN

MIPI_DSI0_DATA1_M_EXP_CONN

MIPI_DSI0_DATA2_P_EXP_CONN

MIPI_DSI0_DATA2_M_EXP_CONN

MIPI_DSI0_DATA3_P_EXP_CONN

MIPI_DSI0_DATA3_M_EXP_CONN

VREG_L5_1P8

MIPI_DSI0_DATA0_M

MIPI_DSI0_DATA0_P

MIPI_DSI0_CLK_M

MIPI_DSI0_CLK_P

MIPI_DSI0_DATA1_M

MIPI_DSI0_DATA1_P

MIPI_DSI0_DATA2_M

MIPI_DSI0_DATA2_P

MIPI_DSI0_DATA3_M

MIPI_DSI0_DATA3_P

MIPI_DSI0_DATA0_M_BRG

MIPI_DSI0_DATA0_P_BRG

MIPI_DSI0_DATA1_M_BRG

MIPI_DSI0_DATA2_M_BRG

MIPI_DSI0_DATA3_M_BRG

DSI_SW_SEL

DSI_SW_SEL

HIGH

TO DSI2HDMI BRIDGE

TO HS EXP CONN

FROM APQ

LOW

DSI SW Output

DSI2HDMIBridge

HS Exp Conn

DSI_SW_SEL_APQ

R101 0HDMI_HPD_N

DNI

DNI

R120

100K

R90

(APQ GPIO_20)

(APQ GPIO_32)

54

S6

R38 200

FORCE DSI SELECTION TO DSI2HDMI BRIDGE

R100 2K

R91

27K

27-B6

29-C8

27-B6

29-C8

27-C6

29-B8

27-C6

29-B8

27-C6

29-B8

27-C6

29-B8

27-B6

29-B8

27-B6

29-B8

27-B6

29-B8

27-B6

29-B8

8-C4

8-C4

8-C4

8-C4

8-C4

8-C4

8-C4

8-C4

8-C4

8-C4

5-B7

15-C1,17-C6,18-C7

11-B2,11-C2,14-C3

27-A4,5-C7

27-C7

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 27: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

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D A

DISPLAY - DSI TO HDMI BRIDGE

A2VDD

DDCSCL

AVDD

DVDD

TX0+

DDCSDA

V3P3

PVDD

INT

SCLK/MCLK

TX2-

SPDIF/I2S

PD

DRX1+

DVDD

DVDD

DRX0+

CEC

CEC_CLK

DRX1-

GND

TX1-

DRXC-

GND

TX0-

TXC-

TXC+

GND

DRXC+

R_EXT

LRCLK

DRX2-

DRX2+

GND

TX1+

GND

V1P2

DRX3+

SDA

GND

V1P2

SCL

DRX0-

GND

GND

GND

HPD

TX2+

DRX3-

U3

ADV7533BCBZ-RL

F6

A1

C4

F7

E7

C7

F3

E6

D4

E1

E5

G6

E3

B5

A3

B3

G5

F5

D3

C5

G2

B6

A7

B7

A6

F1

F2

A4

B2

F4

D7

D6

G3

G1

E4

G4

C3

C1

A2

C2

D5

C6

B1

D2

A5

E2

B4

D1

G7

J6

10029449-111RLF

CASE

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

E11

330 OHM @ 100MHZ

R157 0

R40 0

0R52

R41

27K

2K

R86

R84

10K

HDMI_5VTP4

R87 1K

1%

R85

2K

R102

2K

DNI

R121 0

R42

2K

C121

4.7UF

10V16V

1.0UF

C161

E2

330 OHM @ 100MHZ

330 OHM @ 100MHZ

E3

E4

330 OHM @ 100MHZ

16V

1.0UF

C162

16V

1.0UF

C163

0.1UF

C211C212

0.1UF

16V

1.0UF

C166

16V

1.0UF

C169

E6

330 OHM @ 100MHZ

D0-

5V_SUPPLY

CTRL4

GND

D3-

D0+

D3+CTRL5

5V_OUT

D1-

D1+

D2-

D2+

CTRL2

CTRL1

CTRL3

U14

TPD13S523RSVR

1

15

16

10

9

12

11

4

5 8

14

7

6

2

3

13

R30 0

G

D

S

Q6

RUM002N05T2L

2

3

1

DNI

R118

100K

TP5

C215

0.1UF

TP6

C165

0.1UF

C213

0.1UF

DNI

R82

0

TP7

1.0UF

C208

1.0UF

C209

0.1UF

C214

VREG_L5_1P8

VREG_L5_1P8

DSI2HDMI_MI2S_DATA0

DSI2HDMI_MI2S_WS

DSI2HDMI_MI2S_SCK

VREG_L6_1P8

HDMI_TMDS_TX1_P

HDMI_TMDS_TX1_P

HDMI_TMDS_TX1_P

HDMI_TMDS_TX1_M

HDMI_TMDS_TX1_M

HDMI_TMDS_TX1_M

HDMI_TMDS_TX0_P

HDMI_TMDS_TX0_P

HDMI_TMDS_TX0_P

HDMI_TMDS_TX0_M

HDMI_TMDS_TX0_M

HDMI_TMDS_TX0_M

HDMI_TMDS_TXC_P

HDMI_TMDS_TXC_P

HDMI_TMDS_TXC_P

VREG_L17_3P3

VREG_L17_3P3

SYS_5P0

HDMI_HPD

HDMI_HPD

HDMI_HPD

HDMI_DDC_SDA

HDMI_DDC_SDA

HDMI_DDC_SDA

HDMI_DDC_SCL

HDMI_DDC_SCL

HDMI_DDC_SCL

HDMI_CEC

HDMI_CEC

HDMI_CEC

HDMI_5V

HDMI_5V

HDMI_TMDS_TX2_P

HDMI_TMDS_TX2_P

HDMI_TMDS_TX2_P

HDMI_TMDS_TX2_M

HDMI_TMDS_TX2_M

HDMI_TMDS_TX2_M

HDMI_TMDS_TXC_M

HDMI_TMDS_TXC_M

HDMI_TMDS_TXC_M

CEC_CLK

CEC_CLK

REXT_BRG

DSI_SW_SEL

I2C3_SDA

I2C3_SCL

DSI2HDMI_INT_N

I2C3_SDA_BRG

I2C3_SCL_BRG

MIPI_DSI0_CLK_P_BRG

MIPI_DSI0_CLK_M_BRG

MIPI_DSI0_DATA0_M_BRG

MIPI_DSI0_DATA0_P_BRG

MIPI_DSI0_DATA1_P_BRG

MIPI_DSI0_DATA1_M_BRG

MIPI_DSI0_DATA2_M_BRG

MIPI_DSI0_DATA2_P_BRG

MIPI_DSI0_DATA3_P_BRG

MIPI_DSI0_DATA3_M_BRG

ADV_V3P3

ADV_PVDD

ADV_A2VDD

ADV_AVDD

HDMI_HPD_N

ADV_DVDD_V1P2

BBCLK2

HDMI_HPD_N to APQ8016 via level shifter

(APQ GPIO_31)

NC

(APQ GPIO_117)

(APQ GPIO_118)

(APQ GPIO_119)

(APQ GPIO_20)

I2C ADDR: 0X39 (7-BIT)

Y3

2

3

4

1 ST_N

VCC

OUT

GND

12.2880MHZ

SG-210STF 12.2880MS3

C3

0.1UF

VREG_L17_3P3

R50 0

DNI

DNIDNI

DNI

CR3

1

2

140-81105-0000RB751S40,115DNIR51 0

HDMI_CEC_CONNR180 0

DNI

R181

0

26-C2

26-C2

26-C2

26-C2

26-B2

26-B2

26-B2

26-B2

26-C2

26-C2

27-A5,27-B3

27-A5,27-B3

27-A5,27-C3

27-A5,27-C3

27-A5,27-C3

27-A5,27-C3

27-A5,27-B3

27-A5,27-B3

6-C4

6-C4

6-C4

27-A6,27-C3

27-A6,27-C7

27-B2,27-B3

27-A6,27-C7

27-A6,27-C6

27-A6,27-B2

27-B4,27-C7

27-A6,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-A5,27-B2

27-B2,27-B3

27-B2,27-B3

27-B2,27-B3

27-B2,27-C3

27-B2,27-C3

27-B2,27-C3

27-B2,27-C327-A2,27-C6

27-B2,27-B4

27-A6,27-B3

29-B5,5-A7,5-C7

29-B5,5-A7,5-C7

27-A2,27-A6

5-B7

26-A5

19-B1,27-B3,27-C1

11-B2,11-C2,14-C3

10-C2,12-C8,16-C7

19-B1,27-B3,27-B8

19-B1,27-B8,27-C1

27-B6

27-C416-C7

26-A7,5-C7

11-B2,11-C2,14-C3

15-D3,25-B4,25-B6

27-B2,27-C7

27-B2,27-C7

27-B2,27-C7

27-B3,27-C3

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 28: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

DS5

YELLOW

21

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LAST_EDITOR1 13/05/2015:10:41

28 33SWITCHES/LEDS

S2SKRKAHE010

1 2

S3SKRKAHE010

1 2

S4SKRKAHE010

1 2

DS1

GREEN

21

DS2

GREEN

21

DS3

GREEN

21

DS4

GREEN

21

DS6

BLUE

21

G

D

S

RUM002N05T2L

Q1

2

3

1

G

D

S

Q9

RUM002N05T2L

2

3

1

ESD7C5.0DT5G

CR26

1

3

2

200R57

200R55

R56 200

200R59

VPH_PWR

R58 68

CR25

ESD7C5.0DT5G

1

3

2

G

D

S

Q2

RUM002N05T2L

2

3

1

G

D

S

RUM002N05T2L

Q3

2

3

1

G

D

S

Q4

RUM002N05T2L

2

3

1

G

D

S

RUM002N05T2L

Q5

2

3

1

R54 200

PM_RESIN_N

PHONE_ON_NUSR_LED_1_SINK

USR_LED_2_SINK

USR_LED_3_SINK

USR_LED_4_SINK

USR_LED_1_CTRL

USR_LED_2_CTRL

USR_LED_3_CTRL

USR_LED_4_CTRL

KEY_VOLP_N

WLAN_LED_CTRL

BT_LED_CTRL

(APQ GPIO_21)

VOL/ZOOM-

VOL/ZOOM+

PWR SWITCHUSER LED 1

USER LED 2

USER LED 3

USER LED 4

WLAN ACTIVE LED

BT ACTIVE LED

(APQ GPIO_107)(APQ GPIO_120)

(PM GPIO_1)

(PM GPIO_2)

(PM MPP_2)

(PM MPP_3)

VF=2.2V IF=7.5mA

VF=2.2V IF=7.5mA

VF=2.2VIF=7.5mA

VF=2.2VIF=7.5mA

VF=2.1V

IF=9mA

VF=3.0VIF=10mA

WLAN_LED_SINK

R31

0

DNI

BT_LED_SINK

16-C7,29-C1

6-B7

16-C7,29-C1

17-B5

17-B5

15-C1,17-C6,18-C7

5-C7

6-C4

17-B7

17-B7

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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LAST_EDITOR1 13/05/2015:10:41

29 33HS / LS EXPANSION CONNECTORS

39

9

11

13

15

17

19

21

23

1

3

5

7

16

14

12

10

4

2

40

38

36

34

32

30

28

26

24

22

20

18

25

27

29

31

33

35

37

J887381-4063

8

6

8-C6

8-C6

8-C6

8-C6

8-C6

8-C6

8-C6

8-C6

8-C6

8-C6

5-A6,5-B7

27-D7,5-A7,5-C7

8-B6

8-B6

8-B6

8-B6

26-B3

26-B3

26-B3

26-B3

26-B3

26-C3

26-C3

26-C3

26-C3

26-C3

5-C7

5-C7

8-B6

24-B2

24-A2

5-B7

8-C6

5-A6,5-B7

27-D7,5-A7,5-C7

DNI

R174 0

19-B1

5-B7

5-C7

5-C7

5-A8,5-D7

5-C7

5-A8,5-C7

5-A8,5-C7

5-B7

5-C7

5-C7

5-B7

5-C7

5-A8,5-C7

5-D7

5-D7

5-D7

5-D7

5-D7

5-D7

5-C7

5-C7

5-C7

5-C7

16-C7,28-D3

5-C7

5-C7

16-C7,28-B3

5-C7

15-D5

15-D3,25-B4,25-B6

R60 0

6-C4

6-C4

DNIR61 0

DNIR62 0

6-C4

5-B2

17-B56-C4

DNIR173 0

30-A7

J9

61082-061409LF

43

41

39

37

35

33

31

29

27

25

23

21

60

58

56

54

52

50

48

46

44

42

19

17

15

13

11

9

7

5

3

1

40

38

36

34

32

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

59

57

55

53

51

49

47

45

30-A7

R131 019-C1

DNI

C204

1.0UFDNI1.0UF

C205

DNI1.0UF

C206

MIPI_CSI0_DATA0_M

MIPI_CSI0_DATA0_P

MIPI_CSI0_DATA1_P

MIPI_CSI0_CLK_P

MIPI_CSI0_DATA1_M

MIPI_CSI0_DATA2_M

MIPI_CSI0_DATA2_P

MIPI_CSI0_DATA3_M

MIPI_CSI0_DATA3_P

MIPI_CSI0_CLK_M

MIPI_DSI0_CLK_P_EXP_CONN

MIPI_DSI0_CLK_M_EXP_CONN

MIPI_DSI0_DATA0_P_EXP_CONN

MIPI_DSI0_DATA0_M_EXP_CONN

MIPI_DSI0_DATA1_P_EXP_CONN

MIPI_DSI0_DATA1_M_EXP_CONN

MIPI_DSI0_DATA2_P_EXP_CONN

MIPI_DSI0_DATA2_M_EXP_CONN

MIPI_DSI0_DATA3_P_EXP_CONN

MIPI_DSI0_DATA3_M_EXP_CONN

I2C0_SCL

I2C0_SDA

I2C2_SCL

I2C2_SDA

I2C1_SDA

I2C1_SCL

LS_EXP_GPIO_G

LS_EXP_GPIO_C

LS_EXP_GPIO_B

LS_EXP_GPIO_H

CSI0_MCLK

CSI1_MCLK

LS_EXP_GPIO_K

LS_EXP_GPIO_I

LS_EXP_GPIO_A

LS_EXP_MI2S_DATA0

PM_RESIN_N

LS_EXP_GPIO_F

PHONE_ON_N

LS_EXP_GPIO_L

LS_EXP_GPIO_J

SYS_5P0

LS_EXP_1P8

LS_EXP_GPIO_D

LS_EXP_GPIO_E

USB_HS_D_P_EXP

USB_HS_D_M_EXP

VREG_L15_1P8

VREG_L16_1P8

LS_EXP_MI2S_WS

LS_EXP_MI2S_SCK

SYS_DCIN

UART0_TX

UART0_RX

UART0_CTS_N

UART0_RTS_N

UART1_TX

UART1_RX

SPI1_MOSI

SPI1_MISO

SPI1_CS_N

SPI1_CLK

I2C3_SDA

I2C3_SCL

SPI0_MOSI

SPI0_MISO

SPI0_CS_N

SPI0_CLK

I2C3_SCL_CONN

I2C3_SDA_CONN

MIPI_CSI1_CLK_P

MIPI_CSI1_CLK_M

MIPI_CSI1_DATA0_M

MIPI_CSI1_DATA0_P

MIPI_CSI1_DATA1_P

MIPI_CSI1_DATA1_M

UART1_TX_DBG

UART1_RX_DBG

(APQ GPIO_0)

(APQ GPIO_1)

(APQ GPIO_2)

(APQ GPIO_3)

(APQ GPIO_4)

(APQ GPIO_5)

(APQ GPIO_6)

(APQ GPIO_7)

(APQ GPIO_8)

(APQ GPIO_9)

(APQ GPIO_10)

(APQ GPIO_11)

(APQ GPIO_12)

(APQ GPIO_13)

(APQ GPIO_14)

(APQ GPIO_15)

(APQ GPIO_16)

(APQ GPIO_17)

(APQ GPIO_18)

(APQ GPIO_19)

(APQ GPIO_22)

(APQ GPIO_23)

(APQ GPIO_24) (APQ GPIO_25)

(APQ GPIO_26)

(APQ GPIO_27)

(APQ GPIO_28)(APQ GPIO_29)

(APQ GPIO_30)

(APQ GPIO_33)

(APQ GPIO_34)(APQ GPIO_35)

(APQ GPIO_36) (TS_RST_N)

(TS_INT_N)

(DSI_VSYNC) (DSI_RST)

(CSI1_RST)

(CSI0_RST) (CSI0_PWDN)

(CSI1_PWDN)

HS EXPANSION CONNECTOR LS EXPANSION CONNECTOR

(GYRO_ACCL_INT_N)

(MAG_INT)

(DSI_BLCTRL)

(APQ_INT)

NC

NC

NC

NC

NC

(APQ GPIO_69)

NC

(APQ GPIO_110)

(APQ GPIO_113)

(APQ GPIO_114)

(APQ GPIO_115)

(ALSP_INT)

(PM MPP_4)

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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D

A

B

C

D

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6

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SCALE NONE

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OF

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AD

LAST_EDITOR1 13/05/2015:10:41

30 33JTAG / UART / ANALOG EXPANSION CONNECTORS

JTAG_SRST_N

JTAG_TMS

JTAG_TRST_N

JTAG_TDI

JTAG_TCK

JTAG_TDO

SPKR_OUT_P

GND_CFILT

CDC_MIC3_P

CDC_MIC_BIAS1

CDC_HPH_L

CDC_HPH_R

CDC_HS_DET

FM_RX_ANT

CDC_MIC2_P

SPKR_OUT_M

VPH_PWR

JTAG_PS_HOLD

CDC_HPH_REF

CDC_MIC_BIAS2

VREG_L5_1P8

JTAG INTERFACE (TOP) ANALOG EXPANSION CONNECTOR

J763453-116LF

1615

1413

1211

109

87

65

43

21R160

2K

DNI

JTAG_SRST_N

JTAG_TMS_DBG

JTAG_TDI_DBG

JTAG_TDO_DBG

JTAG_TRST_N

CASE

J15

DF12B(3.0)-20DS-0.5V(86)

21

22

20 19

18 17

16 15

14 13

12 11

10 9

8 7

6 5

4 3

2 1

JTAG_TCK_DBG

VREG_L5_1P8

G

D

S

1

NTK3139PT1GQ8

2

3

100K

R172

JTAG_DET_N

VREG_L5_1P8

JTAG_PS_HOLD

UART1_TX_DBG

UART1_RX_DBG

JTAG_TDO_DBG

JTAG_TCK_DBG

JTAG_TDI_DBG

JTAG_TMS_DBG

DNI

R171 0

0R175

R170

0

DNI

R176 0

0R177

R178 0

TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16

ANALOG INTERFACES

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

ASSY OPTION

INSTALL J7

DNI J7

SUPPORTED

YES

NO

31-C6

3-C6

20-A4,20-C6

20-C6

20-C2

20-A4,20-B3

20-C6

16-C7,30-B4

20-C6

15-C1,17-C6,18-C7

20-B2

20-C2

20-C6

3-C6

3-B6,30-B6

3-B6

3-C6,30-B7

3-B6

20-C2

20-C6

30-C5

11-B2,11-C2,14-C3

3-C6,30-C7

30-C5

30-C5

30-C5

3-B6,30-C7

11-B2,11-C2,14-C3

16-C7,30-C7

11-B2,11-C2,14-C3

29-C4

29-C4

30-B7

30-B7

30-B6

30-B6

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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WCN3620 - RF / CONTROL

AD

LAST_EDITOR1 13/05/2015:10:41

31 33

DNI

3%

5.1NH

L16

CONTROL

5

GND8

NC38

BT_SSBI33

NC40

NC31

XO_IN30

FM_SSBI41

WL_BB_IN59

BT_DATA28

WL_CMD_DATA255

WL_BB_IP54

WL_BB_QP53

BT_CTL18

NC

WCN3620

U5

WL_CMD_CLK61

WL_CMD_SET6

WL_BT_RFIO

15

FM_HS_RX50

WL_PDET_IN49

WL_CMD_DATA048

WL_BB_QN47

FM_DATA46

WL_CMD_DATA126

9-B7

5-C2

5-D2

5-D2

5-C2

5-D2

5-C2

5-D2

5-C2

5-D2

5-C2

31-C3

SH1

50-R1732-1

1,2,3,4,5,6,7,8

OUTIN

GND

S5MM8030-2610B

3,4

1 20R93 0R96

DNI

L17

5.1NH

3%

C175 18PF

DNI0.5PFC177

9-B7

9-B7

9-B7

C189 82PF

31-B8

16-C7

30-C4

0734120110

DNI

J13

4

3

2

1

0R94 R95 0

DNI

0R16

FEED1

E10

ANTENNA_SBC8016_WLAN

ANTENNA

IN

GND

OUT

GND

GND

FL1

2400-2500MHZ

BF1411-L2R4NCAB/LF(ES)

5

3

4

2

1

L18

2.7NH

+/-0.1NH

WCSS_BT_SSBI

WCSS_WLAN_DATA_2

WCSS_WLAN_DATA_1

WCSS_WLAN_DATA_0

WCSS_WLAN_CLK

WCSS_FM_SSBI

WCSS_BT_DAT_STB

WCSS_WLAN_SET

WCSS_FM_SDI

WCSS_BT_DAT_CTL

WLAN_BB_Q_P

WLAN_BB_I_P

WLAN_BB_Q_M

WLAN_BB_I_M

RFCLK2

WL_BT_RFIO

WL_BT_RFIO PC_IN PC_OUT

XO_IN

WL_BT_ANT

FM_RX_ANT

Stuffing option: UFL connector for external antenna

Default option: On-board printed antenna

shared pad

NC - SCPC POWER CONTROL IMPLEMENTED

WCN & WGR Circuitry Shield

SCPC POWER CONTROL

(APQ GPIO_39)

(APQ GPIO_40)

(APQ GPIO_41)

(APQ GPIO_42)

(APQ GPIO_43)

(APQ GPIO_44)

(APQ GPIO_45)

(APQ GPIO_46)

(APQ GPIO_47)

(APQ GPIO_48)

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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WCN3620 - PWR / GND

AD

LAST_EDITOR1 13/05/2015:10:41

32 33

PWR_GND

Pins 36,58

GND

Pins 7,16 Pin 23Pin 9 Pins 51,52,56,57

1.8V

Pin 11

Pins 3,13

Isolated

Pin 37

Note:If 2.4 GHz WLAN spurs are observed around 2.6 to 2.7 GHz replace R97 with 20 nH inductor.

C179

0.47UF

4V

C181

100PF

25V

4V

0.47UF

C180

C184

0.01UF

16V

6.3V

10UF

C188

21

20

19

GND17

VDD_BT_PLL_1P316

14

VDD_BT_BB_1P313

12

VDD_WL_2GPA_3P311

10VDD_BT_VCO_1P3

7

VDD_BT_RF_1P33

2

VDD_WL_2GLNA_1P39

VDD_BT_DA_3P34

1

VDD_WL_BB_1P360

VDD_WL_PLL_1P358

VDD_FM_RXBB_1P357

VDD_FM_RXFE_1P356

VDD_FM_PLL_1P352

VDD_FM_VCO_1P351

VDD_WL_UPC_1P343

42

39

VDD_WL_2GPA_1P337

VDD_WL_PLL_LO_1P336

35

34

32

VDD_DIG_1P229

27

25

VDD_XO_1P824

VDD_BT_FM_DIG_1P323

VDD_IO_1P822

U5

WCN3620

45

44

16V

0.01UF

C185

25V

C182

100PF

16V

0.01UF

C186

VDD_BT_TXDA_3P3

0R97

C187

0.01UF

16V

10V

4.7UF

10%

C174

VDD_BT_TXDA_3P3

100PF

C183

25V

6.3V

0.022UF

C190

VREG_S3_1P3

VREG_L9_3P3

VDD_DIG_1P2

VDD_WL_PLL_LO_1P3

240 OHM @ 100MHZ

E5

VREG_L9_3P3

VREG_L5_1P8 VREG_L7_1P8

VDD_WL_PLL_LO_1P3

VREG_L5_1P8

VREG_L7_1P8

VREG_S3_1P3

Pin 24

Pin 22

3.3V

1.3V

VDD_DIG_1P21.2V

Pin 29

19-C1,32-B3

32-C5

12-C8,18-C2,19-C8

12-C2,12-C8,12-D2

12-C2,12-C8,12-D2

32-C3

32-A7

11-B2,11-C2,14-C3

11-B2,11-C2,14-C3

12-C8,18-C2,19-C8

32-B3

32-B6

19-C1,32-B8

32-B3

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

Page 33: DragonBoard 410c - Qualcomm Developer Network · 8 7 6 5 4 3 2 1 a b c d a b c d version edited by title 6 rev 7 5 4 sheet 8 size scale none drawing no of 3 2 1 last edit date 33

U7

2

16

15

14

13

12

11

10

9

8

7

6

5

17

1

3

4GPS_RF_M

GPS_GPO

SCAN

VDD_MSM_1P8V

GPS_VDD_RX_1P3V

GPS_BB_I_M

GPS_GND_RX

SSBI

GPS_BB_I_P

GPS_GND_VCO_LO

GPS_BB_Q_M

GPS_GND_PLL

GPS_VDD_VCO_LO_1P3V

GPS_BB_Q_P

XO

GPS_VDD_PLL_1P3V

GPS_RF_P

WGR7640

FL2

2,5

3

4

1IN

OUT2

OUT1

GND

1565-1606MHZ

SAFFB1G58FA0FT0R14

DNI

C125

1.0UF

DNI

1.0UF

C126

25V

C144

+/-0.1PF

1.2PF

RFCLK1

SSBI_GPS

VREG_L7_1P8

GPS_BB_I_M

GPS_BB_I_P

GPS_BB_Q_M

GPS_BB_Q_P

VREG_L1_1P225

14 356 28 7

A

B

C

D

A

B

C

D

EDITED BYVERSION

TITLE

6

REV

47 5

SHEET

8

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SCALE NONE

DRAWING NO

OF

3 2 1LAST EDIT DATE

WGR7640 - GPS

LAST_EDITOR1 13/05/2015:10:41

33 33

AD

R320

5%0.050W

R330

5%0.050W

R46 0

R47 0

R49 0

C141

0.1UF

C139

0.1UF

C140

0.1UF

J11

4

3

2

1

0734120110

R39 0

DNI

OUTIN

GND

J12MM8030-2610B

3,4

1 2GPS_RF_M

GPS_RF_P

GPS_RF_M

GPS_RF_P

0R70

shared pad

Default option: On-board printed antenna

Stuffing option: UFL connector for external antenna

WGR_1P8

WGR_1P3

WGR_1P3_LO_PLL

GPS_ANTR126 0

+/-0.1NH

2.7NH

L11

E9

1FEED

ANTENNA_SBC8016_GPS

ANTENNA

L19

100NH

VREG_L7_1P8

DNI

DNI

1.0UF

C217

C138 1000PF

5% 50V

C216 22PF

DNI

(APQ GPIO_104)

L7

10NH3%

3% 10NH

L8

33-C6

9-B3

9-B3

9-B3

9-B3

16-C7

33-C6

33-B7

6-B7

12-C2,12-C8,12-D2

19-C1

33-B7

12-C2,12-C8,12-D2

LM25-P0436-1

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.

DESIGN PACKAGE, SCHEMATIC, DRAGONBOARD 410C

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D

C

B

A

8 7 6 5 4

8 I 7 I 6 I 5 y 4 I

3 2 1

C

B

A

3 I 2 1

EXHIBIT1

PLEASE READ THIS LICENSE AGREEMENT (“AGREEMENT”) CAREFULLY. THIS AGREEMENT IS A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU REPRESENT) AND

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ARISING OUT OF THE USE OR INABILITY TO USE, OR THE DELIVERY OR FAILURE TO DELIVER, ANY OF THE MATERIALS, OR ANY BREACH OF ANY OBLIGATION UNDER THIS AGREEMENT, EVEN IF QTI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. THE FOREGOING LIMITATION OF

LIABILITY SHALL REMAIN IN FULL FORCE AND EFFECT REGARDLESS OF WHETHER YOUR REMEDIES HEREUNDER ARE DETERMINED TO HAVE FAILED OF THEIR ESSENTIAL PURPOSE. THE ENTIRE LIABILITY OF QTI, QTI’s AFFILIATES AND ITS LICENSORS, AND THE SOLE AND EXCLUSIVE REMEDY

OF YOU, FOR ANY CLAIM OR CAUSE OF ACTION ARISING HEREUNDER (WHETHER IN CONTRACT, TORT, OR OTHERWISE) SHALL NOT EXCEED US$10.

2. COMPLIANCE WITH LAWS; APPLICABLE LAW.

Any litigation or other dispute resolution between You and Us arising out of or relating to this Agreement, or Your relationship with Us will take place in the Southern District of California, and You and QTI hereby consent to the personal jurisdiction of and exclusive venue in the state and federal courts within that District with

respect any such litigation or dispute resolution. This Agreement will be governed by and construed in accordance with the laws of the United States and the State of California, except that body of California law concerning conflicts of law. This Agreement shall not be governed by the United Nations Convention on Contracts

for the International Sale of Goods, the application of which is expressly excluded.

3. CONTRACTING PARTIES. If the Materials are downloaded on any computer owned by a corporation or other legal entity, then this Agreement is formed by and between QTI and such entity. The individual accepting the terms of this Agreement represents and warrants to QTI that they have the authority to bind such

entity to the terms and conditions of this Agreement.

4. MISCELLANEOUS PROVISIONS. This Agreement, together with all exhibits attached hereto, which are incorporated herein by this reference, constitutes the entire agreement between QTI and You and supersedes all prior negotiations, representations and agreements between the parties with respect to the subject

matter hereof. No addition or modification of this Agreement shall be effective unless made in writing and signed by the respective representatives of QTI and You. The restrictions, limitations, exclusions and conditions set forth in this Agreement shall apply even if QTI or any of its affiliates becomes aware of or fails to act in a

manner to address any violation or failure to comply therewith. You hereby acknowledge and agree that the restrictions, limitations, conditions and exclusions imposed in this Agreement on the rights granted in this Agreement are not a derogation of the benefits of such rights. You further acknowledges that, in the absence of

such restrictions, limitations, conditions and exclusions, QTI would not have entered into this Agreement with You. Each party shall be responsible for and shall bear its own expenses in connection with this Agreement. If any of the provisions of this Agreement are determined to be invalid, illegal, or otherwise unenforceable,

the remaining provisions shall remain in full force and effect. This Agreement is entered into solely in the English language, and if for any reason any other language version is prepared by any party, it shall be solely for convenience and the English version shall govern and control all aspects. If You are located in the province

of Quebec, Canada, the following applies: The Parties hereby confirm they have requested this Agreement and all related documents be prepared in English.

COPYRIGHT © 2017 QUALCOMM TECHNOLOGIES, INC. ALL RIGHTS RESERVED.

USE OF THIS DOCUMENT IS SUBJECT TO THE LICENSE SET FORTH IN EXHIBIT 1.