Digital Video Recorder Update Eric Bowden, Matt Ricks, Irene Thompson.
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Transcript of Digital Video Recorder Update Eric Bowden, Matt Ricks, Irene Thompson.
Wed., February 29, 2006 Digital Video Recorder 2
Presentation Roadmap
Introduction&
Logistics
Introduction&
Logistics
Interfaces
Risks
Brief Project Review
Timeline
Bill of Materials
Wed., February 29, 2006 Digital Video Recorder 3
What is a Digital Video Recorder?A video capture unit for live television
signals
Baseline FunctionalityPause Live TV
Never miss part of a show again due to interruptions
Rewind Live TV For up to 15 minutes of the broadcast
Fast Forward Allows the user to skip through selected
portions of the buffered broadcast
Wed., February 29, 2006 Digital Video Recorder 4
ScheduleApril 2006
Design Finalized
May 2006 Materials Ordered
June/July/August 2006 Fabrication of PCI Board Programming of: Kernel,
Microcontroller, and User Interface
September 2006 Integration of Hardware and Software
October 2006 Debugging
November/December 2006 Implementation of Extensions
Wed., February 29, 2006 Digital Video Recorder 5
Bill of MaterialsPart Numbe
r
Description Vendor
S5335Matchmaker PCI
InterfaceAMCC
EL4581CN Video sync separatorElantec (near-equiv from
National)
74HC14Hex Schmitt inverting
bufferTexas/National/Motorola
74HC404012-bit async. binary
counterTexas/National/Motorola
74HC74Dual 'D' latch with
set/resetTexas/National/Motorola
74HC4017 Decade counter Texas/National/Motorola
74HC00 Quad NAND gate Texas/National/Motorola
74HC541 8-bit data buffer Texas/National/Motorola
SMJ55161 16-Bit Multiport VRAM Texas
Wed., February 29, 2006 Digital Video Recorder 6
Presentation Roadmap
Internal Analog Interface/Processing
Internal Digital Interface
Introduction&
Logistics
InterfacesInterfaces
Risks
Introduction&
Logistics
Wed., February 29, 2006 Digital Video Recorder 8
What is MPEG Moving Pictures Experts Group Supports JPEG and H.261 through
downward compatibility Supports higher Chrominance
resolution and pixel resolution (720x480 is standard used for TV signals)
Supports interlaced and noninterlaced modes
Uses Bidirectional prediction in “Group Of Pictures” to encode difference frames.
Wed., February 29, 2006 Digital Video Recorder 9
MPEG Bitstream
Source: http://www.doc.ic.ac.uk/~nd/surprise_96/journal/vol4/sab/report.html
Wed., February 29, 2006 Digital Video Recorder 10
Bidirectional Coding
I = Intra – Anchor picture P = Forward predicted B = Bidirectionally predicted
Source: “Parallelization of Software Mpeg Compression” http://www.evl.uic.edu/fwang/mpeg.html
Wed., February 29, 2006 Digital Video Recorder 11
Digital Interface
Two major digital paths1. Sending digitized A/V signal to
the host program for storage and manipulation.
2. Retrieving A/V for decompression and display from the host program.
Wed., February 29, 2006 Digital Video Recorder 12
PCI Interface Chip
AMCC S5335 Matchmaker PCI 2.1, 3.3V-Signalling Interface
Chip 33 MHz, 132 MB/s
Wed., February 29, 2006 Digital Video Recorder 13
Basic Operation: Card to HostOf Matchmakers and Mailboxes The Matchmaker chip serves as a
target for the PCI Card microcontroller. It takes care of the PCI bus timing and ISR handling.
Wed., February 29, 2006 Digital Video Recorder 14
Basic Operation: Host to CardThe host application will be in
charge of which data is sent back to the PCI Card. Therefore, it will send I/O Request Packets (via the kernel module) to the device containing data to output.
The Matchmaker chip has a provision for Data Pass-Thru lines; this will allow the data to go straight to the uC for assembly and output.
Wed., February 29, 2006 Digital Video Recorder 15
The Mediator (Device Driver) Most difficult part on the digital
side. The driver is conceptually like a
DLL. Uses DriverEntry and DriverObject to register functionality with the OS.
Driver processes requests (IRP) sent from applications in user mode. Also registers the ISR with OS to manage incoming data from the PCI card.
Wed., February 29, 2006 Digital Video Recorder 16
Presentation Roadmap
RisksIntroduction
&Logistics
InterfacesInterfaces
RisksRisks
Wed., February 29, 2006 Digital Video Recorder 17
Risks Speed, not being able to store live video
faster than we receive it. Kernel Module, difficulty factor unknown Needing to manufacture multiple PCI
boards (unsoldering pins) Traces not lining up nicely = Multi-layer
board Commercial Detection Compression backlog (Frame dropping)
Different chip or Different compression codec