Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean...

Digital Systems© Korea Univ. of Tech. & Edu. Dept. of Info. & Comm.Chap. 3 Logic Gates/Boolean AlgebraChap. 3 Logic Gates/Boolean Algebra

3-1Chap. 3 Logic Gates and Boolean Algebra

Logic Gates : the basic elements of logic circuits(AND, OR, NOT,...) Boolean Algebra

A tool for the analysis and design of digital systems Describes relationship between logic circuit’s inputs and outputs Used to help simplify a logic circuit

3-1 Boolean constants and

variables Only two possible values(Many

different terms used synonymously) Logic level

0 and 1 do not present actual numbers but instead represent the state of a voltage variable

3-2 Truth tables Describing how a logic circuit’s output

depends on the logic level of circuit’s input(2N possible inputs)

Fig. 3-1 Truth Table(2, 3, 4 inputs)

Logic 0 Logic 1FALSE TRUE

Off OnLow HighNo Yes

Open Close

A B x0 0 10 1 01 0 11 1 0

A B B x0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 01 1 0 01 1 1 1

A B C B x0 0 0 0 00 0 0 1 10 0 1 0 10 0 1 1 00 1 0 0 00 1 0 1 00 1 1 0 00 1 1 1 11 0 0 0 11 0 0 1 11 0 1 0 01 0 1 1 01 1 0 0 01 1 0 1 01 1 1 0 11 1 1 1 1

?AB

x

Tab. 3-1 Fig. 3-1

(a)

(b)(c)


3-2

3-3 OR Operation with OR gates Output x is a logic 1 if one or more inputs are 1(Fig. 3-2(a)) Boolean expression : x = A + B

x= 1 + 1 = 1, x = 1 + 1 + 1 = 1, x = 1 + 1 + …+ 1 = 1

OR Gate : Fig. 3-2(b) Multiple input OR Gate : Fig. 3-3 Exam. 3-1 : Alarm is activated if temperature or pressure exceed a reference Exam. 3-2 : Determine the OR gate output in Fig. 3-5 Exam. 3-3 : Same time transition in A and B input, Glitch or Spike

3-4 AND Operation with AND gates Output x is 1 only when all inputs are 1 Boolean expression : x = AB = A•B OR Gate : Fig. 3-7(b) Multiple input OR Gate : Fig. 3-8 Exam. 3-4, 3-5A, 3-5B

A B x= A+B0 0 00 1 11 0 11 1 1

A B B x= A+B+C0 0 0 00 0 1 10 1 0 10 1 1 11 0 0 11 0 1 11 1 0 11 1 1 1

Fig. 3-2 Truth Table and Symbol Fig. 3-3 Three-input OR

AB

ABC

X= A+B X= A+B+C

A B x= AB0 0 00 1 01 0 01 1 1

A B B x= ABC0 0 0 00 0 1 00 1 0 00 1 1 01 0 0 01 0 1 01 1 0 01 1 1 1

X= ABAB

Fig. 3-7 Truth Table and Symbol

X= ABCABC

Fig. 3-8 Three-input AND


3-3

3-5 NOT Operation Single input operation, Complement of input NOT operation : x= A NOT circuit : Inverter(Fig. 3-11(b))

3-6 Describing Logic Circuits Algebraically Boolean logic can describe any logic circuit by Boolean expression. Order of precedence : Parentheses, NOT, AND, OR Fig. 3-12, 13, 14, 15

3-7 Evaluating Logic Circuit Output Given a Boolean expression

Evaluate output for given inputs Exam. : Fig. 3-15(a)

» A=0, B=1, C=1, D=1 Exam. : Fig. 3-15(b)

» A=0, B=0, C=1, D=1, E=1

0

0111

)1(111

)10(111

)10(110

)(

DABCAx

1

11

1]11[

1]01[

1]101[

1]1)00(1[

])([

ECBADx

A x= A'0 11 0

Fig. 3-11 Truth Table, Symbol, waveform

AX= A

1A 0 1x 0


3-4

Evaluation rule for Boolean expression1) Perform all inversions of single terms

2) Perform all operations within parentheses

3) Perform an AND operation before an OR operation

4) If an expression has a bar over it, perform the expression first and then invert the result

Determining output level from a diagram The output can be determined directly from the circuit diagram without using

Boolean expression. 3-8 Implementing circuits from Boolean expression

Circuit can be implemented from expression BCACBACy

BCACBACy AC

BCA

CB

A B C

D x

BCACBACy

AC

CB

BCA

A

B C

Fig. 3-16 Determining the output from a diagram

Fig. 3-17 Constructing a logic circuit from a Boolean expression

1 000

01

1

1

11


3-5

3-9 NOR gates and NAND gates NOR gate : Exam. 3-8, 3-9 NAND gate : Exam. 3-10, 3-11, 3-12

3-10 Boolean Theorems Single variable theorems(Fig. 3-25)

x • 0 = 0, x • 1 = x, x • x = x, x • x = 0 x + 0 = x, x + 1 = 1, x + x = x, x + x = 1

Multivariable theorems x + y = y + x, x.y = y.x x + (y + z) = (x + y)+ z = x + y + z, x (yz) = (xy)z = xyz, x (y + z) = xy + xz, (w + x)(y + z) = wy + xy + wz + xz x + xy = x : P.81 case 1,2,3,4 or x + xy = x(1+y) = x•1= x x + x y= x = y : (x + x)•(x + y) = 1 •(x + y) = x + y

Exam. 3-13, 3-14, 3-15

BAx

BAx

Commutative laws

Associative laws

Distributive laws

A B A+B A+B0 0 0 10 1 1 01 0 1 01 1 1 0

A B AB AB0 0 0 10 1 0 11 0 0 11 1 1 0

BAx BAx

Fig. 3-19 NOR Gate Fig. 3-22 NAND Gate


3-6

3-11 DeMorgan’s Theorems DeMorgan’s Theorems

Exam.

yxyx )(

yxyx )(

zyxzyx )(

zyxzyx )(

yxyx

yxyx

yx yxyx

yxyx

yx yxyx

yxyx

Fig. 3-26, 27 Equivalent circuits implied by DeMorgans Theorems

Exam. Exam. Exam. 3-16

CBCA

CBA

CBA

CBA

CBAx

)(

)(

)(

)(

)(

)(

)(

CBA

CBA

CBA

CBAz

FDEDCABA

FEDCBA

EFDBCA

EFDBCA

EFDBCAw

)]([)]([

)()(

)()(

)()(

EFCDAB

EFCDAB

EFCDABx

DBCA

DBCA

DBCA

DBCAz

)()(

)()(

)()(

Exam.

Exam. 3-17 : Determine the output expression and simplify it

using DeMorgan Theorems

CBA

CBA

CBAz


3-7

3-12 Universality of NAND and NOR gates Implement any logic expression using only NAND or NOR gates

Exam. 3-18 : A conveyer belt will shut down whenever specific conditions

occur(x = AB + CD) 74LS00 NAND, 74LS08 AND, 74LS32 OR gate 사용 (Fig. 3-31)

AAAx

AAAx

BA BAABx BAx

A

B

A

B

BABAx BABAx

Fig. 3-29, 30 NAND/NOR gates can be used to implement any Boolean operation

Fig. 3-32 Possible implementation


3-8

3-13 Alternate Logic-Gate Representations Standard Logic Symbols : AND, OR, Inverter, NAND, NOR Alternate Logic Symbols : Fig. 3-33

1) Add bubbles on input and output lines that do not have bubbles, and Remove bubbles that are already there

2) Change the operation symbol from AND to OR, or from OR to AND(Inverter is not changed)

Note:» The equivalence can be extended to gates with any

number of inputs» None of the standard symbols have bubbles on their

inputs, but all the alternate symbols have bubbles on their inputs

» The standard and alternate symbols for each gate represent the same physical circuit(No differences)

» NAND and NOR gates are inverting gates(both the standard and the alternate symbols have a bubble on either the input or the output)

» AND and OR gates are non-inverting gates(the alternate symbols have bubbles on both inputs and outputs)

BABA

BABA

BABA

BABA

AA

BA

BA

BA

BA

Fig. 3-33 Standard and alternate symbols


3-9

Logic Symbol Interpretation Active-HIGH : An input or output line has no bubbles Active-LOW : An input or output line does have bubbles

Exam. 3-19 : Give the interpretation of the two OR gate symbols

3-14 Which Gate Representation to Use Proper use of the alternate gate can make the circuit operation much clear

Fig. 3-34 Interpretation of the two NAND gates

Fig. 3-35 Interpretation of the two OR gates

BABABA

Active-LOWActive-HIGH Active-LOW Active-HIGH

Output goes LOW only when all inputs are HIGH

Output goes HIGH only when any inputs are LOW

Output goes HIGH only when any inputs are HIGH

Output goes LOW only when all inputs are LOW

BABABA

Active-HIGH

Output goes HIGH whenever either

A=B=1 or C=D=1

Output goes LOW only when A or B=0 and

C or D=0

Active-LOW

Fig. 3-36 Alternate RepresentationOriginal Circuit


3-10

Which Circuit Diagram Should be Used? The answer to this question depends on the particular function being

performed by the circuit output» If the circuit is used to turn on/off an LED, Relay, or Motor

Active-HIGH : On when output goes to 1 Active-LOW : On when output goes to 0

Bubble Placement Whenever possible, choose gate symbols

» Bubble outputs connected to bubble inputs(Fig. 3-36 (b))

» Non-bubble outputs connected to non-bubble inputs(Fig. 3-36 (c))

Exam. 3-20, 21, 22, 23 Asserted Levels

Asserted = Active Unasserted = Inactive

Labeling Active-LOW Logic Signals Over-bar = Active Low Signal

Labeling Bi-state Signals Output signals have two active states

Address Decode 회로

MEMRAMBROMAROMRD ,,,,

DATACONTWRRD /,/

Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean...

Documents

Transcript of Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean...