Digital Systems and Binary Numbers · Numbering Systems Binary, Octal & Hexadecimal Numbers Number...
Transcript of Digital Systems and Binary Numbers · Numbering Systems Binary, Octal & Hexadecimal Numbers Number...
Digital Systems and Binary Numbers
EE 200
Digital Logic Circuit Design
Dr. Abdulaziz Tabbakh
College of Computer Sciences and Engineering
King Fahd University of Petroleum and Minerals
EE 200– Digital Logic Circuit Design – KFUPM slide 2
Outline
Introduction
Numbering Systems
Binary, Octal & Hexadecimal Numbers
Number Base Conversions
Binary Addition, Subtraction, Multiplication
Signed and Unsigned Numbers
Binary Codes and Binary Logic
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Introduction
The natural world around us is predominantly Analog
Analog means Continuous (both in time and amplitude)
Value changes smoothly over time
Have a continuous (infinite) range of amplitudes (Values)
Examples:
Sound
Temperature
Speed
Voltage/Current
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Why Digital ?
Digital systems are everywhere
Finite (discrete) number of possible states (values)
Can present and manipulate information and elements
Dealing with finite states is easier than a infinite number of
states
Examples:
Alphabet
Playing cards
Chessboard
Only 4 allowed levels
Special Case of Digital: only two signal levels Binary signal
Values between such levels
are not allowed (Ignored)
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Signals in Digital Systems
Information is represented in digital systems by signals
Most common types of signals are currents and voltages
Signals in digital systems can have two possible values:
0 (OFF)
1 (ON)
These digital systems are called binary systems
Each digit is called bit and a group of bits is called binary
code
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Numbering Systems
Numbering systems are characterized by their base
(radix) number.
In general a numbering system with a base r will have r
different digits (including the 0) in its number set. These
digits will range from 0 to r-1.
The most widely used numbering systems are listed in
the table below:
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Weighted Number Systems
A number D consists of n digits with each digit having a
particular position.
Every digit position is associated with a fixed weight.
If the weight associated with the ith position is wi, then
the value of D is given by:
EE 200– Digital Logic Circuit Design – KFUPM slide 8
Example of Weighted Number Systems
The Decimal number system is a weighted system.
For integer decimal numbers, the weight of the rightmost
digit (at position 0) is 1, the weight of position 1 digit is
10, that of position 2 digit is 100, position 3 is 1000, etc.
Thus, w0 = 1, w1 = 10, w2=100, w3 = 1000, etc.
Example:
Show how the value of the
decimal number 9375 is
estimated.
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The Radix (Base)
For digit position i, most weighted number systems use
weights (wi) that are powers of some constant value
called the radix (r) or the base such that wi = ri.
A number system of radix r, typically has a set of r
allowed digits ∈ {0,1, …,(r-1)}.
The leftmost digit has the highest weight Most
Significant Digit (MSD).
The rightmost digit has the lowest weight Least
Significant Digit (LSD).
EE 200– Digital Logic Circuit Design – KFUPM slide 10
The Radix (Base)
Example: Decimal Number System
1. Radix (Base) = Ten
2. Since wi = ri, then
w0 = 100 = 1,
w1 = 101 = 10,
w2= 102 = 100,
w3 = 103 = 1000, etc.
3. Number of Allowed Digits is Ten:
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9}
EE 200– Digital Logic Circuit Design – KFUPM slide 11
The Radix Point
A number D of n integral digits and m fractional digits is
represented as shown:
Digits to the left of the radix point (integral digits) have
positive position indices, while digits to the right of the
radix point (fractional digits) have negative position
indices.
EE 200– Digital Logic Circuit Design – KFUPM slide 12
The Radix Point
Position indices of digits to the left of the radix point (the
integral part of D) start with a 0 and are incremented as
we move left (dn-1dn-2…..d2d1d0).
Position indices of digits to the right of the radix point
(the fractional part of D) start with a -1 and are
decremented as we move right(d-1d-2…..d-m).
The weight associated with digit position i is given by wi
= ri, where i is the position index ∀i= -m, -m+1, …, -2, -1,
0, 1, ……, n-1.
The Value of D is Computed as:
EE 200– Digital Logic Circuit Design – KFUPM slide 13
The Radix Point
Example: Show how the value of the decimal number
52.946 is estimated.
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Notation
Let (D)r denote a number D expressed in a number
system of radix r.
In this notation, r will be expressed in decimal.
Examples:
(29)10 Represents a decimal value of 29. The radix “10”
here means ten.
(100)16 is a Hexadecimal number since r = “16” here
means sixteen. This number is equivalent to a decimal
value of 162=256.
(100)2 is a Binary number (radix =2, i.e. two) which is
equivalent to a decimal value of 22 = 4.
EE 200– Digital Logic Circuit Design – KFUPM slide 15
Binary System
r=2
Each digit (bit) is either 1 or 0
Every binary number is a sum of powers of 2
1 1 1 1 1 1 1 1
27 26 25 24 23 22 21 20
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Binary System
Examples: Find the decimal value of the two Binary
numbers (101)2 and (1.101)2
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Octal System
r = 8 (Eight = 23 )
Eight allowed digits {0, 1, 2, 3, 4, 5, 6, 7}
Examples: Find the decimal value of the two Octal
numbers (375)8 and (2.746)8
EE 200– Digital Logic Circuit Design – KFUPM slide 18
Hexadecimal System
r = 16 (Sixteen = 24)
Sixteen allowed digits {0-to-9 and A, B, C, D, E, F}
Where: A = Ten, B = Eleven, C = Twelve, D = Thirteen,
E = Fourteen & F = Fifteen.
Examples: Find the decimal value of the two
Hexadecimal numbers (9E1)16 and (3B.C )16
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Hexadecimal Integers
Binary values are represented in hexadecimal.
EE 200– Digital Logic Circuit Design – KFUPM slide 20
Binary, Octal, and Hexadecimal
Decimal Binary OctalHexa
decimalDecimal Binary Octal
Hexa
decimal
0 0000 00 0 8 1000 10 8
1 0001 01 1 9 1001 11 9
2 0010 02 2 10 1010 12 A
3 0011 03 3 11 1011 13 B
4 0100 04 4 12 1100 14 C
5 0101 05 5 13 1101 15 D
6 0110 06 6 14 1110 16 E
7 0111 07 7 15 1111 17 F
EE 200– Digital Logic Circuit Design – KFUPM slide 21
Important Properties
The Largest value that can be expressed in n integral
digits is (rn-1).
The Largest value that can be expressed in m fractional
digits is (1-r-m).
The Largest value that can be expressed in n integral
digits and m fractional digits is (rn -r–m)
Total number of values (patterns) representable in n
digits is rn.
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Important Properties
Q. What is the result of adding 1 to the largest digit of
some number system??
For the decimal number system, (1)10 + (9)10 = (10)10
For the binary number system, (1)2 + (1)2 = (10)2 = (2)10
For the octal number system, (1)8 + (7)8 = (10)8 = (8)10
For the hexadecimal system, (1)16 + (F)16 = (10)16 = (16)10
EE 200– Digital Logic Circuit Design – KFUPM slide 23
Important Properties
Q. What is the largest value representable in 3-integral
digits?
A. The largest value results when all 3 positions are filled
with the largest digit in the number system.
For the decimal system, it is (999)10
For the octal system, it is (777)8
For the hex system, it is (FFF)16
For the binary system, it is (111)2
Q. What is the result of adding 1 to the largest 3-digit
number?
For the decimal system, (1)10+ (999)10 = (1000)10 = (103)10
For the octal system, (1)8+ (777)8 = (1000)8= (83)10
EE 200– Digital Logic Circuit Design – KFUPM slide 24
Important Properties
In general, for a number system of radix r, adding 1 to
the largest n-digit number = rn.
Accordingly, the value of largest n-digit number = rn - 1.
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Number Base Conversion
Given the representation of some number (XB) in a
number system of radix B, we need to obtain the
representation of the same number in another number
system of radix A, i.e. (XA).
For a number that has both integral and fractional parts,
conversion is done separately for both parts, and then
the result is put together with a system point in between
both parts.
Converting Whole (Integer) Numbers
Assume that XB has n digits (bn-1………..b2 b1 b0)B, where bi is a
digit in radix B system, i.e. bi ∈ {0, 1, ….., “B-1”}.
Assume that XA has m digits (am-1………..a2 a1 a0)A, where ai is
a digit in radix A system, i.e. ai ∈ {0, 1, ….., “A-1”}.
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Converting Whole (Integer) Numbers
Dividing XB by A, the remainder will be a0.
In other words, we can write XB = Q0.A+a0
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Converting Whole (Integer) Numbers
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Converting Whole (Integer) Numbers
This division procedure can be used to convert an
integer value from some radix number system to any
other radix number system.
The first digit we get using the division process is a0,
then a1, then a2, till am-1
Example: Convert (53)10 to (?)2
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Converting Whole (Integer) Numbers
Since we always divide by the radix, and the quotient is
re-divided again by the radix, the solution table may be
compacted into 2 columns only as shown:
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Converting Whole (Integer) Numbers
Example: Convert (755)10 to (?)8
Example: Convert (1606)10 to (?)12
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Converting Binary to Decimal
Weighted positional notation shows how to calculate
the decimal value of each binary bit:
Decimal = (dn-1 2n-1) + (dn-2 2n-2) + ... + (d1 21) + (d0 20)
d = binary digit
binary 10101001 = decimal 169:
(1 27) + (1 25) + (1 23) + (1 20) = 128+32+8+1=169
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Convert Unsigned Decimal to Binary
Repeatedly divide the decimal integer by 2. Each
remainder is a binary digit in the translated value:
37 = 100101stop when
quotient is zero
least significant bit
most significant bit
EE 200– Digital Logic Circuit Design – KFUPM slide 33
Another Procedure for Converting from Decimal to Binary
Start with a binary representation of all 0’s
Determine the highest possible power of two that is less
or equal to the number.
Put a 1 in the bit position corresponding to the highest
power of two found above.
Subtract the highest power of two found above from the
number.
Repeat the process for the remaining number
EE 200– Digital Logic Circuit Design – KFUPM slide 34
Another Procedure for Converting from Decimal to Binary
Example: Converting (76)10 to Binary
The highest power of 2 less or equal to 76 is 64, hence
the seventh (MSB) bit is 1
Subtracting 64 from 76 we get 12.
The highest power of 2 less or equal to 12 is 8, hence the
fourth bit position is 1
We subtract 8 from 12 and get 4.
The highest power of 2 less or equal to 4 is 4, hence the
third bit position is 1
Subtracting 4 from 4 yield a zero, hence all the left bits are
set to 0 to yield the final answer
EE 200– Digital Logic Circuit Design – KFUPM slide 35
Binary to Octal Conversion
Each octal digit corresponds to 3 binary bits.
Example: Convert (1110010101.1011011)2 into Octal.
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Binary to Hexadecimal Conversion
Each hexadecimal digit corresponds to 4 binary bits.
Example: Convert (1110010101.1011011)2 into hex.
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Binary to Hexadecimal Conversion Example: Translate the binary integer
000101101010011110010100 to hexadecimal
M1023. swf
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Converting Hexadecimal to Binary
Each Hexadecimal digit can be replaced by its 4-bit
binary number to form the binary equivalent.
M1021. swf
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Converting Hexadecimal to Decimal
Multiply each digit by its corresponding power of 16:
Decimal = (d3 163) + (d2 162) + (d1 161) + (d0 160)
d = hexadecimal digit
Examples:
(1234)16 = (1 163) + (2 162) + (3 161) + (4 160) =
(4,660) 10
(3BA4)16 = (3 163) + (11 * 162) + (10 161) + (4 160) =
(15,268)10
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Converting Decimal to Hexadecimal
(422)10 = (1A6)16
stop when
quotient is zero
least significant digit
most significant digit
Repeatedly divide the decimal integer by 16. Each
remainder is a hex digit in the translated value:
EE 200– Digital Logic Circuit Design – KFUPM slide 41
Converting Fractions
Assume that XB has n digits, XB = (0.b-1 b-2 b-3…….b-n)B
Assume that XA has m digits, XA = (0.a-1 a-2 a-3…….a-m)A
EE 200– Digital Logic Circuit Design – KFUPM slide 42
Converting Fractions
Example: Convert (0.731)10 to (?)2
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Converting Fractions
Example: Convert (0.731)10 to (?)8
Example: Convert (0.357)10 to (?)12
EE 200– Digital Logic Circuit Design – KFUPM slide 44
Binary Addition
1 + 1 = 2, but 2 is not
allowed digit in binary
Thus, adding 1 + 1 in the
binary system results in a
Sum bit of 0 and a Carry bit
of 1.
EE 200– Digital Logic Circuit Design – KFUPM slide 45
Binary Addition
Start with the least significant bit (rightmost bit)
Add each pair of bits
Include the carry in the addition, if present
0 0 0 0 0 1 1 1
0 0 0 0 0 1 0 0
+
0 0 0 0 1 0 1 1
1
(4)
(7)
(11)
carry:
01234bit position: 567
EE 200– Digital Logic Circuit Design – KFUPM slide 46
Binary Subtraction
The borrow digit is negative
and has the weight of the
next higher digit.
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Binary Multiplication
Binary multiplication is performed similar to decimal
multiplication.
Example: 11 * 5 = 55
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Hexadecimal Addition
Divide the sum of two digits by the number base (16).
The quotient becomes the carry value, and the
remainder is the sum digit.
36 28 28 6A42 45 58 4B78 6D 80 B5
11
21 / 16 = 1, remainder 5
EE 200– Digital Logic Circuit Design – KFUPM slide 49
Introduction to Complements
Complements are used in digital systems to simplify
subtraction operation and logical manipulation
Simpler, less expensive circuits
There are two types of complements:
Radix complements (r complement)
Diminished radix complement (r-1 complement)
For decimal system:
9’s complement and 10’s complement
For binary system:
1’s complement and 2’ complement
EE 200– Digital Logic Circuit Design – KFUPM slide 50
Diminished Radix Complement (r-1)
The (r-1)’s complement of any number N in base r
having n digits is:
(rn – 1) – N, for N≠ 0
For decimal numbers, r=10, thus the (10-1)’s=9’s
complement for a number N with n digits is
(10n – 1) – N
Example:
9’s complement of 4345 is 9999 – 4345 = 5654.
9’s complement of 00123 is 99999 – 00123 = 99876.
EE 200– Digital Logic Circuit Design – KFUPM slide 51
(r-1)’s Complement
For a binary number, r=2 and (r – 1)=1
(r –1)’s complement is (1)’s complement
The 1’s complement for a given binary number N with n-
digits is
(2n – 1) – N
Note that 1 – 0= 1, 1 – 1=0 (10), (01)
Example:
1’s complement of 101101 is 111111 – 101101= 010010
1’s complement of 10111 is 11111 – 10111 = 01000
For octal and hexadecimal, subtract from 7 and F
respectively.
EE 200– Digital Logic Circuit Design – KFUPM slide 52
Radix Complement (r)
The r’s complement of an n-digit number N in base r is
defined as:
rn – N, for N≠ 0, and 0 for N=0
r’s complement = (r+1)’s complement + 1
Example:
10’s complement of 8921 is 9999 – 8921+1 = 1079
10’s complement of 01201 is 99999 – 01201+1 = 98799
2’s complement of 10011 is 11111 – 10011 + 1 = 01101
2’s complement of 01011 is 11111 – 01011 + 1 = 10101
EE 200– Digital Logic Circuit Design – KFUPM slide 53
r‘s Complement
Rule: To find the 2’s complement of a binary number
leave all leading zeros and first one unchanged. Then
invert the remaining digits.
Rule: To find the 10’s complement of a decimal number
leave all leading zeros unchanged. Then subtract the
first non-zero digit from 10 and all the remaining digits
from 9’s
Radix points are removed before complement formation
and then restored at the same position
The complement of the complement is the original
number
EE 200– Digital Logic Circuit Design – KFUPM slide 54
Subtraction using r’s complement
Subtraction of two n-digit unsigned numbers M – N in
base r can be performed as follows:
Add M to the r’s complement of N
If M ≥ N, the sum will produce M+(rn – N), rn is the end
carry and is discarded.
If M < N, the result is rn – (N – M) which is the r’s
complement of (N – M ). To get (M – N ), find r’s
complement of (N – M ) and place a negative sign. The
sum does not produce and end carry.
EE 200– Digital Logic Circuit Design – KFUPM slide 55
10’s Complement Subtraction
Subtract 9326 – 7563
The 10’s complement of 7563 is 2437
1
M 9 3 2 6
N (10)’s complement + 2 4 3 7
1 1 7 6 3
Discard the end carry –1 0 0 0 0
1 7 6 3
EE 200– Digital Logic Circuit Design – KFUPM slide 56
10’s Complement Subtraction
Subtract 6657 – 8108
The 10’s complement of 8108 is 1892
No end carry N > M (negative result)
The 10’s complement of 8549 is 1451
The answer is –1451.
1 1
M 6 6 5 7
N (10)’s complement + 1 8 9 2
0 8 5 4 9
EE 200– Digital Logic Circuit Design – KFUPM slide 57
2’s Complement Subtraction
Subtract 11010 – 10111 (26 – 23 = 3)
The 2’s complement of 10111 is 01001
1
M 1 1 0 1 0
N (2)’s complement + 0 1 0 0 1
1 0 0 0 1 1
Discard the end carry –1 0 0 0 0 0
0 0 0 1 1
EE 200– Digital Logic Circuit Design – KFUPM slide 58
2’s Complement Subtraction
Subtract 10001 – 11101 (17 – 29)
The 2’s complement of 11101 is 00011
No end carry N > M (negative result)
The 2’s complement of 10100 is 01100
The answer is – 01100. (-12)
1 1
M 1 0 0 0 1
N (2)’s complement + 0 0 0 1 1
0 1 0 1 0 0
EE 200– Digital Logic Circuit Design – KFUPM slide 59
1’s Complement Subtraction
The 1’s complement is one less than the 2’s complement
Add one if there is an end-carry (end-around carry).
Subtract 11010 – 10111 (26 – 23 = 3)
The 1’s complement of 10111 is 01000
M 1 1 0 1 0
N (1)’s complement + 0 1 0 0 0
1 0 0 0 1 0
End-around carry – 1
0 0 0 1 1
EE 200– Digital Logic Circuit Design – KFUPM slide 60
1’s Complement Subtraction
Subtract 10001 – 11101 (17 – 29)
The 1’s complement of 11101 is 00010
No end carry N > M (negative result)
The 1’s complement of 10011 is 01100
The answer is – 01100. (-12)
M 1 0 0 0 1
N (1)’s complement + 0 0 0 1 0
0 1 0 0 1 1
EE 200– Digital Logic Circuit Design – KFUPM slide 61
Signed Binary Numbers
In math, a negative number is indicated by (-) and a
positive number is indicated by (+)
No signs in computers, only binary numbers.
Use the MSB to indicate sign (0+)(1-)
Signed and unsigned numbers have the same
representation in computers. The user determines
whether the number is signed or unsigned.
The string of bits 11001:
represents the binary equivalent of 25 when considered
as an unsigned number and the binary equivalent of -9
when considered as a signed number.
EE 200– Digital Logic Circuit Design – KFUPM slide 62
Signed Binary Numbers
Three ways to represent signed numbers:
1. Signed Magnitude Representation:
+9 = 00001001 (8-bit)
-9 = 10001001 (8-bit)
2. Signed 1’s complement:
+9 = 00001001 (8-bit)
-9 = 11110110 (8-bit)
3. Signed 2’s complement:
+9 = 00001001 (8-bit)
-9 = 11110111 (8-bit)
EE 200– Digital Logic Circuit Design – KFUPM slide 63
Signed Binary Numbers
EE 200– Digital Logic Circuit Design – KFUPM slide 64
Signed Binary Numbers
Unsigned Numbers
[0,2n-1]
2’s complement
[-2n-1, 2n-1-1]
1’s complement
[-(2n-1-1), 2n-1-1]
Signed-magnitude
[-(2n-1-1), 2n-1-1]
EE 200– Digital Logic Circuit Design – KFUPM slide 65
Arithmetic Addition
Signed-Magnitude representation:
If the signs are the same, add the magnitudes and the
sum the common sign
If the signs are different, subtract the smaller magnitude
from the bigger magnitude and give the difference the sign
of the bigger magnitude.
Signed-complement:
Add the number (including their sign-bit) and discard the
carry out of the sign-bit addition.
EE 200– Digital Logic Circuit Design – KFUPM slide 66
Arithmetic Addition (Example)
+8 01000 -8 11000
+3 00011 -3 11101
+11 01011 -11 110101
-8 11000 +8 01000
+3 00011 -3 11101
-5 11011 +5 100101
EE 200– Digital Logic Circuit Design – KFUPM slide 67
Arithmetic Subtraction
Take the 2’s complement of the subtrahend (including
the sign bit) and ADD it to the minuend (including the
sign bit). A carry out of the sign-bit is discarded.
𝐴 − 𝐵(±𝐴) − +𝐵 = ±𝐴 + −𝐵±𝐴 − −𝐵 = ±𝐴 + (+𝐵)
EE 200– Digital Logic Circuit Design – KFUPM slide 68
Arithmetic Subtraction Example
Calculate (-6) – (-13)
(-6) 11010 (-6) 11010
-(-13) 10011 (+13) 01101
100111 (+7)
EE 200– Digital Logic Circuit Design – KFUPM slide 69
Binary Codes Digital systems and circuits work with signals that have only
one of two states corresponding to digital 1 and 0.
Any discrete element of information among a group of quantities (elements) can be represented by a binary code.
One bit can represent up to two elements (1 or 0).
A binary code is a group of bits (1’s and 0’s)
A Byte is a binary code of 8 bits
A group of 2n distinct elements requires a minimum of n bits
The bit combination of an n-bit code is determined from the count in binary from 0 to 2n-1. Each element is assigned a unique binary bit combination, and no two elements can have the same code to remove ambiguity.
To code a group of m elements, we need to use n bits such that: 2n ≥ m
EE 200– Digital Logic Circuit Design – KFUPM slide 70
Binary Codes
Examples:
A group of four elements can be represented by two bit
code [00, 01, 10, and 11].
A binary code to represent the decimal digits [0-9], must
contain at least 4 bits because (24=16) ≥ 10 ≥ (23=8).
EE 200– Digital Logic Circuit Design – KFUPM slide 71
Binary Coded Decimal
Computer systems (binary), People (Decimal)
Decimal Binary calculation Decimal
Store numbers in Decimal.
code decimal numbers by binary
codes
(24=16) ≥ 10 ≥ (23=8) 4 bits needed.
6 codes are not used.
A decimal number in BCD is the same as
its equivalent binary number.
(185)10 = (0001 1000 0101)BCD = (10111001)2
EE 200– Digital Logic Circuit Design – KFUPM slide 72
BCD Addition
The addition of two BCD digits with a possible carry from the
previous less significant pair of digits results in a sum in the
range 0 to a maximum of (9+9+1=19).
Suppose we add the BCD digits as if they were binary
numbers. Then the binary sum will produce a result in the
range from 0 to 19. In binary, this range will be from 0000 to
10011, but in BCD, it is from 0000 to 1 1001, with the first
(i.e., leftmost) 1 being a carry and the next four bits being the
BCD sum.
If 0 ≤ Sum ≤ 9, then, sum in BCD = sum in binary,
If 10 ≤ Sum ≤ 19, then, sum in BCD is not equal to the
sum in binary. The addition of 6 = (0110)2 to the binary
sum converts it to the correct BCD digit and also produces
a carry as required.
EE 200– Digital Logic Circuit Design – KFUPM slide 73
BCD Addition Example
4 0100 4 0100 8 1000
+5 0101 +8 1000 +9 1001
9 1001 12 1100 17 10001
+6 0110 +6 0110
10010 10111
Find the BCD addition of 184 + 576
EE 200– Digital Logic Circuit Design – KFUPM slide 74
Decimal Arithmetic
The sign of a decimal number is usually represented
with four bits to conform to the four‐bit code of the
decimal digits.
It is customary to designate a plus with four 0’s and a
minus with the BCD equivalent of 9, which is 1001.
The signed‐magnitude system is rarely used in
computers. The signed‐complement system can be
either the 9’s or the 10’s complement, but the 10’s
complement is the one most often used.
Addition is done by summing all digits, including the sign
digit, and discarding the end carry.
all negative numbers are in 10’s‐complement form.
EE 200– Digital Logic Circuit Design – KFUPM slide 75
Decimal Arithmetic
Consider the addition (+375) + (-240) = +135
(+ 375) (0 375)
(- 240) (9 760)
0 375
+9 760
10 135
Decimal number subtraction is the same as binary
numbers
EE 200– Digital Logic Circuit Design – KFUPM slide 76
Other Decimal Codes
EE 200– Digital Logic Circuit Design – KFUPM slide 77
Gray Code
Used in applications that
require encoding of continuous
data and its transmission
Only one bit is changing at a
time
Eliminates the problem of
wrong intermediate coding
when multiple bits are changed
for a step transition,
A change from 01111000! may
produce an intermediate erroneous
number if some bits takes longer to
change than others.
EE 200– Digital Logic Circuit Design – KFUPM slide 78
ASCII Code
American Standard Code for Information Interchange
(ASCII)
Represents numbers (10), letter (26), special characters
(%, *, and $) and controlls
This type of code is called alpha-numeric code.
7-bits b7b6b5b4b3b2b1 to code 128 characters
The ASCII code also contains 94 graphic characters
that can be printed and 34 nonprinting characters used
for various control functions
EE 200– Digital Logic Circuit Design – KFUPM slide 79
ASCII Code
A = 100 0001
a = 110 0001
DEL = 111 1111
EE 200– Digital Logic Circuit Design – KFUPM slide 80
Error-Detection Code
The parity bit is an extra bit included in the message to
make to total number of 1’s EVEN or ODD.
Parity bits are used to detect errors encountered during
data transmission, the transmitter inserts the parity bit,
and the receiver checks against it. If an error is detected,
the data is retransmitted.
Even parity can detect error in 1, 3 or any odd
combination of errors.
Even Parity Odd Parity
A = 1000001 01000001 11000001
T = 1010100 11010100 01010100
EE 200– Digital Logic Circuit Design – KFUPM slide 81
Binary Logic
Binary logic deals with variables that takes two values
and operations that assume logical meaning.
Binary Logic is also called (Boolean Algebra)
Binary Logic consists of binary variables and logical
operations
Variables can be designated by letters (A, B, C, x, y, z)
with two possible values (1,0).
Three logical operators: AND, OR, NOT
EE 200– Digital Logic Circuit Design – KFUPM slide 82
AND Operator
Represented as:
𝑥. 𝑦 = 𝑧 𝑜𝑟 𝑥𝑦 = 𝑧
read as “X and Y equals to Z”
Z=1 if and only if x=1 and y=1
EE 200– Digital Logic Circuit Design – KFUPM slide 83
OR Operator
Represented as:
𝑥 + 𝑦 = 𝑧
read as “X or Y equals to Z”
Z=1 if x=1 or y=1 or if both x=1 and y=1
EE 200– Digital Logic Circuit Design – KFUPM slide 84
NOT Operator
Represented as:
ҧ𝑥 = 𝑧 𝑜𝑟 𝑥′ = 𝑧
read as “Not X equals to Z” meaning z is not what x
Z=1 if X=0 and Z=1 if X=0
EE 200– Digital Logic Circuit Design – KFUPM slide 85
Binary Logic
Binary logic should not be confused with binary arithmetic
Arithmetic: 1+1=10 (one plus one equals two)
Logic: 1+1=1 (one or one equals one)
Truth Table is a table of all possible combinations of the
variables, showing the relation between the values the
variables may take and the result.
EE 200– Digital Logic Circuit Design – KFUPM slide 86
Logic Gates
Logic gates are electronic circuits that operates on one
or more input signals to produce an output signal.
EE 200– Digital Logic Circuit Design – KFUPM slide 87
Logic levels
Input and output signals are
voltage levels, e.g. (0,5)V,
(0,3.3)V, (0,2.5)V, … etc.
The interpretation to 1’s and 0’s
is made inside the logic gate by
specifying voltage ranges.
The internal structure of logic
gates is made of transistors, and
the voltage ranges are
determined by the technology
used.
EE 200– Digital Logic Circuit Design – KFUPM slide 88
Input/Output Timing Diagrams
EE 200– Digital Logic Circuit Design – KFUPM slide 89
Gates with Multiple Inputs
Can you draw the truth table of these gates ?