Digital Relays & CVTs

8/8/2019 Digital Relays & CVTs

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Digital Relays and Capacitive Voltage Transforme

Balancing Speed and Transient Overreach

GER-3986


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5 3r d

A n n u a l C o n f e r e n c e f o r P r o t e c t i v e R e l a y E n g i n e e r s

DISTANCE RELAYS AND

CAPACITIVE VOLTAGE TRANSFORMERS

BALANCING SPEED AND TRANSIENT OVERREACH

Bogdan Kasztenny

[email protected](905) 201 2199

Dave Sharples*


Vince Asaro


Marzio Pozzuoli


GE Power Management

215 Anderson Avenue

Markham, Ontario

Canada L6E 1B3

*Consultant

College Station, April 11-13, 2000


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Distance Relays and Capacitive Voltage Transformers Balancing Speed and Transient Overreach

Page 2 of 22

1. Introduction

Capacitive Voltage Transformers (CVTs) are the predominant source of the voltage signals

for distance relays in High Voltage (HV) and Extra High Voltage (EHV) systems.

CVTs provide a cost-efficient way of obtaining secondary voltages for EHV systems. They

create however, certain problems for distance relays. During line faults, when the primary volt-age collapses and the energy stored in the stack capacitors and the tuning reactor of a CVT needs

to be dissipated, the CVT generates severe transients that affect the performance of protective

relays.

The CVT caused transients are of significant magnitude and comparatively long duration.This becomes particularly important for large Source Impedance Ratios (SIR the ratio of the

system equivalent impedance and the relay reach impedance) when the fault loop voltage can be

as low as a few percent of the nominal voltage for faults at the relay reach point. Such a small

signal is buried beneath the CVT transient making it extremely difficult to distinguish quicklybetween faults at the reach point and faults within the protection zone.

Electromechanical relays can cope with unfavorable CVT transients due to their natural me-chanical inertia at the expense of slower operation.

Digital relays are designed for high-speed tripping and therefore they face certain CVT-related problems.

CVT transients can affect both the transient overreach (a relay operates during faults located

out of its set reach) and the speed of operation (slow tripping for high SIRs) and directionality.

This paper begins with analysis of the CVT transients (Section 2). The influence of the CVT

transients on the performance of digital distance relays follows (Sections 3 and 4). A new algo-rithm balancing transient overreach and speed of operation, its hardware implementation and the

results of testing are presented in Section 5. The paper discusses transient overreach issues ratherthen directionality as the latter is effectively controlled with the memory polarization.

2. CVT Transients

2.1. Equivalent circuit of a CVT

A generic CVT consists of a capacitve voltage divider, tuning reactor, step-down transformer

and ferroresonance suppression circuit (the additional communication equipment is not siginifi-cant in these considerations).

Under line fault conditions, when the voltage drops and there is no threat of exceeding the

knee-point of the magnetizing characteristic of the step-down transformer, a CVT can be repre-

sented by the equivalent linear circuit as shown in Figure 1. The analyzed CVT contains a par-ticular ferroresonance suppression circuit. The analysis, however, is similar to other types of

ferroresonance circuits. In this paper we will follow the CVT model shown in Figure 1.

The linear circuit of Figure 1 can be further simplified as shown in Figure 2.


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Page 3 of 22

R

C1

Lf

Rf

f

R0

L0

v2

CT1

Lm

RT2

LT2

RT1

LT1

RFe

L

vi

C2

v1

C

Figure 1. Equivalent circuit diagram of a CVT.

R

i

LC

v

Lf

Rf

fC

R0

v

2

Figure 2. Simplified model of a CVT from Figure 1.

The parameters in the circuit of Figure 2 are:

C sum of the stack capacitances,

L, R equivalent inductance and resistance, respectively, of the tuning reactor and thestep down transformer,

R0 burden resistance,

f subscript for parameters of the anti-resonance circuit.

For illustration, in this paper we will follow a numerical example of the following two sample500kV CVTs (all the secondary parameters are re-calculated for the intermediate voltage level):

CVT-1 (high-C CVT):

R0 = 1.03997 105 load resistance,

Lf = 315.3 suppression inductance, H

Cf = 0.0285 10-6

suppression capacitance, F

Rf = 77379 suppression resistance, R = 3289 resistance, C = 9.1605 10

-8 sum of dividing capacitances, F

L = 76.136 inductance, H

CVT-2 (extra high-C CVT):

R0 = 2.08584 105 load resistance,

Lf = 616.35 suppression inductance, H

Cf = 0.01134 10-6

suppression capacitance, F

Rf = 148519 suppression resistance,


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R = 1536 resistance, C = 0.162442 10

-6 sum of dividing capacitances, F

L = 48.136 inductance, H

2.2. CVT transients sample waveforms

Figures 3 and 4 present examples of CVT operation during a fault occurring at the zerocrossing and maximum of the primary voltage, respectively.

As seen from the figures, the CVT transients can last for up to two cycles and reach the mag-

nitude of up to 40% of the nominal voltage.

0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12

-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

Voltage[pu]

time [sec]

"High-C CVT" (CVT-1)

"Extra-High-C CVT" (CVT-2)

Figure 3. Sample transients for high- and extra-high-C CVTs.The primary voltage drops to zero at the zero crossing.

Subsection 2.3 provides a detailed mathematical model of the CVT induced noise. Subsection

2.4 discusses the factors that control the CVT transients in detail.

2.3. Transfer function and eigenvalues of a CVT

The transfer function derived for the model of Figure 2 is:

012

23

34

4

12233)(BsBsBsBsB

sAsAsAsGCVT ++++

++= (1)

where:

CRRCLA fff 03 = ;


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0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12

-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

Voltage[pu]

time [sec]

"Extra-High-C CVT" (CVT-2)

"High-C CVT" (CVT-1)

Figure 4. Sample transients for high- and extra-high-C CVTs.

The primary voltage drops to zero from the voltage peak.

CRLA f 02 = ;

CRRA f 01 = ;

LCRRCLB fff )( 04 += ;

CRRCLRRCRCLLCLB fffffff 003 )( +++= ;

CRLRRCLRCLRRLCB ffffff 0002 )()( +++++=

CRRLRRRCB fff 001 )( +++= ;

00 RRB f +=

For example, for CVT-1 (example of a high-C CVT) one obtains:

( )( ) ( )524252

)(10626.39.62610401.45.192

10113.15.453739.582++++ ++= ssss

sssG sCVT (2a)

and for CVT-2 (example of a extra high-C CVT):

( )( ) ( ) ( ) ( )4.1056.2387258.993

10431.18.593245.1784 52

)( ++++++

=ssss

sssG sCVT (2b)


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Page 6 of 22

The eigenvalues determining the nature of the transient induced by the CVT can be calculated

now from the transfer function. For the two considered CVTs the eigenvalues are:

CVT-1 (high-C CVT):

-313.43 + j514.13

-313.43 - j514.13-96.27 + j186.39

-96.27 - j186.39

The above values determine two aperiodically decaying oscillatory components with the fol-lowing time constants and frequencies, respectively:

T= 3.1905 [ms] and f= 81.8261 [Hz]

T= 10.3876 [ms] and f= 29.6647 [Hz]

CVT-2 (extra high-C CVT):

-993.8011-724.9701

-238.6495

-105.3577

The above values determine four aperiodically decaying dc components with the time con-stants respectively:

1.0062 [ms]

1.3794 [ms]

4.1902 [ms]9.4915 [ms]

An extra-high-C CVT has all its eigenvalues real. This results in a decaying non-oscillatorydistortion (see Figure 5 for illustration). A high-C CVT has all its eigenvalues complex (pairs of

conjugate values) resulting in decaying oscillatory distortion (see Figure 6 for illustration).

From the digital signal processing point of view, the values of parameters of the CVT noise do

not make the filtering easy. The frequencies of the oscillatory components (high-C CVT) arequite close to 60Hz where the information signal is. In addition, their time constants are in the

order of the power cycle. The time constants of the dc components (extra high-C CVT) are of the

same order (maximum-to-minimum ratio is about 10) this means that none of the componentscan be neglected and an estimator would have to trace and suppress all four decaying dc compo-

nents.

Based on the above observations it is justified to assume the following signal model for the

secondary voltage of a CVT:

( ) )(111)()( cos tnoisetCVTt vtVvv +++= (3)

where:


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vnoise is a high frequency noise including harmonics and decaying high frequency

oscillatory components,

V1, 1 are parameters of a fundamental frequency phasor to be filtered or estimated,

vCVT is a CVT induced transient assuming one of the following forms:

== kk ktCVT T

tAv exp

4

1

)( (4a)

or

( )

+=

= kkk

k

ktCVTT

ttAv expcos 00

2

1

)( (4b)

or

( )

+

+= = kkktCVT T

t

AT

t

tAv expexpcos

3

21001)( (4c)

Equations (4) mean that the CVT induced transient can be:

combination of four aperiodically decaying dc components (extra high-C CVT), combination of two oscillatory decaying components (high-C CVT), combination of one oscillatory decaying component and two aperiodically decaying dc com-

ponents (general case).

Certainly, the parameters of the voltage signal model are unknown. The presented numerical

examples can be used as some indication of the range and relations between the time constantsand frequencies. The initial magnitudes and angles in (4) depend on the pre-fault conditions and

the fault inception angle.

Ideally, the signal model (3)-(4) should be used to design either a filter or a phasor estimator

for the voltage signal for a digital distance relay.

2.4. CVT transients the contributing factors

The mathematical relations given by the signal model of the CVT noise (3)-(4) have the

following explanation.

As the CVT-generated transients result from the energy stored in the stack capacitors and the

tuning reactor, the transients are basically controlled by the parameters of the CVT itself and the

point on wave at which the fault occurs.

The compensating reactor is tuned by a CVT manufacturer to ensure zero phase shift betweenthe primary and secondary voltages, and from this perspective, the inductance of the reactor is a

constant value dependent only on the capacitances used to set-up the divider.

The shunt parameters of the step-down transformer practically do not contribute to the CVT

transients during fault conditions when the voltage collapses.

Consequently, the transients are basically controlled by the following factors:


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Sum of the stack capacitances. Shape and parameters of the ferroresonance suppression circuits. CVT burden. Point on wave when a fault occurs.

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

time [sec]

V

CVT-2noise component 2 (1.4ms)

noise component 4 (9.5ms)

60 Hz "information"

noise component 1 (1ms)

noise component 3 (4.2ms)

Figure 5. Comparison of the components of the CVT noise with a low 60Hz signal (extra high-C CVT).

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

time [sec]

V

CVT-1noise component 1 (3ms, 81Hz)

noise component 2 (10ms, 29.7Hz)

60 Hz "information"

Figure 6. Comparison of the components of the CVT noise with a low 60Hz signal (high-C CVT).


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Sum of stack capacitances

The higher the sum of the stack capacitances, the lower the magnitude of the transients.Therefore, judging only from the magnitude of the CVT transient, one should recommend CVTs

with higher sum of the stack capacitances to be used to feed distance relays with the voltage sig-

nals.

On the other hand, the CVTs with larger capacitors are more expensive. Also, the behaviourof a distance relay depends on the applied filtering and measuring algorithms. In many instances

the magnitude alone of the CVT transient is of a secondary importance for transient overreach

and speed of operation.

Typically, the sum of the stack capacitances is in the range of 100nF. From this perspective,CVTs are classified as of normal-C, high-C and extra-high-C types. The threshold values

are rather fuzzy. For example, the CVT-1 used in this paper has its stack capacitances summing

to 91.6nF, while the CVT-2 to 162.4nF.

When testing distance relays one should consider a CVT model of the high-C type first. It is,however, necessary to test a given relay using different types of CVTs as the magnitude alone of

the CVT transient may be of a secondary importance for some algorithms.

Ferroresonance suppression circuit

A ferroresonance suppression circuit is designed to prevent subsynchronous oscillations dueto saturation of the core of a step-down transformer during overvoltage conditions.

The ferroresonance circuit loads a CVT and creates an extra path apart from the burden

for the dissipating energy. Therefore, the damping circuit has significant impact on the charac-

teristic of the CVT transients.

A specific design of a ferroresonance damping circuit is often treated as proprietary informa-tion and is seldom available. However, there are two generic models of a ferroresonance sup-

pression circuit that will be considered.One design consists of a resistor in series with a parallel LC branch. The LC subcircuit is

tuned to the nominal frequency (60Hz or 50Hz) and behaves as an open circuit at the nominalfrequency. Under off-nominal frequencies the LC circuit draws some current and the energy dis-

sipates in the series resistor. We will refer to this RLC band-pass filter as a type 1 ferroresonance

suppression circuit (sometimes it is called an active suppression circuit).

Another design uses a resistor and saturable inductor connected together with a flash-over airgap. The RL circuit burdens the CVT permanently. In addition, the inductor saturates at about

150% of the nominal voltage. The air gap may trigger above that level inserting yet another re-

sistor into the circuit to provide more damping. We will refer to this anti-resonance circuit as a

type 2 ferrorezonance suppression circuit (sometimes it is called a passive suppression circuit).

As a rule, the CVT with a type 2 circuit has a less distorted output voltage.

If the details of the ferroresonance suppression circuit are unknown, one should, consider the

more severe case and assume the type 1 ferroresonance circuit when testing distance relays.

CVT burden

The CVT burden is one of the dissipating paths for the energy accumulated in the CVT cir-cuitry. Therefore, better CVT performance is obtained when the CVT is fully loaded.


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Page 10 of 22

Electromechanical relays can load CVTs naturally due to their higher burden. Digital relays,

in turn, create a very small load compared with the rated burden of CVTs (100-400VA). There-fore, when using digital relays it is recommended that the CVT be fully loaded, using artificial

load if necessary, to avoid extensive transients.

When testing distance relays one should consider not only the rated burden of a CVT, but also

test distance relays with CVTs operating on a small load.

Fault inception angle (point on wave)The most severe transients are generated when a fault occurs at the zero crossing of the pri-

mary voltage (compare Figures 3 and 4). The accumulated energy is then at its maximum result-

ing in larger magnitudes of the transient components. The least severe transient occurs duringfaults initiated at the maximum wave point.

From a statistical point of view faults appear more often at voltages large enough to initiate

the insulation breakdown (i.e. close to the maximum point on wave). However, when testing

distance relays one must not neglect faults initiated at the zero crossing as they may occurwhen switching onto a fault.

2.5. CVT transients and high SIRs

CVT transients can create drastic problems for distance relaying in conjunction with highSIRs.

Considering solid faults at the reach point one may approximate the voltage at the relay loca-

tion using the following equation:

SIR

VVfault +

1

nominal (5)

Using the above equation Table 1 gives the voltage magnitudes for a range of SIRs. As theSIR increases the fault voltage at the reach point drops to very small values. The magnitude of

the CVT transient, in turn, remains constant (independent from the SIR) as the energy accumu-

lated in the CVT is a straight function of the pre-fault voltage.

This results in extremely unfavorable signal to noise ratios (as for the protection-orientedmeasurements when the speed counts). As illustrated in Figure 7, for example, the magnitude of

the noise components may be 10 times larger than the magnitude of the 60Hz operating signal.

The noise dominates the signal for 1.5 to 2 cycles.

Table 1. Fault voltage as a function of SIR.

SIR 0.1 1 5 10 20 30Vfault [pu] 0.91 0.50 0.17 0.09 0.05 0.03

The unfavorable signal to noise ratio contributes to both transient overreach and slow opera-

tion of distance relays.

Certainly, such extreme proportions occur for high SIRs. Traditionally, vendors specify theirdistance relays up to the SIR of 30 (sometimes 50 or 60). Such high values are not applicable for


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Page 11 of 22

longer lines in heavily interconnected systems. There are, however, situations when the high

SIRs are a fact. They include:

Short lines adjacent to busbars in a long corridors linking the generation and load areas. Lines in weak systems such as in developing countries. Distance back-up on short lines for current differential or phase comparison schemes.

0 0.01 0.02 0.03 0.04 0.05-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

time [sec]

Voltage[pu]

NOISE COMPONENT 2

60Hz SIGNAL

NOISE COMPONENT 1

Figure 7. Illustration of the signal-to-noise ratio for the CVT transients

(CVT-1 fault at zero crossing) and high SIRs (30).

3. Distance Relays and CVTs Transient Overreach

For faults located at the reach point the impedance must be measured precisely in order to en-sure proper relay operation. Particularly, the impedance must not be underestimated. If the im-

pedance is underestimated, the relay could maloperate if the impedance appears to be in the op-

erating region although it is an external fault. This holds true for relays that calculate the imped-ance explicitly and for those that use phase or magnitude comparators.

Generally, transient overreach may be caused by:

overestimation of the current (the magnitude of the current as measured is larger than its

actual value, and consequently, the fault appears closer than actually located), underestimation of the voltage (the magnitude of the voltage as measured is lower than itsactual value),

combination of the above.

Overestimation of the current magnitude can happen due to the dc component in the currentwaveform and can be prevented by using a mimic filter (either classical mimic filter or a band-

pass differentiating filter).


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3.3. Relay reach

The situation shown in Figure 10 is an ultimate case and shows that unless the measuring al-gorithm of a distance relay (both a digital filter and phasor estimator) is designed specifically to

cope with CVT transients under high SIRs, the relay would overreach significantly.

0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.150

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2 x 104

Voltage[V]

time [sec]

1/8 of a cycle

full cycle

half cycle

actual value

Figure 8. Voltage magnitude estimated using various window lengths for a fault at the reach point under

the SIR of 30 and CVT-1 as a voltage source (0 deg inception angle, fault at 54 msec).

0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.150

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2x 10

4

Voltage[V]

time [sec]

1/8 of a cycle

full cycle

half cycle

actual value

Figure 9. Voltage magnitude estimated using various window lengths for a fault at the reach point under

the SIR of 30 and CVT-1 as a voltage source (90 deg inception angle, fault at 50 msec).


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-10 -5 0 5 10-5

0

5

10

15

Reactance[ohm]

Resistance [ohm]

18

22

26

30

3442

44 Actual Fault

Location

LineImpedance

Trajectory(msec)

dynamic mhozone extendedfor high SIRs

Figure 10. Impedance locus may pass below the line impedance vector

(CVT-1, SIR=30, 90 deg fault inception angle).

For a given measuring algorithm, type of operating characteristic (static or dynamic mho,

quadrilateral) and some extra means of stabilizing the relay (such as security counts), the maxi-

mum reach vs. SIR curve may be created. Figure 11 presents two examples of such curves.The reach reduction curves in Figure 11 provide application guidelines. They call, however,

for drastic reduction of the zone 1 reach. This, in turn, means that the relay relies entirely on pilot

schemes and the overreaching zone 2 for tripping internal faults.

3.4. Accuracy requirements

One may reverse the line of thinking of the previous subsection and find the accuracy re-quirements for both the voltage and current signals assuming the maximum encountered SIR and

the maximum transient overreach to be guaranteed.

For example, assuming the SIR of 30, one finds the voltage at the relay location for a fault at

the reach point to be about 3% of the nominal (Table 1). If 5% is the maximum assumed tran-sient overreach, then the total voltage underestimation and current overrestimation at all times

should not exceed 0.05 * 0.03 = 0.15% of the nominal.

This presents a significant challenge since we are attempting to attain metering accuracy in

the transient domain. Figure 12 illustrates this observation.


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0 5 10 15 20 25 300

10

20

30

40

50

60

70

80

90

100

Maximum

Rach[%]

SIR

TYPE-2 FerroresonanceSupression Circuit

TYPE-1 FerroresonanceSupression Circuit

Figure 11. Sample generic reach reduction curves.

4. Distance Relays Speed

CVT-generated transients under high SIRs cause not only transient overreach of distance re-

lays for out of zone faults, but also slow down the relays for in zone faults as explained in thissection.

As illustrated in Figure 7 the 60Hz voltage signal carrying the information as to the fault lo-

cation (the current does not bring any new information for high SIRs) is buried beneath the CVT

noise for a long time. In order to distinguish faults at the reach point for the considered situation

(SIR=30) and faults, say at 75% of the reach, the relay must set apart the voltage of 3%*0.75 =2.2% of the nominal (tripping) and 3% of the nominal (blocking). The difference of 0.8% of the

nominal must be sensed in the situation when the noise assumes the level of 30% of the nominal.Practically, a relay would not trip until the CVT-generated transients die out and the 60Hz signal

emerges from beneath the noise. If a relay trips much faster, it often shows significant transient

overreach as well.

What is worth emphasizing is that using phasor estimators with short data windows does notimprove the situation. As illustrated in Figures 8 and 9, the magnitude estimated using 1/8th

cycle window still requires about 25-35msec to get close to the actual value of the voltage mag-

nitude.

Yet another issue related to speed is the use of security counts (deliberate delay) in order tocope with the transient overreach. Even if the delay is introduced some time after the fault, the

delay is practically in effect when the relay is about to trip under high SIRs. This slows down the

operation even more.


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0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2-5

-4

-3

-2

-1

0

1

2

3

4

5x 10

5

Voltage[V]

time [sec]

voltagewaveform

estimatedamplitude

(a)

0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13-4

-3

-2

-1

0

1

2

3

4

x 104

Voltage[V]

time [sec]

estimatedamplitude

(b)

actualvalue

2.2% of the nominal =70% of the actual value

Figure 12. Estimated voltage magnitude (CVT-1, 90deg inception angle, SIR of 30). The magnitude

ramps down quickly (a), but gets underestimated by 2.2% of the nominal contributing to 70% transient

overreach (b).

5. New Algorithm

This section summarizes the highlights of a new distance algorithm for excellent CVT tran-sient control.

5.1. Pre-filtering

In order to suit best the needs of voltage and current signals, different filters have been usedvoltage-wise and current-wise.


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The currents are pre-filtered using a modified mimic filter. The filter is a stationary Finite

Impulse Response (FIR) filter which has a much better frequency response compared to the clas-sical mimic filter.

The voltages are pre-filtered using a special, designed to cope with CVT transients, non-

symmetrical FIR filter with the window length of approximately 3/2nd

of a power cycle. Due to

its optimal design, the delay introduced by the filter is much lower than a power cycle. The filterperforms very well for both CVT transients and high frequency noise.

5.2. Phasor estimation

Likewise, different phasor estimators are used for the voltage and current signals. The current

phasors are measured using the full-cycle Fourier algorithm. The voltage phasors are estimated

using the half-cycle Fourier algorithm.

The combination of the pre-filtering and phasor estimation algorithms ensures the followingaccuracy:

Currents: less than 3% transient overshoot due to the dc components. Voltages: less than 0.6% (of the nominal) transient underestimation due to the CVT tran-sients.

The combination of the above accuracy result in transient overreach ranging from 1% (for

SIRs up to 5) to about 20% (SIR = 30).

In order to reduce the transient overreach further, a double zone 1 has been implemented asshown in Figure 13.

DelayedTrip

InstantaneousTrip

R

X

Figure 13. Instantaneous and delayed zones 1.

The inner zone 1 has its reach dynamically adjusted using the voltage magnitude. The dy-

namic reach varies from 80% of the actual (set) reach for the SIR of 30, up to 95% for the SIR of

0.1. The inner zone is completely secure and therefore no delay is applied there. It ensures fast


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Page 18 of 22

operation for faults located at 0-80% of the reach for high SIRs, and for 0-95% of the reach for

low SIRs.

The outer zone 1 has its reach fixed at 100% of the actual (reach setting) and applies some

delay to prevent maloperation.

As a result, the transient overreach has been reduced to a very small value (~1-5% over the

SIRs up to 30) at the expense of slowing down the relay only for faults close to the reach point.

5.3. Distance comparators

Let us use the mho characteristic to illustrate the concept of double-reach zone 1 in more de-

tail. The mho distance element uses dynamic (memory polarized) characteristics with self-tilting reactance and memory-polarized zero- and negative-sequence directional supervision.

Tables 2 and 3 summarize the operating equations for ground and phase elements, respec-

tively. The tables identify the comparators that work in a double-reach mode. The reach is re-

duced on per-element basis (i.e. separately for each element) using a multiplier. The multiplier

for a given element is controlled by the voltage of that element (for example, the AG voltage isused for the ground distance phase A multiplier; the AB voltage for the phase distance AB mul-

tiplier, etc.). Figure 14 presents the relation between the voltage and the reach multiplier.

0 0.2 0.4 0.6 0.8 10.75

0.8

0.85

0.9

0.95

1

SecureRe

ach

Voltage

Figure 14. Inner zone 1 reach as a function of the voltage magnitude.

Zones 2, 3 and 4 do not apply the double-reach approach as they are delayed and/or used by

overreaching pilot schemes where communication solves many problems transient problems.


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Table 2. Ground distance elements.

Characteristic Phase Comparator Double Reach (Y/N)

Dynamic mho IZ-V vs. Vmem (pos) Y

Reactance IZ-V vs. I0Z Y

Zero-sequence directional I0Z vs. Vmem (pos) NNegative-sequence directional I2Z vs. Vmem (pos) N

Table 3. Phase distance elements.

Characteristic Phase Comparator Double Reach (Y/N)

Dynamic mho IZ-V vs. Vmem (pos) Y

Reactance IZ-V vs. IZ Y

Directional IZ vs. Vmem (pos) N

5.4. Hardware implementation

The described algorithm has been implemented using the concept of a universal relay amodular, scaleable and upgradable engine for protective relaying. Figure 15 presents the basic

hardware modules of the relay; while Figure 16 the actual implementation.

High-Speed Data BusHigh-Speed Data Bus

Power

Supp

ly

Power

Supp

ly

CPU

CPU

MainProcessor

MainProcessor

DSP&Magnet

ics

DSP&Magnet

ics

DSPprocessor+C

T/VTs

DSPprocessor+C

T/VTs

DIGITALI/O

DIGITALI/O

StatusInputs/Contro

lOutputs

StatusInputs/Contro

lOutputs

ANALOGI

/O

ANALOGI

/O

AnalogTransduce

rI/O

AnalogTransduce

rI/O

COMMUNICATIONS

COMMUNICATIONS

(Ethernet,H

DLC,UART)

(Ethernet,H

DLC,UART)

DisplayDisplayDisplay

KeypadKeypadKeypad

LED

Modules

LEDLED

ModulesModules

LED

Modules

LEDLED

ModulesModules

LED

Modules

LEDLED

ModulesModules

Modular HMI PanelModular HMI Panel

Figure 15. Modular hardware architecture.


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Page 20 of 22

19 Chassis19 Chassis

(4RU high)(4RU high)

PowerSupply

PowerSupply

CPU

CPU

MainProcessor

MainProcessor

DSP&Magnetics

DSP&Magnetics

DSPprocessor+CT/VTs

DSPprocessor+CT/VTs

DIGITALI/O

DIGITALI/O

StatusInputs/ControlOutputs

StatusInputs/ControlOutputs

ANALOGI/O

ANALOGI/O

AnalogTransducerI/O

AnalogTransducerI/O

COMMUNICATIONS

COMMUNICATIONS

(Ethernet,H

DLC,U

ART)

(Ethernet,H

DLC,U

ART)

High-Speed Data BusHigh-Speed Data Bus

ModulesModules

Figure 16. Actual relay architecture.

5.5. Testing and results

Initial versification of the algorithm has been performed using Real-Time Digital Simulator(RTDS) generated waveforms and MATLAB simulations. Several thousand cases have been

analyzed at this stage.

The following definition of a transient overreach has been adopted in testing:

%100%

=operationnoofreach

operationnoofreachoperationsolidofreachTO (6)

The testing showed that the transient overreach is well controlled (less than 5% - using defi-nition (6)). Figure 17 presents the average operating times versus the fault location (fault char-

acteristic) and SIR (system characteristic) obtained from this stage of testing.

The final stage of testing has been performed using actual relays, RTDS (Figure 18) and high

accuracy, high-power voltage and current amplifiers. The anticipated operating times and tran-sient overreach have been successfully validated.

6. Conclusions

New insights into the distance relaying problems caused by CVTs have been given. As ex-

plained, various CVT configurations (value of the stack capacitances, type of the ferroresonance

circuit and amount of load) affect the relay performance to a different degree.

Transient overreach specifications of relays available on the market are very imprecise. Defi-nition of transient overreach and test conditions (type of a CVT, primarily) are not specified bythe vendors. This relates to type of a CVT, type of a ferroresonance circuit, CVT burden, fault

inception angle, etc.

Tests performed by the authors on selected relays using the CVT-1 and CVT-2 models deliv-

ered much worse performance characteristics than those published by vendors. In many instancescomparatively short operating time independent from the fault location is a sign of a very poor


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Page 21 of 22

CVT transient control under high SIRs. In response to that, a new algorithm has been presented

in this paper that ensures superior performance in terms of transient overreach without signifi-cant sacrificing the speed of operation.

0 10 20 30 40 50 60 70 800.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

Averagetime(cycles)

X/Xm (%)

SIR=1

SIR=3

SIR=5

SIR=20

SIR=15

SIR=10

SIR=30

SIR=0.1

10-1

100

101

102

0

20

40

60

805

10

15

20

25

30

35

40

SIRX/Xm

Averagetime

SIR

X/Xm

10 15

15

20

20

20

25

25

25

25

30

30

10-1

100

101

10

20

30

40

50

60

70

Figure 17. Average operating times of the new algorithm (MATLAB).


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Figure 18. RTDS hardware used in testing.

vvv

Biographies

Bogdan Kasztenny received his M.Sc. (89) and Ph.D. (92) degrees (both with honors) from the Wroclaw Univer-

sity of Technology (WUT), Poland. In 1989 he joined the Department of Electrical Engineering of WUT. In 1994 he

was with Southern Illinois University in Carbondale as a Visiting Assistant Professor. From 1994 till 1997 he was

involved in applied research for Asea Brown Boveri in the area of transformer and series compensated line protec-

tion. During the academic year 1997/98 Dr.Kasztenny was with Texas A&M University as a Senior Fulbright Fel-

low, and then, till 1999 - as a Visiting Assistant Professor. Currently, Dr.Kasztenny works for General Electric

Company as a Senior Application/Invention Engineer. Dr.Kasztenny is a Senior Member of IEEE, holds 2 patents,

and has published more than 90 technical papers.

Dave Sharples after early experience with the Electricity Authority in the UK graduated from the University of

Manchester (UK) with a M.Sc. (Tech) degree in 1963. After experience with the English Electric Meter Relay and

Instrument Division he emigrated to Canada to join Ontario Hydro. Following early retirement in 1993 he has acted

as a protection consultant, most recently with GE Power Management.

Vince Asaro graduated from Ryerson Polytechnical Institute, Toronto, Ontario Canada, in 1988 with a Bachelor of

Electrical Engineering Technology specializing in control systems. He then worked for Perkin Elmer Photovac de-

signing hardware and firmware for gas analytical equipment. . In 1997 he joined General Electric - Power Manage-

ment and is now the lead firmware designer for the D60 distance relay and is responsible for firmware development

for new products.

Marzio Pozzuoli graduated from Ryerson Polytechnical Institute, Toronto, Ontario Canada, in 1987 with a Bachelor

of Electrical Engineering Technology specializing in control systems. He then worked for Johnson Controls design-ing industrial automation systems. He was involved in the design of Partial Discharge Analysis systems for large

rotating electric machinery with FES International. In 1994 he joined General Electric Power Management and is

the Technology Manager responsible for the engineering and development of new products.

Digital Relays & CVTs

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