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SHANKERSINH VAGHELA BAPU INSTITUTE OF TECHNOLOGY

DIGITAL LOGIC DESIGNLABORATORY MANUAL

B.E. 3rd SEMESTER

SHANKERSINH VAGHELA BAPU INSTITUTE OF TECHNOLOGY

Gandhinagar-Mansa Road, PO. Vasan,Gandhinagar District, Gujarat,

Pin. 382650

Roll. No:

Shankersinh Vaghela Bapu Institute Of Technology.Digital Logic Design

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INDEX

Sr.No.

Title Page Date Sign Grade

1. Verification of basic logic gates andimplementation with NAND / NOR gates.

/10

2. Realization of half and full adder and half &full subtractor.

/10

3. Design and realization of binary to gray codeconverter.

/10

4. Study of multiplexer and realization ofBoolean function using it.

/10

5. To design binary to seven segments LEDdisplay circuit.

/10

6. Verification of truth tables of RS, D, JK andT flip flops.

/10

7. To design and realize modulo N Synchronouscounter using JK flip-flops.

/10

8. To design and realize modulo N Ripplecounter using T flip flops.

/10

9. To realize shift register. /10


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Roll No: Date: / /20Exp. No.: 1.Title : Logic Gates_____________________________________________________________________________AIM : [1] To verify truth tables of basic gates.

[2] To realize all basic gates using NAND gates only.

EQUIPMENTS:[1] Logic trainer[2] IC 7400 ,[3] IC7402,[4] IC7408,[5] IC7432,[6] IC7486,[7] Connecting wires.

THEORY:A gate is a logic circuit that has one or more inputs and one or more outputs. The output of the gatewill depend upon the set of input conditions. The digital signal has two distinct states LOW (0) andHIGH (1). Using gates we can implement variety of logic circuit that performs a particular task.For an example we can implement various arithmetic, logical and control units depending upon ourrequirements. Various types of gates are described below.

[1] NOT Gate: This gate has one input and one output. This gate inverts input at the output. Wheninput is LOW output is HIGH and vice versa.

BOOLEAN EXPRESSION: Y =

TRUTH TABLE: LOGIC SYMBOL

A Y

[2] AND Gate: This gate has two or more inputs and one output. Output of AND gate will goHIGH when all inputs are HIGH, otherwise output will remain LOW.



A B Y


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[3] OR Gate: This gate has two or more inputs and one output. Output of OR gate will go HIGHwhenAny of the input is HIGH; output is LOW when all inputs are LOW.



A B Y

[4] XOR Gate: This gate has two or more inputs and one output. Output will go HIGH when allinputs are not of the same logic level (i.e. all inputs are not LOW or not HIGH at a time).



A B Y

[5] NAND Gate: If we put one inverter at the output of AND logic gate will be NAND gate.

BOOLEAN EXPRESSION: Y =TRUTH TABLE: LOGIC SYMBOL

A B Y


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[6] NOR Gate: If we put one inverter at the output of OR gate resulting logic gate will be notNOR gate.



A B Y

PROCEDURE:

[1] Select appropriate IC for each logic gate.[2] Get the pin diagram from data book and make the connections according to the requirements.[3] Make sure the connections of Vcc and ground are at their respective pins.[4] Switch on the power and apply sequence of inputs and observe outputs.

CONCLUSION:


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Answer the following question.

[1] "NAND and NOR gates are universal gates." Justify.

[2] What is TTL logic levels for HIGH and LOW states?

[3] What is positive logic and negative logic?

[4] Define term (a)Propagation Delay(b)Fan In/Out(c)Power dissipation


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+ VCC

7408

GND

14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7

+ VCC

7400

GND

+ VCC

7402

GND

14 13 12 11 10 9 8

1 2 3 4 5 6 7

+VCC

7432

GND

14 13 12 11 10 9 8

1 2 3 4 5 6 7

14 13 12 11 10 9 8

1 2 3 4 5 6 7

+ VCC

7486

GND

14 13 12 11 10 9 8

1 2 3 4 5 6 7

+ VCC

7404

GND

FIG. : BASIC DIGITAL IC's


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Roll No: Date: / /20Exp. No.: 2.Title : Binary Arithmetic Circuits.______________________________________________________________________________AIM : To realize binary half adder, full adder, half subtractor, and full subtractor.

EQUIPMENTS:[1] Logic trainer[2] IC 7408[3] IC 7432[4] IC 7486[5] Connecting wires.

THEORY:Digital computers perform variety of information processing task. Among the basic functionsencountered are the various types of arithmetic operations. Here we will see how these operationscan be performed using digital hardware.

(1) Half adder: This adder adds only two bits and carry from the previous stage will not be added.The outputs of the adder are SUM and CARRY. Truth table of half adder is given below.

TRUTH TABLE:A B S Co

Expression for Sum and Carry Out:S = A'B + AB' = A + B and Co = AB

(2) Full adder: This adder adds two bits and carries from the previous stage. The outputs of theadder are SUM and CARRY. Truth table and simplified expression for sum and carry are givenbelow.

TRUTH TABLE:A B Ci S Co


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EXPRESSION FOR SUM AND CARRY OUT:

S = A'B'Ci + A'BCi' + AB'Ci' + ABCi = A + B + C and Co = AB + BCi + ACi

(3) Half subtractor: This subtractor subtracts one bit from another but ignores any borrow fromthe previous stage. The outputs of the half adder are DIFFERENCE and BORROW. Truth tableand expression for difference and borrow are given below.

TRUTH TABLE:

A B D Bo

EXPRESSION FOR DIFFERENCE AND BORROW OUT:

D = A’B + AB' = A + B and Bo = A'B

(4) Full subtractor: This subtractor subtracts binary digits along with borrow from the previousstage. The outputs of the subtractor are difference and borrow out.

TRUTH TABLE:

A B Bi D Bo

EXPRESSION FOR DIFFERENCE AND BORROW OUT:

D = A'B'Bi + A'BBi' + AB'Bi' + ABBi = A + B + C and Bo = A’B + A'Bi + BBi

PROCEDURE:

[1] From the Boolean expression draw the logic diagram using suitable gates.[2] Select suitable ICs to implement the Boolean functions[3] Connect circuit and switch on the power supply.[4] Apply set of inputs and observe output and note down the logic state in table.


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CONCLUSION:

BINARY HALF ADDER

BINARY FULL ADDER

BINARY HALF SUBTRACTOR

BINARY HALF SUBTRACTOR


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Answer the following questions:[1] What is the difference between binary full adder and half adder?

[2] Develop logic to multiply two binary numbers.

[3] Develop logic to divide two binary numbers.

[4] Implement full adder using half adders.

[5] Design a ckt which performs both functions adder/sub. Using a mode control switch?


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Roll No: Date: / /20Exp. No.: 3.Title : Code Converter.______________________________________________________________________________

AIM : Design and realization of Binary to Gray code converter.

EQUIPMENTS:[1] Logic trainer,[2] LEDs,[3] digital IC 7486,[4] Connecting wires.

THEORY:

Computers and other digital circuits are required to handle data which may be numeral, alphabet orspecial character. Since digital circuit in binary fashion, the numerals, alphabets and other specialcharacters are required to be converted into binary format. There are various possible ways ofdoing this which is called encoding. Some commonly used binary codes are BCD, Excess-3, Gray,etc..

Many physical systems provide continuous data at their output. This data must be converted in todigital form before they are applied to a digital system. Continuous analog information isconverted to digital form by means of analog to digital converter. Here it is useful to use thereflected (or gray) code to represent digital data converted from analog data. The advantage ofreflected code over pure binary number is that the reflected code changes only by one bit as itproceeds from one number to the next.

PROCEDURE:

[1] Write down the code conversion table. Simplify Boolean function for each bit using K- map.[2] Select appropriate ICs to realize the simplified Boolean function.[3] Switch ON the power supply.[4] Apply appropriate set of inputs and observe the output.


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OBSERVATION:

DEC. BINARY GRAYNO. B3 B2 B1 B0 G3 G2 G1 G0

0.1.2.3.4.5.6.7.8.9.

10.11.12.13.14.15.

CONCLUSION:


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[1] Why data need to be coded?

[2] What is weighted code?

[3] Give one examples of non weighted code.

[4] Design code converter ckt using mode control switch which performs both function Gray toBinary and Binary to Gray.

[5] What is self complementary code? Give example and justify it.

[6] Develop a ckt to convert 2461 code to 2's complement of it.

[7] Develop a circuit to convert 2461 code to 8241 code.


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Roll No: Date: / /20Exp. No.: 4.Title : Multiplexer.______________________________________________________________________________AIM : To realize Boolean function using multiplexer.

EQUIPMENTS:[1] Trainer Board[2] IC 74151[3] IC 7404[4] Connecting wires.

THEORY:Multiplexing means transmitting a large number of information units over a smaller number ofchannels or lines. Multiplexer is a combinational circuit that selects binary information from one ofthe many input lines and directs it to a single output line. The selection of a particular input line iscontrolled by a set of selection lines. Normally for 2n input lines whose bit combinations determinethe input line to be selected.

PROCEDURE:[1] First write down the Boolean function of interest in minterm form.[2] Design it using multiplexer of appropriate size.[3] Connect the circuit.[4] Observe the output levels and note down the logic level in table.

OBSERVATION:Y (A, B, C, D) = ( )

MINTERMS A B C D Y0123456789

101112131415


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CONCLUSION:

Answer the following questions:

[1] List a practical system which uses multiplexes.

[2] Why multiplexer is needed?

[3] What is difference between decoder and demultiplexer?

[4] Develop a Full subtractor ckt using line Mux.

[5] "Multiplexer can be used to minimize hard ware and space” Justify the statement.


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FIG. : 4 - 1 CIRCUIT DIAGRAM OF MULTIPLEXER


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Roll No: Date: / /20Exp. No.: 5.Title : Interfacing Of Display Devices.______________________________________________________________________________

AIM : To design BCD to seven segment decoder.

EQUIPMENTS:[1] Logic trainer,[2] IC 7447,[3] seven segment LED display[4] Connecting wires.

THEORY:In digital systems like computers, calculators seven segment displays are used, in which digits aredisplayed, using LEDs. Display devices provide useful interface between human and digitalprocessing circuits. The digital circuit designed to perform particular task will contain set of inputand then input will generate output which depends upon the digital logic. This output is however inthe coded form which cannot be understood by unskilled user easily. If we decode this output inform which can be understood easily by a layman then our circuit or product will become moreversatile and easy to use. For this purpose we can use decoder and its output is given to displaydevice through driver. Here in this experiment we will be using BCD to seven segment decoderdriver (7447) to convert BCD data to decimal equivalent number.

CODE TABLE:

INPUTS OUTPUT BIT PATTERN CODEA B C D a b c d e f g h

PROCEDURE:

[1] Connect the display circuit to the four input terminals.[2] Apply logic 0 or logic 1 signal according to input bit pattern.[3] Observe the output display of 0 to 9.


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CONCLUSION:


[1] What is a decoder?

[2] Why we need driver along with decoder to interface LEDs?

[3] Give all steps of generating BCD to equivalent seven segment code.

[4] List name of some other display devices which are frequently used in daily life.

[5] What is LCD? How it differs from LEDs?


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Roll No: Date: / /20Exp. No: 6.Title : Flip-Flops.______________________________________________________________________________

AIM : To verify characteristic tables of RS, JK, D and T flip-flops.

EQUIPMENTS:[1] Logic trainer Board,[2] IC 7400,[3] IC74112,[4] Connecting wires.

THEORY:

Logic circuits are classified into two groups namely combinational and sequential. a combinationalcircuit consists of logic gates whose output at any time is determined directly from the presentcombination of inputs without regard to previous inputs. Sequential circuits involve timing andmemory devices. The external inputs along with state of memory elements determine the binaryvalue at the output terminals of the sequential circuit. Thus a sequential circuit is specified by atime sequence of inputs, outputs and internal states.

[1] R-S FLIP-FLOP: It has two inputs R (Reset) & S (Set). The two outputs are Q & Q'. The twooutputs are always complimentary. The truth table is as below.

S R Q ( t ) Q ( t + 1 )0 0 0 00 0 1 10 1 0 00 1 1 01 0 0 11 0 1 11 1 0 *1 1 1 *

Q (t) = Present Output,Q (t + 1) = Next output,* = Invalid condition.

[2] J-K FLIP- FLOP: J-K flip-flop is refinement of the R-S flip-flop in that the indeterminatestate of R-S type is defined in the J-K flip-flop. Inputs J & K behave like S & R of R-S flip-flop.


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When inputs are applied to both J & K simultaneously, the flip flop switches to its complementstate, i.e., if Q = 0 it switches to Q = 0, and vice versa. The truth table is as below.

J K Q ( t ) Q ( t + 1 )0 0 0 00 0 1 10 1 0 00 1 1 01 0 0 11 0 1 11 1 0 11 1 1 0

[3] T FLIP- FLOP: The T flip-flop is single input version of the J-K flip flop. The T flip-flop isobtained from J-K type if both the inputs are tied together. The designation T comes from theability of the flip-flop to toggle the current state. Regardless of the present state of the flip-flop, itassumes the complement state when the clock pulse occurs while input T is at logic 1. The truthtable is as below.

T Q ( t ) Q ( t + 1 )0 0 00 1 11 0 11 1 0

[4] D FLIP-FLOP: D flip-flop transfers its input data to the output when clock will hit to the flipflop. This flip-flop is use to latch data and hold it till next clock comes. It is used inimplementation of shift registers and counters. The truth table is as below.

D Q ( t ) Q ( t + 1 )0 0 00 1 01 0 11 1 1

PROCEDURE:[1] Select appropriate IC for each logic gate.[2] Get the pin diagram from the data book and do the connections accordingly.[3] Switch on the power supply.[4] Verify the truth table.

CONCLUSION:


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[1] What is the difference between combinational and sequential circuits?

[2] What is the need of the clock in sequential circuits?

[3] What is the difference between flip flop and latch?

[4] What is race around problem in the JK flip flops? What is the reason behind this problem?

[5] What is difference between event driven circuits and clocked driven circuits?


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Roll No: Date: / /20Exp. No: 7.Title : Synchronous Counter.______________________________________________________________________________

AIM : To design and realize modulo 10 binary synchronous counter using J-K flip-flops.

EQUIPMENTS:[1] Logic trainer Board[2] IC74112[3] IC7432,[4] IC7408[5] IC7400[6] Connecting wires.

THEORY:A sequential circuit that goes through a prescribed sequence of states on application of input pulsesis called a counter. The input pulses may be count pulses, may be clock pulses or they mayoriginate from an external source and may occur at prescribed intervals of time or at random. In acounter, the sequence of states may follow a binary count or any other sequence of states. Suchcounters are used for counting the number of occurrence of an event and are useful for generatingtiming sequence to control operations in a digital system.

The number of distinct states through which counter passes before it starts its count sequenceagain, is known as modulus of the counter. A counter that follows binary sequences called binarycounter. An N-bit binary counter consists of N-flip flops and can count from 0 to (2n - 1). Mainlydigital counters are of two types:

SYNCHRONOUS COUNTER: In this same clock pulse is applied to all the flip-flops.RIPPLE COUNTER: In this type of counter clock pulse is applied only to the first flip-flop and theripples at the output of flip-flops serve as clock to the next flip-flops.

PROCEDURE:[1] Select the desired value of N, i.e. modulo N-counter.[2] Estimate minimum no. of JK flip-flops required to implement the counter.[3] Draw the state diagram and state table.[4] Derive input function expression for input of various flip-flops.[5] Draw the logic diagram for the counter.[6] Connect the circuit according to the logic diagram using various digital ICs.[7] Switch on the power apply clock pulse, observe and note down the output sequence.


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OBSERVATION: N = _______

COUNT

Q8 Q4 Q2 Q1

0123456789

101112131415

CONCLUSION:


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[1] What are the applications of counters?

[2] What is synchronous counter?

[3] What is modulo of counter?

[4] How many JK flip flops are required to implement modulo 83 counters?

[5] What is difference between timer and counter?


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Roll No: Date: / /20Exp. No: 8.Title : Ripple Counter.______________________________________________________________________________

AIM : To design and realize modulo N ripple counter using T flip-flops.

EQUIPMENTS:[1] Logic trainer Board,[2] IC 74112[3] IC7432,[4] IC7408,[5] IC7400,[6] Connecting wires.

THEORY:Ripple counter is also known as divide by N counter or asynchronous counter. In this counter sameclock pulse is not applied to all flip-flops hence this counter is known as asynchronous counter.Since ripples at the output of one flip-flop trigger the next flip-flop, it is known as ripple counter.Every stage of this counter divides its input frequency by two in the output hence is known asdivide by N counter.

PROCEDURE:

[1] Select the desired value of N, i.e. modulo N-counter.

[2] Estimate minimum no. of JK flip-flops required to implement the counter.

[3] Draw the state diagram and state table.

[4] Derive Boolean function expression for CLR input of various flip-flops.

[5] Draw the logic diagram for the counter.

[6] Connect the circuit according to the logic diagram using various digital ICs.

[7] Switch on the power apply clock pulse, observe and note down the output sequence.


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OBSERVATION: N =

COUNT Q8 Q4 Q2 Q1

0123456789

101112131415

CONCLUSION:


[1] What is the difference between synchronous and ripple counter ?


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[2] What is difference between Timer and Counter?

[3] How many JK flip-flops are required to implement modulo 5 counter?

[4] What are applications of counters?

[5] What is up counter and down counter?

[6] Find out the general equation for N-bit up/down counter and draw a circuit diagram which willperform both functions using selection line logic.


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Roll No: Date: / /20Exp. No.: 9.Title : Shift Registers______________________________________________________________________________

AIM : To study universal shift register.

EQUIPMENTS:[1] Logic trainer[2] IC 74194[3] Connecting wires[4] CRO.

THEORY:A flip flop can store one bit of datum. It is also referred as a 1-bit register. An array of flip flop isrequired to store binary information and the number of flip flops required is equal to the number ofbits in the binary word and is referred as a register. Registers find applications in a variety ofdigital systems including microprocessors.

A typical example of a shift register at work is found within a calculator. As we enter each digit onthe keypad, the number shifts to the left on the display. In other words, each cell is a temporarymemory and thus holds the number on the display even after the release of the key. It also shiftsthe number to the left each time a next key is pressed. This memory and shifting characteristicmake the shift register extremely valuable in most digital electronic systems. We can classify theregisters according to the way data they take from and the data they deliver to the external circuits.

[1] Serial in serial out registers: Here data is taken serially one bit at a time and data is placed

serially on the external line.

[2] Serial in parallel out registers: In this type of registers the data is accepted serially and data is

placed simultaneously on the external bus.

[3] Parallel in serial out registers: The data is loaded simultaneously and data is taken from the

register one by one bit at time.

[4] Parallel in parallel out registers: The data is loaded simultaneously and is taken out

simultaneously from the shift register.

Registers can be further classified according to the data shifting direction; they may be shift leftregisters or shift right registers.


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UNIVERSAL SHIFT REGISTER (IC 74194):

This bi-directional shift register is designed to incorporate virtually all of the features a systemdesigner may want. It has four distinct modes of operation, namely

(1) Parallel load(2) Shift right(3) Shift left(4) Inhibit clock (do nothing).

MODE CONFIGURATION TABLE:

S1 S0 MODE0 00 11 01 1

PROCEDURE:

[1] Select appropriate for the shift register.

[2] Connect 0 & +5 volt D.C. supply to the IC.

Select particular mode with proper logic level at S1 and S0.

[3] Apply clock pulse and sequence of input bits and observe the output sequence.

[4] Prepare the timing diagram and operation table for all possible modes.

CONCLUSION:


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[1] Give few examples of practical systems which use shift registers.

[2] "Shift register can be used to provide timing delay." Justify the statement.

[3] "Shift registers can be used as a memory." Justify the statement.

[4] What do you mean by universal shift register?

[5] Why we need serial to parallel and parallel to serial conversion?

[6] Can one use shift register as time delay device? If yes how?

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