Digital Logic CS 31: Intro to Systemsmgagne1/teaching/... · CS 31: Intro to Systems Digital Logic...

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CS 31: Intro to Systems Digital Logic Martin Gagné Swarthmore College January 31, 2017 You’re going to want scratch papr today borrow some if needed.

Transcript of Digital Logic CS 31: Intro to Systemsmgagne1/teaching/... · CS 31: Intro to Systems Digital Logic...

Page 1: Digital Logic CS 31: Intro to Systemsmgagne1/teaching/... · CS 31: Intro to Systems Digital Logic Martin Gagné Swarthmore College January 31, 2017 You’re going to want scratch

CS 31: Intro to SystemsDigital Logic

Martin Gagné

Swarthmore College

January 31, 2017You’re going to want scratch papr today …

borrow some if needed.

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Quick Announcements

• Late Policy Reminder• 3 late days total for the whole semester

• Lab work• Start early, especially multi-week labs

• Readings• Only the page linked, no further links

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Today (and Thursday)

• Hardware basics• Machine memory models

• Digital signals

• Logic gates

• Manipulating/Representing values in hardware• Adders

• Storage & memory (latches)

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The system stackc program

compiler

shell

operating system

memory

CPU

circuits

gates

transistors

wires

software

hardware

electricalengineering

This classStarting this week

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Hardware Models (1940’s)

• Harvard Architecture:

• Von Neumann Architecture:

ProgramMemory

Input/Output

DataMemory

CPU(Control andArithmetic)

CPU(Control andArithmetic)

Input/Output

ProgramandData

Memory

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Von Neumann Architecture Model

• Computer is a generic computing machine:• Based on Alan Turing’s Universal Turing Machine

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Von Neumann Architecture Model

• Computer is a generic computing machine:• Based on Alan Turing’s Universal Turing Machine

➔ The hardware only ever executes one program:

Initialize program counter

Repeat forever: {

fetch instruction indicated by program counter

increment the program counter

execute the instruction}

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Von Neumann Architecture Model

• Computer is a generic computing machine:• Based on Alan Turing’s Universal Turing Machine

• Stored program model: computer stores program ratherthan encoding it (feed in data and instructions)

• No distinction between data and instructions memory

• 5 parts connected by buses (wires): • Memory, Control, Processing, Input, Output

Memory Cntrl Unit | Processing Unit

cntrl busaddr bus

data bus

Input/Output

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Memory

• Stores instructions and data.

•Addressable, like array indices.• addr 0, 1, 2, …

(In CPU:)

• Memory Address Register: address to read/write

• Memory Data Register: value to read/write

Memory Cntrl Unit | Processing Unit

cntrl busaddr bus

data bus

Input/Output

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Central Processing Unit (CPU)

•Processing Unit: executes instructions selected by the control unit• ALU (arithmetic logic unit): simple functional units: ADD,

SUB, AND, OR, etc.• Registers: temporary storage directly accessible by

instructions

•Control unit: determines the order in which instructions execute• PC: program counter: address of next instruction • IR: instruction register: holds current instruction• clock-based control: clock signal+IR trigger state changes

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Input/Output

•Keyboard

• Files on the hard drive

•Network communication

Memory Cntrl Unit | Processing Unit

cntrl busaddr bus

data bus

Input/Output

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Digital Computers• All input is discrete (driven by periodic clock)

• All signals are binary (0: no voltage, 1: voltage)

data, instructions, control signals, arithmetic, clock

• To run program, need different types of circuits

CPUALU, Cntrl,

Storage

RAMCntrl & Storage

bus

Circuits to store program data and instructionsand support reading and writing addressable storage locations

Circuits to executeprograminstructionsthat act on program data

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Goal: Build a CPU (model)

Three main classifications of HW circuits:

1. ALU: implement arithmetic & logic functionality(ex) adder to add two values together

2. Storage: to store binary values(ex) Register File: set of CPU registers, Also: main memory (RAM)

3. Control: support/coordinate instruction execution(ex) fetch the next instruction to execute

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Abstraction

User / ProgrammerWants low complexity

ApplicationsSpecific functionality

Software libraryReusable functionality

Complex devicesCompute & I/O

Operating systemManage resources

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Abstraction

Complex devicesCompute & I/O

Hardware Circuits

Logic Gates

Transistors

Here be dragons.(Electrical Engineering)

…(Physics)

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Logic GatesInput: Boolean value(s) (high and low voltages for 1 and 0) Output: Boolean value result of boolean function

Always present, but may change when input changes

A B A & B A | B ~A 0 0 0 0 1 0 1 0 1 1 1 0 0 1 0 1 1 1 1 0

a

bout

out = a & b

And

a

bout

out = a | b

Or

a out

out = ~a

Not

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More Logic Gates

A B A NAND B A NOR B 0 0 1 1 0 1 1 0 1 0 1 0 1 1 0 0

a

bout

out = ~(a | b)

NOR

a

bout

out = ~(a & b)

NAND

Note the circle on the output.This means “negate it.”

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Combinational Logic Circuits

• Build up higher level processor functionality from basic gates

Acyclic Network of Gates

Inputs Outputs

Outputs are boolean functions of inputs

Outputs continuously respond to changes to inputs

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What does this circuit output?And Or Not

X

YOutput

X Y OutA

OutB

OutC

OutD

OutE

0 0 0 1 0 1 0

0 1 0 1 0 0 1

1 0 1 0 1 1 1

1 1 0 0 1 1 0

Clicker Choices

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What can we do with these?

• Build-up XOR from basic gates (AND, OR, NOT)

A B A ^ B 0 0 0 0 1 1 1 0 1 1 1 0

Q: When is A^B ==1?

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Which of these is an XOR circuit?

Draw an XOR circuit using AND, OR, and NOT gates.

I’ll show you the clicker options after you’ve had some time.

And Or Not

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Which of these is an XOR circuit?

AB

AB

AB

AB

E: None of these are XOR.

A: B:

C: D:

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Checking the XOR circuit

A^B == (~A & B) | (A & ~B)

A:0 B:0 A^B: A:0 B:1 A^B:

A:1 B:0 A^B: A:1 B:1 A^B:

A

B out = A^B

01

10

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Abstracting the XOR circuit A^B == (~A & B) | (A & ~B)

out = A^B

A

B

=XOR

out = A^BA

B

A B A ^ B 0 0 0 0 1 1 1 0 1 1 1 0

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Digital Circuits - Building a CPUThree main classifications of HW circuits:

1. ALU: implement arithmetic & logic functionality(ex) adder to add two values together

2. Storage: to store binary values(ex) Register File: set of CPU registers

3. Control: support/coordinate instruction execution(ex) fetch the next instruction to execute

HW Circuits

Logic Gates

Transistor

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Digital Circuits - Building a CPUThree main classifications of HW circuits:

1. ALU: implement arithmetic & logic functionality(ex) adder to add two values together

Start with ALU components (e.g., adder, logic circuits)

Combine (with multiplexer) into ALU!

HW Circuits

Logic Gates

Transistor

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Arithmetic Circuits

• 1 bit adder: A+B

• Two outputs:1. Obvious one: the sum

2. Other one: ??

A B Cout Sum(A+B) 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

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Which of these circuits is a one-bit adder? A B Sum(A+B) Cout 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1

AB

Sum

Cout

AB

Sum

Cout

AB

Cout

SumAB

Sum

Cout

A: B:

C: D:

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More than one bit?

• When adding, sometimes have carry in too

0011010+ 0001111

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One-bit (full) adder

Need to include:

Carry-in & Carry-out

A B Cin Sum Cout 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1

= 1-bitadder

Cin

Cout

A

B Sum

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One-bit (full) adder

Need to include:

Carry-in & Carry-out

A B Cin Sum Cout 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1

= 1-bitadder

Cin

Cout

A

B SumHA

HAsum

cout

sum

cout

coutA

B

cin

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Multi-bit Adder (Ripple-carry Adder)

1-bitadder

0

Cout

A0

B0

Sum0

1-bitadder

Cout

A1

B1

Sum1

1-bitadder

Cout

A3

B3

Sum3

1-bitadder

Cout

A2

B2

Sum2

…1-bit

adder

Cout

AN-1

BN-1

SumN-1

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Three-bit Adder (Ripple-carry Adder)

1-bitadder

0

0

1

1-bitadder

1

1

1-bitadder

0

0

010 (2)+ 011 (3) = 3-bit

adder

A0

A1

A2

B0

B1

B2

Carry out

Carry in

Sum0

Sum1

Sum2

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Arithmetic Logic Unit (ALU)

• One component that knows how to manipulate bits in multiple ways• Addition• Subtraction• Multiplication / Division• Bitwise AND, OR, NOT, etc.

• Built by combining components• Take advantage of sharing HW when possible

(e.g., subtraction using adder)

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Simple 3-bit ALU: Add and bitwise OR

3-bitadder

Sum0Sum1

Sum2

A0

A1

A2

B0

B1

B2

3-bit inputsA and B:

Or0

Or2

Or1

At any given time, we only want the output from ONE of these!

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Simple 3-bit ALU: Add and bitwise OR

3-bitadder

Sum0Sum1

Sum2

A0

A1

A2

B0

B1

B2

3-bit inputsA and B:

Or0

Or2

Or1

Extra input: control signal to select Sum vs. OR

Circuit that takes in Sum

0-2 / Or

0-2

and only outputs one of them,

based on control signal.

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Which of these circuits lets us select between two inputs?

ControlSignal

Input 1

Input 2

ControlSignal

Input 1

Input 2

ControlSignal

Input 1

Input 2

A: B:

C:

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Multiplexor: Chooses an input value

Inputs: 2N data inputs, N signal bits

Output: is one of the 2N input values

• Control signal s, chooses the input for output• When s is 1: choose a, when s is 0: choose b

outb

s

a out = (s & a)|(~s &b)

1 bit 2-way MUX

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Word Multiplexor

Input:two 32 bit values (a, b)one 1bit signal s

Each corresponding bit of 32 bit input values, fed through 1 bit mux

Output: One 32 bit value(either a or b)

38

b31

s

a31

out31

b30

a30

out30

b0

a0

out0

s

B

AOutMUX

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N-Way MultiplexorChoose one of N inputs, need log

2 N select bits

D0

D3

Out

s0

s1

MUX4D2

D1

s1 s0 choose0 0 D00 1 D11 0 D21 1 D3

4-Way Multiplexor

S Input to choose D0

D0

s1s0

. . . . . .. . .

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Simple 3-bit ALU: Add and bitwise OR

3-bitadder

Sum0Sum1

Sum2

A0

A1

A2

B0

B1

B2

3-bit inputsA and B:

Or0

Or2

Or1

Extra input: control signal to select Sum vs. OR

Multiplexer!

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ALU: Arithmetic Logic Unit

• Arithmetic and logic circuits: ADD, SUB, NOT, …• Control circuits: use op bits to select output • Circuits around ALU:

• Select input values X and Y from instruction or register• Select op bits from instruction to feed into ALU• Feed output somewhere

OF

ALU

Y

X op Y

op bits: selects which op to output

Output flags: set as aside effect of op(e.g., overflow detected)

ADD 2 3

X

CPUInstruction:

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Up next…

• More digital circuits (storage and control)