Digital Arithmetic: Oti d Operations and Circuits
Transcript of Digital Arithmetic: Oti d Operations and Circuits
![Page 1: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/1.jpg)
Chapter-6p
Digital Arithmetic:O ti d Operations and
CircuitsCircuits
Afroza Sultana
![Page 2: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/2.jpg)
Binary Addition
• The addition of two binary number is performed in exactlythe same manner as the addition of decimal numbers.
• Least-significant-digit first.• “Carry” of 1 into the next position may be needed.• 4 different cases for binary addition
0 + 0 = 01 0 11 + 0 = 11 + 1 = 10 = 0 + carry of 1 into next position1 + 1 + 1 = 11 = 1 + carry of 1 into next position1 + 1 + 1 = 11 = 1 + carry of 1 into next position
• The operations of subtraction, multiplication, and divisionactually use only addition as their basic operation
![Page 3: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/3.jpg)
Examples
(3) 011 1001(9) 75)11.011(3.3 110(6)
(3)0+ 1111(15)
00 (9) + 50)10.110(2.7
75).0 (3.3 +
)9(1001 )(2411000 ).(. 1256001110
![Page 4: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/4.jpg)
Review QuestionReview Question
• Add the following pairs of binary numbers.g p y– 10110 + 00111
ans.) 11101)
– 011.101 + 010.010ans.) 101.111
– 10001111 + 00000001ans.) 10010000
![Page 5: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/5.jpg)
Representing signed numbersSign-magnitude system:
Calculator and Computer do not normally use it, becausecircuit implementation is more complex than other system. The
t l d t f ti i d bimost commonly used system for representing signed binarynumbers is the 2’s compliment system.
![Page 6: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/6.jpg)
1’s Complement System
Change each 0 to 1, and each 1 to 0.Examplep
(45) 1 0 1 1 0 1 original binary number↓ ↓ ↓ ↓ ↓ ↓
(- 45) 0 1 0 0 1 0 complement each bit
1 0 1 1 0 1 ( 45)1 0 1 1 0 1 ( 45)+ 0 1 0 0 1 0 (-45)
1 1 1 1 1 11 1 1 1 1 1
Add one to this result, get zero.dd o e o s esu , ge e o.
![Page 7: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/7.jpg)
2’s Complement System
Take the 1’s complement of the numberA 1 i ifi i i iAdd 1 to the least-significant-bit position
complement s1' form to bit each complement 010010 45 of equivalent binary 101101
number binary original of complement s2' 010011 complement s2' form to 1 add 1
complement s1 form to bit each complement 010010 +
number binary original of complement s2 010011
![Page 8: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/8.jpg)
Representing signed numbers using 2’s complement form
• If the number is positive, the magnitude isrepresented in its positional-weightedp p gbinary form, and a sign bit of 0 is placed infront of the MSB.
• If the number is negative, the magnitude isrepresented in its 2’s complement form andrepresented in its 2 s complement form, anda sign bit of 1 is placed in front of the MSB.
![Page 9: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/9.jpg)
Examplep
![Page 10: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/10.jpg)
Example
• Represent each of the following signed decimalnumbers as a signed binary number in the 2’s-numbers as a signed binary number in the 2 s-complement system. Use a total of five bitsincluding the sign bit.
(a) +13 (b) –9 (c) +3 (d) –2 (e) –8
Ans:
(a) 01101 (b) 10111 (c) 00011 (d)11110 (e) 11000
![Page 11: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/11.jpg)
Negation
• Negation is the operation of converting a positivenumber to its negative equivalent or a negative numbert it iti i l tto its positive equivalent.
• We negate a signed binary number by 2’s-complementing it.
• Example– Each of the following numbers is a signed binary
number in the 2’s-complement system Determinenumber in the 2 s complement system. Determinethe decimal value in each case:
(a) 01100(b)11010(c)10001Ans. (a) +12 (b) -6 (c) -15
![Page 12: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/12.jpg)
Special case in 2’s-complement t tirepresentation
• Whenever a signed number has a 1 in the sign bit and all 0sf h i d bi i d i l i l i 2N hfor the magnitude bits, its decimal equivalent is –2N, whereN is the number of bits in the magnitude.
• The complete range of values that can be represented in thep g p2’s-complement system having N magnitude bits is –2N to+(2N - 1).
• The range of unsigned decimal values that can beThe range of unsigned decimal values that can berepresented in a byte is 256 different values (0-255)
• The range of signed decimal values that can be representedin a byte is 256 different values ( 128 to +127)in a byte is 256 different values (-128 to +127)
![Page 13: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/13.jpg)
![Page 14: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/14.jpg)
Review Questions
• Represent each of the following values as aneight-bit signed number in the 2’s-complementg g psystem
(a) +13= 00001101 (b) –7 = 11111001(c) –128 = 10000000
• Each of the following is a signed binary numberin the 2’s-complement system. Determine thedecimal equivalent for eachdecimal equivalent for each.
(a) 100011= -29 (b) 1000000 = - 64(c) 01111110 = +126(c) 01111110 +126
![Page 15: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/15.jpg)
Review Questions
• What range of signed decimal values can berepresented in 12 bits (including the sign bit)?represented in 12 bits (including the sign bit)?Ans: -2048 to +2047
• How many bits are required to represent decimal• How many bits are required to represent decimalvalues ranging from –50 to +50?Ans: 7Ans: 7
• What is the largest negative decimal value that canbe represented by a two-byte number?be represented by a two byte number?Ans: -32768
![Page 16: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/16.jpg)
Addition in 2’s-complement system
• Case I: Two Positive Numbers.
+9 : 0 1 0 0 1 (augend)4 0 0 1 0 0 ( dd d)+4 : 0 0 1 0 0 (addend)
0 1 1 0 1 (sum = +13)
Sign bitsg
![Page 17: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/17.jpg)
Addition
• Case II: Positive Number and Smaller Negative Number
+9 : 0 1001 (augend)( g )-4 : 1 1100 (addend)
1 0 01011 0 0101
Sign bitsg
This carry is disregarded;
The result is 00101 (sum =+5)
![Page 18: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/18.jpg)
Addition
• Case III: Positive Number and Larger Negative N bNumber
-9 : 1 0 1 1 1+4 : 0 0 1 0 0+4 : 0 0 1 0 0
1 1 0 1 1 (sum = -5)
Negative sign bit
![Page 19: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/19.jpg)
Addition
• Case IV: two negative Numbers
-9 : 1 0 1 1 1-9 : 1 0 1 1 1-4 : 1 1 1 0 0
1 1 0 0 1 1Sign bitg
This carry is disregarded;
The result is 10011(sum =-13)
![Page 20: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/20.jpg)
Addition
• Case V: Equal and Opposite Numbers
-9 : 1 0 1 1 1+9 : 0 1 0 0 1
1 0 0 0 0 01 0 0 0 0 0Sign bit
Disregard;
The result is 00000 (sum = +0)
![Page 21: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/21.jpg)
Subtraction in the 2’s-complement System
• The procedure for subtracting one binaryThe procedure for subtracting one binarynumber (the subtrahend) from another binarynumber (the minuend)
– Negate the subtrahend. This will change thebt h d t it i l t l f itsubtrahend to its equivalent value of opposite
sign.
– Add this to the minuend. The result of thisaddition will represent the difference betweenpthe subtrahend and the minuend.
![Page 22: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/22.jpg)
Subtraction
• Subtract 4 from 9• (+9) – (+4) =(+9) + (-4)= (+5)
+9 : 0 1 0 0 1 (Minuend)4 : 1 1 1 0 0 (Subtrahend)- 4 : 1 1 1 0 0 (Subtrahend)
1 0 0 1 0 1 (Difference = +5)
Disregard;
The result is 00101 (Difference = +5)
![Page 23: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/23.jpg)
Subtraction
• Subtract 8 from -9• (-9) – (+8) =(-9) + (-8)= (-17)
-9 : 1 0 1 1 1 (Minuend)8 : 1 1 0 0 0 (Subtrahend)- 8 : 1 1 0 0 0 (Subtrahend)
1 0 1 1 1 1 (Difference = -17)Magnitude
Overflow Sign bit
Magnitude
The result is 101111 (Difference = -17)
![Page 24: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/24.jpg)
Arithmetic Overflow
• When two positive or two negative numbers arebeing added, an overflow could occur if there is
h i t th i bit itia carry happening to the sign-bit position.
• Overflow can occur when the minuend andsubtrahend have different signs.
![Page 25: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/25.jpg)
BCD Addition
• Add using ordinary addition, the BCD codegroups for each digit.
• If the Sum equals 9 or less than 9, nocorrection needed.
• Correction of 0110 is needed at the positionwhere sum is greater than 9.
![Page 26: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/26.jpg)
Examples
5 for BCD 0101 5 ←
9 for BCD 1001 9 4 for BCD 0100 4
←←++
33 for BCD 0011 0011 3345 for BCD 0101 0100 45
←++←
78 for BCD 1000 0111 78 33 for BCD 0011 0011 33
←←++
![Page 27: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/27.jpg)
Examples
+275 = 0 0 1 0 0 1 1 1 0 1 0 1275 0 0 1 0 0 1 1 1 0 1 0 1+641 = 0 1 1 0 0 1 0 0 0 0 0 1+916 = 1 0 0 0 1 0 1 1 0 1 1 0
0 1 1 01 0 0 1 0 0 0 1 0 1 1 0
Invalid BCD in 2nd digit, needs correction in g ,the 2nd position.
The result is 1001 0001 0110 = BCD of 961
![Page 28: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/28.jpg)
Hexadecimal Arithmetic
• Hex AdditionAdd the two hex digits in decimal mentally– Add the two hex digits in decimal, mentallyinserting the decimal equivalent for those digitslarger than 9.larger than 9.
– If the sum is 15 or less, it can be directlyexpressed as a hex digit.e p essed s e d g .
– If the sum is greater than or equal to 16, subtract16 and carry a 1 to the next digit position.y g p
![Page 29: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/29.jpg)
Examples
58
• Add the hex numbers 58 and 24
5824
7C Ans: Sum =7C7C s: Su 7C
• Add the hex numbers 3AF and 23C• Add the hex numbers 3AF and 23C
3AF3AF23C5EB Ans: Sum = 5EB
![Page 30: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/30.jpg)
Hex Subtraction
• How to get the 2’s-complement of a hex number?• Convert to binary take the 2’s complement of the• Convert to binary, take the 2’s complement of the
binary equivalent, and then convert back to hex.
73A
0111 0011 10100111 0011 1010
1000
1000 1100 0101+1
1’s complement
1000 1100 0110
8C6
![Page 31: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/31.jpg)
Hex Subtraction
• A quicker procedure: subtract each hex digit from F; then add 1.
F F F
7 3 A } Subtract each digit from F-7 -3 -A
8 C 5
1
} ← Subtract each digit from F
Add 1+ 1
8 C 6
← Add 1
← Hex equivalent of 2’s complementcomplement
![Page 32: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/32.jpg)
Example
• Subtract 3A516 from 59216.Subtract 3A516 from 59216.
5 9 2F F F
5 9 2+C 5 B
-3 -A -5
C 5 A11 E D + 1
C 5 BDisregard carry
C 5 B
![Page 33: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/33.jpg)
ALU
![Page 34: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/34.jpg)
Design of Full AdderLogic circuit with 3 inputs and 2 outputs. The inputs are a bitfrom the augends, a bit from the addend and a bit from a carryC from a previous stageCIN from a previous stage.
Truth table for a full-adder circuit
![Page 35: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/35.jpg)
K Mappings for the full-adder outputs
![Page 36: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/36.jpg)
Full-adder Outputs
)()()()( CBACBABCCBACBCBAS ⊕⊕
p
)()()()( ININININININ CBACBABCCBACBCBAS ⊕+⊕=+++=
CBAXAXAXASCBXLet IN
⊕⊕⊕
⊕=,
AACCCCAACAACC
CBAXAXAXAS IN⊕⊕=⊕=+=
)()()(
..
ABACBCCCABBBACAABCC ININININININOut ++=+++++= )()()(
![Page 37: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/37.jpg)
Complete circuitry for a FA
![Page 38: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/38.jpg)
Parallel Binary Adder
![Page 39: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/39.jpg)
Parallel Adder
• All the bits of the augend and the addend arefed into the adder ckt simultaneously.y
• Parallel addition is extremely fast.
![Page 40: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/40.jpg)
Complete Parallel Adder With Registers
![Page 41: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/41.jpg)
IC Parallel Adder
Fig a) 4-bit Parallel Adder b) 8-bit Parallel Adder cascading two 4-bit PA
![Page 42: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/42.jpg)
2’s Complement Systemp y
• The operations of addition and subtraction ofsigned numbers can be performed using onlythe addition operation if we use the 2’scomplement form to represent negativenumbersnumbers.
![Page 43: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/43.jpg)
Addition
![Page 44: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/44.jpg)
Subtraction
![Page 45: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/45.jpg)
Combined Addition and Subtraction
![Page 46: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/46.jpg)
Combined Addition and Subtraction
• The adder / subtractor ckt is controlled by twoThe adder / subtractor ckt is controlled by twocontrol signals ADD and SUB.
• When ADD= 1 and SUB=0 the ckt performspaddition.
• When ADD=0 and SUB =1, the ckt performs a 2’s, pcomplement operation.
• The result of addition or subtraction appears at theoutputs ∑0 to ∑3
![Page 47: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/47.jpg)
BCD Adder• Add the BCD code groups for each decimal digit position;
use ordinary binary addition.
• For those positions where the sum is 9 or less, the sum is inproper BCD form and no correction is neededproper BCD form and no correction is needed
• When the sum of two digits is greater than 9, a correction of0110 should be added to that sum to produce the proper BCDresult. This will produce a carry to be added to the nextdecimal position.decimal position.
A3A2A1A0 ← BCD code groupB3 B2 B1 B0 ← BCD code group
S4S3 S2 S1 S0 ← straight binary sum
![Page 48: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/48.jpg)
Formation of logic for 0110 correction
S4 S3 S2 S1 S0
0 1 0 1 0 (10)• Whenever S4 =1 (sumsgreater than 15) 0 1 0 1 1 (11)
0 1 1 0 0 (12)
greater than 15)
• Whenever S3 =1 and0 1 1 0 1 (13)
0 1 1 1 0 (14)
3either S2 or S1 or bothare 1 (sums 10 to 15)
0 1 1 1 1 (15)
1 0 0 0 0 (16)
1 0 0 0 1 (17)X=S4+S3(S2+S1) 1 0 0 0 1 (17)
1 0 0 1 0 (18)
X=S4+S3(S2+S1)
![Page 49: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/49.jpg)
A BCD adder
![Page 50: Digital Arithmetic: Oti d Operations and Circuits](https://reader030.fdocuments.us/reader030/viewer/2022012810/61c037f420e8ff50d3599b2f/html5/thumbnails/50.jpg)
Cascaded BCD Adder