9/19/2016 1

Detector: Radio Frequency DesignTotal Bandwidth and Spectral Resolution

Aritoki SuzukiU.C. Berkeley, LBNL

Detector-RF Working Group

September 19th 2016

CMB-S4 Collaboration Meeting, Chicago

(1) Lenslets / Horn

~6 mm

Primer 1: Scope of Detector-RF Team

9/19/2016 2CMB-S4 Collaboration Meeting, Chicago

(2) Broadband Antenna / OMT/ Phase Array

#1 Telescope: (M. Niemack)

#2 Optics: (J. McMahon)

#3 Detector-RF: (A. Suzuki)

#4 Detector-Readout: (Z. Ahmed)

~2 meter

LensFilter

Window

Photon

Primary Mirror

SecondaryMirror

Cryogenic Receiver

Focal Plane / Detector Array

~150 mm

~1 mm

(3) Transmission Line

(4) Band Pass Filter

(5) RF Termination at TES Bolometer / MKID

Antenna

Cross-over

Lenslet

~3 meter

Primer 2: Detector-RF

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Hubmayr, LTD16

CMB-S4 Collaboration Meeting, Chicago

Austerman, LTD16

Spline Horn Array

OMT/ Bandpass Filter/ RF Termination

RF-Design:• Feed: Beam, polarization, and total bandwidth• Bandpass filter: Spectral response, spectral resolution

Beam Measurement

Spectra Measurement Polarization Response Measurement

Spectral Resolution

4

Motivation and Question• Astrophysical polarized foregrounds

Dust emission, Synchrotron radiation• Is sub-division of atmospheric bands

possible?• What are trade offs?

CMB-S4 Collaboration Meeting, Chicago

Spectral Resolution• Stage-2 & 3 experiments:

Single band for 90/150 GHz atm window• Sub-dividing atm window is possible

• High-order (more L and C’s) filter has steeper roll-off

Trade-Off and R&D• High-order filter has steeper roll-off,

but efficiency decreases• Low loss dielectric film mitigates this

problem (Si nitride, Single Crystal Si)• Demonstration of sub-diving filter

3-Pole 7-Pole

Atm TransmissionRMS Brightness

3-Pole7 pole

tanδ 3x10-4

tanδ 3x10-3

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Planck X am

Total Bandwidth

5CMB-S4 Collaboration Meeting, Chicago

Pixel Size Optimization Question• What should total bandwidth per pixel be?• Optimal pixel size scales as wavelength• How quickly does mapping speed fall off

from the optimal?

Additional Considerations• Finite RF component size• Interconnect density• Total bandwidth of optics• Available readout channels

• R&D: Integrate mux on wafer• R&D: New telescope design

Total Bandwidth• Mapping speed has broad optimum• Multi-choric pixel can take advantage of

this broad optimum• Collaborative study with foreground,

forecast, and instrument team• Study multiple scenarios and feed back to

global optimization

Large Pixel:• Each pixel is

more sensitive • Less pixels

Small Pixel:• Each pixel is

less sensitive • More pixels

100 μm pitch wire bonds, POLARBEAR

150/230 GHz AdvACTProto-type Pixel

~4.75 mm

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Antenna Comparison

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Spline Horn coupled OMT• Strengths

• Symmetric Beams• 2.3:1 Bandwidth (on sky)

• Areas for development• Mass fabrication of horns• Increase total bandwidth (6:1)

• Experiments: Advanced ACT, CLASS

CMB-S4 Collaboration Meeting, Chicago

Lenslet Coupled Sinuous• Strengths

• 5:1 Bandwidth (Lab demo)• Areas for development

• Lenslet: AR coatings/Meta-material/Mass Fab• Experimental demo (on sky data)

• Experiments: POLARBEAR/SA, SPT-3G

Phased-Array• Strengths

• Single-wafer construction (on sky)• Areas for development

• Total Bandwidth (Octave bandwidth)• Experiments: BICEP-2, KECK Array, BICEP-3

Direct KID Coupled Horn• Strengths

• Integrated detector + MUX• Areas for development

• On sky demo of 150 GHz kilo-pixel array • Experiments: NIKA

Different technologies have unique strength. Appropriate technology should be chosen for a given scenario

AdvACT horn &detector

BICEP-2 Detector

SPT-3G Lenslet ArrayPOLARBEAR Detector

Horn coupled LEKID

On-Chip RF Technology

9/19/2016 7CMB-S4 Collaboration Meeting, Chicago

Band Pass Filter• Lumped: Small size• Distributed: Large size• Channelizer: Contiguous bands• High-R: Spectrometer on chip

Cross-Over• No cross-over• With via - Broadband• Via-less - Simple fab, limited bandwidth

Termination• TES bolometer couples to RF

transmission line• MKID demonstration coming soon

Mode Filter• Rejects higher order mode to

retain Gaussian beam

RF technology is mature. Stable material property and accurate feedback is required

BICEP 3-pole lumped filter design SPT-3G spectra measurement

AdvACT 180 hybrid design CLASS 180 hybrid design

CLASS Via-less cross-overAdvACT cross-over

MKID to microstrip line couplingBICEP bolometer POLARBEAR bolometer

Developing Detector Mass Fabrication

8CMB-S4 Collaboration Meeting, Chicago

LBNL MICROSYSTEMS LABORATORY

FIRST MSL FABRICATED DEVICES: STRIP DETECTORS ON 100MM WAFERS

TRANSISTORS FABRICATED ON HIGH RESISTIVITY SILICON

PHOTODIODES FOR MEDICAL IMAGING

PROGRESSION OF CCD DEVELOPMENT IN THE MICROSYSTEMS LAB

1996 - FIRST MSL CCD 40K PIXELS

1998 - FIRST LARGE FORMAT CCD

4M PIXELS

2000 – 8M PIXEL CCD 2002 - FIRST MSL CCD ON 150MM WAFER

16M PIXELS FOR SNAP

2006 – 8M PIXEL CCD DARK ENERGY SURVEY

PRODUCTION BUILD

2007 – 16M PIXEL CCD FOR BARYON OSCILLATION

SPECTROSCOPIC SURVEY

SILICON ON INSULATOR DEVICE FABRICATION

90 DETECTORS SUPPLIED TO NASA THEMIS MISSION

THIN WINDOW ELECTRON DETECTORS FOR NASA

STEREO MISSION

2011 R&D RUN WITH 12 DIFFERENT DESIGNS FOR

FAST,LOW NOISE CCD READOUT AND SINGLE PHOTON DETECTION

MSL ACCOMPLISHMENTS AND GROWTH

Since its commissioning in 1990 under the leadership of Helmuth Spieler and David Nygren, the MSL has supported a variety of scientific projects with custom silicon devices. Initial work focused on pixel and strip detector development for high energy physics applications. These p-i-n diodes exhibited very low reverse leakage current (<1nA/cm2) and established the baseline for more complex future device designs. In the following years, the MSL continued to expand its process repertoire and tool set for pursuing more challenging device structures. By the mid-1990s, the MSL successfully fabricated transistors on high resistivity silicon for monolithic integration with p-i-n detectors and developed etching techniques for polysilicon gates on multilayer dielectric structures. Collaboration with Life Sciences for medical imaging applications led to the fabrication of photodiodes employing a patented process (Holland) for creating a low noise device with backside illumination and high quantum efficiency. These development efforts culminated in the successful design and fabrication of a backside illuminated charge-coupled device (CCD) on high resistivity silicon in 1996. The long wavelength sensitivity of these CCDs were well-suited to applications in astronomy and astrophysics and aligned with LBNL’s successful astrophysics group. Over the next decade, the MSL fabricated CCDs of larger size (16 megapixel) and complexity. LBNL high resistivity CCDs are now deployed in telescopes internationally, including a 570 megapixel focal plane for the Dark Energy Survey in Cerro Tololo, Chile. Interest in CCDs has expanded beyond astronomy with MSL CCDs being developed for x-ray detection at the LBNL Advanced Light Source. Other applications include homeland security and direct detection of positrons for possible medical imaging applications. In parallel with CCD fabrication, the MSL (Tindall) has fabricated detectors for a variety of space missions in collaboration with the UC Space Sciences Lab including the STEREO, THEMIS, CINEMA and MAVEN projects.

MSL CCD IMAGE OF DUMBELL NEBULA N27 FROM

THE WIYN OBSERVATORYPhoto credit: NOAO/AURA/NSF

Copyright WIYN Consortium Inc., all rights reserved

75 MSL CCDs ASSEMBLED INTO THE DES FOCAL PLANE BY FERMILAB

GROUND-BASED DEPLOYMENTS OF MSL CCDS

Keck 10m telescope LRIS spectrograph

Kitt Peak/Mayall 4m Mars and RC spectrographs

MMT 6.5m/Mt. Hopkins Red Channel spectrograph

Lick Obs./Mt. Hamilton Hamilton Echelle spectrograph

Palomar Hall 200” SWIFT spectrograph

SDSS 2.5m telescope BOSS spectrographs

FACILITY DESCRIPTION

The LBL Microsystems Laboratory (MSL) is a semiconductor processing facility specializing in the fabrication of various types of radiation detectors and integrated electronics on high resistivity silicon. The facility consists of 700 sq. ft. of Class 10 clean room space with a dedicated HVAC system providing environmental control of +/-1 F and +/- 2% relative humidity. Devices are fabricated using techniques common to the silicon wafer integrated circuit industry. Employment of established, mature processes using standard production equipment contributes to high device yields. Process capabilities include high temperature oxidation, deposition of thin films, and diffusion of impurity dopants, dry plasma etching, wet chemical etching and cleaning operations, and photolithography. Located in on the 4th floor of Building 70A, a schematic footbprint of the MSL is shown below highlighting processing equipment.

DRY ETCHING- Two Lam 4400 Series Etchers- Dedicated poly-Si and SiO2 etching tools- High selectivity processes for: polysilicon CCD gates silicon dioxide contacts

WATER PURIFICATION- 18 Mohm-cm resistivity- < 100 ppt metal impurities- 1500 gallon capacity- Continuously recirculating loop into MSL

WET CHEMISTRY- Santa Clara Plastics wet benches- Dedicated filtered and temperature controlled baths- Full RCA pre-furnace megasonic wafer cleaning- Photoresist develop and thin film wet etching of aluminum, silicon, silicon dioxide and nitride

THERMAL PROCESSING

- Thermco TMX horizontal furnaces - Six independent process chambers- Wet & dry oxidation and diffusion - Chemical vapor deposition poly-Si, silicon dioxide and nitride

ENTRANCE

PUREWATERSYSTEM

GOWNINGFILM DEPOSITION +CHARACTERIZATION

ETCHINGLITHOGRAPHYTHERMALPROCESSING

FURNACEAREA

GASVAULT

FURNACE TUBECLEANING, ETC.

0 10 20 ft

LAWRENCE BERKELEY NATIONAL LABORATORYMICROSYSTEMS LABORATORY

HELMUTH SPIELER7-FEB-89

THIN FILM DEPOSITION- KDF 603i batch sputter deposition system- Aluminum thin film metallization - Optical thin film coatings: indium tin oxide and silicon dioxide

PHOTOLITHOGRAPHY- Yield Engineering LP3 vapor priming- Rite Track photoresist coat and bake track- Beta Squared 1:1 projection mask aligner- 1.25 micron linewidth resolution- 0.5 micron layer-to-layer registration accuracy

PLASMA ENHANCED CVD- Advanced Vacuum Vision 300- Deposition of silicon dioxide and nitride- Films provide front and back side device protection

CLASS 10 CLEAN AREA

MSL P-I-N DETECTORS ON-BOARD THE

THEMIS MISSION

ANL LBNL SLAC

CMB-S4 requires ~1,000 detector wafers: Unprecedented in CMB!

Requirement: High throughput, tight control of parameters

Approach: • Long history of superconducting detectors for astrophysics: GSFC, JPL, NIST, Stanford, UCB• Developing dedicated facilities at DOE labs: ANL, LBNL, and SLAC• Hybrid detector fabrication with commercial foundries (LBNL, SLAC)

9/19/2016

100+ SPT-3G detector wafers fabricated 300+ POLARBEAR/ SPT-3G readout wafers fabricatedDetector array fabricated at commercial foundry

LEKIDs

Dedicated 5,000 sq ft Class 100 6” wafer facilityCDMS - TES instrument deployed for HEP project

CDMS, CDMS-II, SuperCDMS

Detector Characterization

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Reminder: CMB-S4 requires ~1,000 wafers!

Requirements & Approaches• High throughput

• Scale up on number of test facility• Automation to speed up repetitive tasks• Improve cryostat design to shorten cool down time• Should we test all wafers?

• Standardized test setup and metric• Allows comparison of results between different facilities• Share test setup and test methods

• Characterize detector to meet tight systematics requirement• Come up with requirement. • Design and demonstrate test setup that can characterize

detector at required level

CMB-S4 Collaboration Meeting, Chicago

100 mK test bed @ Princeton

6-axis beam mapper at Colorado

Next

9/19/2016 10CMB-S4 Collaboration Meeting, Chicago

Next:• Take step toward global optimization

• Coordinate among all subgroups (foreground, forecast, instrument)• What input should Detector-RF team provide for global optimization?

• Ex: Mapping speed calculations for multiple scenarios• Ex: Come up with notional detector-array designs to study constraints• Ex: Detector non-ideality for systematics study

• Demonstrate scalability - Detector fabrication, detector assembly, and test facility• How much to demonstrate? By when? 10 wafers? 100 wafers?• How to standardize test facility & metric? – Let’s collect information and ideas

• Push on basic R&D that is desirable for any scenario• Ex. Low loss dielectric film• Ex: Better test setup

We should continue to have monthly (?) meeting to coordinate/work on this

Schedule• Designing in FY19• Implementing in FY20