Designing and implementing of improved cryptographic ... · methods of creating privacy and...

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Available online at www.sciencedirect.com ScienceDirect Journal of Electrical Systems and Information Technology 2 (2015) 14–17 Designing and implementing of improved cryptographic algorithm using modular arithmetic theory Maryam Kamarzarrin a,, Seyed Ehsan Hosseini a , Mohammad Hadi Mehdi Zavareh a , Mohammad Kamarzarrin b a Electrical Engineering Department, Shahid Rajaee University, Tehran, Iran b Telecommunications Department, Adiban University, Garmsar, Iran Available online 23 March 2015 Abstract Maintaining the privacy and security of people information are two most important principles of electronic health plan. One of the methods of creating privacy and securing of information is using Public key cryptography system. In this paper, we compare two algorithms, Common And Fast Exponentiation algorithms, for enhancing the efficiency of public key cryptography. We express that a designed system by Fast Exponentiation Algorithm has high speed and performance but low power consumption and space occupied compared with Common Exponentiation algorithm. Although designed systems by Common Exponentiation algorithm have slower speed and lower performance, designing by this algorithm has less complexity, and easier designing compared with Fast Exponentiation algorithm. In this paper, we will try to examine and compare two different methods of exponentiation, also observe performance Impact of these two approaches in the form of hardware with VHDL language on FPGA. © 2015 The Authors. Production and hosting by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/). Keywords: VHDL; Fast exponentiation; Common exponentiation 1. Introduction Modular arithmetic theory is a system of arithmetic for integers. This theory was developed by Carl Friedrich Gauss in his book, Disquistiones Arithmeticae, published in 1801 (Gauss, 1965, 1966; Yan, 2012). Modular arithmetic concept as a refinement for divisibility theory by fundamental concepts in number theory can be studied. In other words, describing and demonstrating many of the topics in number theory would be difficult or impossible without using that concept. In addition, modulus can be discussed mostly like the equations, so they will create a relation similar to the equality, thus Gauss introduced this symbol for modular arithmetic. One of the important applications of the modular arithmetic is in solving the cryptography equations; moreover, obtaining the answer of a modular arithmetic equation in a minimum time is very important in a cryptography algorithm. Today FPGAs are used Corresponding author. E-mail address: [email protected]. Peer review under the responsibility of Electronics Research Institute (ERI). http://dx.doi.org/10.1016/j.jesit.2015.03.002 2314-7172/© 2015 The Authors. Production and hosting by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

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ScienceDirect

Journal of Electrical Systems and Information Technology 2 (2015) 14–17

Designing and implementing of improved cryptographic algorithmusing modular arithmetic theory

Maryam Kamarzarrin a,∗, Seyed Ehsan Hosseini a, Mohammad Hadi Mehdi Zavareh a,Mohammad Kamarzarrin b

a Electrical Engineering Department, Shahid Rajaee University, Tehran, Iranb Telecommunications Department, Adiban University, Garmsar, Iran

Available online 23 March 2015

Abstract

Maintaining the privacy and security of people information are two most important principles of electronic health plan. One ofthe methods of creating privacy and securing of information is using Public key cryptography system. In this paper, we comparetwo algorithms, Common And Fast Exponentiation algorithms, for enhancing the efficiency of public key cryptography. We expressthat a designed system by Fast Exponentiation Algorithm has high speed and performance but low power consumption and spaceoccupied compared with Common Exponentiation algorithm. Although designed systems by Common Exponentiation algorithmhave slower speed and lower performance, designing by this algorithm has less complexity, and easier designing compared withFast Exponentiation algorithm. In this paper, we will try to examine and compare two different methods of exponentiation, alsoobserve performance Impact of these two approaches in the form of hardware with VHDL language on FPGA.© 2015 The Authors. Production and hosting by Elsevier B.V. This is an open access article under the CC BY-NC-ND license(http://creativecommons.org/licenses/by-nc-nd/4.0/).

Keywords: VHDL; Fast exponentiation; Common exponentiation

1. Introduction

Modular arithmetic theory is a system of arithmetic for integers. This theory was developed by Carl FriedrichGauss in his book, Disquistiones Arithmeticae, published in 1801 (Gauss, 1965, 1966; Yan, 2012). Modular arithmeticconcept as a refinement for divisibility theory by fundamental concepts in number theory can be studied.

In other words, describing and demonstrating many of the topics in number theory would be difficult or impossiblewithout using that concept. In addition, modulus can be discussed mostly like the equations, so they will create a

relation similar to the equality, thus Gauss introduced this symbol ≡ for modular arithmetic. One of the importantapplications of the modular arithmetic is in solving the cryptography equations; moreover, obtaining the answer of amodular arithmetic equation in a minimum time is very important in a cryptography algorithm. Today FPGAs are used

∗ Corresponding author.E-mail address: [email protected] review under the responsibility of Electronics Research Institute (ERI).

http://dx.doi.org/10.1016/j.jesit.2015.03.0022314-7172/© 2015 The Authors. Production and hosting by Elsevier B.V. This is an open access article under the CC BY-NC-ND license(http://creativecommons.org/licenses/by-nc-nd/4.0/).

M. Kamarzarrin et al. / Journal of Electrical Systems and Information Technology 2 (2015) 14–17 15

wooco1

t

12

2

t

3

e

4

t

Fig. 1. Waveform simulation of common exponentiation algorithm.

idely in industry (Lara, 2010; O’Flynn and Zhizhang, 2014), so implementing cryptography algorithms is necessaryn the FPGAs (Soliman and Abozaid, 2011). Because of reusability, FPGA hardware has a fast processing time andccupies small amount of space. Thus, the components used in digital circuits of each algorithm can be viewed andompared from different aspects. It is also recommended to use the FPGAs that have a high power mathematicalperations for practical implementation of this algorithm, FPGAs such as XC4000 Series of XILINX company, FLEX0K Series of Altera company, and ORCA OR2CA/2TA Series of Lucent company.

Our purpose in this paper is comparing two modular arithmetic algorithms used for Exponentiation in a group sohat the different methods of this algorithm are one of the most important components of many cryptography protocols.

. Common Exponentiation algorithm

. Fast Exponentiation algorithm

. Common Exponentiation algorithm

In Common Exponentiation algorithm if a was an integer and b ∈ {0, 1, . . ., m − 1}, at first, a is powered by b thenhe answer is obtained by getting its remaining to modulus of m (see Eq. (1)) (Buchmann, 2004)

ba mod m. (1)

. Fast Exponentiation algorithm

In calculating of Fast Exponentiation supposes that t ∈ N, gi ∈ G, and b is a positive integer then will have (Menezest al., 2010):

b =t∑

i=0

bi · 2i (2)

Thus

gb = g

∑t

i=0bi·2i

(3)

gb =t∏

i=0

(g2i

)bi = (g2)

b · (g22)b2 · · ·(g2t

)bt

(4)

gb =t∏

0≤i≤t,bi=1

g2i

(5)

. Synthesis the design and simulation results

In this paper, VHDL language and Quartus II 9.1 software are used for simulating. As it is obvious in the Figs. 1 and 2,he performance of cryptographic algorithms represents a higher speed for fast Exponentiation algorithm compared

16 M. Kamarzarrin et al. / Journal of Electrical Systems and Information Technology 2 (2015) 14–17

Fig. 2. Waveform simulation of fast exponentiation algorithm.

Fig. 3. RTL viewer of common exponentiation algorithm.

with Common Exponentiation algorithm according to Fast and Common Exponentiation structure. The results of theSynthesizing of our design are on a cyclone II Chip which, we implemented this optimal solution by using a 0.13 �mCMOS standard cell library and clock frequency of 262.61 kHz, so that Common Exponentiation algorithm is able tocalculate the answer of modular arithmetic in: 6.399 ns, but Fast Exponentiation algorithm is calculating the answer ofmodular arithmetic in 6.238 ns. It is also important to mention that the ranges of initial values of algorithm input areequal to 0 to 999999999.

As it is obvious from Figs. 3 and 4, the common exponentiation algorithm has a simpler design in terms of hardwaresize and the amount of gates used compare with fast exponentiation algorithm, thus the Common Exponentiationalgorithm is more affordable In terms of implementation and the cost. The number of gates which are used for common

exponentiation algorithm in this technology are 20 multiplier Blocks, 25 Comparator blocks, 3 multiplexer, 1 modblock, and 1 D flip-flop (see Fig. 3). Furthermore, based on Fig. 4, there are 17 multiplier Blocks, 12 multiplexer,18 mod blocks, 1 adder block, and 2 D flip-flops in the Fast Exponentiation algorithm, and this clearly shows thecomplexity of this algorithm.

M. Kamarzarrin et al. / Journal of Electrical Systems and Information Technology 2 (2015) 14–17 17

5

Amaf

R

BG

GL

MO

S

Y

Fig. 4. RTL viewer of fast exponentiation algorithm.

. Conclusion

In this paper, we tried to compare Common and Fast exponentiation algorithm from practical and hardware aspects.s it was mentioned during designing, it was seen that the Fast exponentiation algorithm is faster than the Com-on exponentiation algorithm in terms of time; besides, according to existing a memory for the fast Exponentiation

lgorithm, it also has a great efficiency for large numbers, but its designing is sophisticated and is not cost-effective;urthermore, based on limited numbers of multiplier Blocks, Common Exponentiation algorithm has low efficiency.

eferences

uchmann, J., 2004. Introduction to Cryptography. Springer.auss, C., (English translation by A. Clark, Yale University Press 1966; Revised English translation by W.C. Waterhouse, Springer, 1975) 1966.

Disquisitiones Arithmeticae. G. Fleischer, Leipzig.auss, C.F., 1965. Disquisitiones Arithmeticae. Yale University Press.ara, G., 2010. Industry’s highest bandwidth FPGA enables world’s first single-FPGA solution for 400G communications line cards. In: Xilinx

White Paper: Vertex-7 Family.enezes, A.J., Van Oorschot, P.C., Vanstone, S.A., 2010. Handbook of Applied Cryptography. CRC Press.’Flynn, C., Chen, Z., 2014. ChipWhisperer: An Open-Source Platform for Hardware Embedded Security Research. IACR Cryptology ePrint

Archive., pp. 204.oliman, M.I., Abozaid, G.Y., 2011. FPGA implementation and performance evaluation of a high throughput crypto coprocessor. J. Parallel Distrib.

Comput. 71 (8), 1075–1084.an, S.Y., 2012. Computational Number Theory and Modern Cryptography. John Wiley & Sons.