Designing a Simple and Low-Cost Flybuck Solution … a Simple and Low-Cost Flybuck Solution With the...

1SLUA838–August 2017Submit Documentation Feedback

Copyright © 2017, Texas Instruments Incorporated

Designing a Simple and Low-Cost Flybuck Solution With the TPS54308

Application ReportSLUA838–August 2017

Designing a Simple and Low-Cost Flybuck Solution Withthe TPS54308

RyanHu

ABSTRACTIn many applications, simple, low part-count, isolated power supplies working from an input voltage areneeded. A popular solution to these requirements is an isolated buck power supply. This application reportpresents a simple and low-cost flybuck solution using the TPS54308 device. The basic operatingprinciples of a flybuck converter are discussed, operating current and voltage waveforms are shown, andkey design equations are derived. Lastly, a step-by-step design example is presented.

Contents1 Introduction ................................................................................................................... 22 Flybuck Converter Device Overview ...................................................................................... 23 Design Flybuck With TPS54308 ........................................................................................... 64 Experimental Results ...................................................................................................... 105 Conclusion .................................................................................................................. 146 References .................................................................................................................. 14

List of Figures

1 Isolated Buck Converter With Two Outputs .............................................................................. 22 Simplified Isolated Buck Operating Waveforms ......................................................................... 33 Current Waveforms Affected by Leakage Inductance .................................................................. 44 TPS54308 Two Output Isolated Buck Solution .......................................................................... 65 Efficiency vs IOUT1 (IOUT1 = 0 A, IOUT2 = 0 A) ............................................................................... 106 Efficiency vs IOUT2 (IOUT1 = 0 A, IOUT3 = 0 A) ............................................................................... 107 Efficiency vs IOUT3 (IOUT1 = 0 A, IOUT2 = 0 A) ............................................................................... 108 VOUT2 Regulation vs IOUT2 (IOUT1 = 0 A, IOUT3 = 0 A) ....................................................................... 119 VOUT3 Regulation vs IOUT3 (IOUT1 = 0 A, IOUT2 = 0 A) ....................................................................... 1110 VOUT2 Regulation vs VIN (IOUT1 = 0 A, IOUT3 = 0 A) ........................................................................ 1111 VOUT3 Regulation vs VIN (IOUT1 = 0 A, IOUT2 = 0 A) ........................................................................ 1212 Steady State Waveforms (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A) ................................ 1213 Steady State Waveforms (VIN = 10 V, IOUT1 = 0 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A) ................................ 1214 Ripple Voltage Waveforms (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A) .............................. 1315 Load Step Response 50 mA to 200 mA (VIN = 10 V, IOUT1 = 0 A, and IOUT3 = 0 A) ................................. 1316 Line Step Response 10 V to 24 V (IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A).................................... 1317 Power Up (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)................................................... 14

List of Tables

1 Design Parameters .......................................................................................................... 6

TrademarksAll trademarks are the property of their respective owners.

http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLUA838

CIN

VSWipri + Vpri -

D1

+Vd-

isec

N1

N2N = N2 : N1

COUT2

COUT1

IOUT2

IOUT1

R2

R1

Introduction www.ti.com

2 SLUA838–August 2017Submit Documentation Feedback



1 IntroductionIsolated bias rails are common in many systems or subsystems, such as telecommunication equipment,medical equipment, and industrial factory automation. It is mandatory by safety standards to protect usersfrom the hazardous voltage of a power supply, or the isolation is installed to break the ground loopinterference for noise-sensitive applications.

In many cases, simple, low part count, isolated power supplies working from an input voltage are needed.This design solution is for when regulation may not be as important, but cost and board area are. Apopular solution to these requirements is an isolated buck power supply, which is a synchronous buckconverter, with the inductor replaced by a coupled inductor or flyback-type transformer. There is no needfor an optocoupler or auxiliary winding because the secondary output closely tracks the primary voltage,resulting in smaller solution size and cost. The flybuck can support a simple, small, and cost effectivepower solution making it suitable as a flyback alternative.

This application report presents the basic operating principles of a flybuck converter, shows some typicaloperating current and voltage waveforms, and the key design equations are derived. The design exampleshows a step-by-step procedure for designing one nonisolated and two isolated outputs with thesynchronous buck regulator TPS54308.

The TPS54308 device is a 4.5-V to 28-V input voltage range, 3-A switching regulator, that has twointegrated switching FETs, internal loop compensation, and 5-ms internal soft start to reduce componentcount. By integrating the MOSFETs and employing the SOT-23 package, the TPS54308 achieves high-power density and offers a small footprint on the PCB.

2 Flybuck Converter Device Overview

2.1 Operation DescriptionAn isolated buck converter is a synchronous buck converter with the inductor replaced by a coupledinductor or flyback-type transformer. The primary output is still regulated as in a sync buck. The secondaryoutput is generated by a diode rectifying the secondary winding. Figure 1 shows an isolated buckconverter with two outputs.

Figure 1. Isolated Buck Converter With Two Outputs

http://www.ti.com


onOUT1 IN IN

on off

TV V D V

T T= = ´

+

TON TOFF

t

t

t

tVsw

VD

im

ipri

isec

tVpri

VIN-VOUT1

-VOUT1

VIN

¨im

t

IOUT2

IOUT1

VOUT2 + (VIN ± VOUT) N2

N1

IOUT1 + IOUT2 N2

N1

www.ti.com Flybuck Converter Device Overview




Figure 2 shows typical isolated buck operating waveforms. During TON, the high-side MOSFET is on, andthe rectifier diode is turned off, because the reflected voltage across the secondary winding is negative.The isolated output capacitor COUT2 is discharged, supplying the load current, and the primary sidebehaves identical to a buck regulator. During TOFF, the low-side MOSFET is on, and the reflected voltageon the secondary winding turns positive, forcing the diode forward conducting. The current in the primarywinding splits into two parts: one part continues to supply the primary output (the magnetizing current, im,similar to a buck converter inductor current), the other part starts to flow to the secondary output. Thesecondary current waveform is determined by the load, leakage inductance, and output capacitance.

Figure 2. Simplified Isolated Buck Operating Waveforms

The primary output voltage is the same as a buck converter and is given by Equation 1:

(1)

http://www.ti.com


sec OUT2I I=

pri OUT1I I=

t

t

ipri

isec

Ipri_pospk

Ipri_negpk

Isec_pk

TON TOFF

Higher leakage Lower leakageNormal leakage

tim

¨imIOUT1 + IOUT2 N2

N1

( )2D OUT2 IN OUT1

1

NV V V V

N= + -

2OUT2 OUT1 F

1

NV V V

N= ´ -

Flybuck Converter Device Overview www.ti.com




The secondary output voltage is given by Equation 2:

where• N1 and N2 are the turns of the primary winding and secondary winding• VF is the forward voltage drop of the secondary rectifier diode (2)

The blocking voltage of the rectifier during TON is given by Equation 3:

(3)

2.2 Equations for Maximum Output CurrentIn practice, the transformer has more or less leakage inductance, which determines the ramp rate of thecurrent in the secondary winding to charge the output capacitor. The simplified current waveforms inFigure 3 shows its relationship with leakage inductance. With lower leakage inductance, the current rampsup quickly to a high value, charging the output capacitor quickly. With the leakage inductance increasing,the current rises slowly, which can result in less energy being supplied to the output capacitance and lessoutput voltage. The higher leakage inductance is the higher peak charging current obtained in secondarywinding under the same output power rate. A high negative current is reflected in the primary winding atthe same time. Leakage inductance along with duty cycle impacts not only the output voltage regulation,but also limits the output power resulting from the minimum low-side sink current limit. Therefore, theleakage inductance must be minimized and the maximum duty cycle must be chosen carefully to mitigatetheir impacts.

Figure 3. Current Waveforms Affected by Leakage Inductance

The winding and output currents have a relationship as shown in Equation 4 and Equation 5 on one cycleaverage basis.

(4)

(5)

http://www.ti.com


( )

( )

HS min

LSSOC min

pri_pospk LIM

pri_negpk LIM

i I

i I

£ìïí

£ïî

2 mpri_negpk OUT2 OUT1

1

N i2Di I I

N 1 D 2

æ ö D= - - +ç ÷

-è ø

2 2 mpri_negpk sec_pk pri_pospk m OUT2 OUT1

1 1

N N i1 Di i i i I I

N N 1 D 2

æ ö D+= - + - D = - - +ç ÷

-è ø

sec_pk OUT2

1 Di I

1 D

+=

-

sec_pk OUT2

2i I

1 D=

-

2 mSW _pospk pri_pospk OUT1 OUT2

1

N ii i I I

N 2

D= = + +

( ) ( )IN OUT1 IN OUT1OUT1m

pri SW IN pri SW

V V V VV Di

L f V L f

- -D = =

´

www.ti.com Flybuck Converter Device Overview




The magnetizing current in the transformer that combines the two windings current is identical to a buckconverter. Therefore, the magnetizing current ripple can be derived as in Equation 6.

(6)

The positive primary winding and switching peak current during TON is given by Equation 7.

(7)

Implementing the principle of charge balance to the secondary output capacitor, the secondary windingpeak current can be approximately derived as Equation 8 for a higher leakage case, and Equation 9 for anormal leakage case.

Considering the worst case, the following equations are derived based on having higher leakage.

(8)

(9)

Then the negative primary winding peak current can be derived as Equation 10 for a higher leakage case,and Equation 11 for a normal leakage case.

(10)

(11)

In fact, we must ensure that during TON the positive primary winding peak current does not exceed theminimum high-side source current limit, ILIMHS(min), and that during TOFF, the negative primary winding peakcurrent does not exceed the minimum low-side sink current limit, ILIMLSSOC(min). Therefore the positive andnegative primary winding peak current should meet that of Equation 12.

(12)

http://www.ti.com


3OUT3 OUT1 F

1

NV V V 12 V

N= ´ - =

2OUT2 OUT1 F

1

NV V V 12 V

N= ´ - =

49.9R5

VIN =10V - 24V

510kR1

0

R3 C3

0.1uF

TP3

12

JP1VOUT1 = 5V, 1A

100kR6

GND1

SW2

VIN3

FB 4

EN5

BOOT6

U1

TPS54308DDCR

750343683

15µH

9

2

4

8

7T1

1

2

J2

1

2

J3

75pFC4

0R4

TP5

TP4

BOOT

SW

VSENSE

TP1

0.1µFC2

10µFC1

TP7

TP6

TP8

TP9

TP10

2200pFNC

C6

TP11

VOUT2 = 12V, 0.2A

VOUT3 = -12V, 0.2A

GND

GND_ISO

VIN

EN

1

2

J1

1

2

J4

N24:N78:N89=1:2.5:2.5 D2B270-13-F

D1B270-13-F

13.7kR7

10µFC8

10µFC9 10µF

NC

C11

10µFNC

C10

100R11

100pFC13

TP2

100R10

100pFC122.2kR8

2.2kR9

100NC

R12

100pFNC

C14

GND

22µFC5

22µFC768k

R2


Design Flybuck With TPS54308 www.ti.com




3 Design Flybuck With TPS54308Figure 4 shows the design example with the typical flybuck circuit, using the synchronous buck regulatorTPS54308 from TI.

Figure 4. TPS54308 Two Output Isolated Buck Solution

Table 1 lists the design specification.

Table 1. Design Parameters

Design Parameter Example ValueInput voltage range (VIN) 10 V to 24 VPrimary output voltage (VOUT1) 5 VPositive isolated output voltage (VOUT2) 12 VNegative isolated output voltage (VOUT3) –12 VPrimary load current (IOUT1) 1 APositive isolated load current (IOUT2) 0.2 ANegative isolated load current (IOUT3) 0.2 ASwitching frequency (fsw) 350 kHz

In this example, one primary output and two isolated outputs are obtained. We will begin with the buckconverter component calculations and qualify the steps for the isolated configuration.

3.1 Primary Voltage and Turns RatioThe primary-side, nonisolated output is set to 5 V for several considerations. First, the setting is below theminimum input voltage, 10 V, and the theoretical duty cycle varies from 20 to 50 percent at the full VINrange, which is a balanced duty cycle during normal operation. Because the isolated outputs only have theoff-time window to transfer energy, for a duty cycle that is too high, the secondary winding current willhave a huge spike, which leads to poor regulation. Next, the turns ratio of the transformer is not too highto handle for the 5 V voltage level steps up to 12 V. Last, 5 V is one of the most common voltage levels inmany applications. In this design, a transformer turns ratio (N1:N2:N3) of 1:2.5:2.5 is selected (seeEquation 13 and Equation 14).

(13)

(14)

In this design, the VF is targeted at 0.5 V.

http://www.ti.com


( )( )( )

OUT1IN max OUT1pri

SW IN max

V V Vl 12.6 H

0.3 3 f V

-= = m

´ ´

( )( )( )

( )

OUT1IN max OUT1pri min

m SW IN max

V V Vl 1.79 H

i f V

-= = m

D ´

( )HS min

32m LIM OUT1 OUT2 OUT3

1 1

NNi 2 I I I I 4 A

N N

æ öæ öD = ´ - + + =ç ÷ç ÷ç ÷è øè ø

OUT3D2_pk

max

2 Ii 0.8 A

1 D

´

= =

-

OUT2D1_pk

max

2 Ii 0.8 A

1 D

´

= =

-

( )( )2D2 OUT1 OUT3IN max

1

NV V V V 59.5 V

N= ´ - + =

( )( )2D1 OUT1 OUT2IN max

1

NV V V V 59.5 V

N= ´ - + =

6 FB7

OUT1 FB

R VR 13.53 k

V V

´= = W

-

6OUT1 FB

7

RV V 1

R

æ ö= ´ +ç ÷

è ø

www.ti.com Design Flybuck With TPS54308




3.2 Feedback ResistorWith the expected primary voltage set point at 5 V, and VFB = 0.596 V (typical), VOUT1 is calculated to be asin Equation 15:

(15)

Start with 100 kΩ for the upper resistor divider, R6 = 100 kΩ (see Equation 16).

(16)

Next choose R7 = 13.7 kΩ. The 49.9-Ω resistor, R5, is provided as a convenient location to break thecontrol loop for stability testing.

3.3 Rectifier DiodeThe rectifier diode D1 and D2, must meet the blocking voltage and maximum current requirements (seeEquation 17, Equation 18, Equation 19, and Equation 20).

(17)

(18)

(19)

(20)

Considering the voltage spike and keeping some margin, as well as the less forward voltage drop, aschottky diode of 70 V or higher reverse voltage rating is required. A 70-V, 2-A diode is selected for eachrectifier diode in this design.

3.4 Primary InductanceFor the TPS54308, the minimum high-side current is 4 A, and therefore the maximum magnetizing currentripple that can be tolerated is given by Equation 21:

(21)

Using Equation 6 for the maximum magnetizing current ripple calculation, the minimum primaryinductance is given by Equation 22.

(22)

Too much high Δim may not be good for the efficiency and output voltage ripple. Assuming the 30% rippleof the rate output current of the device, then the optimized minimum primary inductance is given byEquation 23:

(23)

http://www.ti.com


( )32

OUT1 OUT2 OUT3

1 1IN

SW IN

NNI I I

1 2.5 0.2 2.5 0.2 AN NC 3.6 F

8 f V 8 350 kHz 0.2 V

+ ++ ´ + ´

³ = = m´ ´ D ´ ´

( )pri SW _pospk max 1

1max e

L iN

B A

´=

´

( )( )m min3 max2

OUT2 OUT3SW _negpk max 21 1 max

iN 2DNi I I 2.24 A

N N 1 D 2

Dæ öæ ö= - + - = -ç ÷ç ÷

-è ø è ø

( )( )m min3 max2

OUT2 OUT3SW _negpk max 21 1 max

iN 1 DNi I I 3.24 A

N N 1 D 2

Dæ öæ ö += - + - = -ç ÷ç ÷

-è ø è ø

( )( )m max32

OUT2 OUT3SW _pospk max 21 1

iNNi I I 1.13 A

N N 2

D= + + =

( )( )m min3 max2

OUT2 OUT3 OUT1SW _negpk max 11 1 max

iN 2DNi I I I 1.24 A

N N 1 D 2

Dæ öæ ö= - + - + = -ç ÷ç ÷

-è ø è ø

( )( )m min3 max2

OUT2 OUT3 OUT1SW _negpk max 11 1 max

iN 1 DNi I I I 2.24 A

N N 1 D 2

Dæ öæ ö += - + - + = -ç ÷ç ÷

-è ø è ø

( )( )m max32

OUT1 OUT2 OUT3SW _pospk max 11 1

iNNi I I I 2.13 A

N N 2

D= + + + =

Design Flybuck With TPS54308 www.ti.com




We chose 15 μH for the primary inductor, therefore Δim(max) = 0.75 A and Δim(min)= 0.48 A. Use Equation 7,Equation 10, and Equation 11 to check the positive and negative primary winding peak current (seeEquation 24, Equation 25, and Equation 26.

(24)

(25)

(26)

The primary output side is not always loaded, and without the primary load, the negative current is moreobvious. So consider the worst case, IOUT1 = 0 A, check the positive and negative primary winding peakcurrent again, as given by Equation 27, Equation 28, and Equation 29.

(27)

(28)

(29)

For the TPS54308, the minimum high-side source current limit, ILIMHS(min), is 4 A and the minimum low-side sink current limit, ILIMLSSOC(min), is 2.6 A. Therefore the positive and negative primary winding peakcurrent can meet the current requirements with the normal leakage of a transformer.

3.5 Primary TurnsA coupled inductor or a flyback-type transformer is required for flybuck topology. Calculate the minimumprimary turns for a flyback-type transformer using Equation 30.

where• Bmax is the maximum flux density.• Ae is the effective core area of the chosen transformer. (30)

In this design, the 750343683 inductor from Würth is selected for the transformer. Würth offers many otherflyback-type transformers and ready-made coupled inductors, in a variety of standard values, saturationcurrents, and sizes.

3.6 Input and Output CapacitorThe input capacitor must be large enough to limit the input voltage ripple, see Equation 31.

(31)

Choosing ΔVIN= 0.2 V gives a minimum of CIN= 3.6 μF. Considering derating, one standard value 10-μF,35-V capacitor is selected for better input ripple performance. Another 0.1μF capacitor has been added asa bypass capacitor to clear high-frequency noise.

Choosing ΔVOUT1= 0.05 V gives a minimum of COUT1= 28.5 μF. Considering derating, two standard value22-μF, 16-V capacitors are selected to maintain a small voltage ripple.

Energy is transferred from primary to secondary when the synchronous switch of the buck converter is on.The primary output capacitance is given by Equation 32:

http://www.ti.com


http://www.we-online.com/web/en/wuerth_elektronik/start.php

OUT2 maxOUT2

SW OUT2

I D 0.2 0.5C 2.9 F

f V 350 kHz 0.1V

´ ´= = = m

´ D ´

( )32

OUT2 OUT3 max

1 1

OUT1

SW OUT1

NNI I D

2.5 0.2 2.5 0.2 0.5N NC 28.5 F

f V 350 kHz 0.05 V

æ ö+ ´ç ÷ ´ + ´ ´è ø³ = = m

´ D ´

www.ti.com Design Flybuck With TPS54308




(32)

The secondary output current is sourced by COUT2 during TON. Ignoring the current transitions time in thesecondary winding, the value of the secondary output capacitor can be calculated using Equation 33:

(33)

Choosing ΔVOUT1= 0.1 V gives a minimum of COUT2= 2.9 μF. Considering derating, a standard value 10-μF,25-V capacitor is selected, the same as the COUT3.

3.7 Pre-LoadPre-load is necessary to prevent VOUT2 and VOUT3 from going too high at light load. The required pre-loadcurrent is usually set around 5 mA as a starting point, but it should be adjusted based on the circuit testand application requirements. In this design, the pre-load resistor is selected as 2.2 kΩ for ±12-V outputs.Users can use a Zener diode instead of the pre-load resistor to increase the transfer efficiency.

3.8 Factors Affecting Voltage RegulationA flybuck converter regulates the primary output voltage with a closed-loop controller. The isolated outputis achieved by rectifying the secondary winding of the coupled inductor when the low side MOSFET is on.Therefore the isolated output regulation is passive, affected by the winding leakage inductance, windingresistances, diode drop, and low-side MOSFET, RDSON.

3.9 Avoiding Low-Side Sink Current LimitIn a flybuck application, the isolated output power rate may be limited by the low-side sink current limit.Therefore, users must select design parameters elaborately to promote the isolated power rate. FromEquation 25 and Equation 26, we know that the key factors affecting the negative primary winding peakcurrent are Dmax, N2/N1, N3/N1, and the output current. The following tips are for trying to keep the margin:

1. Select a reasonable range of duty cycle. TI recommends a duty cycle ranging from 20% to 50% inmost cases. Users can reduce Dmax by setting a lower primary voltage or increasing the minimum inputvoltage to increase the negative current margin.

2. Minimize the leakage inductance. Leakage inductance is a crucial factor determining the ramp rate ofthe current in the secondary winding which charges the output capacitor. A nominal amount of leakageis within 1% of primary inductance.

3. Pick the correct turns ratio. A lower turns ratio (isolated side to non-isolated side) results in a lowerreflected current in the primary winding.

4. Raise the non-isolated output power, which will reduce the negative winding peak current.5. Reduce the isolated output power. This is the most direct way to lower the level of the negative

current.

http://www.ti.com


IOUT3 (mA)

Effi

cien

cy (�

)

0 20 40 60 80 100 120 140 160 180 20040

45

50

55

60

65

70

75

80

85

90

D003

VIN = 10 VVIN = 12 VVIN = 16 VVIN = 24 V

IOUT2 (mA)

Effi

cien

cy (�

)

0 20 40 60 80 100 120 140 160 180 20040

45

50

55

60

65

70

75

80

85

90

D002


IOUT1 (A)

Effi

cien

cy (�

)

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.255

60

65

70

75

80

85

90

95

100

D001


Experimental Results www.ti.com




4 Experimental ResultsFigure 5 through Figure 17 show the experimental test results of Figure 4.

Figure 5. Efficiency vs IOUT1 (IOUT1 = 0 A, IOUT2 = 0 A)



http://www.ti.com


VIN (V)

VO

UT

2 (V

)

10 11 12 13 14 15 16 17 18 19 20 21 22 23 2411.5

12

12.5

13

13.5

14

14.5

15

D006

IOUT2 = 0 AIOUT2 = 10 mAIOUT2 = 80 mAIOUT2 = 150 mA

IOUT3 (mA)

VO

UT

3 (V

)

0 20 40 60 80 100 120 140 160 180 20011.5

12

12.5

13

13.5

14

14.5

15

D005


IOUT2 (mA)

VO

UT

2 (V

)

0 20 40 60 80 100 120 140 160 180 20011.5

12

12.5

13

13.5

14

14.5

15

D004


www.ti.com Experimental Results




Figure 8. VOUT2 Regulation vs IOUT2 (IOUT1 = 0 A, IOUT3 = 0 A)

Figure 9. VOUT3 Regulation vs IOUT3 (IOUT1 = 0 A, IOUT2 = 0 A)

Figure 10. VOUT2 Regulation vs VIN (IOUT1 = 0 A, IOUT3 = 0 A)

http://www.ti.com


VIN (V)

VO

UT

2 (V

)

10 11 12 13 14 15 16 17 18 19 20 21 22 23 2411.5

12

12.5

13

13.5

14

14.5

15

D007

IOUT2 = 0 AIOUT2 = 10 mAIOUT2 = 80 mAIOUT2 = 150 mA

Experimental Results www.ti.com




Figure 11. VOUT3 Regulation vs VIN (IOUT1 = 0 A, IOUT2 = 0 A)

Figure 12. Steady State Waveforms (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)

Figure 13. Steady State Waveforms (VIN = 10 V, IOUT1 = 0 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)

http://www.ti.com


www.ti.com Experimental Results




Figure 14. Ripple Voltage Waveforms (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)

Figure 15. Load Step Response 50 mA to 200 mA (VIN = 10 V, IOUT1 = 0 A, and IOUT3 = 0 A)

Figure 16. Line Step Response 10 V to 24 V (IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)

http://www.ti.com


Conclusion www.ti.com




Figure 17. Power Up (VIN = 10 V, IOUT1 = 1 A, IOUT2 = 0.2 A, and IOUT3 = 0.2 A)

5 ConclusionThis application report presented the operating principles of a flybuck converter, showed typical operatingcurrent and voltage waveforms, and provided a detailed, step-by-step design example which explainedhow to select the external components. Data and waveforms tested based on the example design showthat the flybuck can support a simple, small, and cost effective power solution, making it suitable as aflyback alternative, and the TPS54308 makes the advantage more obvious.

6 References• Texas Instruments, TPS54308: 4.5-V to 28-V Input, 3-A Output, Synchronous 350-kHz FCCM Step-

Down Converter in SOT23 Package , data sheet• Texas Instruments, Designing an Isolated Buck (Flybuck) Converter, application report• Texas Instruments, Design a Flybuck Solution With Optocoupler to Improve Regulation Performance

Create an Inverting Power Supply, application report• Texas Instruments, Creating a Split-Rail Power Supply With a Wide Input Voltage Buck Regulator,

application report

http://www.ti.com


http://www.ti.com/lit/pdf/SLUSCV2

http://www.ti.com/lit/pdf/SLUSCV2

http://www.ti.com/lit/pdf/SNVA674



http://www.ti.com/lit/pdf/SLVA369

IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES

Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to,reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who aredeveloping applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you(individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms ofthis Notice.TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TIproducts, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,enhancements, improvements and other changes to its TI Resources.You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing yourapplications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications(and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. Yourepresent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1)anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures thatmight cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, youwill thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted anytesting other than that specifically described in the published documentation for a particular TI Resource.You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that includethe TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TOANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTYRIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, orother intellectual property right relating to any combination, machine, or process in which TI products or services are used. Informationregarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty orendorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of thethird party, or a license from TI under the patents or other intellectual property of TI.TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES ORREPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TOACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OFMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUALPROPERTY RIGHTS.TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOTLIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IFDESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL,COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH ORARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THEPOSSIBILITY OF SUCH DAMAGES.You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your non-compliance with the terms and provisions of this Notice.This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services.These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluationmodules, and samples (http://www.ti.com/sc/docs/sampterms.htm).

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2017, Texas Instruments Incorporated

http://www.ti.com/sc/docs/stdterms.htm

http://www.ti.com/lit/pdf/SSZZ027

http://www.ti.com/lit/pdf/SSZZ027

http://www.ti.com/sc/docs/sampterms.htm

Designing a Simple and Low-Cost Flybuck Solution … a Simple and Low-Cost Flybuck Solution With the...

Documents

Transcript of Designing a Simple and Low-Cost Flybuck Solution … a Simple and Low-Cost Flybuck Solution With the...