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Transcript of Design Paradigm for Robust Spin Torque Transfer Magnetic ...camelab.org/uploads/Main/Design Paradigm...
Design Paradigm for Robust Spin
Torque Transfer Magnetic RAM
(STT MRAM) From
Circuit/Architecture Perspective
Jing Li
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Introduction
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Principle of MRAM
Change State use magnetic field
STT-MRAM
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Paper Assumption
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Use 1 transistor
Vgs and Vdd is same when read an write
(-> only transistor size can control current)
Due to they use same amount of current read and write
Only distinguish read and write operation with pulse time width
Read Failure
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Decision FailureThese phenomena represent read-failure events caused by
the wrong decision made by the sensing circuitry
Disturbance FailureA cell flip during read operation
Because read & write current use same path
Write Failure
Relationship
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Ic = Critical current
0
Iop
Disturbance Failure
Decision Failure
Write Failure
Relationship
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Ic = Critical current
0
Iop
Disturbance Failure
Decision Failure
Write Failure
Read Failure
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Read Failure
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Write Failure
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Optimal point
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Proposed Solution
Conclusion
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Ic = Critical current
0
Iread
Iwrite
Disturbance Failure
Decision Failure
Write Failure
Relaxation – Reliability Issue
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Ic = Critical current
0
Iread
Iwrite
Retention Time
Disturbance Failure
References
[1] Design Paradigm for Robust Spin Torque Transfer Magnetic RAM
(STT MRAM) From Circuit / Architecture Perspective
[2] Modeling of Failure Probability and Statistical Design of Spin-Torque
Transfer Magnetic Random Access Memory Array for yield Enhancement
[3] Failure and reliability analysis of STT-MRAM
[4] Spin-Transfer Torque MRAM (STT-MRAM): Challenges and
Prospects
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