Design Optimization and Performance Evaluation of High-Power, High-Frequency, Bidirectional Buck-Boost Converter

with SiC MOSFETs

Yuri Panov, Yungtaek Jang, Milan M. Jovanović, and Brian T. Irving

Delta Products Corporation Power Electronics Lab

5101 Davis Drive, Research Triangle Park, NC 27709 yuri.panov@deltaww.com

(919)-767-3977

Abstract – This paper presents the design optimization and experimental results for a 150-kHz, high-power, non-isolated, bidirectional buck-boost converter operated in continuous-conduction mode (CCM) and implemented with SiC MOSFETs. Although the SiC MOSFETs exhibit a much better reverse-recovery characteristic than their Si counterparts, their efficiency at high-frequencies can be significantly improved by implementing soft switching, i.e., by turning them on at zero voltage. In this paper, soft-switching of the bidirectional buck-boost converter is implemented by employing an active snubber that achieves zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the snubber switches. The measured peak efficiency of the experimental 10-kW soft-switched prototype designed for 160-250 V input range and 330-V output is over 98.5% for both boost and buck modes of operation.

I. INTRODUCTION

Generally, hard-switched, high-power, bidirectional buck-boost converters are implemented with IGBTs because faster and more efficient Si MOSFETs cannot be employed due to their slow body diodes [1]-[2]. Typically, the switching frequency of today’s IGBT implementations is limited to the 10-30-kHz range. To increase the switching frequency into the 100-kHz range by enabling the employment of Si MOSFETs, a number of soft-switching techniques that virtually eliminate reverse-recovery-related losses were developed [1]-[19]. While few of these soft-switching techniques are implemented with only passive components [1]-[4], the majority of them employ active switches to achieve soft switching of the antiparallel body diodes and zero-voltage switching (ZVS) of buck and boost switches, [5]-[19].

The introduction of wide-bandgap devices such as GaN and SiC switches that exhibit very much improved reverse-recovery characteristic of their body diodes has created the opportunity to implement a high-frequency, hard-switched bidirectional buck-boost converter. Although GaN and SiC switches exhibit excellent switching characteristics due to low terminal capacitances and reverse-recovery charge, their performance at high-frequency can be substantially improved by making them operate with ZVS because of their relatively high turn-on energy loss.

In this paper, the design and performance evaluation of the

hard- and soft-switched SiC implementations of the 150-kHz, 10-kW, non-isolated, bidirectional buck-boost converter operating in continuous-conduction mode (CCM) are presented. In addition, the performance of the SiC implementation is compared with the 100-kHz Si-MOSFET implementation. The soft-switching technique described in this paper is based on the ZVS active-snubber technique originally presented in [20] for the unidirectional boost converter and modified for the bidirectional buck-boost converter in [21].

II. PRINCIPLE OF OPERATION OF SOFT-SWITCHING BUCK-

BOOST CONVERTER

Figure 1 shows the circuit diagram of the soft-switched buck-boost converter proposed in [21]. In the boost mode, converter transfers energy from voltage source V1 to source V2, whereas, in the buck mode, energy is transferred from source V2 to V1. In Fig. 1, soft switching is implemented with the active snubber that contains inductor LS, transformer TR, snubber switches S1A and S2A, diodes D2-D5, and the transformer reset circuit. The reset circuit for transformer TR includes switches S3 and S4 with antiparallel diodes D6 and D7, capacitor CC, and resistor RC. To provide the proper reset-voltage polarity, switch S3 is permanently off and S4 is on in the boost mode, whereas in the buck mode S3 is on and S4 off.

Fig. 1. Soft-switched bidirectional buck-boost converter with active snubber.

V1

TR

Active Snubber CT1

S1A

S2A

S3

D2

LS

S2

CT2

N1 N2

D4

CCV2

D3

D5

RC

S4

S1

LB

D6 D7

978-1-5090-5366-7/17/$31.00 ©2017 IEEE 259

Snubber inductor LS provides energy for ZVS of main switches S1 and S2 and also enables soft turn-off of S1 and S2 body diodes by controlling their current turn-off slew rate. Transformer TR that works as an inductive voltage divider is used to reset the snubber inductor current and create conditions for zero-current turn-off of the snubber switches. In the boost mode, switch S1A is turned off, whereas, in the buck mode, switch S2A is off.

To facilitate explanation of converter operation in the boost mode, its simplified circuit diagram and key waveforms are shown in Figs. 2(a) and 2(b), respectively. The ac ripple of inductor current iLB and that of voltage VC on capacitor CC are considered negligible and, therefore, these components are represented by current and voltage sources, respectively.

As can be seen in Fig. 2(b), at t = t0, snubber switch S2A turns on. Snubber inductor current iLS flows into the dot of transformer winding N1 and causes winding N2 current to flow out of the dot through diode D3. Voltage V2 is applied to winding N2 and produces voltage n·V2 across winding N1, where n = N1/N2 is the turns ratio of transformer TR. Therefore, current iLS linearly increases with V2·(1-n)/LS rate, whereas the current of antiparallel diode of switch S1 linearly decreases with the same rate. At t = t1, current iLS exceeds the level of current iLB, and the resonance between inductor LS and capacitances CS1 and CS2 of switches S1 and S2 begins. Since capacitances CS1 and CS2 are effectively connected in parallel, the resonant frequency and characteristic

impedance are

( )211 SSSRES CCL +⋅=ω (1)

and ( )21 SSSC CCLZ += . (2)

During time interval t1 < t < t2 voltage VS2 across switch S2 decays to zero. At t = t2 antiparallel diode of S2 starts conducting and switch S2 turns on with ZVS. As soon as voltage VS2 becomes zero, current iLS starts decreasing linearly with –V2·n/LS rate and reaches zero at t = t3. At t = t4 snubber switch S2A is turned off with zero current, while switch S2 is turned off at t = t5. After t = t5, inductor current iLB charges capacitance of switch S2 and discharges capacitance of switch S1. At t = t6, voltage across switch S1 drops to zero, antiparallel diode of S1 starts conducting and switch S1 turns on with ZVS. At t = t7, switch S1 turns off and switch current iS1 shifts to S1 antiparallel diode. At t = t8, the next switching cycle begins.

For the buck mode, converter simplified circuit diagram and waveforms are shown in Figs. 3(a) and 3(b), respectively.

In the buck mode, currents, shown in Figs. 3(a), flow in directions opposite to those in the boost mode, shown in Fig. 2(a). Since converter operates in the buck mode the same way as in the boost mode, the waveforms of the currents and voltages in Figs. 2(b) and 3(b) are identical.

(a)

(b)

Fig. 2. Soft-switched buck-boost converter operation in the boost mode (a) simplified circuit diagram and (b) key waveforms.

V2

S2

S1iLB

S2A

LS

iLS

iS1

CS2

VS2

TR

N1 N2

D3

D7

VC

LM

VS1

iM

iS2

CS1

D5

S1

LiD

dt =-V (1-n)2

S

iS1

t

S2

S2A TS

t0 t1 t2 t3 t4 t5t6 t7 t8

=

iLS

iS2

VS1

VS2

iLBD

dt-iiLS

dt LiLS

dt =-V n2

S

(a)

(b)

Fig. 3. Soft-switched buck-boost converter operation in the buck mode (a) simplified circuit diagram and (b) key waveforms.

V2

S2

S1iLB

LS

iLS

iS1

CS2

VS2

TR

N1 N2

D5

D6

VC

LM

VS1

iM

iS2

CS1

S1A

D3

S2

iS2

t

S1

S1A TS

t0 t1 t2 t3t4 t5t6 t7 t8

=

iLS

iS1

VS2

VS1

iLBD

dt-iiLS

dt LiLS

dt =-V n2

S

LiD

dt =-V (1-n)2

S

260

III. DESIGN OF SOFT-SWITCHING BUCK-BOOST CONVERTER

Because the design of the buck-boost converter power stage follows well-established conventional procedure, it is not discussed in this paper. Instead, this section focuses on the design of the active snubber, specifically on the design of its component values and timing of snubber switches’ driving signals.

A. Active Snubber Design

In the soft-switching implementations of the bidirectional buck-boost converter with Si MOSFETs, the value of snubber inductance LS is exclusively determined by the desirable turn-off rate diD/dt of the MOSFET’s body-diode current, whose typical value is about 100 A/µs [21]. However, for SiC devices, which virtually do not exhibit reverse-recovery charge, the snubber-inductance value is determined by other considerations such as snubber loss and size, as well as snubber switches timing requirements.

Generally, optimization of the snubber loss requires minimization of the rms value of snubber-inductor current iLS. As it can be seen from expanded iLS current waveform in Fig. 4, the rms value of current iLS depends on its conduction time TC = t3-t0 and magnitude iLS(PEAK), shown in Fig. 4. Generally, conduction time TC of current iLS consists of rise time TRISE = t1-t0, duration of the resonance TR = t2-t1, and fall time TFALL = t3-t2, i. e.,

FALLRRISEC TTTT ++= , (3)

where ( )[ ]nVLIT S)V(LBRISE −⋅⋅= 12 , (4)

( )( )[ ] RESR nncosT ω−−π= − 11 , (5)

and [ ]nVLIT S)V(LBFALL ⋅⋅= 2 . (6)

It should be noted that in this section the current ripple of inductor LB is not neglected. However, it is still assumed that conduction time TC is short enough to consider current iLB constant and equal to its valley value ILB(V) during this time.

From (1), (3)-(6), relationship of conduction time TC to snubber inductance LS and turns ratio n is derived as

( )[ ]nnVLIT S)V(LBC −⋅⋅⋅= 12

( ) ( )( )[ ]nncosCCL SSS −−π⋅++ − 1121 . (7)

By definition, the rms value of the current through LS is

( ) ( )⋅=3

0

21t

tLSSRMSLS dttiTi (8)

and based on the iLS waveform in Fig. 4 can be expressed as ( ) ( )3211 IntIntIntTi SRMSLS ++⋅= , (9)

where terms Int1, Int2, and Int3 are the integral values that correspond to the integration intervals [t0, t1], [t1, t2], and[t2, t3], respectively, and are given as

( ))n(VLIInt SLB −⋅⋅⋅= 13 23

1 , (10)

[ ]222 50 )RES(LS)V(LBR I.ITInt ⋅+⋅=

( ) ( )( )22 1221 nnnI RES)RES(LS −⋅ω⋅−⋅⋅+

( ) ( )( )nnII RES)RES(LS)V(LB −⋅ω−⋅⋅+ 121 , (11)

( ) ( )nVLZVnIInt SC)B(LB ⋅⋅⋅⋅−+= 23

23 321 , (12)

where ILS(RES) is the peak resonant current, shown in Fig. 4, and calculated as ( ) C)RES(LS ZVnI 21 ⋅−= . (13)

The rms current is plotted versus turns ratio n in Fig. 5 for several LS values. From the plots in Fig. 5 it can be inferred that the rms current decreases as inductance LS decreases and turns ratio n increases. It is obvious that the lower LS value and the higher n value lead to the lower loss and size of the active snubber. The upper limit for n is 0.5, since for n > 0.5 active snubber cannot provide ZVS for the main switch [20].

The lower limit of LS value is obtained by considering the duration of interval TZVS during which the main switch should be turned on to achieve ZVS. TZVS interval, shown in Fig. 4, starts when voltage VS2 on the main switch reaches zero and ends when decreasing current iLS drops below ILB(V) level. The TZVS duration can be derived as

( ) nnCCLT SSSZVS 2121 −⋅+⋅= . (14)

As it can be seen from the plot in Fig. 6 that shows relationship between TZVS and turns ratio n for several LS values, higher n and lower LS values result in a shorter TZVS and, therefore, more stringent timing requirements. When TZVS is below 50-100 ns, achieving a complete ZVS in the entire converter operating range becomes practically not feasible due to tolerances of active snubber magnetic components, switch capacitances, and gate-driving circuits. As a result, timing implementation sets the upper limit on n value and the lower limit on LS value.

Fig. 4. Expanded waveforms of snubber inductor current iLS and switch voltage V

S2 in the boost mode.

t

LS

t0 0t1 t2 t3

i

V S2

LB(V)i

TZVS

ILS(RES)

2AS

2S TD

TA(ON)

TRISE TR TFALL

TC

TON

LS(PEAK)I

Fig. 5. Snubber inductance rms current versus transformer turns ratio.

LS = 1.8 µH

1.2 µH

0.6 µH

0.1 0.2 0.3 0.4 0.55

10

15

20

TR Turns Ratio n

Snub

ber I

nduc

tor

Ls

Rm

s C

urre

nt [A

rms]

261

Conduction time TC and iLS current magnitude have profound effect on the size and loss of active snubber magnetic components. Since during time TC voltage V2 is applied to transformer TR winding N2, increase of TC proportionally increases volt-seconds on winding N2 and, therefore, negatively affects transformer size. To draw quantitative relationship between turns ratio n and size of magnetic components, it is assumed that transformer size is determined by the product of transformer core cross-sectional area AC and window area AW [22], which is calculated as

( )jKBiTnVAA WPP)RMS(LSCWC ⋅⋅Δ⋅⋅⋅⋅⋅=⋅ 62 102 . (15)

where product AC·AW is expressed in mm4, ΔBPP is a peak-to-peak flux density magnitude with a typical value of 0.2-0.25 T for ferrites, KW is a window utilization factor with 0.3-0.35 typical value, and j is a winding current density with 6-8 A/mm2 typical value.

It is also assumed that the snubber inductor size is determined by its peak stored magnetic energy EPEAK [23] as

22)PEAK(LSSPEAK iLE ⋅= , (16)

where ( ) CDC)V(LB)RES(LS)V(LB)PEAK(LS ZVnIIIi ⋅−+=+= 1 . (17)

Transformer product AC·AW and inductor stored energy EPEAK are plotted versus turns ratio n in Fig. 7. As it can be seen from Fig. 7, as the turns ratio increases, the peak snubber inductor energy and, thus, the inductor size slowly decreases, whereas product AC·AW has the minimum value in n = 0.15-0.3 range.

Because magnetizing energy EM of transformer TR is dissipated in resistor RC, the energy value should be minimized. The magnetizing energy is calculated as

22)PEAK(MMM iLE ⋅= (18)

The peak value of magnetizing current iM is

MC)PEAK(M LTVi ⋅= 2 (19)

From (18) and (19),

( ) ( )MCM LTVE 222 ⋅= (20)

Equation (20) implies that higher transformer magnetizing inductance results in lower resistor RC loss. The higher magnetizing inductance can be achieved by increasing the core size or by increasing the number of turns. Therefore, there is a minor trade-off between transformer size and resistor RC loss.

Design considerations presented in this section are summarized as follows. Selection of low inductance LS and high turns ratio n results in the minimum loss of snubber magnetic and semiconductor components. This choice also minimizes the size

of inductor LS but does not correspond to the minimum size of the transformer, which occurs at n = 0.15-0.3. Nevertheless, the selection of turns ratio n above the optimal range is quite acceptable since it does not penalize the transformer size significantly. Therefore, selection of low inductance LS and turns ratio in 0.4-0.45 range is a good design choice for optimizing the loss and size of the snubber components. However, the selection of low inductance LS and high turns ratio n shortens ZVS interval TZVS, which makes meeting the gate-drive timing requirements that are necessary to achieve a complete ZVS very challenging and, eventually, limiting the minimum value of LS and the maximum value of turns ratio n.

B. Timing of Active Snubber Switches

In this subsection selection of the time delay between the turn-on of the snubber switch and the active switch, as well as selection of the snubber switch on-time are discussed.

Observation of the waveforms in Fig. 4 indicates that time delay TD which allows ZVS of the main switch has the range of

ZVSRRISEDRRISE TTTTTT ++<<+ . (21)

A good design practice is to select TD in the middle of its range as 2ZVSRRISED TTTT ++= . (22)

On-time TA(ON) of the snubber switch should be within the range of ONDONAC TTTT +<< )( , (23)

where TON is the on-time of the main switch. A good choice for the snubber switch on-time is in the middle of the range, namely

( ) 2)( ONDCONA TTTT ++= . (24)

Whereas resonance duration TR and ZVS time TZVS do not depend on converter operating conditions, i.e., load and input/output voltages, rise time TRISE, conduction time TC, and on-time TON do depend on operating conditions. To assure proper active snubber operation, delay TD and on-time TA(ON) are changed adaptively, depending on the operating conditions.

To implement adaptive delay TD, the valley value of the inductor current ILB and voltage VDC are sensed and sampled. Obtained samples are used to compute rise time TRISE from (4) and then delay time TD from (22). For implementation of adaptive on-time TA(ON), the samples of the valley value of the inductor current ILB and voltage VDC are used to compute time TC from (7) and then on-time TA(ON) from (24).

It should be noted that since switch current was sensed in order to also provide shoot-through current protection, direct sensing of valley current ILB(V) is impractical since for chosen

Fig. 6. ZVS time interval duration versus transformer turns ratio.

LS = 1.8 µH

1.2 µH

0.6 µH

0.1 0.2 0.3 0.4 0.50

100

200

300

400

TR Turns Ratio n

Tim

e T

zvs

[ns]

Fig. 7. A

C·A

W transformer product (red solid lines) and inductor L

S peak

stored energy (blue dashed lines) versus transformer turns ratio.

TR Turns Ratio

AC·A

Wpr

oduc

t [cm

4 ]

0.1 0.2 0.3 0.4 0.50

0.4

0.8

1.2

1.6

0.5

1

1.5

2

2.5

Pea

k In

duct

or E

nerg

y E

PE

AK

[µJ]

LS = 1.8 µH

1.2 µH

0.6 µH

262

implementation it requires current sampling at the beginning of the switch on-time when the noise generated by the switching transition is high. Instead, the average inductor current is sensed and the valley value is computed by the controller by using relationship

( ) ( ) ( ) ( )BONAVELBVLB LTVII ⋅⋅−≅ 21 . (25)

Implementation of this approach requires multiplication of the sensed voltage V1 and the main switch on-time value, determined by the PWM input signal.

III. DESIGN CONSIDERATIONS FOR CONVERTER WITH SIC

DEVICES

Generally, SiC devices exhibit much higher body-diode forward-voltage drops then their Si counterparts. As a result, when SiC MOSFETs operate with negative drain currents, i. e., in the third quadrant of their I-V characteristics, it is beneficial to operate them as synchronous rectifiers (SRs) in order to minimize their conduction loss. When the MOSFET operates as SR, its gate signal is kept high during the conduction time of the body diode. This way the negative drain current flows through the channel of the MOSFET. In the bidirectional buck-boost converter, shown in Fig. 1, the SR driving is implemented by providing complimentary gate-driving signals for switches S1 and S2.

With the SR driving of switches S1 and S2, inductor current iLB is not prevented from flowing in the negative direction. At lighter loads, when the valley value of the buck-boost inductor current ILB becomes negative, the converter naturally operates with ZVS, i.e., it does not need the active snubber. Hence, to reduce light-load converter losses, the active snubber switches should be disabled. For sensing the light-load boundary, i.e., when the inductor current becomes negative, current transformers CT1 and CT2 are employed, as shown in Fig. 1. However, due the negative inductor current at light loads, current transformers CT1 and CT2 are prone to saturation if conventional implementation of the current sensing circuit is used.

To explain transformer saturation issue, light-load converter waveforms in the boost mode are shown in Fig. 8, whereas Fig. 9(a) shows a conventional current-sensing circuit with the current transformer. The current-sensing circuit includes sensing resistor RS, reset resistor RR, and diode DS. The current transformers have a single primary turn and NCT secondary turns. Their respective magnetizing inductances LM1 and LM2 are shown on the secondary side. When switch S2 current iS2 is positive, transformer CT2 secondary current iS2/NCT flows through diode DS and low-value sensing resistor RS. When current iS2 is zero, magnetizing current iM2 is blocked by diode DS from flowing into resistor RS so it flows through resistor RR which provides its reset. For proper transformer reset within wide range of switch S2 duty cycle, value of resistance RR is selected typically 50-200 times higher than that of resistor RS. When current iS2 has a negative portion due to CCM operation at light loads, the negative secondary current is also blocked by diode DS from flowing into sensing resistor RS and flows instead through resistor RR. Due to high RR value, the voltage across the reset resistor and, therefore, the volt-seconds applied to transformer secondary become very high. As a result, transformer magnetizing current also becomes very high and may cause CT2 core saturation.

To prevent transformer CT2 saturation, a current-sensing circuit, shown in Fig. 9(b), was proposed, where CT2 secondary winding is terminated by low-value sensing resistor RS. Since there is no high-value reset resistor in the magnetizing current path, this

circuit makes transformer core much less susceptible to saturation due to negative switch current iS2. The drawback of the proposed circuit is that output voltage VCS does not have a dc component. However, the dc component is recovered by sampling voltage VCS twice during the switching cycle, as shown in Fig. 8. As Fig. 8 implies, during off-time TOFF of switch S2, voltage VCS has negative offset –iM2(DC)·RS, where iM2(DC) is the magnetizing current dc value. The first and second samples are taken at the middle of switch S2 on-time TON and off-time TOFF, respectively. The offset voltage is then subtracted from sensed voltage VCS inside digital controller to obtain the correct value of switch current iS2 at the first sampling instant. This corrected value of the switch current iS2 is approximately equal to the average value of inductor current iLB.

To determine the light/ high load boundary, it is necessary to compute valley value ILB(V) of inductor LB current from (25). When computed current ILB(V) drops below zero, the active snubber switches are disabled. In practice, switching between light-load and high-load modes of operation is designed with hysteresis to prevent noise-induced bouncing.

Fig. 8. Light-load converter waveforms in boost mode and sampling instants of sensed voltage V

CS.

(a) (b)

Fig. 9. Current-sensing circuit for sensing switch current in the boost mode (a) conventional implementation; (b) proposed implementation.

S2

S1

TS

iLB TON

iS2

VCS

-iM2(DC) RS2nd sample

TOFF

1st sample

V1

LB

S1

LM2

CT2

iM2

D

SRVCS

S

RR

S2

iS2

CT1

V1

LB

S1

LM2

CT2

iM2

SRVCS

S2

iS2

LM1

CT1 LM1

D

SR

S

RR RS

263

The presented current-sensing approach profoundly affects the design of the current transformer. The majority of current transformers available on the market have ungapped high-permeability ferrite cores in order to reduce the sensing error caused by non-zero ac magnetizing current. However, these cores are prone to saturation even at moderate magnetizing currents. Since dc magnetizing current of the proposed current transformer is relatively high at full-load switch currents, it is necessary to use the cores with lower effective permeability for the current transformers. These cores with typical relative permeability µr = 50-300, made of gapped ferrite or Kool Mµ magnetic material, can tolerate much higher dc magnetizing current and have practically negligible sensing error due to the non-zero ac magnetizing current.

To illustrate the difference between the standard and custom-made current transformer, Table I shows the data of CST-206-3A transformer from Triad Magnetics and custom transformer which has 77310-A7 Kool Mµ core with permeability µr = 125. The data demonstrates that calculated maximum dc magnetizing current, which transformer can handle without saturation, is 553 mA for the custom transformer whereas it is only 23 mA for the standard transformer. Impedance of the custom transformer magnetizing inductance at 150-kHz frequency is 3.39 kΩ, which is at least two orders higher than the value of the sensing resistor. Therefore, the sensing error due to the magnetizing current is practically negligible.

IV. EXPERIMENTAL RESULTS

The experimental prototype was designed to meet specifications of the 10-kW bidirectional converter which has 160-250V input voltage and 330-V output voltage. The prototype was implemented with components shown in Table II.

Measured waveforms of the designed buck-boost converter with SiC devices in boost and buck modes at 160-V input are shown in Fig. 10(a) and 10(b), respectively. Active snubber switches are operating since waveforms were captured at high load. The dead time between the main switches S1 and S2 is 260-300 ns, whereas the delay between turn-on of the snubber switch and turn-on of the main switch is 150-220 ns. Therefore, the active snubber switch turns on while main switch body diode is conducting. To reduce the size of inductor LB, its peak-to-peak current ripple was chosen to be approximately 70 % of the full-load inductor average current. The high inductor current ripple corresponds to higher turn-off current and lower turn-on current of the main switches. Since SiC MOSFETs have substantially lower turn-off loss compared with their turn-on loss, the high current ripple is expected to impose significantly lower switching loss penalty on the main SiC switches with respect to the Si switches.

Measured efficiency in the boost mode with and without active snubber is plotted versus load in Figs. 11(a) and 11(b) for input voltages of 160 V and 250 V, respectively. It should be noted that during soft-switched converter efficiency measurements, the active snubber operated down to zero load to observe its effect on efficiency at light loads. The efficiency measurement without the active snubber was stopped at 5.7-kW load, since the case temperature of boost switch S2 exceeded 80ºC. Observation of the plots in Fig. 11 shows at 160-V input voltage, efficiency improvement at high load due to the active snubber is 1.0 %, which means 37-% power loss reduction. However, at 250-V

input for loads above 2.5 kW the active snubber operation increases efficiency by less than 0.25%. With the active snubber, the boost-mode peak efficiency is 98.5 % at low input voltage and 99.1 % at high input voltage.

Measured efficiency in the buck mode with and without active snubber is plotted versus load in Figs. 12(a) and 12(b) for low and high input voltages. Observation of the plots in Fig. 12 indicates at the low input voltage, the active snubber improves efficiency at high load by 0.75 %, which means 34-% power loss reduction. However, at high input voltage and the load above 2.5 kW, the efficiency gain due to the active snubber operation does not exceed 0.3 %. With the active snubber, the buck-mode peak efficiency is 98.6 % at low input voltage and 99.2 % at high input voltage.

The plots in Figs. 11 and 12 also show the boundary, where the valley value of inductor current iLB becomes zero. As can be seen in Figs. 11 and 12, at light loads converter with the active snubber is less efficient than the one without snubber since converter runs naturally with ZVS and the snubber only contributes its own loss to the overall power stage losses. However, as the load approaches the boundary shown in Figs. 11 and 12, the hard-switched prototype loses ZVS and becomes less efficient than its soft-switched counterpart.

Fig. 10. Measured waveforms of soft-switched converter at V

1=160 V (a)

in boost mode at 5.4-kW load and (b) in buck mode at 8-kW load.

264

Finally, the efficiency of the soft-switched buck-boost converter prototype with SiC devices was compared with the efficiency of the corresponding prototype implemented with Si MOSFET devices operating at 100 kHz and both efficiencies are plotted in in Fig. 13 for 200-V input voltage. The key components of the Si-MOSFET-based soft-switched buck-boost converter prototype are shown in Table II. The values of LB inductors for converters with Si and SiC MOSFETS were selected for both converters to have approximately the same inductor LB current ripple.

As can be seen from Fig. 13, efficiencies of the soft-switched 150-kHz converter with SiC devices and the soft-switched 100-kHz converter with Si devices converter in the boost and buck modes are practically the same. However, the volume of magnetic components of the 150-kHz converter with SiC devices is 37 % smaller than that of the 100-kHz converter with Si devices.

V. SUMMARY

Design procedure, implementation, and evaluation results of a buck-boost converter with SiC MOSFETs are presented. Implementation and experimental results are shown for both soft-switched and hard-switched high-power converter prototypes. Despite low reverse-recovery charge of SiC cascode devices, soft-switched converter still has considerable efficiency advantage with respect to its hard-switching counterpart due to elimination of the relatively high turn-on losses of SiC devices. The boost-mode efficiency of the soft-switched 150-kHz converter prototype was 98.5-99.1 % for the 160-250 V input range and 330-V output, whereas the buck-mode efficiency at the same operating conditions was in the 98.6-99.2 % range.

REFERENCES

[1] H.-L. Do, “Nonisolated bidirectional zero-voltage-switching DC–DC converter,” IEEE Trans. Power Electron., vol. 26, no. 9, pp. 2563–2569, Sep. 2011.

[2] H.-L. Do, “Zero-voltage-switching synchronous buck converter with a coupled inductor,” IEEE Trans. Ind. Electron., vol. 58, no. 8, pp. 3440-3447, Aug. 2011.

[3] D.-Y. Jung, S.-H. Hwang, Y.-H. Ji, J.-H. Lee, Y.-C. Jung, and C.-Y. Won, “Soft-switching bidirectional DC/DC converter with a LC series resonant circuit,” IEEE Trans. Power Electron., vol. 28, no. 4, pp. 1680–1690, Apr. 2013.

Fig. 11. Measured boost-mode efficiency of soft-switched and hard-switched 150-kHz converter with SiC devices at (a) V

1 = 160 V and

(b) V1=250 V.

Fig. 12. Measured buck-mode efficiency of soft-switched and hard-switched 150-kHz converter with SiC devices at (a) V

1=160 V and (b)

V1=250 V.

Fig. 13. Measured efficiency of soft-switched 150-kHz converter with SiC devices and 100-kHz converter with Si devices in boost mode (solid lines) and buck mode (dashed lines) at V

1=200 V.

265

[4] H. Wu, J. Lu, W. Shi, and Y. Xing, “Nonisolated bidirectional DC–DC converters with negative-coupled inductor,” IEEE Trans. Power Electron., vol. 27, no. 5, pp. 2231–2235, May 2012.

[5] H.-L. Do, “A soft-switching DC/DC converter with high voltage gain,” IEEE Trans. Power Electron., vol. 25, no. 5, pp. 1193–1200, May 2010.

[6] P. Das, B. Laan, S. A. Mousavi, and G. Moschopoulos, “A non-isolated bidirectional ZVS-PWM Active-Clamped DC–DC converter,” IEEE Trans. Power Electron., vol. 24, no. 2, pp. 553–558, Feb. 2009.

[7] P. Das, S. A. Mousavi, and G. Moschopoulos, “Analysis and design of a nonisolated bidirectional ZVS-PWM DC–DC converter with coupled inductors,” IEEE Trans. Power Electron., vol. 25, no. 10, pp. 2630–2641, Oct. 2010.

[8] J.-W. Yang and H.-L. Do, “High-Efficiency Bidirectional DC–DC Converter With Low Circulating Current and ZVS Characteristic Throughout a Full Range of Loads,” IEEE Trans. Industrial Electron., vol. 61, no. 7, pp. 3248–3256, Jul. 2014.

[9] L.-S. Yang and T.-J. Liang, “Analysis and implementation of a novel bidirectional dc–dc converter,” IEEE Trans. Ind. Electron., vol. 59, no. 1, pp. 422-434, Jan. 2012.

[10] P. dos Santos Garcia Giacomini, J. S. Scholtz, and M. Mezaroba, “Step-up/ Step-down dc–dc ZVS PWM converter with active clamping,” IEEE Trans. Ind. Electron., vol. 55, no. 10, pp. 3635-3643, Oct. 2008.

[11] Y.-P. Hsieh, J.-F. Chen, L.-S. Yang, C.-Y. Wu, and W.-S. Liu, “High conversion-ratio bidirectional dc–dc converter with coupled inductor,” IEEE Trans. Ind. Electron., vol. 61, no. 1, pp. 210-222, Jan. 2014.

[12] T.-F.Wu, J.-G. Yang, C.-L. Kuo, and M.-C. Kuo, “Optimal Negative Current Control for Four-Phase Interleaved Bidirectional Buck-Boost Converters to Achieve ZVS and ZCS,” in IEEE 2014 Applied Power Electron. Conference, pp. 2017-2022, Mar. 2014.

[13] J.-H. Lee, D.-H. Yu, J.-G. Kim, Y.-H. Kim, S.-C. Shin, D-Y. Jung, Y.-C. Jung, and C.-Y.Won, “Auxiliary switch control of a bidirectional soft-

switching dc/dc converter,” IEEE Trans. Power Electron., vol. 28, no. 12, pp. 5446-5457, Dec. 2013.

[14] J.-W. Yang and H.-L. Do, “Soft-switching bidirectional dc–dc converter using a lossless active snubber,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 61, no. 5, pp. 1588-1596, May 2014.

[15] M. Pavlovsky, G. Guidi, and A. Kawamura, “Buck/Boost dc–dc converter topology with soft switching in the whole operating region,” IEEE Trans. Power Electron., vol. 29, no. 2, pp. 851-862, Feb. 2014.

[16] Elasser and D. A. Torrey, “Soft switching active snubbers for DC/DC converters,” IEEE Trans. Power Electron., vol. 11, no. 5, pp. 710–722, Sep. 1996.

[17] J. Zhang, R.-Y. Kim, and J.-S. Lai, “High-power density design of a soft-switching high-power bidirectional DC–DC converter,” IEEE Trans. Power Electron., vol. 22, no. 4, pp. 1145–1153, Jul. 2007.

[18] L. Jiang, C.-C. Mi, S. Li, M. Zhang, X. Zhang, and C. Yin, “A Novel Soft-switching bidirectional dc-dc converter with Coupled Inductors,” IEEE Trans. Industry Applications, vol. 49, no. 6, pp. 2730-2740, Nov. 2013.

[19] M. Mohammadi and H. Farzanehfard, “Analysis of Diode Reverse Recovery Effect on the Improvement of Soft-Switching Range in Zero-Voltage-Transition Bidirectional Converters”, IEEE Trans. Ind. Electron., vol. 62, no. 3, pp. 1471-1479, Mar. 2015.

[20] Y. Jang, M. Jovanovic, K.-H. Fang, and Y.-M. Chang, “Soft-Switched High-Power-Factor Boost Converter”, in IEEE 2004 Intern. Telecom Energy Conference, pp. 133-139.

[21] Y. Jang and M. Jovanovic, “Soft-Switched Bidirectional Buck-Boost Converters”, in IEEE 2017 Applied Power Electron. Conference, Mar. 2017.

[22] N. Mohan, T. Undeland, W. Robbins, “Power Electronics: Converters, Applications, and Design”, 2nd edition, John Wiley & Sons, 1995.

[23] “Ferroxcube Soft Ferrites and Accessories”, Data Handbook, 2013

TABLE I. COMPARISON OF STANDARD AND CUSTOM CURRENT TRANSFORMERS

Maximum Primary Current

Secondary Turns

Magnetizing Inductance

Maximum Volt-Sec Product

Maximum Dc Magnetizing

Current

Dimensions

CST206-3A CT from Triad Magnetics

70 Arms 300 130 mH 3000 V·µs 23 mA 1.08'' x 1.23'' x 0.4''

Custom-Made CT with Kool Mµ 77310-A7 Core

70 Arms 200 3.6 mH 1990 V·µs 553 mA 0.93'' x 0.93'' x 0.33''

TABLE II. IMPLEMENTATION OF SOFT-SWITCHED 150-KHZ CONVERTER WITH SIC DEVICES AND 100-KHZ CONVERTER WITH SI DEVICES

Component S1 - S2 S1A - S2A S3 - S4 D1–D5 CC RC Buck-Boost Inductor Snubber Inductor

Snubber Transformer

150-kHz Converter with SiC Devices

2 x UJC06505K in parallel

UJC06505K STD1NK80ZT4 RURP3060

15nF/ 450V

12 kΩ/ 7W

13 µH; E55/28/25 core of 3C94 ferrite. NTURN = 10

1.2 µH. RM8/I core of 3C96 ferrite. NTURN = 4

n = 7 / 17. PTS34/34/25-I core of 3C96 ferrite

100-kHz Converter

with Si Devices

2 x IPW65R041CFD

in parallel

IKW40N65F5 STD1NK80ZT4 RURP3060

15nF/ 450V

27 kΩ/ 5W

Two 9.6-µH inductors in series. Each inductor has two stacked MS-184026-2 cores. NTURN = 10

2.2 µH. PQ26/25 core of 3C96 ferrite. NTURN = 4

n = 15 / 36. PQ35/35 core of 3C96 ferrite.

266