Design methodology for efficient programmable digital fir filters
Transcript of Design methodology for efficient programmable digital fir filters
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Design methodology for efficient programmable digital
FIR filtersPI: Chen Jia Jia
ICT-enabled Devices for Better Living
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This project addresses the challenges of effective digital signal filtering and designing
low power and lower hardware cost digital signal filters.
Digital Signal FilteringEEG Signal Processing
Feature Extraction
Echo Cancellation
Image Processing
Software defined radio
Coefficient Synthesis
InfinitePrecision
Coefficients
FinitePrecision
Signed DigitCoefficients
Architectural Optimization
Filter Specifications
Modeling and extraction
Area-time-power constraints
HDL Generation
Filters are modeled as a mathematic system
And perform the hardware Implementation
optimization.
HDL code ASIC prelayout
Algorithms based ondifferent methodologies willbe developed. It targets at
removing the design Redundancies.
FPGA devices
Design Flow Chart