Design and Operation of Delta-Sigma ADCs -...
Transcript of Design and Operation of Delta-Sigma ADCs -...
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Design and Operation
of Delta-Sigma ADCs
ECE614 Advanced Analog IC Design
Joshua Nekl
May 5, 2008
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What is a Delta-Sigma ADC
� AKA Sigma-Delta ADC, over-sampling ADC,
noise-shaping ADC, 1-bit ADC
� Integrates (Sigma) the difference (Delta)
between the quantized output and the input
∑∆+
-
QIN OUT
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∆∑ ADC
Analog Digital
[1]
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Benefits� No precision matched analog components
� High achievable accuracy
� Low-pass filtering
Drawbacks� Slower conversion time
� DC input current / resistive input impedance
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Simple Modulator
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Modulator Output
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[2]
[2]
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0
1
0 1
Input (code)
Output (voltage)
Feedback DAC Transfer Curve
[1]
[2]
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1-bit ADC
Quantizer
Offset Cancellation
[1]
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Comparator Decision Errors
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Noise Shaping
s
A( ) =+− eQ
s
AOUTINOUTIN−
++
-
IN OUT++
( )s
AOUTIN−
Qe
434 214 34 21NTF
e
STF
As
AsQ
AsINOUT
11
1
++
+=
+
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0
0.2
0.4
0.6
0.8
1
0.001 0.1 10 1000 100000
STF
NTF
434 21434 21NTF
e
STF
As
AsQ
AsINOUT
11
1
++
+=
Low Pass Filter
noise
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2nd order Modulator
s
A1+
+
-
IN OUT++
Qe
s
A2+
+
-
444 3444 21444 3444 21NTF
e
STF
AsAAs
AAsQ
AsAAsINOUT
11
1
121
2
21
2
121
2 +++
++=
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Comparison of 1st & 2nd order modulator
Low Pass Filter
0
0.2
0.4
0.6
0.8
1
0.001 0.01 0.1 1 10 100 1000 10000 100000
STF 1st
NTF 1st
STF 2nd
NTF 2nd
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Speed vs ResolutionAnalog Devices - AD7732
16
17
18
19
20
0 5000 10000 15000
Conversion Rate (Hz)
Resolution (Bits)
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Low Pass Digital Filter
Simple Counter
+ regIN OUTreg
counter
accumulator
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z-Transform
)]1([...]2[]1[][][ −−++−+−+= Knxnxnxnxny
)...1()()( )1(21 −−−− ++++⋅= KzzzzXzY
ss f
fj
fTjeez
ππ
22
==
11
1
)(
)()(
−
−
−
−==
z
z
zX
zYzH
K
1
1
1
1−
−
−
−⋅
z
z
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[2]
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Types of Digital Filters
- Higher Order Sinc Filters
- FIR filters
- BiQuad Filters
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References
[1] Baker, R. Jacob, CMOS: Circuit Design, Layout, and Simulation
[2] Baker, R. Jacob, CMOS: Mixed-Signal Circuit Design
[3] Analog Devices AD7732 Datasheet
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Questions?
∑∆+
-
1-bit
ADCIN OUTDigital
Filter
1-bit
DAC
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Design and operation
of folding ADCs
ECE 614 Student Presentation
By Kaijun Li
May 5, 2008
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� Miscellaneous ADC
� Interpolating ADC
� Folding ADC
� Folding & Interpolation
� Simulation
� Conclusion
ECE 614 Design and operation of folding ADCs Kaijun Li
Outline
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ECE 614 Design and operation of folding ADCs Kaijun Li
Fig. from ref.[2]
Miscellaneous ADC
2N 2BW
PFOM =
Various FOMs
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ECE 614 Design and operation of folding ADCs Kaijun Li
Miscellaneous ADC
� Trade-offs between high conversion rate and
high resolution
� Latency concerns
� Complexity of the CMOS circuitry
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ECE 614 Design and operation of folding ADCs Kaijun Li
Flash ADC
Undoubtedly the simplest ADC
Fastest conversion
Largest amount of Preamps and comparators
Figure from [1]
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Subranging (or Two-step) ADC
ECE 614 Design and operation of folding ADCs Kaijun Li
Less Comparators
2N -> 2 2N/2
Figure from [1]
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ECE 614 Design and operation of folding ADCs Kaijun Li
Interpolating ADC
Figure from [4]
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ECE 614 Design and operation of folding ADCs Kaijun Li
Interpolating ADC
0 0.5 1 1.5 2 2.5 3-0.5
0
0.5
Vin
/LSB
Vout
Output of Preamps
Out1
Out2
Out1i
Out2i
0 0.5 1 1.5 2 2.5 3-1
-0.5
0
0.5
1Out2-Out1i
Figure from [2]
Less Comparators
Same amount of Latches
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Higher order resistive interpolation
ECE 614 Design and operation of
folding ADCs Kaijun Li
Figure from [5]
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ECE 614 Design and operation of folding ADCs Kaijun Li
Transfer curves
Coarse ADC
Fine ADC
Vin
Folder
Latches
MSB
LSB
Digital
Output
DN-1 ,…D1 ,D0
Vin
Vout
11
10
01
00
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ECE 614 Design and operation of folding ADCs Kaijun Li
Realization of Folds via Source-Couple Pairs
Figure from [2]
Zero-xing
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ECE 614 Design and operation of folding ADCs Kaijun Li
Folding & Interpolation
More practical, they are
combined for application
Figure from [2]
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ECE 614 Design and operation of folding ADCs Kaijun Li
LTSpice Simulation
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ECE 614 Design and operation of folding ADCs Kaijun Li
� Flash ADC, subranging (or two-step) ADC
� Interpolating and folding techniques
� Interpolating and folding ADC
� Simulation for illustration
Conclusion
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ECE 614 Design and operation of folding ADCs Kaijun Li
References
� [1] R. J. Baker, CMOS Circuit Design, Layout, and Simulation, Revised
Second Edition, Wiley-IEEE, 2008
� [2] http://webcast.berkeley.edu/EE 247
� [3] http://www.analog.com
� [4] Willy M.C. Sansen, Analog Design Essentials, Springer, 2006
� [5] H. Kimura et al, “A 10-b 300-MHz Interpolated-Parallel A/D Converter,”
JSSC April 1993, pp.438-446
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ECE 614 Design and operation of folding ADCs Kaijun Li
Questions