Design and Implementation of a Software De ned Radio based ...Design and Implementation of a...

Design and Implementation of aSoftware Defined Radio based UHF

Digital Ground Transmitter System forFlying Object using LabVIEW

Amiya Ranjan Panda1∗, Debahuti Mishra2

and Hare Krishna Ratha3

1 3Integrated Test Range,Defence Research and Development Organisation,

Chandipur, Balasore-756025, [email protected]

2Department of Computer science and Engineering,SikshaO Anusandhan University,

Bhubaneswar-751030,India

December 28, 2017

Abstract

This paper presents the design and implementation of asoftware defined radio (SDR) based digital ground transmit-ter system using LabVIEW. In flight testing center, groundtransmitter system is needed to transmit specific commandsto execute some operation inside the flight vehicle. Thenewly implemented ground transmitter system can be vi-sualized as thre layers architecture. These three layers areFPGA, RTOS and GPUs. The digital to analog conversionand RF up conversion are implemented in high speed PCIextension for instrumentation express (PXIe) cards. Thecommunication algorithms and DUC are implemented inFPGA. The communication system uses digital modulationscheme and realized by NI PXI-7966R with Xilinx Virtex 5,

1

International Journal of Pure and Applied MathematicsVolume 118 No. 16 2018, 889-905ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version)url: http://www.ijpam.euSpecial Issue ijpam.eu

889

SXT, FPGA. The results show successful implementationof the ground transmitter system.

Keywords : FPGA; LabVIEW; SDR.

1 Introduction

In Flight testing centre, Command Transmission System (CTS) isused to generate and transmit remote command signals to the air-borne vehicle through RF link to execute some operation inside thevehicle as required in real time flight scenario. Real-time commandtransmission operation demands a very highly reliable and ruggedi-zed platform. The commands transmitted by CTS is received anddecoded by on board command reception system (CRS) at flightvehicle (FV) and the commanded operation is done accordingly.

Figure 1: System Configuration

The design of CTS entails real-time signal generation, trans-mission as well as evaluation of the transmitted signal. The systemalso has to make real-time communication with remote control unit(RCU) with various demanded protocols. RCU is utilized for re-mote operation of the CTS. The system flexibility that incorporatesto various modulation schemes need to be made sure for future up-gradation.

An ideal software defined radio (SDR) system has actually veri-fied itself to be quite efficient system for executing such flexible andalso reconfigurable system architecture [1-3]. SDR in recent trendis a typical term, which has been utilized for quick prototyping ofdifferent kinds of complex communication system utilized in various

2

International Journal of Pure and Applied Mathematics Special Issue

890

fields, such as for radar design [4], GPS receiver design [5], adaptiveoptics system layout [6], drive servo system design [7] and so on.Numerous real-time applications such as sophisticated control sys-tem design [8], system performance measurement [9], informationacquisition [10] and handling [11] make use of the FPGA integratedwith PXI platform for execution.

SDR based on FPGA system can be an excellent alternativefor developing smart as well as reconfigurable CTS for operationson a single platform [12-13] as compared to the previously utilizedlarge CTS, which was a distinct hardware, based fixed configurationsystem. Various hardware based CTS systems were utilized for testof different flight vehicles. The recently developed SDR based CTSsystem in turn, resolves the issue of frequent hardware replacementsand also price of design as in SDR based system; just softwareupdation is required to implement brand-new system.

LabVIEW FPGA component of NI Flex-RIO system has actu-ally been used to simulate and also design the various componentsof the system. LabVIEW FPGA component makes it possible tosimulate different modules of the system in faster way and also thebenefit is that the exact same simulation applies in real equipmentexecution. The design has been implemented using fixed point datatype, so as to improve the resource utilization within the FPGA[14-15].

The CTS system contains a real-time controller (RTC), hostcomputer system and SDR based command transmission and recep-tion unit (Fig. 1.). The RTC provides a communication interfacebetween RCU and host computer that incorporates CTS system.Host computer is used for configuration, local mode operation andanalysis of intermediate signal processing of the CTS system.

The structure of this paper is as complies with. The mathemat-ical formulation of the problem is described in section II. It con-tinues with the SDR based design method discussion as well as theFlex-RIO software communication architecture description. PartIII explains the software implementation of SDR based CTS. PartIV shows the laboratory set up and experimental results. Finally,part V ends the paper.

3


891

2 Mathematical Formulation

The concept of CTS is illustrated in Fig. 1. The RCU is attachedwith the CTS via dependable serial communication links. The com-mands are given from the RCU to CTS. The commands are gener-ated and transmitted from the CTS. Then it is acquired by onboardCRS through RF link and desired operation is done correctly.

The generated commands are a frame of binary bits. This framecomprises of N number of binary bits. The whole frame is encodedwith Manchester encoding scheme and total number of bits in aframe becomes double i.e. 2N.

The frame is converted to binary data wave form d(t) with thelogic d(t) = +1 or -1 corresponding to the binary bits 1or 0. Hence,the binary data waveform d(t) can be expressed as:

d(t) =∑2N−1

i=0 biP (t− i.Tb) (1)

Where, bi = ith number of bit of the frame and P (t) = rect( tTb

).Here, Tb = bit duration.

This binary data waveform d(t) modulates a carrier signal us-ing binary frequency shift keying (BFSK) modulation scheme. TheBFSK modulated signal can be represented as (2):

BFSK(t) = A cos ω0t+d(t).Ω.t (2)

Here Ω is a constant offset from the carrier frequency (ω0).Equation (2) can be written as (3):

BFSK(t) = A cosbω0t+d(t)Ω.tc = m(t) (3)

Here for bit 1, d(t)=+1 and its corresponding higher frequency(ωH = ω0 + Ω) and for bit 0, d(t)=-1 and its corresponding lowerfrequency (ωL = ω0 + Ω).

This BFSK modulation is done in very low frequency band. Thissignal is lastly up-converted to ultra-high frequency band makinguse of FM modulation scheme. The fundamental concept behindFM is to differ the carrier frequency in proportion to the modu-lating signal m(t). This means instantaneous frequency (ωi) of thecarrier is varying in proportion to m(t) . This can be transcribed as,

4


892

ω(t) = ωc +Kf .m(t) = dθ(t))dt

(4)

Here, ωc = career frequency, kf = a constant and θ(t) = gener-alized angle. Equation (4) can be written as,

θ(t) =∫ τ−∞ωc +Kf .m(α)dα (5)

Equation (5) follows to,

θ(t) = ωct+Kf

∫ τ−∞m(α)dα (6)

So the corresponding FM signal can be written as,

FM(t) = Ac cosωct+Kf

∫ τ−∞m(α)dα (7)

Here, Ac is amplitude of the career signal and modulating signalm(t) is BFSK modulated signal BFSK(t).

3 Software Implementation

SDR can be implemented in different platforms [16]-[20]. For designas well as simulation of the CTS application, a high label program-ming tool LabVIEW is utilized. LabVIEW Developer suite is thefundamental LabVIEW application software. LabVIEW Real TimeOption package is used for real-time application with graphical pro-gramming. It additionally should optimize the real time applica-tions with in depth tracing tools. Real-time application should bedownloaded to a dedicated target for trustworthy and also deter-ministic efficiency. LabVIEW FPGA Option for developer suit ishelpful for performing a number of activities simultaneously anddeterministically. It could specify the control algorithm with looprates approximately 40 MHz. With this LabVIEW FPGA choice,FPGA on NI reconfigurable hardware targets should be set up bygraphical computer programming.

5


893

3.1 LabVIEW Flex-RIO Software Communica-tion Architecture

The design of SDR based CTS system can be considered as a threelayer design. These three layers are FPGA, Real Time Control(RTC) and Windows Host as shown in Fig 2. For design and devel-opment of different layer applications, FPGA LabVIEW, Real TimeLabVIEW and general purpose LabVIEW platforms have been usedrespectively.

Figure 2: Communication architecture of NI Flex-RIO

3.2 Transmitter Realization using LabVIEW FPGA

Transmitter loop design contains the design of data framing of eachcommand, Manchester encoding, BFSK modulation of Manchesterencoded data frame and finally FM modulation of BFSK modulatedsignal at IF frequency. The data framing of each command and itsManchester Encoding has been designed in state machine diagramconcept. Each command is framed with 3 start bits which arefollowed by data bits and one stop bit.

6


894

3.2.1 Realization of command frame generation using Lab-VIEW FPGA

Figure 3: (a) Algorithm of BIT Generator, (b) Command framegeneration in LabVIEW FPGA

The algorithm of command frame generation is shown in the Fig.3. Start bits are stored in a START BIT ARRAY. Similarly databits and stop bits are stored in DATA BIT ARRAY and STOP BITARRAY respectively. Here START BIT ARRAY and STOP BITARRAY are fixed, but DATA BIT ARRAY is varying according tothe command code which is set at configuration settings. Binary1 and 0 are taken as Boolean True and False respectively in thisdesign. One time-loop is taken which runs at 5MHz clock rate. Ineach iteration of the time-loop, TRUE/FALSE is being generated.After Manchester encoding, a 2Kbps data is changed to 4 Kbpsdata. The corresponding bit duration of this data rate is 250 mi-crosecond. For a 5MHz clock rate total 1250 number Boolean Trueor False are generated during one bit duration. The algorithm isimplemented in FPGA LabVIEW which is shown in the Fig. 3(b).

7


895

3.2.2 Realization of BFSK and FM modulation using Lab-VIEW FPGA

The Boolean TRUE and FALSE triggers the sinusoidal signal oflow and high frequency respectively using DDS Xilinx core IP forgeneration of BFSK modulated signal. This is shown in Fig. 5.

Figure 4: BFSK modulated signal generation using DDS Xilinxcore IP

In FM modulation, frequency of the carrier is changing in pro-portion with the amplitude of modulating signal. Here, BFSK mod-ulated output in Fig. 4 is the modulating signal. In Fig. 5, as perthe amplitude of sample coming out of the FIFO, correspondingfrequency deviation from the center frequency is calculated.

Figure 5: FM modulation at 25MHz IF frequencies

8


896

In this design, clock rate is selected at 100MHz. This clockis derived from IO Module clock. The data sharing between twoloops i.e. loop for BFSK modulation (Fig. 4) and loop for FMmodulation (Fig. 5) which are running at 5MHz and 100MHz raterespectively, is accomplished through Target scoped FIFO. Herein this design, FM MOD FIFO is a Target scoped FIFO. Finally,BFSK modulated signal is FM modulated at 25 MHz IF frequencies.This is shown in the Fig. 5. The maximum deviation for the designis 100 KHz. The implemented algorithm of FM modulation inLabVIEW FPGS is depicted in Fig. 6.

Figure 6: Algorithm for FM modulation in FPGA LabVIEW

4 Hardware Realization

The hardware configuration for developing SDR based CTS sys-tem is shown in Fig. 7. This hardware is a COTS product of NI

9


897

which consists of a single PXIe chassis (NI PXIe 1075, 18 slot PXIechassis ) with real time PXIe controller (NI PXIe 8135 Controllerwith Intel i7 processor ) and a several number of PXIe modules .The code generation, Manchester encoding, Manchester decoding,BFSK modulation, BFSK demodulation, FM modulation, Digitalup conversion are implemented in the NI PXIe-7966R NI FlexRIOFPGA Module [21-22]. For performing DAC, NI 5781 BasebandTransceiver Adapter Module is used. For converting IF signal inthe region of UHF range one up converter module NI PXI 5610 isused. For serial communication between Range Safety panel andCTS, NI PXIe-8430/8 Port, RS232 serial interface is used.

Figure 7: Hardware configuration block diagram of SDR based CTSsystem

5 Experimental Results

The experiment was performed in 2 stages. Offline: The onboardreceiver with decoder (nominal power of 12V DC) is kept in researchlaboratory. Online: The onboard receiver with decoder is kept in-side helicopter as well as received the status with ground telemetrystations. In both of the screening procedure, the commands aresent at UHF band and the signal attributes were evaluated. Thesystem specifications establishing were portrayed in Table I.

10


898

Table 1: SDR BASED CTS PARAMETERS SETTING

ParametersOperationRange

Unit

Baseband Data rate 2-8 KbpsBFSK Mark Frequency 0-50 kHzBFSK Space Frequency 0-50 kHzFM Deviation 100-200 kHzIF Center Frequency 15-35 MHzRF Up Conversion Center Frequency 25-2750 MHz

The overall performance of the system which includes transmis-sion, reception and medium has been validated. At receiver chain,the RF signal conditioning is done by NI PXI 5690 module whichincludes low noise / high gain amplifier and programmable atten-uators. The channel provides a low noise figure and flat frequencyresponse as

Figure 8: (a) Plot between BER and Eb/N0 (theoretical vs. ob-served). Linearity measurement w.r.t (a) Gain and (b) Noise Figure

11


899

Figure 9: IF spectrum observed in spectrum analyzer at (a) 25MHz at transmitter side, (b) transmitted IF frequency observed inoscilloscope

Figure 10: Spectrum observed in spectrum analyzer at (a) 1.5 GHz, (b) 1 GHz and (c) 300MHz

Figure 11: GUI showing various intermediate processed waveformsof CTS signal in transmission. (a) BFSK data in transmission line,(b) FM data in transmission line

12


900

shown in Fig. 8 (b). The linearity of gain with frequency isshown in Fig. 8(a).

For proper validation of the performance of the CTS, interme-diate signal for each transmission data are captured and analyzed.The FM modulation is implemented using intermediate frequenciesat 25 MHz (Fig. 9 (a). Fig. 9 (c) shows frequency spectrum fortransmit IF signal.

For practical transmission purpose, transmit IF signal is up-converted at different frequencies and transmitted in the air (Fig.10. shows spectrum at 1.5 GHz, 1GHz and 300MHz).

The intermediate waveforms (Manchester encoding, BFSK mod-ulation, FM modulation) in both transmitted and received line ofCTS are monitored in HMI based C&M unit of CTS as shown inFig. 11.

6 Conclusion

In this paper a SDR based CTS; a transmitter system executionexists. The system has actually been carried out utilizing NI-FlexRIO arrangement. Xilinx FPGA incorporated into the Flex RIOcomponent has given an extremely highly flexible system for com-plicated algorithms for CTS system designing. The system has beendesigned utilizing LabVIEW FPGA component software and alsodeployed with LabVIEW RT running in to the controller chassis.The RT LabVIEW provides a very reliable and also rapid commu-nication between the RCU as well as CTS transmitter system.

Suitable algorithms for signal generation, encoding, basebandand pass band modulation, digital up conversion and down conver-sion, filter design have been selected as well as applied to assureoptimized uses of hardware. The performance of the system is ex-amined through study of the intermediate signal processing. Eval-uation is done at both IF and RF stages of transmitter and thesystem is validated by linearity response at different frequencies.

13


901

References

[1] W.H.W. Tuttlebee, Software-defined radio: facets of a develop-ing technology, IEEE Pers. Commun., Vol. 6, No. 2, pp. 38-44,1999.

[2] T. Ulversoy, Software Defined Radio: Challenges and Oppor-tunities, IEEE Commun. Surveys Tuts, Vol. 12, No. 4, pp.531-550, 2010.

[3] G. Baldini, T.Sturman, A.R. Biswas, R. Leschhorn, G. Godorand M.Street, Security Aspects in Software Defined Radio andCognitive Radio Networks: A Survey and A Way Ahead, IEEECommun. Surveys Tuts, Vol. 14, No. 2, pp. 355-379, 2012.

[4] J. Meier, R. Kelley, B.M. Isom, M. Yeary, R.D. Palmer, Lever-aging Software-Defined Radio Techniques in Multichannel Dig-ital Weather Radar Receiver Design, IEEE Trans. Instrum.Meas., Vol. 61, No. 6, pp. 1571-1582, 2012.

[5] A. Soghoyan, A. Suleiman, D. Akopian, A Development andTesting Instrumentation for GPS Software Defined Radio WithFast FPGA Prototyping Support, IEEE Trans. Instrum. Meas.,Vol. 63, No. 8, pp. 2001-2012, 2014.

[6] Chia-Yuan Chang, Bo-Ting Ke, Hung-Wei Su, Wei-ChungYen, Shean-Jen Chen, Easily implementable field pro-grammable gate array-based adaptive optics system with state-space multichannel control, Review of Scientific Instruments,Vol. 84 , No. 9, pp. 095112 - 095112-5, 2013.

[7] Shaomin Xiong, D.B. Bogy, Hard Disk Drive Servo SystemBased on Field-Programmable Gate Arrays, IEEE Trans. Ind.Electron., Vol. 61, No. 9, pp.4878-4884, 2014.

[8] Guozhen Zheng, Wei Zheng, Ge Zhuang, Ming Zhang, TonghaiDing, The Design of Global Interlock System in J-TEXT, IEEETrans. Plasma Sci., Vol. 42, No. 6, Part.2, pp. 1775-1779, 2014.

[9] F. Marignetti, M. Minutillo, A. Perna, E. Jannelli, Assessmentof Fuel Cell Performance Under Different Air Stoichiometries

14


902

and Fuel Composition, IEEE Trans. Ind. Electron., Vol. 58,No. 6, pp. 2420-2426, 2011.

[10] C.C.W. Robson, A. Bousselham, C. Bohm, An FPGA- BasedGeneral-Purpose Data Acquisition Controller, IEEE Trans.Nucl. Sci., Vol. 53, No. 4, Part. 2, pp. 2092-2096, 2006.

[11] G. Mocsar, B. Kreith, J. Buchholz, J. W. Krieger, J. Lan-gowski, G. Vamosi, Note: Multiplexed multiple-tau auto- andcross-correlators on a single field programmable gate array, Re-view of Scientific Instruments, Vol. 83, No. 4, pp. 046101 -046101-3, 2012.

[12] V. B. Alluri, J.R. Heath, M. Lhamon, A New Multichan-nel, Coherent Amplitude Modulated, Time-Division Multi-plexed, Software-Defined Radio Receiver Architecture, andField-Programmable-Gate-Array Technology Implementation,IEEE Trans. Signal Process, Vol. 58, No. 10, pp. 5369-5384,2010.

[13] P. B. Kenington, RF and Baseband Techniques for SoftwareDefined Radio. Boston: Artech House, 2005.

[14] E. Monmasson, L. Idkhajine, M. N. Cirstea, I. Bahri, A. Tisan,and M.W. Naouar, FPGAs in industrial control applications,IEEE Trans. Ind. Inf., vol. 7, no. 2, May 2011, pp. 224243.

[15] E. Monmasson and M. N. Cirstea, FPGA design methodologyfor industrial control systemsA review, IEEE Trans. Ind. Elec-tron., vol. 54, No. 4, pp. 18241842, Aug. 2007.

[16] D. Liu, A. Nilsson, E. Tell, Di Wu, J. Eilert, Bridging dreamand reality: Programmable baseband processors for software-defined radio, IEEE Commun. Mag., Vol. 47 , No. 9, pp. 134-140, 2009.

[17] P. Ferrari, A. Flammini, E. Sisinni, New Architecture for aWireless Smart Sensor Based on a Software-Defined Radio,IEEE Trans. Instrum. Meas., Vol.60, No. 6, pp. 2133-2141,2011.

15


903

[18] T. Shono, Y. Shirato, H. Shiba, K. Uehara, K. Araki, M. Ume-hira, IEEE 802.11 wireless LAN implemented on software de-finedradio with hybrid programmable architecture, IEEE Trans.Wireless Commu., Vol. 4, No. 5, pp. 2299-2308, 2005.

[19] T. Beluch, F. Perget, J. Henaut, D. Dragomirescu, R. Plana,Mostly Digital Wireless UltraWide Band Communication Ar-chitecture for Software Defined Radio, IEEE Microw. Mag.,Vol. 13, No. 1, pp. 132-138, 2012.

[20] JE. Gunn, K. S. Barron and W. Ruczczyk, A Low Power DSPCore Based Software Radio Architecture, IEEE Select. AreasComm., Vol. 17, pp. 574-590, Apr. 1999.

[21] Virtex-5 Family Overview, Product Specification, DS100(v5.0), Feb. 6, 2009.

[22] National Instruments, NI PXI-7966R R Series Multifunc-tion RIO with Virtex-5 SXT FPGA [Online]. Available:http://ni.com

16


904

Design and Implementation of a Software De ned Radio based ...Design and Implementation of a...

Documents

Transcript of Design and Implementation of a Software De ned Radio based ...Design and Implementation of a...