Design and Analysis of a Switched Capacitor Based Step Up DC DC Converter With Continuous Input...

8/2/2019 Design and Analysis of a Switched Capacitor Based Step Up DC DC Converter With Continuous Input Current

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722 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 46, NO. 6, JUNE 1999

Design and Analysis of a Switched-Capacitor-Based Step-Up DC/DC

Converter With Continuous Input CurrentHenry Shu-hung Chung, Member, IEEE

Abstract This paper presents the use of the current controlscheme in switched-capacitor (SC)-based step-up dc/dc converter.It not only includes all positive characteristics of previous SCconverters, including small size, lightweight, high power den-sity, and the amenability to IC hybridization, but also has theprominent features of continuous input current waveform andbetter regulation capability than the traditional SC converters.The problem of conducted electromagnetic interference with thesupply network, which generally exists in previous SC converters,is highly suppressed. The concept of energy transfer is achievedby using dual SC step-up converter cells operating in antiphase.Each cell is switching between two topologies for same duration.The dc voltage conversion ratio is controlled by the currentcontrol scheme in order to adjust the charging profile of thecapacitors. A generalized n -stage converter is presented and isanalyzed by a simplified third-order state-space equation set. Thestatic and dynamic behaviors and the design constraints of theconverter are derived. A prototype of the 30 W 5 V

=

12 V two-stage converter has been built, giving an overall efficiency of 78%with power density of 15 W= in3 . Its stability of operation is alsopresented.

Index Terms DCDC power conversion, switched capacitorcircuits, switched mode power supplies.

I. INTRODUCTION

THERE is an increasing demand for converters of smallsize lightweight, high efficiency, and high power density.Recently, a new class of converters for low-power applications

is proposed [1][14] where conversion of an unregulated input

to a regulated output is accomplished by using switched-

capacitor (SC) circuits. They do not require any inductive

element, but contain semiconductor switches (MOSFETs and

diodes) and capacitors only, making it amenable to monolithic

integration [12][14].

Starting from the prime idea of applying the basic SC cell

[15] for power conversion, many methodologies of operating

the switches and the capacitors, and the control schemes have

been proposed. Each capacitor is basically going through a

charging process from the supply and/or other capacitors and

a discharging process to the load and/or other capacitors,

periodically.

Although SC converters exhibit many implementation ad-

vantages, they have some common drawbacks: 1) the input

current is pulsating; 2) the regulation capability is weak since

Manuscript received February 4, 1997; revised October 20, 1998. This paperwas recommended by Associate Editor A. Ioinovici.

The author is with the City University of Hong Kong, Hong Kong.Publisher Item Identifier S 1057-7122(99)04753-4.

the output voltage varies with the input voltage accordingly;

and 3) the dc voltage conversion ratio is usually predetermined

by circuit structure [16].

Lately, regulation capability of SC converters has improved

[8][10]. The charging time of the capacitors is controlled by

a pulse-width-modulated (PWM) control scheme, providing

an adjustable voltage conversion ratio. However, the input

current is still pulsating. The switches are under high current

stress of short duration during the charging period. This aspect,

in particular, causes conducted electromagnetic interference

(EMI) with the supply network [17]. Moreover, when the load

is light and/or the output voltage is low, the charging duration

will be very short, which is practically difficult to implement.

Recently, a new SC-based step-down dc/dc converter was

proposed in [11]. The operation is based on a new SC

converter cell, namely the quasi-switched-capacitor (QSC)

step-down converter cell. It not only features all the positive

characteristics of classical SC converters, but also provides

continuous input current waveform and better regulation ca-

pability than the previous ones. The input current is controlled

by a MOSFET operating in the saturation region [18] in each

cell in order to control the charging trajectory of the capacitors.

Moreover, the duty time of all switches is fixed at half of theswitching period, thus avoiding the practical problem of short

capacitor charging time in the PWM control scheme.

In order to achieve voltage regulation, an on-resistance

control scheme was used in [3]. The MOSFET is driven

into the triode region during the charging phase, forming

a voltage-controlled resistor. However, the input charging

current is still pulsating, but with much lower current stress

than classical SC converters. In [11] the MOSFET is operated

in the saturation region. It provides a drain current whose

value is independent of the drain voltage, forming a voltage-

controlled current source (VCCS) [18]. If the gate-source

voltage is kept constant, the drain current will remain constant.

Finally, the dc voltage conversion ratio of the converters in [3]

is fixed and is dependent on the circuit structure.

This paper presents the use of the current control scheme

in [11] for SC step-up converters. It integrates the advantages

of [11] in providing adjustable voltage conversion ratio and

continuous input current waveform and keeps all superior

features of classical SC step-up converters [10], [19]. The

principles of operation of an -stage converter are presented

in Section II. For simplifying mathematical analysis [20] a

third-order state-space equation set is derived. By applying

10577122/99$10.00 1999 IEEE


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Fig. 3. Theoretical waveforms of the converter.

capacitors (i.e., to ) are connected in series with

through to supplying to the output load . Thus,

is higher than . The operations of cell 1 and cell 2 are

interchanged in Topology 2.

It can be seen from the above that the input current

includes all charging currents of the capacitors in one cell and

the output current

(5)

As the magnitude of and is slightly constant, the input

current becomes continuous.

C. Comparisons with Previous SC-Based Converters

Compared to the previous SC converters, the following

major aspects can be distinguished in their performance char-

acteristics.

1) The input current waveform of previous converters

contains high current peak in the charging process while

the input current of the proposed one is theoretically

constant (5). Thus, the input current waveform is im-

proved and the conducted EMI problem is subsequently

suppressed [17].

2) For achieving voltage regulation, the capacitor charging

time [8][10] is controlled by a PWM controller. It

will be short at light load or at a low output voltage

condition and is practically hard to be implemented. For

the proposed converter, the duty cycle of all MOSFETsis fixed at 0.5, which improves the regulation capability.

3) The conversion efficiency of the proposed circuit will

be proved to be same as those in [10] and [19] in

Section III. This gives the same performance index as

the previous converter, but presents better behaviors that

have been discussed in 1) and 2).

III. ANALYSIS OF THE SC STEP-UP DC/DC CONVERTER

The converter is analyzed by applying the state-space av-

eraging technique [21]. As all the capacitors within the same


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CHUNG: DESIGN AND ANALYSIS OF DC/DC CONVERTER 725

(a)

(b)

Fig. 4. The two topologies in a switching cycle. (a) Topology 1. (b) Topology 2.

cell undergo same charging and discharging mechanism, their

voltage trajectories will behave identically. If each capacitor is

treated by an individual state variable as in [20], the dimension

of the state matrix will be . It will then

require considerable time in the analysis. In order to simplify

the calculation, each cell is simply represented by a single state

variable for all capacitor voltage in that cell. For example,

represents the capacitor voltage in cell 1 and represents

the capacitor voltage in cell 2 in the following derivations. A

third-order averaged state-space equation set can be formulated

for the two topologies in Fig. 4

(6)

where

and

The above order-reduction method is valid for parallel-series

SC converters, provided that the capacitors are similar and

not lossy or, alternatively, capacitance and ESR are inversely

proportional numbers.

A. Formulation of the Steady-State Characteristics

The steady-state value of the output voltage can be

obtained by substituting into (6). Therefore

(7)

where

and

Hence, provided that all QS switches are operating in the

saturation region, is independent of the input voltage

and the forward voltage drop of the diodes and is merely

determined by the drain current of the QSs and the parasitic

resistance of the components. The independence of the input

voltage can be explained physically by considering a condition

when the input voltage is slightly increased from the steady

state. In the charging phase, the capacitor is charged by a

constant current with an incremental voltage (whichis independent of the input voltage). As the input voltage

is increased, the output voltage (and hence the capacitor

discharging current) will be increased in the discharging phase.

The capacitor voltage will decrease for more than . Thus,

the overall capacitor voltage is decreased in one switching

cycle. This process will be repeated for several switching

cycles until the output current is equal to . The output

voltage is then maintained at a constant level, provided that

the MOSFETs are operated in the saturation region. This

physical phenomenon is also applicable when the input voltage

is decreased.


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By substituting (2) into (7) it is also possible to appreciate

how can be regulated by controlling where

(8)

In a regulator, is generally dictated from the feedback

circuit after comparing with a reference voltage. Although

is in nonlinear relationship with , is relativelyconstant in every switching cycle because the output of the

feedback circuit is generally slow varying as compared to the

switching frequency.

B. Determination of the Conversion Efficiency

If and are assumed to be similar, they give

and in (7). Thus

(9a)

and

(9b)

The conversion efficiency of the converter can be shown

to be

(10)

The expression is the same as that obtained in [19]. equals

one when , which is the case of minimum

energy losses. It demonstrates that the efficiency characteristic

of SC converters is independent of the control scheme, but on

the input and output voltages. Thus, the proposed converter

gives similar conversion efficiency as previous SC converters,but presents better performance characteristics, which have

been discussed in Section II-C.

C. Formulation of the Dynamic Characteristics

of the Converter

The small-signal dynamic behaviors of the converter around

the operating point is studied by introducing small-signal

variation in the charging current on its steady-state value

of and in the input voltage on its steady-state value

of . A small-signal output voltage variation will be

superimposed on its steady-state value . By separating the

small-signal component and neglecting the infinitesimal termsof the second-order and higher order disturbances, the open-

loop input-to-output transfer function [i.e., ] and

control-to-output transfer function [i.e., ] are

obtained [21]

(11)

and

(12)

Fig. 5. Small-signal model of the closed-loop system.

and is identity matrix.Thus, the open-loop small-signal model of the converter

can be expressed as

(13)

A small-signal model for a closed-loop system is shown

in Fig. 5, where the transfer function of the feedback error

amplifier [i.e., ] is included. The closed-loop small-

signal transfer functions can be shown to be

(14)

where is the loop gain of the

system [22].

D. Selection of Capacitor Value

The capacitor value in each cell is chosen by considering

the maximum output ripple voltage . Since all

capacitors within their cell are connected in series during the

discharging phase (Fig. 4), an equivalent capacitor can

be used to represent the whole connected capacitor string and

. That is

(15)

if

.

For a stable and continuous dc output current it can be

approximated by (9a)

(16)


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Fig. 6. Theoretical relationships between vo u t ; m a x

and n :

TABLE ICOMPONENT VALUES OF THE PROTOTYPE CONVERTER

Referring to Fig. 4, the discharging period of all capacitors is

fixed at . In order to simplify the calculation the designed

value of will be selected in such a way that

(17)

where is the switching frequency.

E. Derivation of Maximum with Respect to

For a given input voltage , will be maximum when

all capacitors in each cell are fully charged to during the

charging phase. During the discharging phase, the maximum

value of (denoted by ) is

(18)

increases with since (19) at the bottom of this page

applies if . However, if tends to infinity,

will go to a value of

(20)

Fig. 6 shows the relationship between the value of

and . The values are based on the component values as

tabulated in Table I. It can be observed from (20) that

is not only determined by , but also on the parasitic resistance

of the components and the load resistance. The smaller the

values of and , the higher will be the maximum

attainable by increasing .

IV. EXPERIMENTAL PROTOTYPE

A 5 V 12 V 30 W two-stage step-up regulator with power

density of 15 W/in has been built in the laboratory. It is shown

in Fig. 7. Fig. 8 shows the schematics of the feedback circuit

with its input connecting to the output of the SC converter

and its output is used to provide for the QSs. Using the

method described in [22], the test setup for the measurementof the loop gain [i.e., ] is also illustrated using a gain-

phase analyzer HP4194A. When the switch SW is at position

A, the circuit is in normal operation. When SW is at position

B, the loop gain measurement is performed. The test point is

equivalent to point X in Fig. 5. The component values of the

converter are tabulated in Table I. The capacitors are a surface-

mounted multilayer ceramic type. The converter is operating at

(19)


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Fig. 7. Hardware implementation of a two-stage step-up converter.

Fig. 8. Schematics of the feedback circuit with the test setup for the loopgain measurement.

220 kHz and its overall efficiency is 78% at the rated condition(including the required power for the driving circuit).

Fig. 9 shows the experimental waveforms of the output

voltage, the input current, and the capacitor voltage of one

cell at the rated condition. It can be seen that the input

current is continuous and does not contain pulsating peaks. The

waveforms are obtained from the oscilloscope, LeCroy 9304A,

and the current probe, Tektronix TM502A. The regulation

capability of the converter is illustrated in Fig. 10. Fig. 10(a)

shows the output voltage of the converter, when is changed

from 3.5 V to 8 V and is kept at 4.8 . It can be observed

that the output voltage can maintain at 12 V when is larger

(a)

(b)

(c)

Fig. 9. Experimental waveforms. (a) Output voltage (timebase: 1 s= div,voltage scale: 2 V = div). (b) Input current (timebase: 1 s = div, current scale:2.5 A= div). (c) Capacitor voltage of one cell (timebase: 1 s = div, voltagescale: 1 V = div).


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(a)

(b)

Fig. 10. Regulation capability of the proposed circuit. (a) For the variationin the input voltage at rated output load. (b) For the variation in the outputload with rated input voltage.

than 4.5 V. Fig. 10(b) shows the output voltage, when the

output current varies from 0.5 A to 2.5 A (by changing thevalue of ). The input voltage is kept at 5 V. It can be seen

that the output voltage can be regulated within this operating

range.

The theoretical and experimental results of the overall

efficiency (including the driving circuit) versus the input

voltage is shown in Fig. 11(a), where is maintained

constant. It can be observed that the efficiency decreases as

the input voltage increases. The results are consistent with (10)

and [19]. The overall efficiency versus the output load power is

shown in Fig. 11(b), where the input voltage is kept constant.

Theoretically, based on (10), the efficiency should be about

80% for all output power. However, the practical efficiency is

low at low output power since the power to the driving circuitbecomes a significant portion of the input power. When the

output power is increased, the driving power can be neglected.

Thus, the overall efficiency increases with the output load.

By varying the value of , the theoretical and experimental

output ripple voltage at different output current is shown in

Fig. 12. The output voltage is maintained constant at 12 V.

The maximum ripple voltage is less than 1%. The theoretical

predictions are obtained by using (17).

Fig. 13(a) shows the measurement results of the loop gain

[i.e., ]. The gain and phase margin were found to be

23 dB and 55 , respectively, showing stable operation. The

(a)

(b)

Fig. 11. Overall efficiency of the prototype converter. (a) Efficiency versusinput voltage. (b) Efficiency versus output load.

Fig. 12. Output ripple voltages versus the output current.

results are compared to the theoretical predictions. Moreover,

by using (14), the theoretical prediction and experimental

measurements of the small-signal closed-loop input-to-output

frequency responses are shown in Fig. 13(b). It can be ob-served that the theoretical results agree well with the experi-

mental ones at the low-frequency range. At high frequencies,

the experimental values deviate from the expected ones since

the analyzer becomes susceptible to the common-mode noise.

Nevertheless, the differences are within an acceptable range.

Theoretically, Topology 1 and Topology 2 have to be

operated for exactly , in order to obtain continuous input

current waveform. However, practical MOSFET has finite

turn-on and turn-off time. Thus, a short dead time is added

between the gate signals applying to QSs and s in the

respective cell in order to avoid overlap of the two topologies.


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(a)

(b)

Fig. 13. Small-signal frequency characterizations of the prototype converter.(a) Loop gain T

O L

. (b) Closed-loop input-to-output transfer characteristicsG

o g ; C L

.

In this prototype, a dead time of 60 ns is added and a small

capacitor of 10 nF is added across the input in order to smooththe input current.

V. CONCLUSION

A generalized -stage SC-based step-up dc/dc converter

which uses no magnetic element was designed and analyzed.

The design criteria, constraints of operation, and the control

philosophy were given. The converter presents all the positive

characteristics of previous SC converters. It can also provide

the adjustable voltage conversion ratio, which is independent

on circuit structure and gives better input current waveform

and regulation capability than previous SC converters. A

two-stage 5 V 12 V step-up converter prototype has been

built at a nominal output power of 30 W. The use of onlyMOSFET switches and multilayer ceramic capacitors and no

inductor/transformer assures small size, light weight, and high

power density realization. Further research will be dedicated

to the development of ac/dc and dc/ac converters by applying

the principle of this paper.

REFERENCES

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[3] F. Ueno, T. Inoue, T. Umeno, and I. Oota, Analysis and applicationof switched-capacitor transformers by formulation, Electron. Commun.

Japan Pt. IIElectron., vol. 73, no. 9, pp. 91103, Sept. 1990.[4] T. Umeno, K. Takahashi, F. Ueno, T. Inoue, and I. Oota, A new

approach to low ripple-noise switching converters on the basis ofswitched-capacitor converters, in Proc. IEEE Int. Symp. Circuits Sys-tems, June 1991, pp. 10771080.

[5] F. Ueno, T. Inoue, and I. Oota, Realization of a switched-capacitor AC-DC converter using a new phase controller, in Proc. IEEE Int. Symp.Circuits Systems, June 1991, pp. 10571060.

[6] F. Ueno, T. Inoue, I. Oota, and I. Harada, Power supply for electrolu-minescene aiming integrated circuits, in Proc. IEEE Int. Symp. CircuitSystems, May 1992, pp. 19031906.

[7] R. Marusarz, A switches capacitor, inductorless DC to AC voltage step-up power converters, in Proc. IEEE Power Electron. Special Conf. Rec.,June 1989, pp. 99103.

[8] S. V. Cheong, S. H. Chung, and A. Ioinovici, Development of powerelectronics converters based on switched-capacitor circuits, in Proc.

IEEE Int. Symp. Circuits Systems., May 1992, pp. 19071910.[9] S. V. Cheong, S. H. Chung, and A. Ioinovici, Inductorless dc-to-dc

converter with high power density, IEEE Trans. Ind. Electron., vol. 41,pp. 208215, Apr. 1994.

[10] O. C. Mak, Y. C. Wong, and A. Ioinovici, Step-up dc power supplybased on a switched-capacitor circuit, IEEE Trans. Ind. Electron., vol.42, pp. 9097, Feb. 1995.

[11] H. Chung, B. O, and A. Ioinovici, Switched-capacitor-based dc-to-dcconverter with improved input current waveform, in Proc. IEEE Int.

Symp. Circuits Systems, May 1996, pp. 541544.[12] Principles and applications of the ICL 7660 CMOS voltage converter,

in Intersil Applications Handbook, 1988.[13] Applications of the LTC 1144, in Linear Technology Handbook, 1993.[14] MAX828/829 switched-capacitor voltage inverter, in Maxim Applica-

tions Databook, 1997.[15] R. Schaumann, M. S. Ghausi, and K. R. Laker, Design of Analog Filters:

Passive, Active RC, and Switched Capacitor. Englewood Cliffs, NJ:Prentice-Hall, 1990.

[16] M. S. Makowski, Realizability conditions and bounds on synthesisof switched-capacitor dc-dc voltage multiplier circuits, IEEE Trans.Circuit Systs. I, vol. 44, pp. 684691, Aug. 1997.

[17] H. Ott, Noise Reduction Techniques in Electronic Systems. New York:Wiley, 1989.

[18] A. S. Sedra and K. C. Simth, Microelectronic Circuits, 4th ed. London,U.K.: Oxford Univ. Press, 1998.

[19] G. Zhu and A. Ioinovici, Switched-capacitor power supplies: DC

voltage ratio, efficiency, ripple, regulation, in Proc. IEEE Int. Symp.Circuits Systems, May 1996, pp. 553556.

[20] K. D. T. Ngo and R. Webster, Steady-state analysis and design ofa switched-capacitor dc-dc converter, IEEE Trans. Aerosp. Electron.Syst., vol. 30, pp. 92101, Jan. 1994.

[21] R. D. Middlebrook and S. Cuk, A general unified approach to modelingswitching-converter power stages, in Proc. IEEE Power Electron. Spec.Conf. Rec., June 1976, pp. 1834.

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Henry Shu-hung Chung (S92M95) received theB.Eng. (with First Class Honors) and the Ph.D.degrees in electrical engineering from the Hong

Kong Polytechnic University, Hong Kong, China,in 1991 and 1994, respectively.Since 1995 he has been with the City University

of Hong Kong, where he is currently an AssociateProfessor in the Department of Electronic Engi-neering. His research interests include time- andfrequency-domain analysis of power electronic cir-cuits, switched-capacitor-based converters, random-

switching techniques, and soft-switching converters. He has authored over 85technical papers in his current research area.

Dr. Chung was the recipient of the China Light and Power Prize and wasawarded the Scholarship and Fellowship of the Sir Edward Youde MemorialFund in 1991 and 1993, respectively. He is currently Chairman of the Councilof the Sir Edward Youde Scholars Association and is an IEEE studentbranch counselor. He was Track Chair of the technical committee on powerelectronics circuits and power systems of the IEEE Circuits and SystemsSociety in 19971998.

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