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B
C
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D
D
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E
1 1
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Cover Sheet
1 70Tuesday, February 07, 2006
Compal Electronics, Inc.
2006-01-20
COMPAL P/N :PCB NO :
COMPAL CONFIDENTIALMODEL NAME : HAL00
Travis (DIS) Schematics Document
uFCPGA Mobile YonahIntel Calistoga + ICH7M
REV : 1.0 (DELL: A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-2792
PCB P/N: DAA0000051LBOM NO. 45135731L01
45135731L01
Part Number Description
DAA0000050L PCB ZJX LA-2792REV0 MB DIS
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Block Diagram
2 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Clock Generator
USB Ports X2
uFCPGA CPU
INTEL
DMI
H_D#(0..63)H_A#(3..31)
Compal confidentialModel : HAL00
AMP & INT.Speaker
Pentium-M
Block Diagram
Azalia Codec
Power On/OffSW & LED
System Bus
INTEL
Memory BUS(DDR2)
FSB 533/667 MHz
+1.5V_RUN 100MHz
+1.8V_SUS 533 / 667MHz
48MHz
ATA100
MDC
1466pin BGA
SLG84450VTR
STAC9200
Azalia I/F
Calistoga
ICH7-M
RJ11
HeadPhone &MIC Jack
D Moudle+5V_RUN
+VDDA
+5V_SUS+3.3V_RUN
+5V_SUS
+1.8V_SUS
+1.5V_RUN
+1.05V_VCCP (1.05V)
+VCC_CORE
+1.05V_VCCP (1.05V)
+3.3V_RUN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
478pin
USB[3,4]
DC/DC Interface
CPU ITP PortFAN1_VOUTYonah-2M
+3.3V_RUN
SATA
+2.5V_RUN
+3.3V_RUN
VCORE (IMVP-6)
1.5V/1.05V
CHARGER
1.8V/0.9V
BATT IN
DC IN
3V/5V/15V
GUARDIAN IIEMC4000
Thermal
+3.3V_SUS
FAN
S-HDD+5VHDD
+1.05V_VCCP
Power Sequence
DELL CONFIDENTIAL/PROPRIETARY
652pin BGA
page 7,8
page 18page 18
page6page 7
page 10,11,12,13,14,15
page 21,22,23,24
page 47
page 25 page 25 page 26
page 33
page 48
page 49
page 50
page 44
page 45
page 46
page 42
page 43
page 41
page 27page 27
page 16,17
page 37COM
+3.3V_ALWST M25P80
page 40
Int.KBD &Stick
SMSC KBC
+3.3V_ALW
+RTC_CELL
MEC5004
page 39
page 40
SPI
LPC BUS+3.3V_RUN33MHz
SMSC SIO
+5V_RUN
+3.3V_ALW
Touch Pad
ECE5018page 38
USB[2]
USB[1]
USB Ports X2+5V_SUS page 32
HUB USB[3]
USB[5,6]
SIDE
REAR
HUB USB[1]
HUB USB[2]
page 39
page 37FIR
BATT SELECTpage 51
HUB USB[3]
PCI-E 16X
LVDS CONNpage 19
page 52,53,54,55,56,57,58
NVG72-M-V
CRT CONNpage 20
DOCKINGBUFFER
PAGE 35
DOCKINGPORT
PAGE 36 page 30
PCI BUS
CardBusOZ601 TQFP
+3.3V_RUN 33MHz
IDSEL:AD17(PIRQC,D#,GNT#1,REQ#1)
+3.3V_RUN
HUB USB[2]USB[0]
Mini Card2
+3.3V_RUN
WLANMini Card 1
+3.3V_RUN
PCI Express BUS
+1.5V_RUN+1.5V_RUN page 29
GIGA Enthernet
+3VLAN
RJ45
+3.3V_RUN/ +1.5V_RUN 100MHz
page 34
BCM5752WWANpage 34
DVI
RGB
TV
HUB USB[1]USB[7]
Bluetooth+3.3V_RUN
HUB USB[4]
Smart Card+3.3V_RUN page 31
OZ77C6
IO/B
SLOT
USB3 on the top of connector,USB4 on the bottom
USB5 on right side ofconnector, USB6 on left side
Stick
INT MIC+5V_SUS
+1.05V_VCCP
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
page 33
SPI
+5V_RUN
+INV_PWR_SRC+LCDVDD
+1.2VRUN+VDD_CORE(1.1V)
+5V_RUN
IO/B
+3.3V_RUN
IO/B
IO/B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Index and Config.
3 70Tuesday, February 07, 2006
Compal Electronics, Inc.
PIRQ
C
PM TABLE
ON
ON
AD17
OFF
PCI DEVICE
TABLE
CARD BUS
IDSEL
S0
TABLE
1
PCI
ON
ON
S3
USB
ON
OFF
ON
OFF
S1
S5 S4/AC don't exist
REQ#/GNT#
ON
powerplane
S5 S4/AC
ON
ON
State
OFFOFF
OFF
0
1
7
USB PORT# DESTINATION
5,6 REAR
2
USB Hub (5018)
Docking
SIDE Blue tooth3,4
Tolerance0.1U_0402_6.3VXX
Ceramic Capacitors :
Temperature CharacteristicsRated VoltagePackage SizeValue
CH
A
Capacitor Spec Guide:
1
SL
CODE
COG SJ
9
B
+-3%
CODE
Symbol F
+40,-20%+-20%
4
G
+20,-10%
X
UK
5
B
Z
C
+-0.05PF
Y5V
Temperature Characteristics:
Y5P
CK
V
+-0.1PF
X5R
A
Z5U
BJ
+100,-0%
Y5U X7R
P
+-30%
C
SH
8
H
CJ
+30,-10%
K
+-5%
7
Q
+80,-20%
6
+-0.5PF +-1PF
Z5V
+-10%
J
+-0.25PF
Tolerance:
+-2%
N
D
Z5P
2
UJ
D E F G
H I J
30Symbol
X6SNPO
K
X5S
M
ValuePackage SizeRated VoltageToleranceLow ESR Mark : 45 m ohm
10U_D2_10VX_R45
Tantalum or Polymer Capacitors :
@XX : Depop component
NOTE1:
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D Moudle
1
2
USB HUB DESTINATION
4
3
PC Card Bay
Mini 1(WWAN)
Mini 2(WLAN)
Smart Card --> BIO
+1.5V_RUN
+1.05V_VCCP+2.5V_RUN
+3.3V_SUS+5V_SUS
+3.3V_RUN+5V_RUN
+1.8V_RUN+15V_SUS
+1.8V_SUS+VCC_CORE
+5V_ALW+3.3V_ALW
+3.3V_SRC
+0.9V_DDR_VTT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Power Rail
4 70Tuesday, February 07, 2006
Compal Electronics, Inc.
+5V_ALW
+5V_SUS
BATTERY
+PWR_SRC
+3.3V_SRC
+3.3V_RUN
ADAPTER
SU
S_O
N
RU
N_O
N
+5V_SATA +5V_RUN +VDDA
AUD
IO_A
VD
D_O
N
(Opt
ion)
+2.5V_RUN
MAX8734
EMC4000
RU
N_O
N
L47
793475
FDS4435 +INV_PWR_SRCRUN_ON
SI4800
SI3456
SI3456
HD
DC
_EN
#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SI3456
ENAB
_3V
LAN
+3VLAN
MOD(+5V_RUN)
ALWON
SI3456
MO
DC
_EN
#
SU
S_O
N
MAX8632
+VCC_CORE
RU
NP
WR
OK
ISL6260
+1.2VRUNP +VCC_GFX_CORE
RU
N_O
N
RU
N_O
N
PL8
+15V_SUS
SI4800
+3.3V_SUS
+3.3V_ALWALWON
SI4800
+1.5V_RUN
RU
N_O
N
MAX88550
+1.8V_RUN
RU
NP
WR
OK
+0.9V_DDR_VTT
SU
SP
WR
OK
_5V
ISL6227
RU
N_O
N
+1.8V_SUS+1.05V_VCCP
RU
NP
WR
OK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
SMBUS TOPOLOGY
5 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_SUS
2N7002
CHARGER
8
7
5
6
7
8
SMBUS Address [D2]
SMBUS Address [2F]DIMM1
DIMM0
+3.3V_ALW
8.2K8.2K
WWANSMBUS Address [TBD]
3032
WLAN
3032
SMBUS Address [TBD]
CLK_SCLK
CLK_SDATA2N7002
+3.3V_RUN
2.2K 2.2K 2.2K 2.2K
+3.3V_ALW
100
10K 10K
SMBUS Address [A0]
SMBUS Address [A2]
195
195
197
197
B22
C22
17
16
CLK GEN.
Macallan IV
ICH7-M
DAT_SMB
39
40
+3.3V_ALW
CLK_SMB
GUARDIAN
ICH_SMBDATA
+3.3V_SUSICH_SMBCLK
100
100
SMBUS Address [16]
PBAT_SMBCLK
PBAT_SMBDAT +3.3V_ALWBATTERYCONN
5752MLOM
C8C7
SMBUS Address [C8]
100
SMBUS Address [16]
SMBUS Address [12]
3
4
9
10
SBAT_SMBDAT111
112
+3.3V_ALW
+3.3V_ALW
2'ndBATTERY
SMBUS Address [58]5
6
3
4
SBAT_SMBCLKInverter INV
4.7K 4.7K
8.2K 8.2K
SMBUS Address [C4, 72, 70, 48]+3.3V_ALW10
+3.3V_ALW
DOCKING9 DOCK_SMB_DAT
SIO
DOCK_SMB_CLK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_ITP#
CLK_CPU_ITP
CLK_CPU_ITP#
CPU_ITP
H_STP_CPU#
H_STP_PCI#
CLK_MCH_BCLK#MCH_BCLK#
CPU_BCLK
CLK_CPU_BCLK#CPU_BCLK#
CLK_CPU_BCLK
+CK_VDD_A
+CK_VDD_MAIN
CLK_XTAL_IN
FSB
FSA
FSC
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_ITP#
CLK_CPU_ITP
CLK_PCIE_LOM#
CLK_PCIE_LOM
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_ICH#
CLK_PCIE_ICH
ICH_SMBDATA
ICH_SMBCLK
CLK_SDATA
CLK_SCLK
FSB
FSC
CLK_ICH_48M FSA
CLKREFCLK_ICH_14MCLK_SIO_14M
CLK_ENABLE#
CLKIREF
CLK_SDATA
CLK_SCLK
FCTSEL1
CLK_PCI_LOM PCI_LOM
DOCKPCI_33MCLK_DOCKPCI_33M
CLK_PCI_PCM PCI_PCM
FCTSEL1
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
CLK_MCH_BCLKMCH_BCLK
PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
PCIE_MINI2#
CLK_PCI_5018
CLK_PCI_ICH PCI_ICH
PCIE_VGA
CLK_PCIE_VGA#PCIE_VGA#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_SMC_48M
CLK_PCI_5004
CLK_NVSSCLK_NVSS_27M
CLK_NVCLK_NV_27M
MCH_3GPLL CLK_MCH_3GPLL
CLK_MCH_3GPLL#MCH_3GPLL#
PCIE_SATA
CLK_PCIE_SATA#PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_LOMPCIE_LOM
CLK_PCIE_LOM#PCIE_LOM#
PCIE_ICH
PCIE_ICH#
CLK_PCIE_ICH
CLK_PCIE_ICH#
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
+CK_VDD_REF
+CK_VDD_48
+CK_VDD_48+CK_VDD_A +CK_VDD_REF
CLK_XTAL_OUT
+CK_VDD_MAIN
+CK_VDD_MAIN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
H_STP_CPU# 23
H_STP_PCI# 23
CLK_MCH_BCLK# 10
CLK_MCH_BCLK 10
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
MCH_CLKSEL2 10 MCH_CLKSEL1 10
CPU_BSEL28 CPU_BSEL18
ICH_SMBCLK23,28,34
ICH_SMBDATA23,28,34 CLK_SDATA 16,17
CLK_SCLK 16,17
CLK_ICH_14M23CLK_SIO_14M38
CLK_PCI_LOM28
CLK_DOCKPCI_33M36
CLK_PCI_PCM30
CLK_PCIE_MINI2 34
CLK_PCIE_MINI2# 34
MINI2CLK_REQ# 34
CLK_PCI_501838
CLK_PCI_ICH21
CLK_PCIE_VGA# 52
CLK_PCIE_VGA 52
CLK_SMC_48M31
CLK_PCI_500439
CLK_ICH_48M23
CLK_NVSS_27M52
CLK_NV_27M52
CLK_MCH_3GPLL 10
CLK_MCH_3GPLL# 10
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
CLK_PCIE_LOM 28
CLK_PCIE_LOM# 28
CLK_PCIE_ICH# 23
CLK_PCIE_ICH 23
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
MINI1CLK_REQ# 34
CLK_3GPLLREQ# 10
SATA_CLKREQ# 23
LOM_CLKREQ# 28
CLK_ENABLE#49
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Clock Generator
6 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Place crystal within500 mils of CK410
31
G S
2N7002
2
D
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU
MHzSRCMHz
PCIMHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
0 0 0
00
0
0
0
00
0
0
1
1
1 1
1
1
1
1 1
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
Place near each pinW>40 mil
Place near CK410+
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Reserve
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0
1
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
(UMA)
(DIS)*
NOTE: Place Decoupling as close as physically possilble to the VDD pins
Solder Thermal Pad to GND. Add min. 4 vias.
C3440.1U_0402_16V4Z~D
1
2
C52
0.04
7U_0
402_
16V4
Z~D
1
2
R29010K_0402_5%~D
12
R302 33_0402_5%~D
12
R338 49.9_0402_1%~D
12
R345 33_0402_5%~D
1 2
C32927P_0402_50V8J~D
12
R299 10K_0402_5%~D
1 2
R1394 33_0402_5%~D
1 2
R385 49.9_0402_1%~D
1 2
R394 33_0402_5%~D
1 2R1438 12.1_0402_1%~D
12
R1395 10K_0402_5%~D
1 2
C61
0.04
7U_0
402_
16V4
Z~D
1
2 C50
4.7U
_060
3_6.
3V4Z
~D 1
2
R377 49.9_0402_1%~D
12
R403 49.9_0402_1%~D
1 2
R402 33_0402_5%~D
1 2
R1393 33_0402_5%~D
1 2
R362 475_0402_1%~D
1 2
R349 49.9_0402_1%~D
12C40210U_0805_10V4Z~D
1
2
R1639 33_0402_5%~D
1 2
R1641 49.9_0402_1%~D
1 2
R399 49.9_0402_1%~D 1 2
C68
4.7U
_060
3_6.
3V4Z
~D 1
2
R392 49.9_0402_1%~D
1 2
R543 49.9_0402_1%~D
1 2
R1435 33_0402_5%~D
1 2
R1436 33_0402_5%~D
1 2
R366 33_0402_5%~D
1 2
C580.1U_0402_16V4Z~D
1
2
R316
10K_0402_5%~D
1 2
C3840.1U_0402_16V4Z~D
1
2
R3300_0402_5%~D
1 2
C3890.1U_0402_16V4Z~D
1
2
R348 33_0402_5%~D
1 2
R331 33_0402_5%~D
12
C33327P_0402_50V8J~D
12
R27110K_0402_5%~D
12
C51
0.04
7U_0
402_
16V4
Z~D 1
2
X2
14.31818MHz_20P_1BX14318CC1A~D
12
R7391_0402_5%~D
12
R32470_0402_5%~D 1 2
R370 33_0402_5%~D
1 2
R1761 10K_0402_5%~D@1 2
C700.1U_0402_16V4Z~D
1
2
R365 49.9_0402_1%~D
1 2
L32BLM21PG600SN1D_0805~D
1 2
R294 33_0402_5%~D
12
R3540_0402_5%~D
1 2
R400 33_0402_5%~D
1 2
G
D S
Q362N7002W-7-F_SOT323~D
2
1 3
R1762 10K_0402_5%~D
1 2
C640.1U_0402_16V4Z~D
1
2
R2732.2_0603_5%~D
1 2
R321 33_0402_5%~D
1 2
R393 49.9_0402_1%~D 1 2
U16
SLG84450VTR_QFN72~D 5.1
VDDSRC1VDDSRC49
VDDSRC65
VDDPCI30VDDPCI36
VDD4840
VDDCPU12
VDDREF18
USB_48MHz/FSLA41
FSLB/TEST_MODE45
X219
X120
GNDPCI31
PCICLK232
REF0/FSLC/TEST_SEL23
SMBDAT17
SMBCLK16
ITP_EN/PCICLK_F037
IREF9
CPU_STOP# 24
CPUT1 11
CPUC1 10
CPUT_ITP/SRCT10 6
PCICLK333
PCICLK4/FCTSEL134
CPUC0 13
CPUT0 14
PCI_SRC_STOP# 25
GNDA 8
VDDA 7
GNDPCI35
CPUC_ITP/SRCC10 5
GNDREF21
GNDCPU15
GNDSRC4
GND4842
GNDSRC68
DOTT_96MHz/27MHz43
DOTC_96MHz/27MHz(SS)44
Vtt_PwrGd#/PD39
REF122 SRCT7 66
SRCC7 67
SRCT8 70
SRCC8 69
SRCT9 3
SRCC9 2
SRCC1 51
LCD100/96/SRC0_T 47
SRCT2 52
SRCT4 58
SRCT1 50
CLKREQ4# 57
SRCC2 53
SRCC5 61
SRCC4 59
SRCT5 60
LCD100/96/SRC0_C 48
SRCC3 56
SRCT3 55
SRCT6 63
SRCC6 64
CLKREQ6# 62
CLKREQ8# 71
CLKREQ9# 72
CLKREQ1# 46
CLKREQ5# 29
CLKREQ3# 28
CLKREQ2# 26
CLKREQ7# 38
VDDSRC54
PCICLK127
THRM_PAD73
THRM_PAD76
THRM_PAD74THRM_PAD75
R542 49.9_0402_1%~D
1 2
R1642 49.9_0402_1%~D
1 2
R1638 33_0402_5%~D
1 2
R1763 10K_0402_5%~D
1 2
R374 49.9_0402_1%~D
1 2
C30810U_0805_10V4Z~D
1
2
R544 49.9_0402_1%~D
1 2
C326
0.1U_0402_16V4Z~D
1
2
R2741_0603_5%~D
1 2
R381 49.9_0402_1%~D
1 2
R376 33_0402_5%~D
1 2
R360 49.9_0402_1%~D
12
R337 33_0402_5%~D
1 2
R322 49.9_0402_1%~D
12
R397 33_0402_5%~D
1 2
L40BLM21PG600SN1D_0805~D
1 2
R292 10K_0402_5%~D
1 2
R1619 12.1_0402_1%~D
12
C3300.1U_0402_16V4Z~D
1
2
G
D S
Q382N7002W-7-F_SOT323~D
2
1 3
R266 12.1_0402_1%~D
1 2
R4012.2_0603_5%~D
1 2
R250 12.1_0402_1%~D
1 2
R1621 150_0402_5%~D
12
R390 33_0402_5%~D
1 2
R368 33_0402_5%~D
1 2
R298 12.1_0402_1%~D
12
R1640 10K_0402_5%~D
1 2
R375 33_0402_5%~D
1 2
R1589 12.1_0402_1%~D
1 2
R27810K_0402_5%~D
@
12
R369 49.9_0402_1%~D
12
R531
8.2K_0402_5%~D
12
R158233_0402_5%~D
12
R545 49.9_0402_1%~D
1 2R
270
2.2K
_040
2_5%
~D
12
R359 33_0402_5%~D
1 2
R2752.2K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#28
H_FERR#
H_ADSTB#0
H_D#52
H_D#20H_A#23
H_REQ#2
H_D#10
H_D#5
H_D#49
H_D#3
H_A#31
H_REQ#0
H_D#39
H_D#57
H_D#29
H_A#17
H_IGNNE#
H_D#34
H_D#14
H_BNR#
H_A#29
H_DSTBP#0
H_D#51
H_D#22
H_A#8
H_DEFER#
H_INIT#
H_REQ#1
H_D#50
H_D#48
H_D#0H_A#3
H_RS#0
H_DSTBN#1
H_D#58
H_D#28
H_A#6
ITP_BPM#2
H_BPRI#
H_ADS#
H_A#25
ITP_BPM#3
H_RS#1
H_DSTBP#1
H_D#46
H_D#41
H_D#12
H_A#4
H_IERR#H_HITM#
H_DSTBN#0
H_D#47
H_D#37
H_INTR
H_DSTBN#2
H_D#9
H_D#7
H_A#22
H_A#7
H_REQ#4
H_D#31
H_D#13
ITP_DBRESET#
H_DRDY#
H_A#15H_A#14
H_A20M#
H_D#27
H_D#25
H_D#4
H_DSTBP#2
H_D#56
H_D#35
H_D#59
H_D#63
H_D#45
H_D#24
H_D#30
H_D#55
H_D#40
H_D#19
H_D#62
H_D#44
H_D#23
H_D#2
H_D#8
H_D#6
H_D#54
H_D#33
H_D#18
H_D#16
H_D#61
H_D#43
H_D#1
H_D#26
H_DSTBN#3
H_D#53
H_D#32
H_D#11
H_DSTBP#3
H_D#38
H_D#36
H_D#17
H_D#15
H_NMI
H_D#60
H_D#42
H_D#21
H_A#30
H_A#27
H_A#18
H_A#10
H_BR0#
H_LOCK#
H_A#11
H_A#21
H_A#26
H_A#13
H_A#9
H_DPSLP#
H_A#20
H_A#16
H_A#12
H_HIT#
H_ADSTB#1
H_THERMTRIP#
H_DBSY#
H_A#19
H_A#24
H_A#5
H_RS#2
H_RESET#
ITP_BPM#1
H_REQ#3
H_SMI#H_STPCLK#
ITP_TCK
ITP_TRST#ITP_TMS
H_CPUSLP#
ITP_TDOITP_TDI
ITP_BPM#5
H_DPWR#ITP_BPM#4
H_DPRSTP#
H_THERMTRIP#
H_TRDY#
CLK_CPU_BCLKCLK_CPU_BCLK#
ITP_BPM#0
ITP_TDIITP_TMS
ITP_TCK
ITP_TRST#
ITP_TDO
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#4
ITP_BPM#5
ITP_DBRESET#
ITP_TDO
ITP_TMS
ITP_TDI
ITP_TRST#
ITP_TCK
ITP_DBRESET#
ITP_TCK
ITP_BPM#3
CLK_CPU_ITP#CLK_CPU_ITP
H_RESET#
H_THERMDCH_THERMDA
TEST2
H_RESET#
ITP_BPM#5
TEST1
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_SUS
H_THERMTRIP#18
H_THERMDA18H_THERMDC18
H_ADS#10
H_REQ#[0..4]10
H_A#[3..31]10
H_BPRI#10H_BNR#10
H_DEFER#10
H_HITM#10
H_BR0#10
H_HIT#10
H_D#[0..63] 10
H_DPSLP#22
H_RESET#10
H_DRDY#10
H_RS#[0..2]10
H_ADSTB#010
H_DSTBP#[0..3] 10
H_ADSTB#110
H_DSTBN#[0..3] 10
H_DINV#0 10
H_DINV#2 10
H_DBSY#10
H_DINV#1 10
H_IGNNE# 22
H_LOCK#10
H_INTR 22H_NMI 22
H_DINV#3 10
H_INIT# 22
H_FERR# 22
ITP_DBRESET#23,39
H_A20M# 22
H_STPCLK# 22H_SMI# 22
H_PWRGOOD22H_CPUSLP#10,22
H_DPWR#10
CPU_PROCHOT#38
H_DPRSTP#22,49
H_TRDY#10
CLK_CPU_BCLK6CLK_CPU_BCLK#6
CLK_CPU_ITP#6CLK_CPU_ITP6
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Yonah in mFCPGA479
7 70Tuesday, February 07, 2006
Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
This shall place near CPU
Pop R1378 required byIntel for B0 Yonah. Backward compatible forA0 and A1 Yonah
JITP
MOLEX_52435-2891_28P~D@
TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13
BPM4#15
BPM3#17
BPM2#19
BPM1#21
BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128
GND114
GND216
GND318
GND420
GND522
3030
2929
R41551_0402_5%~D
1 2
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAHJCPUA
TYCO_1-1674770-2_Yonah~D
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
R3354.9_0402_1%~D 1 2
R43422.6_0402_1%~D
1 2
R43627.4_0402_1%~D
1 2
R41651_0402_5%~D 1 2
R38739.2_0402_1%~D
1 2
R39856_0402_5%~D 1 2
R1378 51_0603_1%~D
12
R42256_0402_5%~D
1 2
R391680_0402_5%~D
1 2
C71
0.01
U_0
402_
16V7
K~D
@
1
2
R42422.6_0402_1%~D
1 2
C72
0.01
U_0
402_
16V7
K~D
@
1
2
R13871K_0603_1%~D
@
12
R367150_0402_1%~D
1 2
R417150_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP3COMP2
H_PSI#
COMP1COMP0
VID1VID0
VID3VID4
VID2
VID5VID6
CPU_BSEL1CPU_BSEL2
CPU_BSEL0
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
+1.05V_VCCP
+VCC_CORE
+1.05V_VCCP
V_CPU_GTLREF
V_CPU_GTLREF
+1.5V_RUN
+VCC_CORE
+VCC_CORE
H_PSI#49
VID049VID149VID249VID349VID449VID549VID649
CPU_BSEL16CPU_BSEL26
CPU_BSEL010
VCCSENSE49VSSSENSE49
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Yonah in mFCPGA479
8 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
R_B
R_A
Layout close CPU PIN AD26
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.5 inch (max)
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Length match within 25 mils
Layout close CPU
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH
JCPUB
TYCO_1-1674770-2_Yonah~D
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
R12
927
.4_0
402_
1%~D
12
R46
527
.4_0
402_
1%~D
12
R1472K_0402_1%~D
12
R555100_0402_1%~D 1 2
R556100_0402_1%~D 1 2
POWER, GROUND
YONAH
JCPUC
TYCO_1-1674770-2_Yonah~D
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R12
454
.9_0
402_
1%~D
12
R45
754
.9_0
402_
1%~D
12
C87
10U
_080
5_4V
AM~D
1
2
C88
0.01
U_0
402_
16V7
K~D
1
2
R1401K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
CPU Bypass
9 70Tuesday, February 07, 2006
Compal Electronics, Inc.
22uF 0805 X5R -> 85 degree C
High Frequence Decoupling
7mOhmPS CAP
ESR <= 1.5m ohmCapacitor > 1980uF
Near VCORE regulator.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these insidesocket cavity on L8(North sideSecondary)
Place these insidesocket cavity on L8(Sorth sideSecondary)
Place these insidesocket cavity on L8(North sidePrimary)
Place these insidesocket cavity on L8(Sorth sidePrimary)
South Side Secondary
Place these insidesocket cavity on L8(North sideSecondary)
CRB was 270uF
North Side Secondary
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
7mOhmPS CAP
The caps need change to ESR=6m ohms
C44810U_0805_4VAM~D
1
2
C43210U_0805_4VAM~D
1
2
C10010U_0805_4VAM~D
1
2
C10210U_0805_4VAM~D
1
2
C4150.1U_0402_10V7K~D
1
2
C4160.1U_0402_10V7K~D
1
2
C47010U_0805_4VAM~D
1
2
C14110U_0805_4VAM~D
1
2
C42710U_0805_4VAM~D
1
2
C44710U_0805_4VAM~D
1
2
+
C35
433
0U_D
_2.5
VM_R
6M~D
@
1
2
C44610U_0805_4VAM~D
1
2
C9810U_0805_4VAM~D
1
2
C4620.1U_0402_10V7K~D
1
2
C14010U_0805_4VAM~D
1
2
C13910U_0805_4VAM~D
1
2
C11910U_0805_4VAM~D
1
2
C14210U_0805_4VAM~D
1
2
C9910U_0805_4VAM~D
1
2
+
C36
533
0U_D
_2.5
VM_R
6M~D
1
2
C42810U_0805_4VAM~D
1
2
+
C49
633
0U_D
_2.5
VM_R
6M~D
1
2
+
C35
233
0U_D
_2.5
VM_R
6M~D
1
2
C46810U_0805_4VAM~D
1
2
+
C61
833
0U_D
_2.5
VM_R
6M~D
@
1
2
C43110U_0805_4VAM~D
1
2
C4390.1U_0402_10V7K~D
1
2
C47210U_0805_4VAM~D
1
2
C4140.1U_0402_10V7K~D
1
2
C46910U_0805_4VAM~D
1
2
C9710U_0805_4VAM~D
1
2
+
C49
733
0U_D
_2.5
VM_R
6M~D
1
2
C13810U_0805_4VAM~D
1
2
C47110U_0805_4VAM~D
1
2
C13710U_0805_4VAM~D
1
2
C46610U_0805_4VAM~D
1
2
+
C37
233
0U_D
2E_2
.5VM
_R9~
D@
1
2
C47310U_0805_4VAM~D
1
2
C42610U_0805_4VAM~D
1
2
C42910U_0805_4VAM~D
1
2
C12010U_0805_4VAM~D
1
2
C46710U_0805_4VAM~D
1
2
C43010U_0805_4VAM~D
1
2
C4510.1U_0402_10V7K~D
1
2
C43310U_0805_4VAM~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWNG1
H_SWNG0
H_VREF
THERMTRIP_MCH#
PM_EXTTS#0V_DDR_MCH_REF
M_OCDOCMP1
PM_EXTTS#1
H_RS#0
H_ADSTB#1
H_A#28
H_A#15
H_SWNG1
H_XRCOMP
H_D#16
H_D#10
MCH_CLKSEL1
H_REQ#0
H_A#16
H_D#62
H_D#60
H_D#19
H_D#7
H_D#0
CFG7
CFG5
DDR_CKE0_DIMMA
M_CLK_DDR3
H_HIT#
H_DSTBP#0
H_REQ#4
H_A#20
H_A#17
H_A#13
H_SWNG0
H_D#53
H_D#39H_D#38
H_D#32
H_D#13
DDR_CKE1_DIMMA
M_OCDOCMP0
DMI_MRX_ITX_N0
H_BNR#
H_REQ#2
H_A#8
H_D#59
H_D#27
H_D#20
M_ODT1
H_DSTBP#2
H_A#26
H_A#19
H_D#58
H_D#48
H_D#46
H_D#40
H_D#8
CFG13
M_CLK_DDR#0
H_REQ#3
H_D#44
H_D#12
H_D#3
H_D#1
CFG9
H_REQ#1
H_A#7
H_YSCOMP
H_D#43
H_D#35
H_D#31
H_D#25H_D#24
ICH_PWRGD
CPU_BSEL0
DDR_CKE3_DIMMB
H_BPRI#
H_A#22
H_D#61
H_D#56
H_D#21
H_D#11
H_D#6
CFG18
M_CLK_DDR#1
H_CPUSLP#
H_ADS#
H_DSTBP#3
H_DSTBN#3
H_A#27
H_A#6
H_A#3
H_D#37
H_D#33
H_D#30
CFG16
M_OCDOCMP0
H_D#63
H_D#51
H_D#9
H_D#2
PLTRST_R#
CFG19
CFG12
DDR_CS1_DIMMA#
SMRCOMPN
V_DDR_MCH_REF
H_DSTBP#1
H_RS#2
H_ADSTB#0
H_A#25
H_D#50
H_D#41
H_D#36
H_D#23
H_D#4
DDR_CKE2_DIMMB
H_LOCK#
H_RESET#
H_A#12H_A#11
H_D#54
H_D#42
M_ODT3
M_OCDOCMP1
M_CLK_DDR#2
H_DBSY#
H_BR0#
H_DSTBN#1H_DSTBN#0
H_A#18
H_A#10
H_D#52
H_D#45
H_D#28
H_D#22
CFG20
H_DSTBN#2
H_RS#1
H_A#14
H_XSCOMP
H_D#29
MCH_CLKSEL2
DDR_CS0_DIMMA#
SMRCOMPP
M_CLK_DDR#3
H_A#21
H_D#47
H_D#34
H_D#18
CFG11
DDR_CS3_DIMMB#
H_HITM#
H_DRDY#
H_A#31H_A#30H_A#29
H_A#24H_A#23
H_D#55
H_D#49
H_D#17
H_D#15
PM_EXTTS#1PM_EXTTS#0
DDR_CS2_DIMMB#
M_ODT2
M_ODT0
H_DEFER#
H_TRDY#
H_A#9
H_A#5H_A#4
H_D#57
H_D#26
H_D#14
H_D#5
M_CLK_DDR2M_CLK_DDR1M_CLK_DDR0
H_VREF
H_YRCOMP
DMI_MRX_ITX_N1DMI_MRX_ITX_N2DMI_MRX_ITX_N3
DMI_MRX_ITX_P0DMI_MRX_ITX_P1DMI_MRX_ITX_P2DMI_MRX_ITX_P3
DMI_MTX_IRX_N0DMI_MTX_IRX_N1DMI_MTX_IRX_N2DMI_MTX_IRX_N3
DMI_MTX_IRX_P0DMI_MTX_IRX_P1DMI_MTX_IRX_P2DMI_MTX_IRX_P3
CFG3
CFG17
CFG4
CFG15
CFG8
CFG6
CFG10
CFG14
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN
+1.8V_SUS
+1.05V_VCCP
+1.5V_RUN
H_A#[3..31] 7H_D#[0..63]7
H_REQ#[0..4] 7
H_ADSTB#1 7H_ADSTB#0 7
H_TRDY# 7
H_HIT# 7H_LOCK# 7
H_DEFER# 7
H_BPRI# 7
H_BR0# 7
H_RESET# 7
H_DPWR# 7H_DRDY# 7
H_DBSY# 7
CLK_MCH_BCLK# 6CLK_MCH_BCLK 6
H_BNR# 7
H_ADS# 7
H_RS#[0..2] 7
H_DSTBP#[0..3] 7
H_DSTBN#[0..3] 7
H_DINV#1 7H_DINV#0 7
H_DINV#2 7H_DINV#3 7
H_CPUSLP# 7,22
CFG12 12
MCH_CLKSEL1 6
M_CLK_DDR#317
M_CLK_DDR#016
CLK_MCH_3GPLL# 6
M_ODT016
M_CLK_DDR317
DDR_CS1_DIMMA#16DDR_CS2_DIMMB#17
DMI_MRX_ITX_N023
CFG7 12
PLTRST#21,23,28,34
DDR_CKE1_DIMMA16
CLK_MCH_3GPLL 6
M_CLK_DDR217
M_ODT317
CFG9 12
DDR_CS0_DIMMA#16
CFG19 12
DDR_CKE0_DIMMA16
MCH_ICH_SYNC#21
M_CLK_DDR116
M_CLK_DDR#217
M_ODT217
CPU_BSEL0 8
CFG16 12
DDR_CS3_DIMMB#17
DDR_CKE2_DIMMB17
THERMTRIP_MCH#18
CFG5 12
MCH_CLKSEL2 6
M_CLK_DDR016
M_CLK_DDR#116
CFG20 12
CFG13 12
V_DDR_MCH_REF16,17,48
M_ODT116
CFG18 12
PM_BMBUSY#23
DDR_CKE3_DIMMB17
H_HITM# 7
CFG11 12
PM_EXTTS#016PM_EXTTS#123
DMI_MRX_ITX_N123DMI_MRX_ITX_N223DMI_MRX_ITX_N323
DMI_MRX_ITX_P023DMI_MRX_ITX_P123DMI_MRX_ITX_P223DMI_MRX_ITX_P323
DMI_MTX_IRX_N023DMI_MTX_IRX_N123DMI_MTX_IRX_N223DMI_MTX_IRX_N323
DMI_MTX_IRX_P023DMI_MTX_IRX_P123DMI_MTX_IRX_P223DMI_MTX_IRX_P323
CLK_3GPLLREQ# 6
ICH_PWRGD23,42
CFG6 12
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistoga(1 of 6)
10 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Layout Note:H_XRCOMP & H_YRCOMP trace widthand spacing is 10/20
Layout Note:Route as shortas possible
Note : CFG3:17 hasinternal pullup,CFG18:19 hasinternal pulldown
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A
Description at page12
Stuff R435 & R437 for A1 Calistoga
T45PAD~D
T41PAD~D
R441100_0402_1%~D
12
R86
100_
0402
_1%
~D
12
HOST
U40A
CALISTOGA_FCBGA1466~D
HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8
HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1
HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9
HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14
HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8
HADSTB#0 B9HADSTB#1 C13
HRS0# B4HRS1# E6HRS2# D6
HCLKN AG1HCLKP AG2
HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10
HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5
HCPURST# B7HADS# E8
HTRDY# E7HDPWR# J9HDRDY# H8
HDEFER# C3HHITM# D4
HHIT# D3HLOCK# B3
HBREQ0# C7HBNR# C6HBPRI# F6
HDBSY# A7HCPUSLP# E3
HVREF0J13
R141 80.6_0402_1%~D
1 2
T42PAD~D
DM
ID
DR
MU
CFG
PM
CLK
NC
RES
ERVE
D
U40B
CALISTOGA_FCBGA1466~D
DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39
DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39
DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41
DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41
SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40
SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40
SM_OCDCOMP0AL20SM_OCDCOMP1AF10
SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21
SM_RCOMPNAV9SM_RCOMPPAT9
SM_VREF0AK1SM_VREF1AK41
SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29
SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21
CFG16 G18
CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16
CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16
CFG0 K16
CFG17 H15CFG18 J25CFG19 K27CFG20 J26
G_CLKP AG33G_CLKN AF33
D_REF_CLKN A27D_REF_CLKP A26
D_REF_SSCLKN C40D_REF_SSCLKP D41
NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3
NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1
PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34
RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41
RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35
ICH_SYNC#K28
CLK_REQ# H32
R33575_0402_5%~D
1 2
C48
0.1U
_040
2_16
V4Z~
D
1
2
R33610K_0402_5%~D
12
C42
50.
1U_0
402_
16V4
Z~D
@
1
2
R142 80.6_0402_1%~D
1 2
R57
24.9
_040
2_1%
~D
12
R32
610
0_04
02_1
%~D
12
T34PAD~D
R64
221_
0402
_1%
~D
12
R80
54.9
_040
2_1%
~D
12
C36
3
0.1U
_040
2_16
V4Z~
D
1
2
R85
221_
0402
_1%
~D
12
T44PAD~D
R32
5
200_
0402
_1%
~D
12
T43PAD~D
R52
54.9
_040
2_1%
~D
12
R90
24.9
_040
2_1%
~D
12
T35PAD~D
C65
0.1U
_040
2_16
V4Z~
D
1
2
R43
740
.2_0
402_
1%~D
@
12
R43
540
.2_0
402_
1%~D
@
12
R65
100_
0402
_1%
~D
12
R25310K_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_BS2
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_CAS#
DDR_B_WE#DDR_B_RAS#
DDR_A_D35
DDR_A_D15DDR_A_D14
DDR_A_D21
DDR_A_BS2
DDR_A_D28
DDR_A_D11
DDR_A_D7
DDR_A_WE#
DDR_A_D31
DDR_A_D16
DDR_A_D59
DDR_A_D56
DDR_A_D42
DDR_A_D25
DDR_A_D9
DDR_A_RAS#
DDR_A_D60
DDR_A_D55
DDR_A_D13
DDR_A_D0
DDR_A_D62
DDR_A_D3
DDR_A_D1
DDR_A_D41
DDR_A_D20
DDR_A_D43
DDR_A_D24
DDR_A_CAS#
DDR_A_D54
DDR_A_D52
DDR_A_D33
DDR_A_D12
DDR_A_D19
DDR_A_D46
DDR_A_D23
DDR_A_D18
DDR_A_D63
DDR_A_D34
DDR_A_D26
DDR_A_D22
SA_RCVENIN#SA_RCVENOUT#
SB_RCVENIN#SB_RCVENOUT#
DDR_A_D27
DDR_A_D2
DDR_A_D32
DDR_A_D6
DDR_A_D49
DDR_A_D47
DDR_A_D58
DDR_A_D40
DDR_A_D36
DDR_A_D5
DDR_A_D48
DDR_A_D10
DDR_A_D8
DDR_A_D57
DDR_A_D39
DDR_A_D37
DDR_A_D30
DDR_A_D4
DDR_A_D45
DDR_A_D53
DDR_A_D51
DDR_A_D17
DDR_A_D38
DDR_A_D29
DDR_A_D44
DDR_A_D50
DDR_A_D61
DDR_A_DQS6DDR_B_DQS7
DDR_B_MA9
DDR_A_MA13
DDR_A_MA7
DDR_A_DM1
DDR_A_MA5
DDR_A_BS1
DDR_A_DM7
DDR_B_MA0
DDR_A_DQS7
DDR_A_DM5
DDR_B_MA7
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_A_BS0
DDR_A_DQS#6
DDR_B_DQS5
DDR_B_DM0
DDR_A_MA4
DDR_A_MA8
DDR_A_DQS#7
DDR_A_MA10
DDR_A_DQS5
DDR_A_DM2
DDR_A_DQS0
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_BS1
DDR_A_DQS#1
DDR_A_MA2
DDR_B_MA4
DDR_A_DQS#5
DDR_B_DM6
DDR_B_DQS4
DDR_A_DQS1
DDR_A_MA9
DDR_A_DQS4
DDR_A_DM0
DDR_A_MA0
DDR_B_MA5
DDR_A_DM4
DDR_A_DQS#2
DDR_A_DQS3
DDR_B_MA3
DDR_A_MA11 DDR_B_MA11
DDR_B_BS0
DDR_A_DM6
DDR_B_MA6DDR_A_MA6
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_A_DQS#0
DDR_A_DM3
DDR_A_MA3
DDR_A_MA12
DDR_B_MA8
DDR_A_DQS2
DDR_B_DQS#0
DDR_B_MA10
DDR_B_DM7
DDR_A_MA1
DDR_B_MA12
DDR_B_DQS#2
DDR_B_DM4
DDR_B_DQS#6
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_A_DQS#3DDR_A_DQS#4
DDR_B_D[0..63] 17DDR_A_D[0..63] 16
DDR_A_DQS[0..7]16
DDR_A_MA[0..13]16
DDR_A_BS216 DDR_B_BS217
DDR_A_WE#16
DDR_A_CAS#16DDR_A_RAS#16
DDR_A_DQS#[0..7]16
DDR_A_DM[0..7]16
DDR_B_DQS[0..7]17
DDR_B_CAS#17DDR_B_RAS#17
DDR_B_MA[0..13]17
DDR_B_DQS#[0..7]17
DDR_B_WE#17
DDR_B_DM[0..7]17
DDR_B_BS017DDR_A_BS116DDR_A_BS016
DDR_B_BS117
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistogo(2 of 6)
11 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
D
E
T2022 PAD~DT2024 PAD~D
DDR SYS MEMORY B
U40E
CALISTOGA_FCBGA1466~D
SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41
SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3
SB_BS0AT24SB_BS1AV23SB_BS2AY28
SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18
SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4
SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5
SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5
SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23
T2023 PAD~D
DDR SYS MEMORY A
U40D
CALISTOGA_FCBGA1466~D
SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33
SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8
SA_BS0AU12SA_BS1AV14SA_BS2BA20
SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24
SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4
SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5
SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5
SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12
T2025 PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_MRX_GTX_N[0:15]
PEG_MRX_GTX_P[0:15]
PEGCOMP
PEG_MTX_GRX_P0PEG_MTX_GRX_N0
PEG_MTX_GRX_N[0:15]
PEG_MTX_GRX_P[0:15]
PEG_MTX_GRX_C_P0PEG_MTX_GRX_C_N0
PEG_MTX_GRX_C_P1PEG_MTX_GRX_C_N1
PEG_MTX_GRX_C_P2PEG_MTX_GRX_C_N2
PEG_MTX_GRX_C_P3PEG_MTX_GRX_C_N3
PEG_MTX_GRX_C_P4PEG_MTX_GRX_C_N4
PEG_MTX_GRX_C_P5PEG_MTX_GRX_C_N5
PEG_MTX_GRX_C_P6PEG_MTX_GRX_C_N6
PEG_MTX_GRX_C_P7PEG_MTX_GRX_C_N7
PEG_MTX_GRX_C_P8PEG_MTX_GRX_C_N8
PEG_MTX_GRX_C_P9PEG_MTX_GRX_C_N9
PEG_MTX_GRX_C_P10PEG_MTX_GRX_C_N10
PEG_MTX_GRX_C_P11PEG_MTX_GRX_C_N11
PEG_MTX_GRX_C_P12PEG_MTX_GRX_C_N12
PEG_MTX_GRX_C_P13PEG_MTX_GRX_C_N13
PEG_MTX_GRX_C_P14PEG_MTX_GRX_C_N14
PEG_MTX_GRX_C_P15PEG_MTX_GRX_C_N15
PEG_MTX_GRX_P1PEG_MTX_GRX_N1
PEG_MTX_GRX_P2PEG_MTX_GRX_N2
PEG_MTX_GRX_P3PEG_MTX_GRX_N3
PEG_MTX_GRX_P4PEG_MTX_GRX_N4
PEG_MTX_GRX_P5PEG_MTX_GRX_N5
PEG_MTX_GRX_P6PEG_MTX_GRX_N6
PEG_MTX_GRX_P7PEG_MTX_GRX_N7
PEG_MTX_GRX_P8PEG_MTX_GRX_N8
PEG_MTX_GRX_P9PEG_MTX_GRX_N9
PEG_MTX_GRX_P10PEG_MTX_GRX_N10
PEG_MTX_GRX_P11PEG_MTX_GRX_N11
PEG_MTX_GRX_P12PEG_MTX_GRX_N12
PEG_MTX_GRX_P13PEG_MTX_GRX_N13
PEG_MTX_GRX_P14PEG_MTX_GRX_N14
PEG_MTX_GRX_P15PEG_MTX_GRX_N15
PEG_MTX_GRX_C_N0
PEG_MTX_GRX_C_P0
PEG_MRX_GTX_N0
PEG_MRX_GTX_P0
PEG_MRX_GTX_N1PEG_MRX_GTX_N2PEG_MRX_GTX_N3PEG_MRX_GTX_N4PEG_MRX_GTX_N5PEG_MRX_GTX_N6PEG_MRX_GTX_N7PEG_MRX_GTX_N8PEG_MRX_GTX_N9PEG_MRX_GTX_N10PEG_MRX_GTX_N11PEG_MRX_GTX_N12PEG_MRX_GTX_N13PEG_MRX_GTX_N14PEG_MRX_GTX_N15
PEG_MRX_GTX_P1PEG_MRX_GTX_P2PEG_MRX_GTX_P3PEG_MRX_GTX_P4PEG_MRX_GTX_P5PEG_MRX_GTX_P6PEG_MRX_GTX_P7PEG_MRX_GTX_P8PEG_MRX_GTX_P9PEG_MRX_GTX_P10PEG_MRX_GTX_P11PEG_MRX_GTX_P12PEG_MRX_GTX_P13PEG_MRX_GTX_P14PEG_MRX_GTX_P15
PEG_MTX_GRX_C_N1PEG_MTX_GRX_C_N2PEG_MTX_GRX_C_N3PEG_MTX_GRX_C_N4PEG_MTX_GRX_C_N5PEG_MTX_GRX_C_N6PEG_MTX_GRX_C_N7PEG_MTX_GRX_C_N8PEG_MTX_GRX_C_N9PEG_MTX_GRX_C_N10PEG_MTX_GRX_C_N11PEG_MTX_GRX_C_N12PEG_MTX_GRX_C_N13PEG_MTX_GRX_C_N14PEG_MTX_GRX_C_N15
PEG_MTX_GRX_C_P1PEG_MTX_GRX_C_P2PEG_MTX_GRX_C_P3PEG_MTX_GRX_C_P4PEG_MTX_GRX_C_P5PEG_MTX_GRX_C_P6PEG_MTX_GRX_C_P7PEG_MTX_GRX_C_P8PEG_MTX_GRX_C_P9PEG_MTX_GRX_C_P10PEG_MTX_GRX_C_P11PEG_MTX_GRX_C_P12PEG_MTX_GRX_C_P13PEG_MTX_GRX_C_P14PEG_MTX_GRX_C_P15
+3.3V_RUN
+1.5VRUN_PCIE
+1.05V_VCCP
+1.5V_RUN
CFG510
CFG710
CFG1810CFG1910
CFG910
CFG2010
CFG1210
CFG1310
CFG1610
CFG1110
PEG_MRX_GTX_N[0:15] 52
PEG_MRX_GTX_P[0:15] 52
PEG_MTX_GRX_N[0:15] 52
PEG_MTX_GRX_P[0:15] 52
CFG610
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistoga(3 of 6)
12 70Tuesday, February 07, 2006
Compal Electronics, Inc.
CFG[18:20] have internal pulldown
*
*
(VCC Select)
*
*
*
CFG7Low = DT/Transportable CPU
High = Mobile CPU
CFG[13:12]
CFG[3:17] have internal pullup
Low = NormalOperation (Default):Lane number in Order
00 = Reserved01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation
High = Reverse Lane
Low = 1.05V (Default)
High = 1.5V
High = Enabled
Low = Disabled
Low = Reverse LaneCFG9
High = Normal Operation *
(DMI Lane Reversal)
SDVO_CTRLDATALow = No SDVO Device Present
High = SDVO Device Present
(Default)
(Default)*
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Strap Pin Table
CFG20
(PCIE/SDVO select)High = PCIE/SDVO are operatingsimu.
Low = Only PCIE or SDVO isoperational. *(Default)
CFG11
C
(FSB Dynamic ODT)
CFG16
CFG18
CFG19
LOW = Moby Dick
HIGH = CalistogaCFG6
*Low = DMI x 2
High = DMI x 4CFG5
*
C1590 0.1U_0402_16V4Z~D
1 2
R310 1K_0402_5%~D@1 2
C1570 0.1U_0402_16V4Z~D
1 2
C1586 0.1U_0402_16V4Z~D
1 2
R307 2.2K_0402_5%~D@1 2
C1577 0.1U_0402_16V4Z~D
1 2
C1576 0.1U_0402_16V4Z~D
1 2
C1563 0.1U_0402_16V4Z~D
1 2
C1571 0.1U_0402_16V4Z~D
1 2
C1567 0.1U_0402_16V4Z~D
1 2
R282 2.2K_0402_5%~D@1 2
R346 2.2K_0402_5%~D@ 1 2
C1589 0.1U_0402_16V4Z~D
1 2
LVDS
TV
CR
T
PCI-EXPRESS GRAPHICS
U40C
CALISTOGA_FCBGA1466~D
SDVOCTRL_CLKH28 SDVOCTRL_DATAH27
LA_DATA0B37LA_DATA1B34LA_DATA2A36
LVREFHC33LVREFLC32
TVDAC_AA16TVDAC_BC18TVDAC_CA19
TV_IREFJ20
TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19
DDCCLKC26DDCDATAC25
LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37
LB_DATA0F30LB_DATA1D29LB_DATA2F28
LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29
LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27
LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35
VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21
CRT_IREFJ22
EXP_COMPI D40EXP_COMPO D38
EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38
EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38
EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38
EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38
EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40
EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40
EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40
EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40
TV_DCONSEL1J29TV_DCONSEL0K30
C1588 0.1U_0402_16V4Z~D
1 2
R357 2.2K_0402_5%~D@ 1 2
C1568 0.1U_0402_16V4Z~D
1 2
C1578 0.1U_0402_16V4Z~D
1 2
R288 2.2K_0402_5%~D@1 2
R306 1K_0402_5%~D@1 2
C1584 0.1U_0402_16V4Z~D
1 2
C1587 0.1U_0402_16V4Z~D
1 2
C1562 0.1U_0402_16V4Z~D
1 2
C1569 0.1U_0402_16V4Z~D
1 2
C1572 0.1U_0402_16V4Z~D
1 2
C1585 0.1U_0402_16V4Z~D
1 2
C1573 0.1U_0402_16V4Z~D
1 2
R281 2.2K_0402_5%~D@1 2
C1565 0.1U_0402_16V4Z~D
1 2
C1575 0.1U_0402_16V4Z~D
1 2
C1579 0.1U_0402_16V4Z~D
1 2
R149324.9_0402_1%~D 1 2
C1582 0.1U_0402_16V4Z~D
1 2
C1580 0.1U_0402_16V4Z~D
1 2
C1581 0.1U_0402_16V4Z~D
1 2
R67 2.2K_0402_5%~D@1 2
C1583 0.1U_0402_16V4Z~D
1 2
C1561 0.1U_0402_16V4Z~D
1 2
R308 1K_0402_5%~D@
1 2
R323 2.2K_0402_5%~D @1 2
C1574 0.1U_0402_16V4Z~D
1 2
C1566 0.1U_0402_16V4Z~D
1 2
C1592 0.1U_0402_16V4Z~D
1 2
C1564 0.1U_0402_16V4Z~D
1 2
C1591 0.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U40_D2
U40_A6
U40
_AB
1
+2.5V_RUN
+1.5V_RUN
+1.5VRUN_PCIE
+1.5V_RUN
+1.5V_RUN+1.5VRUN_3GPLL
+1.5VRUN_DPLLB+1.5VRUN_DPLLA
+2.5V_RUN
+1.5VRUN_HPLL
+3.3V_RUN
+1.5VRUN_QTVDAC
+1.5V_RUN
+1.5VRUN_MPLL
+1.5V_RUN
+1.5VRUN_3GPLL
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
+1.5VRUN_MPLL+1.5VRUN_HPLL
+1.5VRUN_DPLLA +1.5VRUN_DPLLB
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN+1.5VRUN_QTVDAC
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistoga(4 of 6)
13 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Route +2.5VRUN from GMCH pinG41 todecoupling cap (C345)<200mil to the edge.
W=30 mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
H
CRB 270uF
40mA Max.40mA Max.
45mA Max.45mA Max.
C404 should be placed in cavity
Should be placed on top
+
C41
122
0U_V
_4V
M_R
45~D
1
2
C31
110
U_0
805_
4VA
M~D
1
2
C38
510
U_0
805_
4VA
M~D
1
2
C39
14.
7U_0
603_
6.3V
4Z~D
1
2
C39
02.
2U_0
603_
6.3V
6K~D
1
2
C41922U_0805_6.3VAM~D
1
2
C41
8
0.1U
_040
2_16
V4Z
~D
1
2
C33
20.
1U_0
402_
16V
4Z~D
1
2
C33
60.
1U_0
402_
16V
4Z~D
1
2
C43
70.
1U_0
402_
16V
4Z~D
1
2
L34BLM18PG181SN1_0603~D
12
C40
40.
1U_0
402_
16V
4Z~D
1
2
C59
10U
_080
5_4V
AM
~D
1
2
R1749
0_0805_5%~D
12R1748
0_0805_5%~D
12
C16
40.
22U
_040
2_10
V4Z
~D 1
2
C11
80.
22U
_040
2_10
V4Z
~D
1
2
L39
BLM18AG121SN1D_0603~D
12L38
BLM18AG121SN1D_0603~D
12
C9422U_0805_6.3VAM~D
1
2
C53
10U
_080
5_4V
AM
~D
1
2
C41
3
0.1U
_040
2_16
V4Z
~D
1
2
C32
20.
1U_0
402_
16V
4Z~D
1
2
L11BLM18PG181SN1_0603~D
12
C31
60.
47U
_040
2_16
V4Z
~D
1
2
C43
50.
47U
_040
2_16
V4Z
~D
1
2
C33
10.
1U_0
402_
16V
4Z~D
1
2
C37
0.02
2U_0
402_
16V
7K~D
1
2
P O W E R
U40H
CALISTOGA_FCBGA1466~D
VCC_SYNC H22
VCCTX_LVDS0 B30VCCTX_LVDS1 C30
VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41
VCCA_3GBG G41VSSA_3GBG H41
VCCA_3GPLL AC33
VCCTX_LVDS2 A30
VCCA_LVDS A38VSSA_LVDS B39
VCCA_MPLL AF2
VCCA_TVBG H20VSSA_TVBG G20
VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20
VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30
VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28
VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5
VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1
VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21
VCCA_DPLLA B26VCCA_DPLLB C39
VCCA_HPLL AF1
VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2
VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28
VCCD_TVDAC D21VCCDQ_TVDAC H19
VCCHV0 A23VCCHV1 B23 VCCHV2 B25
VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14
VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12
VCCAUX0 AK31
VTT58P5
R2670.5_0805_1%~D 1 2
C24
0.1U
_040
2_16
V4Z
~D
1
2
C3450.1U_0402_16V4Z~D
1
2L35
BLM21PG600SN1D_0805~D
12
+
C49
220U
_V_4
VM
_R45
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF4
VCCSM_LF2
VCCSM_LF5
VCCSM_LF1
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
+1.8V_SUS+1.05V_VCCP
+1.8V_SUS
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistoga(5 of 6)
14 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB 270uF
FG
Place near U40.BA15
Place near U40.BA23
Place near U40.AT41 & AM41
Place near U40.AV1 & AJ1
C61
50.
47U
_040
2_16
V4Z~
D
1
2
C15
810
U_0
805_
4VAM
~D
1
2
C44
1
0.1U
_040
2_16
V4Z~
D
1
2
+
C16
533
0U_D
2E_2
.5VM
_R9~
D@
1
2
C44
4
0.1U
_040
2_16
V4Z~
D
1
2
C38
30.
22U
_040
2_10
V4Z~
D
1
2
C16
010
U_0
805_
4VAM
~D
1
2
C61
40.
47U
_040
2_16
V4Z~
D
1
2
C43
8
0.1U
_040
2_16
V4Z~
D
1
2
C36
610
U_0
805_
4VAM
~D
1
2
C61
70.
47U
_040
2_16
V4Z~
D
1
2
C45
2
0.1U
_040
2_16
V4Z~
D
1
2P O W E R
U40G
CALISTOGA_FCBGA1466~D
VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28
VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34
VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15
VCC_SM3 AU40VCC_SM4 BA34
VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6
VCC_SM1 AT41VCC_SM0 AU41
VCC_SM2 AM41
VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19
C36
710
U_0
805_
4VAM
~D
1
2
P O
W E
R
U40F
CALISTOGA_FCBGA1466~D
VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27
VCCAUX_NCTF52 Y15
VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25
VCCAUX_NCTF53 W15
VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24
VCCAUX_NCTF54 V15
VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20
VCCAUX_NCTF55 U15
VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18
VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23
VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15
VSS_NCTF0 AE27
VCCAUX_NCTF51 AA15
VSS_NCTF1 AE26
VCC_NCTF59R20
VCCAUX_NCTF56 T15
VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18
VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17
VCC_NCTF26V25
VCCAUX_NCTF57 R15
VCC_NCTF37U24
VCC_NCTF8T27
VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16
VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1
C61
20.
47U
_040
2_16
V4Z~
D
1
2
C35
80.
22U
_040
2_10
V4Z~
D
1
2
C36
81U
_060
3_10
V4Z~
D
1
2
C61
60.
47U
_040
2_16
V4Z~
D
1
2
+
C62
022
0U_V
_4VM
_R45
~D
1
2
C37
90.
22U
_040
2_10
V4Z~
D
1
2
+
C42
322
0U_V
_4VM
_R45
~D
1
2
C61
30.
47U
_040
2_16
V4Z~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Calistoga(6 of 6)
15 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
IJ
P O W E R
U40J
CALISTOGA_FCBGA1466~D
VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13
VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10
VSS265D13VSS264B13VSS263AY12
VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6
VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3
VSS341 AD3
VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2
VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2
VSS359 C2VSS360 AL1
VSS358 F2
VSS349 AJ2VSS350 AD2
VSS344 G3VSS343 AA3VSS342 AC3
VSS340 AF3
VSS338 AH3
VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9
VSS315 U6VSS316 N6
VSS339 AG3
P O W E R
U40I
CALISTOGA_FCBGA1466~D
VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40
VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39
VSS21AR39VSS22AN39
VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39
VSS20AV39
VSS23AJ39
VSS12AJ40
VSS38G39
VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34
VSS39F39
VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
DDR_CKE1_DIMMA
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
CLK_SCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D14
DDR_A_D2
DDR_A_D8
DDR_A_D1DDR_A_D0
DDR_A_D3
DDR_A_D11
DDR_A_D29
DDR_A_D17
DDR_A_D23
DDR_A_D20
DDR_A_D22
DDR_A_D10
DDR_A_D24
DDR_A_D27
DDR_A_D32
DDR_A_D60
DDR_A_D47
DDR_A_D55
DDR_A_D52
DDR_A_D51
DDR_A_D48
DDR_A_D59DDR_A_D58
DDR_A_D61
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
CLK_SDATA
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS1DDR_A_RAS#
DDR_A_D6
DDR_A_D7
DDR_A_D5
DDR_A_D4
DDR_A_D9
DDR_A_D16
DDR_A_D15
DDR_A_D21
DDR_A_D18
DDR_A_D13DDR_A_D12
DDR_A_D25
DDR_A_D30
DDR_A_D19
DDR_A_D28
DDR_A_D38
DDR_A_D44
DDR_A_D50
DDR_A_D53DDR_A_D49
DDR_A_D57
DDR_A_D63
DDR_A_D56
DDR_A_D62
DDR_A_D54
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS0
DDR_A_BS2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS1
DDR_A_MA6
DDR_A_MA2
M_ODT0
M_ODT1
M_ODT0DDR_A_MA13
DDR_A_MA7
DDR_A_DM0
PM_EXTTS#0_R
DDR_A_D42
DDR_CS0_DIMMA#DDR_A_RAS#
DDR_A_D41DDR_A_D46
DDR_A_D43
DDR_A_D33
DDR_A_D39DDR_A_D34
DDR_A_D35DDR_A_D37DDR_A_D36
DDR_A_D31 DDR_A_D26
M_ODT1DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_MA10DDR_A_BS0
DDR_A_WE#DDR_A_CAS#
DDR_A_BS2
DDR_A_MA12
DDR_A_MA8
DDR_A_MA9
DDR_A_MA5
DDR_A_D40DDR_A_D45
DDR_A_MA1DDR_A_MA3
+1.8V_SUS +1.8V_SUS
+0.9V_DDR_VTT
+3.3V_RUN
+0.9V_DDR_VTT
+1.8V_SUS
DDR_A_D[0..63]11
DDR_A_DQS[0..7]11
DDR_A_MA[0..13]11
DDR_A_DM[0..7]11
M_CLK_DDR0 10
M_CLK_DDR1 10
M_CLK_DDR#0 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10
DDR_CS0_DIMMA# 10
DDR_CKE0_DIMMA10
DDR_CS1_DIMMA#10
DDR_A_DQS#[0..7]11
M_ODT0 10
M_ODT110
DDR_A_BS1 11
DDR_A_WE#11DDR_A_RAS# 11
DDR_A_CAS#11
DDR_A_BS011
DDR_A_BS211
V_DDR_MCH_REF 10,17,48
CLK_SCLK6,17CLK_SDATA6,17
PM_EXTTS#0 10
PM_EXTTS#0_R 17
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
DDRII-SODIMM SLOT1
16 70Tuesday, February 07, 2006
Compal Electronics, Inc.Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
RESERVEDIMMA
Layout Note:Place near JDIM1
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON TOP SIDE
C231
0.1U_0402_16V4Z~D
1
2
C215
0.1U_0402_16V4Z~D
1
2
C218
0.1U_0402_16V4Z~D
1
2 C233
0.1U_0402_16V4Z~D
1
2C219
0.1U_0402_16V4Z~D
1
2
RN20
56_0404_4P2R_5%~D
1423
C212
0.1U_0402_16V4Z~D
1
2
C226
2.2U_0603_6.3V6K~D
1
2
C237
0.1U_0402_16V4Z~D
1
2
RN25
56_0404_4P2R_5%~D
1 42 3
RN15
56_0404_4P2R_5%~D
1423
RN22
56_0404_4P2R_5%~D
1 42 3
C224
0.1U_0402_16V4Z~D
1
2
C228
0.1U_0402_16V4Z~D
1
2
C232
0.1U_0402_16V4Z~D
1
2
RN16
56_0404_4P2R_5%~D
1 42 3
RN26
56_0404_4P2R_5%~D
1423
C234
0.1U_0402_16V4Z~D
1
2
C213
2.2U_0603_6.3V6K~D
1
2
RN23
56_0404_4P2R_5%~D
1 42 3
C221
0.1U_0402_16V4Z~D
1
2
C229
2.2U_0603_6.3V6K~D
1
2
RN24
56_0404_4P2R_5%~D
1 42 3
RN27
56_0404_4P2R_5%~D
1423
R51100K_0402_5%~D
12
C225
2.2U_0603_6.3V6K~D
1
2
C227
0.1U_0402_16V4Z~D
1
2
C220
0.1U_0402_16V4Z~D
1
2 C235
0.1U_0402_16V4Z~D
1
2
R176 100K_0402_5%~D
1 2
C216
0.1U_0402_16V4Z~D
1
2
RN19
56_0404_4P2R_5%~D
1423
C214
2.2U_0603_6.3V6K~D
1
2
C223
0.1U_0402_16V4Z~D
1
2
C230
2.2U_0603_6.3V6K~D
1
2
R175 100K_0402_5%~D
1 2
RN21
56_0404_4P2R_5%~D
1 42 3
C222
2.2U_0603_6.3V6K~D
1
2
C236
0.1U_0402_16V4Z~D
1
2
JDIM2
TYCO_1470815-2~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C217
0.1U_0402_16V4Z~D
1
2
R1770_0402_5%~D
1 2
RN18
56_0404_4P2R_5%~D
1423
RN17
56_0404_4P2R_5%~D
1423
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_DQS#5
DDR_B_D55
DDR_B_D7
DDR_B_D62
DDR_B_D52
DDR_B_BS1
DDR_CKE3_DIMMB
DDR_B_D23
DDR_B_D20
M_ODT3
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D6
M_CLK_DDR2
DDR_B_D59
DDR_B_RAS#
DDR_B_MA4
DDR_B_D25
DDR_B_DM2
DDR_B_MA9
DDR_B_DQS6
DDR_B_DM5
DDR_B_MA1
DDR_B_DQS#1
DDR_B_D43
DDR_B_DQS#3
DDR_CKE2_DIMMB
DDR_B_D26
DDR_B_D16
DDR_B_D8
DDR_B_D57
DDR_B_D49
DDR_B_D44
DDR_B_D38
M_ODT2
DDR_B_D31
DDR_B_D10
DDR_B_DM1
DDR_B_D34
V_DDR_MCH_REF
DDR_B_D54
DDR_B_DM4
DDR_B_MA0
DDR_B_DM0
DDR_B_DQS#4
DDR_B_CAS#
DDR_B_MA3
DDR_B_BS2
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS1
CLK_SCLK
DDR_B_DQS3
DDR_B_WE#
DDR_B_D15
DDR_B_DQS0
DDR_B_D63
DDR_B_D50
DDR_B_MA7
DDR_B_D13
DDR_B_D29
DDR_B_DQS2
DDR_B_D0
DDR_B_DM6
DDR_B_D53
DDR_B_MA2
DDR_B_MA10
DDR_B_DM3
DDR_B_DQS#2
CLK_SDATA
DDR_B_MA13
DDR_B_D3DDR_B_D2
DDR_B_MA5
M_CLK_DDR#2
DDR_B_D19
DDR_B_DQS#0
DDR_B_DQS#7
DDR_B_DQS#6
DDR_B_D48
DDR_CS2_DIMMB#
DDR_B_D12
DDR_B_D9
DDR_B_D51
DDR_B_D37
DDR_B_MA11
M_CLK_DDR#3
DDR_B_D14
DDR_B_DQS7
DDR_B_D47
DDR_B_D58
DDR_B_DM7
DDR_B_MA6
DDR_B_MA12
DDR_B_D11
M_CLK_DDR3
DDR_B_D33
DDR_B_MA8
PM_EXTTS#0_R
DDR_B_MA7
M_ODT2
DDR_B_RAS#DDR_CS2_DIMMB#
DDR_B_MA0
DDR_B_MA6
DDR_B_BS1
DDR_B_MA11DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_MA13
DDR_B_MA2
DDR_B_D60DDR_B_D61DDR_B_D56
DDR_B_D45DDR_B_D40DDR_B_D41
DDR_B_D39DDR_B_D35
DDR_B_D36DDR_B_D32
DDR_B_D30DDR_B_D27
DDR_B_D24DDR_B_D28
DDR_B_D22DDR_B_D18
DDR_B_D17DDR_B_D21
DDR_B_D4DDR_B_D1DDR_B_D5
DDR_CKE2_DIMMBDDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
M_ODT3DDR_CS3_DIMMB#
DDR_B_D46DDR_B_D42
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+1.8V_SUS+1.8V_SUS
V_DDR_MCH_REF 10,16,48DDR_B_D[0..63]11
DDR_B_DQS[0..7]11
DDR_B_MA[0..13]11
DDR_B_DM[0..7]11
DDR_B_DQS#[0..7]11
DDR_B_CAS#11
M_ODT310
DDR_CKE3_DIMMB 10
DDR_B_WE#11
M_CLK_DDR2 10
DDR_CKE2_DIMMB10
DDR_B_BS011 DDR_B_RAS# 11
M_CLK_DDR3 10
DDR_B_BS1 11
M_CLK_DDR#2 10
DDR_B_BS211
M_ODT2 10DDR_CS3_DIMMB#10
DDR_CS2_DIMMB# 10
M_CLK_DDR#3 10
CLK_SCLK6,16CLK_SDATA6,16
PM_EXTTS#0_R 16
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
DDRII-SODIMM SLOT2
17 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Layout Note:Place these resistorclosely DIMM0,alltrace length<750 mil
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place near JDIM2
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMBSTANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON BOTTOM SIDE
RN10
56_0404_4P2R_5%~D
1 42 3
C263
0.1U_0402_16V4Z~D
1
2
RN2
56_0404_4P2R_5%~D
1423
RN6
56_0404_4P2R_5%~D
1423
RN8
56_0404_4P2R_5%~D
1 42 3
C265
0.1U_0402_16V4Z~D
1
2C245
0.1U_0402_16V4Z~D
1
2
C255
0.1U_0402_16V4Z~D
1
2
C243
0.1U_0402_16V4Z~D
1
2
C239
0.1U_0402_16V4Z~D
1
2
C244
0.1U_0402_16V4Z~D
1
2
RN13
56_0404_4P2R_5%~D
1423
C246
0.1U_0402_16V4Z~D
1
2
C254
2.2U_0603_6.3V6K~D
1
2
C548
2.2U_0603_6.3V6K~D
1
2
C261
2.2U_0603_6.3V6K~D
1
2
RN5
56_0404_4P2R_5%~D
1423
C268
0.1U_0402_16V4Z~D
1
2
C242
2.2U_0603_6.3V6K~D
1
2
RN4
56_0404_4P2R_5%~D
1 42 3
C266
0.1U_0402_16V4Z~D
1
2
RN3
56_0404_4P2R_5%~D
1 42 3
RN9
56_0404_4P2R_5%~D
1 42 3
RN7
56_0404_4P2R_5%~D
1423
C549
0.1U_0402_16V4Z~D
1
2
C264
0.1U_0402_16V4Z~D
1
2C248
0.1U_0402_16V4Z~D
1
2
C249
2.2U_0603_6.3V6K~D
1
2
C251
0.1U_0402_16V4Z~D
1
2
RN12
56_0404_4P2R_5%~D
1423
C240
0.1U_0402_16V4Z~D
1
2
C247
0.1U_0402_16V4Z~D
1
2 C267
0.1U_0402_16V4Z~D
1
2
R17410K_0402_5%~D
12
R173
100K_0402_5%~D
12
C252
0.1U_0402_16V4Z~D
1
2
C269
0.1U_0402_16V4Z~D
1
2
C241
2.2U_0603_6.3V6K~D
1
2
C253
2.2U_0603_6.3V6K~D
1
2
JDIM1
TYCO_1565917-4~D
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
RN14
56_0404_4P2R_5%~D
1423
RN11
56_0404_4P2R_5%~D
1 42 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FAN1_VOUT
THERMATRIP1#
THERMATRIP2#
REM_DIODE1_PREM_DIODE1_N
FAN1_TACH
THERMATRIP3#
THERMATRIP2#
+3VSUS_THRM
THERMATRIP1#
LDO_SET
+3V_LD
OIN
VGA_THERMDNVGA_THERMDP
+FAN1_VOUT
SNIFFER_GREEN#SNIFFER_YELLOW#
VCP1
VCP1
LDO_SET
VCP2
VCP2
+3.3V_RUN
+3.3V_ALW+3.3V_SUS
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+3.3V_SUS
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
+2.5V_RUN
+3.3V_RUN
+5V_RUN
+RTC_CELL
+5V_SUS +5V_SUS
+2.5V_RUN
+5V_SUS+5V_SUS
FAN1_TACH 39
ATF_INT# 39
THERMTRIP_SIO 38
THERMTRIP_MCH#10
H_THERMTRIP#7
DAT_SMB39CLK_SMB39
H_THERMDA7
H_THERMDC7
SUSPWROK23,42
POWER_SW#39,40
ICH_PWRGD#42
ACAV_IN 39,50,51
THERM_STP# 46
SNIFFER_GREEN#43SNIFFER_YELLOW#43
2.5V_RUN_PWRGD 42
VGA_THERMDP53
VGA_THERMDN53
5V_CAL_SIO# 38
THERMTRIP_VGA#52
5V_CAL_SIO2# 38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
FAN & Thermal Sensor
18 70Tuesday, February 07, 2006
Compal Electronics, Inc.
FAN1 Control and Tachometer
Place under CPU
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
SMBUS ADDRESS : 2F
Place cap close to theGuardian pins as possible.
Place C341 close to the Guardianpins as possible
R477 place near the bottom SODIMM
VSET =Tp-70
21
VSET=R249+R262
R262x 3.3V
Place near the bottom SODIMM
R479 place on bottom sidenext to SoDIMM connector
REM_DIODE1_N, REM_DIODE1_P routing together.Trace width / Spacing = 10 / 10 mil
VGA_THERMDN, VGA_THERMDP routing together.Trace width / Spacing = 10 / 10 mil
Place C47 close to the Guardianpins as possible
DP2, DN2 routing together. Tracewidth / Spacing = 10 / 10 mil
Place C1773 close to the Guardian pins as possible
Place near the bottom SODIMM
C420.1U_0402_16V4Z~D
1
2
C17732200P_0402_50V7K~D
1
2
R4762.21K_0402_1%~D
12
R41 8.2K_0402_5%~D
1 2
R39
2.2K_0402_5%~D
1 2
R42 1K_0402_5%~D
1 2
R180031.6K_0402_1%~D
@
12
C410.1U_0402_16V4Z~D
1
2
C17
7410
U_0
805_
10V4
Z~D
1
2
C1500.1U_0402_16V4Z~D@
1
2
R6010K_0402_5%~D
12
C472200P_0402_50V7K~D
1
2
C662200P_0402_50V7K~D
1
2
R61
1K_0
402_
5%~D
12
R38 1K_0402_5%~D
1 2
R47810K_0402_5%~D
12
G
D
S Q152N7002W-7-F_SOT323~D
2
13
C18032200P_0402_50V7K~D@
1
2
C3030.1U_0402_16V4Z~D
1
2
R1643
0.27_1210_5%~D12
EB
C
Q12
MM
ST39
04-7
-F_S
OT3
23~D
2
31
C1520.1U_0402_16V4Z~D@
1
2
R2418.2K_0402_5%~D
12
R249332K_0402_1%~D
12
R40
2.2K_0402_5%~D
1 2
U15
EMC4000 C_QFN40~D
SMDATA7SMBCLK8
LDO_SHDN#_ADDR23
DP235DN234
+3V_SUS12VSUS_PWRGD21
+RTC_PWR3V18
+3V_PWROK#13
POWER_SW#38
THERMTRIP1#14
THERMTRIP2#15
THERMTRIP3#16
VSET39HW_LOCK#29VSS9
ATF_INT# 17
VCP 3
LDO_POK 31
DN1 36DP1 37
THERMTRIP_SIO 30ACAV_CLR 4
SYS_SHDN# 22
DP31DN32
VDD_5V 5
FAN_OUT6
GPIO110GPIO211GPIO319GPIO420
LDO_SET 24
LDO_OUT 25
LDO_IN 26
LDO_OUT 27
LDO_IN 28
GPIO532
FAN_DAC33
VCP 40
PAD_GND 41
C362200P_0402_25V7K~D
1
2
R48010K_0402_5%~D
12
R17
891K
_040
2_5%
~D
12
C17
79
22U
_080
5_6.
3VAM
~D
@
1
2
R262118K_0402_1%~D
12
D35RB751S40T1_SOD523-2~D
@
21
C31
722
00P_
0402
_50V
7K~D
1
2
C3412200P_0402_50V7K~D
1
2
R4812.21K_0603_1%~D
12
C17770.1U_0402_16V4Z~D
1
2
C21
0
22U
_080
5_6.
3VAM
~D
1
2
EB
C
Q34
MM
ST39
04-7
-F_S
OT3
23~D
2
31
R163410K_0402_5%~D
@
12
C1778100P_0402_50V8J~D@
1
2
R479
10K_0603_1%_TSM1A103F34D3RZ~D
1 2
R5049.9_0603_1%~D 1 2
R41310K_0402_5%~D
12
G
D
S
Q212N7002W-7-F_SOT323~D
2
13
C440.1U_0402_16V4Z~D
1
2
R2398.2K_0402_5%~D
12
R1367.5K_0402_5%~D
1 2
C17
7610
U_0
805_
10V4
Z~D
1
2
C57
11U
_060
3_10
V4Z~
D
1
2
R477
10K_0603_1%_TSM1A103F34D3RZ~D
1 2
C430.1U_0402_16V4Z~D
1
2
JFAN1
MOLEX_53398-0371~D
112233
EB
C
Q39
MM
ST39
04-7
-F_S
OT3
23~D
2
31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
BACKLITEON
LCD_DDCCLKLCD_DDCDATA
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_BCLK+
LCD_B0+LCD_B0-
LCD_B2-
LCD_B1-
LCD_B2+
LCD_BCLK-
LCD_B1+
LAMP_STAT#
LAMP_D_STAT#
FPBACK_ENBACKLITEON
PANEL_BKEN
+3.3V_RUN
+LCDVDD
+3.3V_RUN
+INV_PWR_SRC+PWR_SRC
+INV_PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD+15V_SUS
+15V_SUS
+3.3V_RUN
+3.3V_RUN
SBAT_SMBDAT 39,45SBAT_SMBCLK 39,45
RUN_ON37,39,41,42,46,47,48,58
LCD_TST 23
LCD_DDCCLK 52LCD_DDCDATA 52
LCD_A0- 53LCD_A0+ 53
LCD_A1- 53LCD_A1+ 53
LCD_A2- 53LCD_A2+ 53
LCD_ACLK- 53LCD_ACLK+ 53
LCD_B0- 53LCD_B0+ 53
LCD_B1- 53LCD_B1+ 53
LCD_B2- 53LCD_B2+ 53
LCD_BCLK- 53LCD_BCLK+ 53
ENVDD52
BIA_PWM 39,52
LAMP_STAT# 23
FPBACK_EN38
PANEL_BKEN52
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Internal LVDS
19 70Tuesday, February 07, 2006
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
M'07 inverter support - Populate R520,R1767 Depop U7.D'05 inverter support - Populate U7, Depop R520,R1767
M'07 inverter support - Depop D2.D'05 inverter support - Populate D2
X01 support M07 inverter
BACKLITEON for D'05;BIA_PWM for M'07
R235100K_0402_5%~D
12
C2890.1U_0603_50V4Z~D
1
2
R9210K_0402_5%~D
12
Q32FDS4435_NL_SO8~D
4
78
65
123
R54100K_0402_5%~D
12
JLVDS
IPEX_20330-044E-11F~D
TXUCLKUT- 44
GND1 42
TXUOUT2+ 40
TXUOUT1- 38
GND3 36
TXUOUT0+ 34
TXLCLKOUT- 32
GND5 30
TXLOUT2+ 28
TXLOUT1- 26
GND7 24
TXLOUT0+ 22
PANEL_I2C_DAT 19GND9 18
GND10 16
LCDVDD2 14
LCDPWR_SRC 12
LCDPWR_SRC 10
+5V_ALWF 3
PBAT_SMBCLK 6
GND13 4
FPBACK 8
TXUCLKUT+ 43
TXUOUT2- 41
GND2 39
TXUOUT1+ 37
TXUOUT0- 35
GND4 33
TXLCLKOUT+ 31
TXLOUT2- 29
GND6 27
TXLOUT1+ 25
TXLOUT0- 23
GND8 21PANEL_I2C_CLK 20
VEDID 17
LCDVDD1 15
PNL_SLFTST 13
LCDPWR_SRC 11
GND11 9
LAMP_START 2
PBAT_SMBDAT 5
GND12 7
GND14 1
MGND145MGND246MGND347MGND448MGND549MGND650MGND751
NC56NC57
MGND1054MGND1155
MGND852MGND953
R236
100K_0402_5%~D
1 2
C280.1U_0402_16V4Z~D
1
2
R520 0_0402_5%~D 1 2
R79100K_0402_5%~D@
12
S
GD
Q9SI3456BDV-T1-E3_TSOP6~D
3
6
24 5
1
D2
RB751S40T1_SOD523-2~D@
21
G
D
S
Q37
2N7002W-7-F_SOT323~D
2
13
R1767 0_0402_5%~D
1 2
C2960.1U_0603_50V4Z~D
1
2
G
D S
Q292N7002W-7-F_SOT323~D
2
1 3
U7
74AHC1G08GW_SOT353-5~D@
IN11
IN22 G3
O 4
P5
C31
50.
1U_0
603_
50V4
Z~D
1
2
R1760100K_0402_5%~D
12
C260.1U_0402_16V4Z~D
1
2
R272100K_0402_5%~D
12
Q8DDTC124EUA-7-F_SOT323~D
I2
O1
G3
C29
010
00P_
0402
_50V
7K~D
1
2
C27
0.1U_0402_16V4Z~D
1
2
G
D
S
Q10
2N70
02W
-7-F
_SO
T323
~D
2
13
C29
0.1U
_040
2_16
V4Z~
D
1
2
R35470_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2
VGA_GRN
VGA_BLU
CLK_DDC2
CRT_VCC
M_ID2#
JVGA_HSBLUE
RED
GREEN
JVGA_VS
VGA_RED
+5V_RUN
+3.3V_RUN
CRT_VCC
CRT_VCC
+5V_RUN
VGA_RED36,52
VGA_VSYNC52
CLK_DDC236,52
VGA_GRN36,52
VGA_BLU36,52
VGA_HSYNC52
DAT_DDC236,52
VSYNC_R 36
HSYNC_R 36
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
CRT
20 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1
Evaluate Package
A2
A1 K2
DA204U
D2005 SDM10U45-7_SOD523-2~D
2 1
C14
1422
P_0
402_
50V8
J~D
1
2
U191SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
C14
120.
01U
_040
2_16
V7K~
D
1
2
R13
9775
_040
2_1%
12
R13
991K
_040
2_5%
~D@
12
C141010P_0402_50V8J~D@
1
2
D31DA204U_SOT323~D@
2 31
D29DA204U_SOT323~D@
2 31
L82BLM18AG121SN1D_0603~D
1 2
R1010_0402_5%~D
1 2C
1415
22P
_040
2_50
V8J~
D
1
2
R14031K_0402_5%~D 1 2
U190
SN74AHCT1G125GW_SC70-5~D
A2 Y 4
P5
G3
OE#
1
R13
9675
_040
2_1%
12
R14
012.
2K_0
402_
5%~D
12
C14
08
22P
_040
2_50
V8J~
D
@
1
2
T46 PAD~D
R1140_0402_5%~D
1 2
L80BLM18BB600SN1D_0603~D
1 2
R1404
39_0402_5%~D
1 2
C14130.1U_0402_16V4Z~D
1
2
L79BLM18BB600SN1D_0603~D
1 2
D32
SD
M10
U45
-7_S
OD
523-
2~D
21
R14
001K
_040
2_5%
~D@
1
2
R14022.2K_0402_5%~D
12
JCRT
SUYIN_070915FR015S201CU~D
611
17
1228
1339
144
1015
5
1617
L81BLM18AG121SN1D_0603~D
1 2
C141110P_0402_50V8J~D@
1
2
D30DA204U_SOT323~D@
2 31
L78BLM18BB600SN1D_0603~D
1 2
R1405
39_0402_5%~D
1 2
R13
9875
_040
2_1%
12
C14
06
22P
_040
2_50
V8J~
D
@
1
2 C14
07
22P
_040
2_50
V8J~
D
@
1
2
C140910P_0402_50V8J~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_C_BE0#
PCI_REQ4#
PCI_PERR#
PCI_GNT4#
PCI_GNT1#
ICH_GPIO4_PIRQG#PCI_PIRQB#
PCI_REQ5#
PCI_STOP#
PCI_C_BE1#
PCI_C_BE3#
ICH_GPIO3_PIRQF#PCI_PIRQC#
PCI_REQ2#
ICH_GPIO2_PIRQE#
PCI_FRAME#
PCI_REQ3#
PCI_PLOCK#
PCI_IRDY#
PCI_C_BE2#
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
ICH_GPIO5_PIRQH#
PCI_PLTRST#CLK_PCI_ICHICH_PME#
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
ICH_GPIO5_PIRQH#
ICH_GPIO4_PIRQG#
ICH_GPIO3_PIRQF#
ICH_GPIO2_PIRQE#
PCI_REQ0#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
PCI_REQ5#
PCI_PLTRST#PLTRST#
PCI_REQ1#
PCI_GNT5#
PCI_GNT0#
PCI_GNT5#PCI_GNT4#
PLTRST2#
PCI_RST#PCI_PCIRST#
+3.3V_RUN
+3.3V_RUN +3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# 30,35
PCI_SERR# 35
PCI_PAR 30,35PCI_IRDY# 30,35,36
PCI_PERR# 30,35
PCI_GNT1# 30
PCI_PIRQC#30
PCI_C_BE3# 30,35
PCI_FRAME# 30,35,36
PCI_REQ1# 30
PCI_C_BE2# 30,35
PCI_DEVSEL# 30,35
PCI_TRDY# 30,35
PCI_C_BE0# 30,35
PCI_STOP# 30,35
PCI_AD[0..31]30,35
CLK_PCI_ICH 6ICH_PME# 38
PCI_RST# 30,31,35
PLTRST# 10,23,28,34
MCH_ICH_SYNC# 10
PCI_PIRQA#35
PCI_REQ0# 36
PCI_PLOCK# 35
PCI_GNT0# 35,36
PLTRST2# 38,39
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
ICH7(1/4)
21 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Place closely pin U45.A9
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LPC
PCI
SPI
GNT5#R328
GNT4#R347
(11)
(10)
(01)
unstuffunstuff
unstuff
unstuff stuff
stuff *
U21D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
R69 8.2K_0402_5%~D
1 2
R3471K_0402_5%~D@
12
R340 8.2K_0402_5%~D
1 2
R47 8.2K_0402_5%~D
1 2
Interrupt I/F
PCI
MISC
U45B
ICH7M A0_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R33210_0402_5%~D
@
12
R339 8.2K_0402_5%~D
1 2R256 8.2K_0402_5%~D
1 2
R46 8.2K_0402_5%~D
1 2
C3498.2P_0402_50V8J~D
@
1
2
R45 8.2K_0402_5%~D
1 2
R317 8.2K_0402_5%~D
1 2
R324 8.2K_0402_5%~D
1 2
R286 8.2K_0402_5%~D
1 2
R309 8.2K_0402_5%~D
1 2
R44 8.2K_0402_5%~D
1 2
R258 8.2K_0402_5%~D
1 2
R77 8.2K_0402_5%~D
1 2
R43 8.2K_0402_5%~D
1 2
R254 8.2K_0402_5%~D
1 2
U21A
74VHC08MTCX_NL_TSSOP14~D
IN11
IN22 OUT 3
P14
G7
R257 8.2K_0402_5%~D
1 2
R315 8.2K_0402_5%~D
1 2
R327 8.2K_0402_5%~D
1 2
R3281K_0402_5%~D
12
U21C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
R72 8.2K_0402_5%~D
1 2
R350 8.2K_0402_5%~D
1 2
U21B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
R255 8.2K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DDREQ
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_NMI
H_STPCLK#
H_FERR#
IDE_IRQ
H_DPRSTP#
IDE_DD9
IDE_DD2
CLK_PCIE_SATA#
IDE_DD15
ICH_RTCX2
IDE_DD0
IDE_DIOR#
CLK_PCIE_SATA
DPRSLP#
LPC_LFRAME#
IDE_DA1
IDE_DD14
IDE_DA2
LPC_LDRQ1#
IDE_DIOW#
ICH_AC_SDIN1
IDE_DD6
IDE_DA0
ICH_AC_SDOUT_R
IDE_DD13
SATA_ACT#
IDE_DD10
IDE_DD8
IDE_DD1
IDE_DD7
IDE_DD4
LPC_LAD3
ICH_AC_RST_R#
IDE_IRQ
IDE_DD[0..15]
IDE_DD12
IDE_DD3
IDE_DD5
ICH_RTCX1
SIO_RCIN#
LPC_LAD0
IDE_DD11
IDE_DDACK#
ICH_AC_SDIN0
LPC_LDRQ0#
H_DPSLP#
IDE_DIORDY
IDE_DCS1#
ICH_AC_SYNC_R
ICH_AC_SYNC_R
ICH_AC_RST_R#
ICH_AC_SDOUT_R
H_CPUSLP#H_CPUSLP_R#
SIO_A20GATE
H_PWRGOOD
H_SMI#
LPC_LAD2
IDE_DCS3#
H_FERR#
LPC_LAD1
ICH_AC_BITCLK_R
ICH_AC_BITCLK_R
PSATA_ITX_DRX_N0_CPSATA_ITX_DRX_P0_C
PSATA_IRX_DTX_N0_CPSATA_IRX_DTX_P0_C
SIO_A20GATE
SIO_RCIN#
ICH_INTVRMEN
SM_INTRUDER#
ICH_RTCRST#
THRMTRIP_ICH#
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN
+RTC_CELL
IDE_DD[0..15] 25
LPC_LFRAME# 28,38,39
IDE_DDACK#25
IDE_DIOR#25IDE_DIOW#25
ICH_AC_SDIN133
IDE_DDREQ 25
LPC_LAD[0..3] 28,38,39
IDE_DA[0..2] 25
CLK_PCIE_SATA6
H_INTR 7H_INIT# 7
H_DPSLP# 7
H_SMI# 7
H_IGNNE# 7
H_A20M# 7
H_NMI 7
H_STPCLK# 7
H_CPUSLP# 7,10
SATA_ACT#43
IDE_IRQ25
H_DPRSTP# 7,49
H_FERR# 7
H_PWRGOOD 7
SIO_RCIN# 39
IDE_DIORDY25
IDE_DCS1# 25
LPC_LDRQ0# 38
SIO_A20GATE 39
ICH_AC_SDIN026
IDE_DCS3# 25
CLK_PCIE_SATA#6
LPC_LDRQ1# 38
ICH_RST_AUDIO#26
ICH_SYNC_AUDIO26
ICH_SDOUT_AUDIO26
ICH_SYNC_MDC33
ICH_RST_MDC#33
ICH_SDOUT_MDC33
MDC_AC_BITCLK33
ICH_AC_BITCLK26
PSATA_ITX_DRX_N025
PSATA_IRX_DTX_N0_C25
PSATA_ITX_DRX_P025
PSATA_IRX_DTX_P0_C25
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
ICH7(2/4)
22 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Package9.6X4.06 mm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place near ICH7 side.
H_DPRSTP# daisy
Close to U45
Within 500 mils
ICH7-M --> Yonah --> IMVP6
C690.1U_0402_16V4Z~D
@
1
2
C50327P_0402_50V8J~D@
1
2
C382.2P_0402_50V8C 12
R121 0_0402_5%~D 12
R36
10M
_040
2_5%
~D
12
R380 24.9_0402_1%~D 1 2
R11556_0402_5%~D
1 2
C402.2P_0402_50V8C 12
R438 0_0402_5%~D@12
R8133_0402_5%~D 1 2
R27710K_0402_5%~D
12
R163110K_0402_5%~D
12
R297 20K_0402_5%~D
1 2
R37833_0402_5%~D
1 2
R301 332K_0402_1%~D
1 2
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U45A
ICH7M A0_BGA652~D
RTCX1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R11856_0402_5%~D
12
R18933_0402_5%~D
1 2
R414
8.2K_0402_5%~D
12
R371
33_0402_5%~D
1 2
R276 1M_0402_5%~D
1 2
R55333_0402_5%~D 1 2
CMOS@SHORT PADS~D
11 2 2
C270 3900P_0402_50V7K~D
12
X1
32.768KHZ_6PF_1TJS060BJ4A376P~D
14
23
C2713900P_0402_50V7K~D
12
C499 27P_0402_50V8J~D@
12
C3481U_0603_10V4Z~D 1 2
R8433_0402_5%~D
1 2
R8333_0402_5%~D
1 2
R120_0402_5%~D
1 2
R8233_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LINKALERT#
SMBALERT#
ICH_BATLOW#
ICH_PCIE_WAKE#
SIO_THRM#
IRQ_SERIRQ
CLKRUN#
ICH_SMBDATA
USBP3+
SIO_THRM#
USBP5-
ICH_PCIE_WAKE#
USBP7-
CLK_PCIE_ICH#
USBP5+
CLK_ICH_48M
PM_BMBUSY#
CLK_ICH_14M
CLK_PCIE_ICH
PLTRST#
USBP4-
USBP6-
H_STP_CPU#
SIO_SLP_S3#ITP_DBRESET#
CLK_ICH_48MUSBP3-
CLK_ICH_14MICH_RI#
USBP6+
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_SLP_S5#
USBP4+
USBP7+
SMBALERT#
CLKRUN#
USBRBIAS
DMI_IRCOMP
GPIO24
USB_OC0#
USB_OC3#
USB_OC1#USB_OC2#
USB_OC5#USB_OC6#USB_OC7#
ICH_SMBCLK
SPKR
LINKALERT#
USB_OC4#
H_STP_PCI#
ICH_SMLINK0ICH_SMLINK0ICH_SMLINK1 ICH_SMLINK1
SUSPWROK
ICH_BATLOW#
SIO_PWRBTN#
ICH_PWRGD
ICH_SUSCLK
PCIE_ITX_WLANRX_N2
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_P2
SIO_EXT_WAKE#
SIO_EXT_SCI#
USBP1+USBP1-
LAMP_STAT#
DPRSLPVR
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3
USBP0+USBP0-
PCIE_ITX_WANRX_N1
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_P1
PCIE_ITX_LOMRX_N3
PCIE_IRX_LOMTX_N3PCIE_IRX_LOMTX_P3
PCIE_ITX_LOMRX_P3
SPI_CS#
IDE_RST_MOD
USB_IDE#
LCD_TST
SATA_DET#
BT_RADIO_DIS#
BT_RADIO_DIS#
WWAN_RADIO_DIS#
ICHO_ECI_SPI_DATAICHI_ECO_SPI_DATA
USB_OC7#
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC2#
DPRSLPVR
SIO_EXT_SMI#
SIO_EXT_SCI#
ICH_EC_SPI_CLKUSBP2+USBP2-
LAMP_STAT#
IMVP_PWRGD
WWAN_RADIO_DIS#PLTRST_DELAY#
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+1.5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS+3.3V_SUS +3.3V_SUS
+3.3V_SUS
+3.3V_RUN
SIO_EXT_SMI#39
H_STP_CPU#6
IMVP_PWRGD42,49
USBP4+ 32USBP5- 32
USBP3+ 32
USBP5+ 32
USBP4- 32
USBP3- 32
IRQ_SERIRQ28,30,38,39
SIO_SLP_S3# 39
SIO_SLP_S5# 39
CLK_PCIE_ICH# 6CLK_PCIE_ICH 6
PM_BMBUSY#10
SIO_THRM#39
ICH_PCIE_WAKE#38
USBP6+ 32USBP7- 36USBP7+ 36
USBP6- 32
PLTRST# 10,21,28,34
CLK_ICH_14M 6CLK_ICH_48M 6
ICH_SMBDATA6,28,34ICH_SMBCLK6,28,34
CLKRUN#30,38,39
SPKR26
H_STP_PCI#6
SUSPWROK 18,42
SIO_PWRBTN# 39
ICH_PWRGD 10,42
DPRSLPVR 49
PCIE_IRX_WLANTX_N234PCIE_IRX_WLANTX_P234PCIE_ITX_WLANRX_N2_C34
PCIE_ITX_WLANRX_P2_C34
SIO_EXT_WAKE#39
SIO_EXT_SCI# 39
USBP1+ 38USBP1- 38
LAMP_STAT#19PLTRST_DELAY# 52
SATA_CLKREQ# 6
DMI_MTX_IRX_N0 10
DMI_MTX_IRX_N1 10
DMI_MTX_IRX_N2 10
DMI_MTX_IRX_N3 10
DMI_MTX_IRX_P0 10DMI_MRX_ITX_N0 10DMI_MRX_ITX_P0 10
DMI_MTX_IRX_P1 10DMI_MRX_ITX_N1 10DMI_MRX_ITX_P1 10
DMI_MTX_IRX_P2 10DMI_MRX_ITX_N2 10DMI_MRX_ITX_P2 10
DMI_MTX_IRX_P3 10DMI_MRX_ITX_N3 10DMI_MRX_ITX_P3 10
USBP0+ 34USBP0- 34
PCIE_IRX_WANTX_N134PCIE_IRX_WANTX_P134PCIE_ITX_WANRX_N1_C34
PCIE_ITX_WANRX_P1_C34
PCIE_IRX_LOMTX_N328
PCIE_ITX_LOMRX_N3_C28
PCIE_ITX_LOMRX_P3_C28
PCIE_IRX_LOMTX_P328
SPI_CS#39ICH_EC_SPI_CLK39
ICHO_ECI_SPI_DATA39ICHI_ECO_SPI_DATA39
ITP_DBRESET#7,39
USB_IDE# 25
IDE_RST_MOD25
LCD_TST19
SATA_DET# 25
BT_RADIO_DIS#40
USB_OC4# 32
USB_OC3# 32
USB_OC5# 32USB_OC6# 32
USB_OC2# 25
PM_EXTTS#1 10
USBP2+ 25USBP2- 25
WWAN_RADIO_DIS# 34
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
ICH7(3/4)
23 70Tuesday, February 07, 2006
Compal Electronics, Inc.
(PCI Express Wake Event)
Place closely pin U45.B2
Place closely pin U45.AC1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
close to ICH7-M
Within 500 mils
Within 500 mils
GIGA LAN --->
MiniWWAN (Mini Card 1) --->
MiniWLAN (Mini Card 2)--->
<---Docking
<---REAR
<---REAR
<---SIO USB Hub
<---SIDE TOP
<---SIDE BOTTOM
<---Mini2 WLAN
<---BT Moudle
T39 PAD~D
R1627 10K_0402_5%~D 1 2
R38
910
K_04
02_5
%~D
12
R554100K_0402_5%~D
1 2
C281 0.1U_0402_16V4Z~D
1 2
R784100K_0402_5%~D
12
R432 10K_0402_5%~D
1 2
C602 0.1U_0402_16V4Z~D
1 2
R1628 10K_0402_5%~D 1 2
R12610_0402_5%~D@
12
R1625 10K_0402_5%~D 1 2
R1623 10K_0402_5%~D 1 2
R38
410
K_04
02_5
%~D
12
R1633 10K_0402_5%~D
1 2
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U45D
ICH7M A0_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
R35
12.
2K_0
402_
5%~D
12
R373 10K_0402_5%~D
1 2
C82 0.1U_0402_16V4Z~D
12
R178747_0402_5%~D
1 2
R1756 10K_0402_5%~D
1 2
R1632 10K_0402_5%~D
1 2
R372 10K_0402_5%~D
1 2
R1799 0_0402_5%~D 1 2
C1244.7P_0402_50V8C~D@
1
2
R296 10K_0402_5%~D
1 2
R178647_0402_5%~D
1 2
R37910_0402_5%~D@
12
R34
110
K_04
02_5
%~D
12
R36
310
K_04
02_5
%~D
12
C2 0.1U_0402_16V4Z~D
1 2
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U45C
ICH7M A0_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
SATACLKREQ#/GPIO35 AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
R111 8.2K_0402_5%~D
1 2
R1626 10K_0402_5%~D 1 2
R4258.2K_0402_5%~D
12
R1624 10K_0402_5%~D 1 2
T36PAD~D
C1 0.1U_0402_16V4Z~D
1 2
R75 10K_0402_5%~D
1 2
R3522.2K_0402_5%~D
12
C380
4.7P_0402_50V8C~D@
1
2
R1629 10K_0402_5%~D 1 2
R28010K_0402_5%~D
1 2
C603 0.1U_0402_16V4Z~D
1 2
R113 20_0402_1%~D 1 2
R7410K_0402_5%~D
12
R1755 10K_0402_5%~D
1 2
R427 24.9_0402_1%~D
1 2
R38
810
K_04
02_5
%~D
12
R428 8.2K_0402_5%~D@ 1 2
R318 680_0402_5%~D
1 2
R1622 10K_0402_5%~D 1 2
R269 8.2K_0402_5%~D
1 2
R3038.2K_0402_5%~D
1 2
C282 0.1U_0402_16V4Z~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_V5REF_SUS
ICH_V5REF_RUN
ICH_V5REF_RUN
ICH_V5REF_SUS
+VCCSATAPLL
+1.5V_DMIPLL
+1.5VRUN_L
+3.3V_SUS+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+3.3V_RUN
+1.5V_RUN
+RTC_CELL
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
+3.3V_RUN+5V_RUN
+3.3V_SUS+5V_SUS
+3.3V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+1.5V_RUN
+1.5VRUN_L
+1.5V_DMIPLL
+VCCSATAPLL
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
ICH7(4/4)
24 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB is 270uF
C44
9
0.1U
_040
2_16
V4Z~
D
1
2
C46
010
U_0
805_
4VAM
~D
1
2
C37
40.
1U_0
402_
16V4
Z~D
1
2
C28
610
U_0
805_
4VAM
~D
1
2
C4244.7U_0603_6.3V4Z~D
1 2
L42BLM18AG601SN1D_0603~D
1 2
C38
71U
_060
3_10
V4Z~
D
1
2
C3700.1U_0402_16V4Z~D
1
2
C4420.1U_0402_16V4Z~D
1 2
C45
3
0.1U
_040
2_16
V4Z~
D
1
2
C32
80.
1U_0
402_
16V4
Z~D
1
2
C39
20.
1U_0
402_
16V4
Z~D
1
2
D16RB751S40T1_SOD523-2~D
21
C3930.1U_0402_16V4Z~D
1
2
C33
70.
1U_0
402_
16V4
Z~D
1
2
C3390.1U_0402_16V4Z~D
1
2
C474 0.1U_0402_16V4Z~D
1 2
C422
0.1U_0402_16V4Z~D
1
2
C33
80.
1U_0
402_
16V4
Z~D
1
2
R53710_0402_5%~D
12
+
C15
1
220U
_V_4
VM_R
45~D
1
2
L41
BLM21PG600SN1D_0805~D
1 2
R535100_0402_5%~D
12
C14440.1U_0402_16V4Z~D
1
2
R590.5_0603_1%
1 2
C4070.1U_0402_16V4Z~D
1
2
C41
20.
1U_0
402_
16V4
Z~D
1
2
L10710UH_LB2012T100MR_20%_0805~D
1 2
R370.5_0603_1%
1 2
C38
80.
1U_0
402_
16V4
Z~D
1
2
C382
0.1U_0402_16V4Z~D
1
2
C40
50.
1U_0
402_
16V4
Z~D
1
2
D17RB751S40T1_SOD523-2~D
21
U45F
ICH7M A0_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C4551U_0603_10V4Z~D
1
2
U45E
ICH7M A0_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
C4360.1U_0402_16V4Z~D
1
2
C3610.1U_0402_16V4Z~D
1
2
C45
80.
01U
_040
2_16
V7K~
D
1
2
C45
9
0.1U
_040
2_16
V4Z~
D
1
2
C34
70.
1U_0
402_
16V4
Z~D
1
2
C3530.1U_0402_16V4Z~D
1
2
C461
0.1U_0402_16V4Z~D
1
2
C45
4
0.1U
_040
2_16
V4Z~
D
1
2
C40
60.
1U_0
402_
16V4
Z~D
1
2
C4450.1U_0402_16V4Z~D
1 2
+
C45
033
0U_D
2E_2
.5VM
_R9~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_DDACK#
IDE_DDREQIDE_DIORDY
IDE_IRQ
IDE_DCS1#
IDE_DIOW#
IDE_DCS3#
IDE_DIOR#
IDE_RST_MOD
IDE_DD12
IDE_DA0
IDE_DD12
IDE_DA1
IDE_DD8
USB_OC2#
IDE_DD5
IDE_IRQ
IDE_DD11
IDE_DD14
IDE_DD4
IDE_DD2
IDE_DD15
IDE_DD1
IDE_DD3
IDE_DD8
IDE_DD13
IDE_DD14
IDE_DD13
IDE_DDREQ
IDE_DCS1#
IDE_DD10
IDE_DD3
IDE_DD7
IDE_DD0
IDE_DIOR#
IDE_DDACK#
IDE_DA1
IDE_DA2IDE_DD6
IDE_DD7
IDE_DD6
IDE_DIORDY
IDE_DD9
IDE_DD4
IDE_DA0
IDE_DD9
IDE_DD2
IDE_DIOW#
IDE_DD10
IDE_DD15
IDE_DCS3#
MOD_RST
IDE_DD5
IDE_DD11
CSEL2
IDE_DA2
IDE_DD0
SATA_DET#
IDE_DD1
BAY_MODPRES#
PSATA_IRX_DTX_P0
PSATA_ITX_DRX_P0PSATA_ITX_DRX_N0
USB_IDE#
IDE_DIORDY
PSATA_IRX_DTX_N0
USBP2+
USBP2-
+3.3V_SUS
+3.3V_ALW
+5VMOD
+5VHDD +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5VHDD
IDE_DIOR#22
IDE_DCS1#22
IDE_DA[0..2]22
IDE_DIORDY22
IDE_DCS3#22
IDE_DD[0..15]22
IDE_DIOW#22
IDE_DDREQ22IDE_IRQ22
IDE_DDACK#22
USB_OC2# 23
USB_IDE#23
IDE_RST_MOD23
SATA_DET# 23
BAY_MODPRES#38PSATA_IRX_DTX_N0_C22
PSATA_ITX_DRX_P022PSATA_ITX_DRX_N022
PSATA_IRX_DTX_P0_C22
USBP2+ 23
USBP2- 23
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
DVD MODULE
25 70Tuesday, February 07, 2006
1
3
6
2
DASP#
PDIAG#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Pleace near HD CONN
Main SATA +5V Default
close SATA connector
Pleace near HD CONN
WF1F068N
1A
TOP VIEW
5
4
C13
1510
U_0
805_
10V4
Z~D
@
1
2
C13233900P_0402_50V7K~D
12
C13
170.
1U_0
402_
16V4
Z~D
@
1
2
C13
024.
7U_0
603_
6.3V
4Z~D
1
2
C13
140.
1U_0
402_
16V4
Z~D
1
2
C13193900P_0402_50V7K~D 12
C1318
1U_0603_10V4Z~D
@
1
2
C13
450.
1U_0
402_
16V4
Z~D
@
1
2
C13
1610
00P_
0402
_50V
7K~D
@
1
2
C13
120.
1U_0
402_
16V4
Z~D
1
2
C13
050.
1U_0
402_
16V4
Z~D
1
2
R1330100K_0402_5%~D
1 2
C13
1110
00P_
0402
_50V
7K~D
1
2
C13
1010
U_0
805_
10V4
Z~D
1
2
R1331100K_0402_5%~D
1 2
C13
040.
1U_0
402_
16V4
Z~D
1
2
JMOD
TYCO_1770530-1~D
8.3
1 122
3 344
5 566
7 788
9 91010
11 111212
13 131414
15 151616
17 171818
19 192020
21 212222
23 232424
25 252626
27 272828
29 293030
31 313232
33 333434
35 353636
37 373838
39 394040
41 414242
43 434444
45 454646
47 474848
49 495050
51 515252
53 535454
55 555656
57 575858
59 596060
61 616262
63 636464
65 656666
67 676868
G71
G72
G69
G70
R13
2847
0_04
02_5
%~D
12
C1313
1U_0603_10V4Z~D
1
2
R512 4.7K_0402_5%~D
1 2
JSATA
TYCO_1775191-1_RV~D
GND1 23GND2 24
GND1RX+2RX-3GND4TX-5TX+6GND7
3.3V83.3V93.3V10GND11GND12GND135V145V155V16GND17Reserved18GND1912V2012V2112V22
R132933_0402_5%~D
1 2
C13
030.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AC97VREFI
CAP2
AUDIO_AVDD_ON TPS793475_BYPASS
AC97VREFI
ICH_SDOUT_AUDIO
ICH_AC_SDIN0_R
ICH_AC_BITCLK
CAP2
HP_NB_SENSE
SPDIF_DOCK
SPDIF_SHDN
SENSE_A
+Z2401
PC_BEEPZ2402 Z2404
HP_NB_SENSE
EAPD
DOCK_HP_MUTE#
+VDDA+3.3V_RUN
+VDDA+5V_SUS
+5V_RUN
+VDDA
VREFOUT
+VDDA
ICH_RST_AUDIO#22
ICH_SYNC_AUDIO22
ICH_SDOUT_AUDIO22
ICH_AC_BITCLK22
HP_OUT_L 27
HP_OUT_R 27
AUDIO_AVDD_ON38
NB_MICIN_L 27
ICH_AC_SDIN022
SPDIF_DOCK36
SPDIF_SHDN38
MIC_SWITCH 27
AUD_LINE_OUT 27
NB_MICIN_R 27
INT_MIC 27
BEEP38
SPKR23PC_BEEP 27
HP_NB_SENSE27,38
EAPD27
DOCK_HP_MUTE#38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Azalia (HD) Codec
26 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+VDDA=4.75V
Close to U10.18 Close to U10.20
Close to U10.5
W=30 mil
Close to U10.3
Default POP the LDO U22When U22 is popped, no pop L47.
STAC9200 Rev.
CA1
B1
R22 R109
5.11K 10K
39.2K 20K
TRACE>15 mil
45
2
single gate TTL
31
Note:U28,R496,R162,C529 place as close as U19
From SIO
R36122_0402_5%~D @
12
C17
61U
_060
3_10
V4Z~
D
1
2
C18
11U
_060
3_10
V4Z~
D
1
2
C50
02.
2U_0
603_
6.3V
6K~D
1
2
U28
SN74AHCT1G86DCKR_SC70-5~D
A1
B2 Y 4
P5
G3
C5390.1U_0402_16V4Z~D
1
2
R17685.1K_0402 _1%~D
12
C48
61U
_060
3_10
V4Z~
D
1
2
L47
BLM18AG601SN1D_0603~D
@ 1 2
C49
20.
047U
_040
2_16
V4Z~
D
1
2
R49610K_0402_5%~D
1 2
STAC9200
U10
STAC9200X5NAEB1XR_QFN32~D
SDATA_OUT2
BIT_CLK3
SYNC7
RESET#8
SPDIF _OUT32
CAP220
VREF_OUT19
VREF_IN18
AVD
D26
AVSS
117
AVSS
229
SPDIF _ IN/EAPD /GPIO331
SENSE_A 9
SDATA_IN5
LINE_IN_L 15
LINE_IN_R 16
CD_L 10
CD_R 12
HP_L 27
HP_R 28
LOUT_L 23
LOUT_R 24
MONO_OUT 25
DVD
D6
DVS
S4
GPIO021
GPIO122
GPIO230
MIC1 13
MIC2 14
NC11NC211
PAD
_GN
D33
C52
30.
1U_0
402_
16V4
Z~D
1
2
C18
2610
U_0
805_
10V4
Z~D
1
2
R480_0402_5%~D
@
1 2
R89 2.2K_0402_5%~D
1 2
C50
50.
047U
_040
2_16
V4Z~
D
1
2
R48847_0402_5%~D@
12
R1622.2K_0402_5%~D
12
C48
72.
2U_0
603_
6.3V
6K~D
1
2
C1781 1000P_0402_50V7K~D
1 2
R96 2.2K_0402_5%~D
1 2
R160 33_0402_5%~D
1 2
C5290.1U_0402_16V4Z~D
1 2
G
D
SQ442N7002W-7-F_SOT323~D
2
13
C49522P_0402_50V8J~D@
1
2
C51
00.
1U_0
402_
16V4
Z~D
1
2
C179
0.1U_0402_16V4Z~D
1 2
C50
60.
1U_0
402_
16V4
Z~D
1
2
C16
90.
1U_0
402_
16V4
Z~D
1
2
C189 0.1U_0402_16V4Z~D 1 2
C1780 1000P_0402_50V7K~D
1 2
R22
39.2
K_04
02_1
%~D
12
U22
TPS793475DBVRG4_SOT23-5~D
OUT 5
BYPASS 4
GND2
EN3
IN1
R109
20K_0402_1%~D
12
C18
250.
1U_0
402_
16V4
Z~D
1
2
G
D
S Q542N7002W-7-F_SOT323~D
2
13
C49
80.
1U_0
402_
16V4
Z~D
1
2
C49
11U
_060
3_10
V4Z~
D
1
2
C36222P_0402_50V8J~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_GAIN0
AUD_GAIN1
HP_NB_SENSE
HP_SPK_L1
PVSS
HP_SPK_R1
INT_SPK_R1
+5VAMPVCC
BYPASS
AUD_GAIN0
AUD_GAIN1
INT_SPK_R1
HP_SPK_R2HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
MIC_L1
MIC_R1 MIC_R2
MIC_L2MIC_BIAS
INT_MIC+
INT_MIC-
MIC_BIAS
C1P
AUD_LINE_IN_L
AUD_LINE_IN_R
C1N
PC_BEEP
RIN-
SPK_SHUTDOWN#
INT_SPK_R2
INT_SPK_R2
+5VAMPVCC
+3.3V_RUN
+3.3V_RUN
+5V_SUS +5VAMPVCC
+3VRUN_4411
+3.3V_RUN
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+VDDA
NB_MUTE38
HP_NB_SENSE26,38
MIC_SWITCH26
NB_MICIN_R26
NB_MICIN_L26
INT_MIC 26INT_MIC+32
INT_MIC-32
HP_OUT_L26
HP_OUT_R26
PC_BEEP26
AUD_LINE_OUT26
EAPD26
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
AMP and PHONE JACK
27 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Gain Setting
GAIN0 INPUTAV(inv)GAIN1
21.6dB
15.6dB
6dB
1
0
10dB
25K ohm
45K ohm
70K ohm
90K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
W=40mils
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NOTE: SPEAKER TRACE WIDTHSHOULD BE MINIMUM 10 MILS
C18002.2U_0603_6.3V6K~D
12
R17
7320
K_04
02_1
%~D
12
G
D
S
Q112N7002W-7-F_SOT323~D @2
13
C50
147
P_0
402_
50V8
J~D
1
2
C1794
2.2U_0603_6.3V6K~D
1 2
C17962.2U_0603_6.3V6K~D
1
2
C5341U_0603_10V4Z~D
1
2
JMIC
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
C1132.2U_0603_6.3V6K~D
1
2
C48510U_0805_10V4Z~D
1
2
C29
347
P_0
402_
50V8
J~D
1
2
C1462.2U_0603_6.3V6K~D
1
2
C56
610
00P_
0402
_50V
7K~D
@
1
2
C17
710
0P_0
402_
50V8
J~D
1
2
L108BLM18AG121SN1D_0603~D
12
R17811K_0402_5%~D
12
C1142.2U_0603_6.3V6K~D
1
2
C148 1U_0603_10V4Z~D
1 2
C5020.1U_0402_16V4Z~D
1
2
R177810K_0402_5%~D
1 2
C1795
1U_0603_10V4Z~D
1 2
R1779100K_0402_5%~D
1 2
R17
7610
0K_0
402_
5%~D
12
U9ALM358DR2G_SOIC8~D
P8
IN+3
IN-2 G4
O 1
R17801K_0402_5%~D
12
C49
347
P_0
402_
50V8
J~D
1
2
R1641K_0402_5%~D
12
U9BLM358DR2G_SOIC8~D
P8
IN+ 5
IN- 6G4
O7
L45
BLM21PG600SN1D_0805~D
1 2
C199
0.022U_0402_16V7K~D
12
R21404.99_0402_1%~D
12
C10
9
100P
_040
2_50
V8J~
D
1
2
R1701K_0402_5%~D @
12
JSPK
MOLEX_53398-0271~D
1122
R17704.99_0402_1%~D
12
R1784100K_0402_5%~D
1 2
C1471U_0603_10V4Z~D
1 2
C537
0.47U_0402_16V4Z~D
1
2
JAUDIO
FOX_JA9033L-B1N6-7F~D
12
3
4
5
6
78
C17970.1U_0402_16V4Z~D
1 2
C17
9347
P_0
402_
50V8
J~D
1
2
U5
MAX4411ETP+_TQFN20~D
C1P1
PGN
D2
C1N3
NC-4 4
PVss
5
NC-6 6
SVss
7
NC-8 8
OUTL 9
SVD
D10
INR15
SHDNR#14
INL13
NC-12 12
OUTR 11
NC-20 20
PVD
D19
SHDNL#18
SGN
D17
NC-16 16
L52BLM18AG601SN1D_0603~D
1 2
U19
TPA6017A2PWP_TSSOP20~D
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VDD
16PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PVD
D2
6
SHUTDOWN19
PAD_GND 21
R177710K_0402_5%~D
1 2
R17
7420
K_04
02_1
%~D
12
R17
714.
7K_0
402_
5%~D
12
R1775100K_0402_5%~D
12
L16BLM18AG121SN1D_0603~D
12
C17990.1U_0402_16V4Z~D
1 2
L17BLM18AG121SN1D_0603~D
12
R132100K_0402_5%~D
12
L15BLM18AG121SN1D_0603~D
12
C17752.2U_0603_6.3V6K~D
1 2
R17821K_0402_5%~D
12
R156
100K_0402_5%~D
12
C10
810
0P_0
402_
50V8
J~D
1
2
C1792
0.047U_0402_16V4Z~D
12
C17980.1U_0402_16V4Z~D
1 2
C4940.1U_0402_16V4Z~D
1
2
R17
724.
7K_0
402_
5%~D
12
G
D
S Q432N7002W-7-F_SOT323~D
2
13
C1791
0.047U_0402_16V4Z~D
12
R1711K_0402_5%~D@
12
R1651K_0402_5%~D
12
C15
310
0P_0
402_
50V8
J~D
1
2
C56
510
00P_
0402
_50V
7K~D
@
1
2
R17831K_0402_5%~D
12
C53
60.
047U
_040
2_16
V4Z~
D
1
2
C18012.2U_0603_6.3V6K~D
12
R17
6910
0K_0
402_
5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_LOM
CLK_PCIE_LOM#
LAN_TX3+
PLTRST#
LAN_TX3-
NV_STRAP0LOM_CS#
LOM_SI
LPC_LAD1
LAN_ACT#
XTALI
PCIE_IRX_LOMTX_P3_C
LPC_LAD0
LOM_SO
IRQ_SERIRQ
LAN_TX1-
LAN_TX2+
LPC_LFRAME#
PCIE_IRX_LOMTX_N3_C
REGCTL_PNP25
REGCTL_PNP12
LOM_SCLK
LAN_TX0-
LAN_TX1+
XTALO
LPC_LAD3
REGCTL_PNP12
NV_STRAP1CLK_PCIE_LOM
LINK_100#
LAN_TX2-
PCIE_WAKE#
LINK_10#
LAN_TX0+
PLTRST#
LPC_LAD2
CLK_PCI_LOM
LOM_SI
LOM_CS#
LOM_SCLKLOM_SO
LOM_CABLE_DETECT
TPM_GPIO1TPM_GPIO2
TPM_GPIO0
LOM_CLKREQ#
REGCTL_PNP25
+3VLAN
+3.3V_SRC
+2.5VLAN
PCIE_PLLVDD
XTALVDD
AVDD
+3VLAN
+1.2VLAN
GPHY_PLLVDDAVDDL
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_SDS_VDD
+1.2VLAN
BIASVDD
XTALVDD
+2.5VLAN
AVDD
+2.5VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3VLAN
+3VLAN
+2.5VLAN
AVDDL
PCIE_SDS_VDD
BIASVDD
+3VLAN
+2.5VLAN
+1.2VLAN
+1.2VLAN
+3VLAN
+3VLAN
+3.3V_RUN
+3VLAN
+3VLAN
PCIE_WAKE# 34,38CLK_PCIE_LOM# 6CLK_PCIE_LOM 6
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29LAN_TX1+ 29
LAN_TX0- 29LAN_TX0+ 29
ENAB_3VLAN41
PCIE_IRX_LOMTX_P3 23
PCIE_ITX_LOMRX_N3_C 23
PCIE_IRX_LOMTX_N3 23
PCIE_ITX_LOMRX_P3_C 23
LAN_TX2+ 29
LAN_ACT#29
LINK_10#29LINK_100#29
CLK_PCI_LOM6
ICH_SMBCLK6,23,34ICH_SMBDATA6,23,34
PLTRST# 10,21,23,34
LPC_LFRAME#22,38,39
IRQ_SERIRQ23,30,38,39PLTRST#10,21,23,34
LPC_LAD[0..3]22,38,39
LOM_CABLE_DETECT38
LAN_TPM_EN#38
LOM_CLKREQ#6
LAN_LOW_PWR 38
LAN_LOW_PWR38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
BCM5751M
28 70Tuesday, February 07, 2006
1C4
MMJT9435
B
C2
3E
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARYAtmel AT45BCM021B
ST M45PE20
NV_STRAP1 NV_STRAP0 SO SI CS# SCLK
0
1
0 0
0 0 0
1
1
1 1
1
Place closely pin J8
Pop C1375 for 5752-A0,De-pop for 5752-A1
R7, R9 are 1/2 W rating
C13790.1U_0402_16V4Z~D
1 2
R1584 10K_0402_5%~D
12
C800.1U_0402_16V4Z~D@
1
2
R17 0_0402_5%~D
12
R1364
1.18K_0402_1%~D
12
C1741
4.7U_0603_6.3V
4Z~D
1
2
R120
0_0603_5%~D
1 2
R1367
200_0402_1%~D
12
L62
BLM18AG601SN1D_0603~D
12
R1268 4.7K_0402_5%~D@1 2
C1371
0.1U_0402_16V4Z~D
1
2
U188
AT45BCM021B-SU_SO8~D
@
SI 1SCK 2
RESET# 3CS# 4
SO8GND7VCC6WP#5
R1368
0_0603_5%~D
12
C1742
0.1U_0402_16V4Z~D
1
2
C13880.1U_0402_16V4Z~D
1
2
R13 4.7K_0402_5%~D@1 2
R6820K_0402_5%~D @
1 2
C1368
0.1U_0402_16V4Z~D
1
2
R18 4.7K_0402_5%~D@1 2
R7822_0402_5%~D
@
12
C1392
0.1U_0402_16V4Z~D
1
2
Q63MMJT9435T1G_SOT223~D
1
23
4
C1361
0.1U_0402_16V4Z~D
1
2
Q68
MBT35200MT1G_TSOP6~D 3
41 2 5 6
R11 1K_0402_5%~D
12
L60
BLM18AG601SN1D_0603~D
12
X425MHZ_18PF_1BX25000CK1D~D
1 2
R13
654.
7K_0
402_
5%~D
12
C13
570.
1U_0
402_
16V4
Z~D
1
2
C1743
10U_0805_10V4Z~D
1
2
R7039K_0402_5%~D@1 2
C13904.7U_0603_6.3V4Z~D
@
1
2
U3
M45PE20-VMN6TP_SO8~D
D 1C 2
RESET# 3S# 4
Q8VSS7VCC6W#5
C13840.1U_0402_16V4Z~D
1
2
R1439 4.7K_0402_5%~D
12
C13854.7U_0603_6.3V4Z~D
1
2
C13834.7U_0603_6.3V4Z~D
1
2
C13
670.
1U_0
402_
16V4
Z~D
1
2
R12674.7K_0402_5%~D
1 2
C1370
0.1U_0402_16V4Z~D
1
2
C13
530.
1U_0
402_
16V4
Z~D
1
2
R7
2_12
10_5
%~D
12
C13910.1U_0402_16V4Z~D
@
1
2
C13
660.
1U_0
402_
16V4
Z~D
1
2
R9
2_12
10_5
%~D
12
C13860.1U_0402_16V4Z~D
1
2
C13
94
27P
_040
2_50
V8J~
D
1
2
LPC/TPM
Media
GPIO
BCM5752
Power
PCI-E
TEST
LED
Bias
Clock
Control
Regulator
Control
SPI
SMBUS
U214A
BCM5752KFBG A2_FPBGA144~D
TRD3+ B11TRD3- B12TRD2+ C11TRD2- C12TRD1+ D11TRD1- D12TRD0+ E11TRD0- E12
LCLKJ8
LAD0J7LAD1L10LAD2J5LAD3K9
LFRAMEJ9LRESETM10SERIRQH7
GPIO0H9GPIO1H11GPIO2C5
SMB_CLKC8SMB_DATAC7
SERIAL_DI J1SERIAL_DO M4
SIE10 SCLKC9
SOD9CSC10
PERST B1
REGCTL12 J11
REGCTL25 M11
REGSEN25 M12
LINKLEDA9SPD100LEDB9SPD1000LEDA10TRAFFICLEDB8
PCIE_TXDN M3
PCIE_TXDP L3
PCIE_RXDN L7
PCIE_RXDP M7
WAKE A4REFCLK- L5REFCLK+ M5
VAUXPRSNT B6
TCK B5TDI F3
TDO B4TMS E3
TRST D4
RDAC A8
XTALIL9
XTALOM9
REFCLK_SEL B3
LOW_PWR H4
REGSUP12 K12
REGSEN12 J12GPIO3C4
GPHY_TVCOI C6
ATTN_BTTN A2TPM_GPIO0G4
TPM_GPIO2H3 TPM_GPIO1J3
TPM_ENJ6 VMAINPRSNT G11
NV_STRAP1M1 NV_STRAP0M2
C13
520.
1U_0
402_
16V4
Z~D
1
2
C13
540.
1U_0
402_
16V4
Z~D
1
2
C13
634.
7U_0
603_
6.3V
4Z~D
1
2
R1585 10K_0402_5%~D
12
C13
510.
1U_0
402_
16V4
Z~D
1
2S
GD
Q62SI3456BDV-T1-E3_TSOP6~D
36
245
1
C13
560.
1U_0
402_
16V4
Z~D
1
2
R58
0_0402_5%~D
@12
R13604.7K_0402_5%~D@
1 2
BCM5752
Analogpower
PLL
GND
Digial power
BIAS
U214B
BCM5752KFBG A2_FPBGA144~D
VDDC_0D5
VDDC_4H5VDDC_5H6VDDC_6H8VDDC_7J4
VDDIO_3F1VDDIO_4G10VDDIO_5J2VDDIO_6L1VDDIO_7L12
VSS_4 E6VSS_5 E7VSS_6 E8VSS_7 E9VSS_8 F4VSS_9 F5
VSS_10 F6VSS_11 F7VSS_12 F8VSS_13 F9VSS_14 G5VSS_15 G6VSS_16 G7VSS_17 G8VSS_18 L2VSS_19 L6VSS_20 M6
NC_7 D2NC_8 D3NC_9 E1
NC_10 E2NC_11 F2
VDDC_3D8 VDDC_2D7 VDDC_1D6
VSS_3 E5VSS_2 E4VSS_1 B10VSS_0 B2
NC_18 J10
VDDP_0A5VDDP_1G3VDDP_2L11
XTALVDDH12
PCIE_SDSVDDK4
AVDDL_0F10AVDDL_1F11
AVDD_0A11AVDD_1F12
PCIE_PLLVDDK6
GPHY_PLLVDDG12
BIASVDDA12
NC_12 G1
NC_0 A1NC_1 A6NC_2 A7NC_3 B7NC_4 C1NC_5 C3NC_6 D1
NC_13 G2NC_14 G9NC_15 H1NC_16 H2NC_17 H10
NC_19 K1NC_20 K2NC_21 K3NC_22 K5NC_23 K7NC_24 K8NC_25 K10NC_26 K11NC_27 L4NC_28 L8NC_29 M8
VDDIO_0A3VDDIO_1C2VDDIO_2D10
R1586 4.7K_0402_5%~D@12
C13
550.
1U_0
402_
16V4
Z~D
1
2
C13820.1U_0402_16V4Z~D
1
2
C7822P_0402_50V8J~D
@
1
2
R16 0_0402_5%~D@1 2
L63
BLM18AG601SN1D_0603~D
12
R10 1K_0402_5%~D
12
C13770.1U_0402_16V4Z~D
1 2
R13
664.
7K_0
402_
5%~D
@
12
R14 4.7K_0402_5%~D
1 2
R1583 10K_0402_5%~D
12
C13
93
27P
_040
2_50
V8J~
D
1
2
C1362
4.7U_0603_6.3V
4Z~D
1
2
C13
650.
1U_0
402_
16V4
Z~D
1
2
C13874.7U_0603_6.3V4Z~D
1
2
C13760.1U_0402_16V4Z~D
1
2
L64
BLM18AG601SN1D_0603~D
12
C1740
0.1U_0402_16V4Z~D
1
2
C1375470P_0402_50V7K~D@
1
2
C13
580.
1U_0
402_
16V4
Z~D
1
2
L61
BLM18AG601SN1D_0603~D
12
C13780.1U_0402_16V4Z~D
1
2
C13
640.
1U_0
402_
16V4
Z~D
1
2
C1369
10U_0805_10V4Z~D
1
2
L65
BLM18AG601SN1D_0603~D
12
R534.7K_0402_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
LAN_TX0- LAN_TX0-R
LAN_TX0+ LAN_TX0+R
LAN_TX1- LAN_TX1-R
LAN_TX1+ LAN_TX1+R
LAN_TX2- LAN_TX2-R
LAN_TX2+ LAN_TX2+R
LAN_TX3- LAN_TX3-R
LAN_TX3+ LAN_TX3+R
SW_LAN_TX3+SW_LAN_TX3-
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0+SW_LAN_TX0-
DOCK_LAN_TX0-
DOCK_LED_100#DOCK_LED_10#
DOCK_LAN_TX1-DOCK_LAN_TX1+
LINK_LED100#
DOCK_LAN_TX0+
DOCK_LAN_ACTLED_YEL#
DOCK_LAN_TX2+
DOCK_LAN_TX3+DOCK_LAN_TX3-
DOCK_LAN_TX2-
LAN_ACT#
LINK_100#
LINK_LED10#
LINK_LED100#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
LAN_TX3-LAN_TX3+
LAN_TX2-LAN_TX2+
LAN_TX1+
LAN_TX0+LAN_TX0-
LAN_TX1-
LINK_10#
LINK_LED10#LAN_LEDACT#
+3VLAN
+3VLAN
DOCKED36,38
LAN_TX0-28
LAN_TX0+28
LAN_TX1-28
LAN_TX1+28
LAN_TX2-28
LAN_TX2+28
LAN_TX3-28
LAN_TX3+28
LAN_ACT#28LINK_10#28LINK_100#28
DOCK_LAN_TX0- 36
DOCK_LAN_TX1- 36DOCK_LAN_TX1+ 36
DOCK_LAN_TX0+ 36
DOCK_LAN_TX2+ 36
DOCK_LAN_TX3+ 36
DOCK_LAN_TX2- 36
DOCK_LAN_TX3- 36
DOCK_LAN_ACTLED_YEL# 36DOCK_LED_10# 36DOCK_LED_100# 36
SW_LAN_TX0+ 32SW_LAN_TX0- 32
SW_LAN_TX1+ 32SW_LAN_TX1- 32
SW_LAN_TX2+ 32SW_LAN_TX2- 32
SW_LAN_TX3+ 32SW_LAN_TX3- 32
LAN_ACTLED_YEL_R# 32
LED_10_GRN_R# 32
LED_100_ORG_R# 32
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
LAN TRANSFOMER
29 70Tuesday, February 07, 2006
TODOCKFROM NIC DOCKED
1: TO DOCK0: TO RJ45
LAN ANALOGSWITCH
Layout Notice : Place bead asclose PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Layout Notice : Placetermination as close asASIC as possible
The resistors need atleast 1/16W
R1374 49.9_0402_1%~D
1 2
R1376 49.9_0402_1%~D
1 2
C1399 0.1U_0402_16V4Z~D
1 2
L69 36NH_0603CS-360EJTS_5%_0603~D
1 2
L73 36NH_0603CS-360EJTS_5%_0603~D
1 2
C1395 0.1U_0402_16V4Z~D
1 2
C1400 0.1U_0402_16V4Z~D
1 2
C1398 0.1U_0402_16V4Z~D
1 2
R1385
150_0402_5%~D
1 2
R1375 49.9_0402_1%~D
1 2
R13
80
10K_
0402
_5%
~D @12
R1384
150_0402_5%~D
1 2
L68 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1372 49.9_0402_1%~D
1 2
U189
PI3L500E_TQFN56~D
SEL17
A02
A13
A27
A38
A411
A512
A614
0B1 48
0B2 46
1B1 47
1B2 45
2B1 43
2B2 41
3B1 42
3B2 40
4B1 37
4B2 35
5B1 36
5B2 34
6B1 32
6B2 30
7B1 31
7B2 29
A715
LED019LED120LED254
0LED1 22
0LED2 25
1LED1 23
1LED2 26
2LED1 52
2LED2 51PAD_GND57
VDD
04
VDD
110
VDD
218
VDD
327
VDD
438
VDD
550
VDD
656
GN
D0
1G
ND
16
GN
D2
9G
ND
313
GN
D4
16G
ND
521
GN
D6
24G
ND
728
GN
D8
33G
ND
939
GN
D10
44G
ND
1149
GN
D12
53G
ND
1355
NC5
L71 36NH_0603CS-360EJTS_5%_0603~D
1 2
R13
79
10K_
0402
_5%
~D @12
R1371 49.9_0402_1%~D
1 2R1370 49.9_0402_1%~D
1 2
R1382
150_0402_5%~D
1 2
L70 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1377 49.9_0402_1%~D
1 2
R13
81
10K_
0402
_5%
~D @12
L75 36NH_0603CS-360EJTS_5%_0603~D
1 2L74 36NH_0603CS-360EJTS_5%_0603~D
1 2
R1373 49.9_0402_1%~D
1 2
L72 36NH_0603CS-360EJTS_5%_0603~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CCLK
PCI_AD17
CBS_SLATCH
PCI_AD4
PCI_RST#
PCI_C_BE0#
PCI_IRDY#
PCI_AD8
PCI_RST#
CBS_RSVD/D2
CBS_CGNT#
CBS_CSTSCHNG
CBS_CSERR#
CBS_CPAR
CBS_CC/BE1#
CBS_CSTOP#
CBS_CC/BE0#
CBS_CPERR#
PCI_C_BE2#
PCI_AD9
PCI_AD18
PCI_AD24
PCI_AD31
PCI_DEVSEL#
PCI_C_BE1#
PCI_AD14
PCI_AD23
PCI_AD25
PCI_AD0
PCI_AD3
PCI_AD29
CLK_PCI_PCM
CBS_CAUDIO
PCI_AD20
PCI_AD7
PCI_PIRQC#
PCI_C_BE3#
PCI_AD30
PCI_PAR
PCI_TRDY#
PCI_AD22
PCI_AD6
PCI_AD19
CBS_SATA
CBS_CCD1#CBS_CVS2
CBS_IDSEL
PCI_AD2
PCI_FRAME#
PCI_AD27
CBS_CDEVSEL#
PCI_AD5
CBS_CBLOCK#
CBS_CC/BE2#
CBS_CCD2#
PCI_AD11PCI_AD10
PCI_AD12
PCI_AD26
PCI_AD1
PCI_AD13
CBS_CREQ#
CBS_CC/BE3#
CBS_RSVD/A18
CBS_CFRAME#
CBS_RSVD/D14
CLKRUN#
CBS_CTRDY#
PCI_AD16
CBS_CINT#
CBS_CCLKRUN#CBS_CRST#
CBS_CVS1
CBS_SCLK
PCI_AD17
PCI_AD28
CBS_CIRDY#
PCI_GNT1#
PCI_AD15
PCI_AD21
PCI_STOP#
PCI_PERR#
PCI_REQ1#
IRQ_SERIRQ
CBS_CAD7
CBS_CAD1
CBS_CAD25
CBS_CAD0
CBS_CAD2
CBS_CAD28
CBS_CAD21
CBS_CAD9
CBS_CAD30CBS_CAD31
CBS_CAD20
CBS_CAD12
CBS_CAD27
CBS_CAD4
CBS_CAD10
CBS_CAD18
CBS_CAD8
CBS_CAD11
CBS_CAD29
CBS_CAD24
CBS_CAD3
CBS_CAD15
CBS_CAD26
CBS_CAD23CBS_CAD22
CBS_CAD19
CBS_CAD17CBS_CAD16
CBS_CAD14CBS_CAD13
CBS_CAD6CBS_CAD5
CLK_PCI_PCM
CBS_CAD0
CBS_CINT#
CBS_CAD5CBS_CAD3CBS_CAD1
CBS_CCLK
CBS_CCLKRUN#
CBS_CAD11CBS_CAD9
CBS_CAD7
CBS_CAD14
CBS_CAD21
CBS_CAD20CBS_CAD18
CBS_CAD12
CBS_CAD22
CBS_CAD25
CBS_CAD24
CBS_CAD27
CBS_CAD23
CBS_CAD26
CBS_CC/BE2#
CBS_CC/BE1#
CBS_CC/BE0#
CBS_CAD29
CBS_CPAR
CBS_CIRDY#
CBS_RSVD/D2
CBS_CPERR#CBS_CGNT#
CBS_RSVD/D14
CBS_CAD2CBS_CCD1#
CBS_CAD4CBS_CAD6
CBS_CAD8
CBS_CVS1
CBS_CAD15
CBS_CAD15
CBS_CAD13
CBS_CAD13
CBS_CAD10
CBS_CCD2#
CBS_CAD30CBS_CAD31
CBS_CSTSCHNGCBS_CAUDIO
CBS_CAD28
CBS_CRST#
CBS_CC/BE3#
CBS_CSERR#CBS_CREQ#
CBS_CVS2
CBS_CAD17CBS_CAD19
CBS_CTRDY#CBS_CFRAME#
CBS_CSTOP#CBS_CDEVSEL#
CBS_CBLOCK#
CBS_CAD16CBS_RSVD/A18
CBS_CCD1#CBS_CCD2#CBS_CVS1CBS_CVS2
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN+3.3V_RUN
+CBS_VCC
+CBS_VCC +CBS_VCC
SYS_PME#35,38
PCI_PIRQC#21IRQ_SERIRQ23,28,38,39
CLKRUN#23,38,39
PCI_AD[0..31]21,35
PCI_C_BE3#21,35
PCI_C_BE1#21,35PCI_C_BE0#21,35
PCI_C_BE2#21,35
PCI_PAR21,35
PCI_PERR#21,35
PCI_REQ1#21PCI_GNT1#21
PCI_RST#21,31,35
CLK_PCI_PCM6PCI_DEVSEL#21,35PCI_FRAME#21,35,36PCI_IRDY#21,35,36PCI_TRDY#21,35PCI_STOP#21,35
USB_HUBP1+ 38USB_HUBP1- 38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Card Bus OZ601
30 70Tuesday, February 07, 2006
22K TO 47K PULL-UP & PULL-DOWN RESISTORS AREREQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
IDSEL SELECT POWER-ON-STRAPPING(SEE NOTE & TABLE FOR OPTIONS)
NOTE: IDSEL SELECTION!THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREEPCI AD LINES OR EXTERNAL IDSEL SIGNAL.
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWSFOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLYCONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUSTBE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
22K TO 47K PULL-UPS MUST BE PLACEDON INTA#, PME#, SERIRQ# & CLKRUN#.
NOTE:
EXTERNAL IDSEL AND WITHOUT 12V VPP SUPPORT.THIS PAGE SHOWS THE OZ601B CONFIGURED WITH
VCC5# VPP_PGM IDSEL SELECT (124) (123)
UP UP PIN 127
DOWN DOWN AD18
DOWN UP AD20
UP DOWN AD25
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place closely pin 26
C14
184.
7U_0
603_
6.3V
4Z~D
1
2
R1307100_0402_5%~D
1 2
U2
OZ2522LN-A1_QFN32~D
+5V19+5V20
+3.3V3+3.3V4
DATA1CLK2LATCH6
RESET#32
HOST_CLK18SC_CLK22HOST_RST11SC_RST12HOST_I/O9SC_I/O10
GND7
AVCC 29AVCC 30AVCC 31
AVPP 28
BVCC 13
CD1# 14CD2# 15
VS1 16VS2 17
+3.3V5
NC 8
+5V21
NC 25
HOST_DN 24HOST_DP 27
CARD_DN 23CARD_DP 26
U193
OZ601TN_TQFP128~D
CORE_VCC64CORE_VCC77CORE_VCC97CORE_VCC115
PCI_VCC1PCI_VCC20PCI_VCC33
AD314AD305AD296AD287AD278AD269AD2510AD2413AD2314AD2215AD2116AD2017AD1918AD1819AD1721AD1622AD1528AD1429AD1330AD1231AD1134AD1035AD936AD837AD738AD639AD540AD441AD342AD243AD144AD046VPP_VCC/VPPD1/IDSEL127C/BE3#11C/BE2#12C/BE1#49C/BE0#50
PCI_CLK26DEVSEL#27FRAME#23IRDY#24TRDY#25STOP#47PAR48
PERR#/SPKR_OUT51
REQ#2GNT#3
RST#126PME#/RI_OUT#120
MF6 55MF4 54MF3 53MF0 52
VCC5#/VCCD0#/SDATA 124VCC3#/VCCD1#/SCLK 125
VPP_PGM/VPPD0/SLATCH 123
D10/CAD31 103D9/CAD30 102D1/CAD29 101D8/CAD28 100D0/CAD27 99A0/CAD26 110A1/CAD25 109A2/CAD24 108A3/CAD23 106A4/CAD22 105A5/CAD21 104A6/CAD20 118
A25/CAD19 95A7/CAD18 94
A24/CAD17 93A17/CAD16 75
IOW#/CAD15 73A9/CAD14 74
IORD#/CAD13 71A11/CAD12 72OE#/CAD11 70
CE2#/CAD10 69A10/CAD9 68D15/CAD8 85
D7/CAD7 84D13/CAD6 82
D6/CAD5 83D12/CAD4 80
D5/CAD3 81D11/CAD2 78
D4/CAD1 79D3/CAD0 76
A16/CCLK 107A23/CFRAME# 114
A15/CIRDY# 117A22/CTRDY# 116
A21/CDEVSEL# 113A20/CSTOP# 61
A13/CPAR 58A14/CPERR# 60
WAIT#/CSERR# 91INPACK#/CREQ# 89
WE#/CGNT# 62RDY/IREQ#/CINT# 88
A19/CBLOCK# 59WP/CCLKRUN# 87RESET/CRST# 119
D2/RFU 98D14/RFU 86A18/RFU 63
VS1/CVS1 57VS2/CVS2 121
CD1#/CCD1# 56CD2#/CCD2# 122
BVD2/LED/CAUDIO 92BVD1/STSCHG#/RI#/CSTSCHG 90
REG#CCBE3# 111A12/CCBE2# 112
A8/CCBE1# 66CE1/CCBE0# 67
GN
D32
GN
D45
GN
D65
GN
D96
GN
D12
8
R71 0_0402_5%~D@1 2
R14
0733
K_04
02_5
%~D
12
C14
470.
1U_0
402_
16V4
Z~D
1
2
C14
230.
1U_0
402_
16V4
Z~D
1
2
R8822_0402_5%~D
@
12
C14
244.
7U_0
603_
6.3V
4Z~D
1
2
C14
260.
1U_0
402_
16V4
Z~D
1
2
C14
200.
1U_0
402_
16V4
Z~D
1
2
C8122P_0402_50V8J~D
@
1
2
C14
250.
1U_0
402_
16V4
Z~D
1
2
C14
224.
7U_0
603_
6.3V
4Z~D
1
2C14
210.
1U_0
402_
16V4
Z~D
1
2
R14
0633
K_04
02_5
%~D
12
C14
190.
1U_0
402_
16V4
Z~D
1
2
JCBUS
TYCO_1734648-1~D
GND11A_CAD02A_CAD13A_CAD34A_CAD55A_CAD76A_PCI_C/BE0#7GND28A_CAD99A_CAD1110A_CAD1211GND312A_CAD1413A_PCI_C/BE1#14A_CPAR15GND416A_CPERR#17A_CGNT#18A_CINT#19+AVCC020+AVPP021A_CCLK22A_CIRDY23A_PCI_C/BE2#24
GND527
A_CAD1825A_CAD2026
A_CAD2128A_CAD2229
GND632
A_CAD2330A_CAD2431
A_CAD2533A_CAD2634
GND736 A_CAD2735
A_CAD2937CB_A_D238A_CCLKRUN#39GND840
A_CCD1# 42A_CAD2 43A_CAD4 44A_CAD6 45
GND10 48
CB_A_D14 46A_CAD8 47
A_CAD10 49A_CVS1 50
GND11 52A_CAD13 51
A_CAD15 53A_CAD16 54
CB_A_A18 55GND12 56
A_CBLOCK# 57A_CSTOP# 58
A_CDEVSEL# 59+AVCC1 60+AVPP1 61
A_CTRDY# 62A_CFRAME# 63
A_CAD17 64
GND13 67
A_CAD19 65A_CVS2 66
A_CRST# 68A_CSERR# 69
GND14 72
A_CREQ# 70A_PCI_C/BE3# 71
A_CAUDIO 73A_CSTSCHG 74
GND15 76A_CAD28 75
A_CAD30 77A_CAD31 78A_CCD2# 79
GND9 41
GND16 80C
1416
4.7U
_060
3_6.
3V4Z
~D
1
2
C14
480.
1U_0
402_
16V4
Z~D
1
2
C14
170.
1U_0
402_
16V4
Z~D
1
2
R4 33_0402_5%~D
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_SMC_48M
SCCD-SCCD+
VRCPR
MD0
+SC_PWR
PCI_RST#
SC_RST#
SCCD+SC_CLK
SC_IO
USB_HUBP3-USB_HUBP3+
SCCD-
SC_C4
SC_DET#
CLK_SMC_48M
SC_DET#
USB_BIO_L-USB_BIO_L+
+5V_RUN
+SC_PWR
+3V_PWR
+3.3V_RUN
CLK_SMC_48M6
USB_HUBP3-38USB_HUBP3+38
PCI_RST#21,30,35
SC_DET# 38
USB_BIO- 40
USB_BIO+ 40
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Smart Card OZ77C6
31 70Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)
MODE1 CLOCK INPUT
LOW 48MHz
HIGH 6MHz Crystal
Place closely pin 3
C14
401U
_060
3_10
V4Z~
D
1
2
C14
390.
1U_0
402_
16V4
Z~D
1
2C
1433
0.1U
_040
2_16
V4Z~
D
1
2
C17
490.
1U_0
402_
16V4
Z~D
1
2
R1421 33_0402_5%~D
12
C83 47
P_0
402_
50V8
J~D
1
2
L5
DLW21SN900SQ2_0805~D
@
11
44 3 3
2 2
C1354.7P_0402_50V8C~D
@ 1
2
R15
971.
5K_0
402_
1%~D
12
R13
3610
K_04
02_5
%~D
12
C84 47
P_0
402_
50V8
J~D
1
2
C14
364.
7U_0
603_
6.3V
4Z~D
1
2 R14
19
47K_
0402
_5%
~D
12
R13310_0402_5%~D
@ 12
R14
16
15K_
0402
_5%
~D
12
C45
74.
7U_0
603_
6.3V
4Z~D
1
2
C76
0.1U
_040
2_16
V4Z~
D
1
2
R1423 220_0402_5%~D
12
JSC
MOLEX_52207-1085~D
11 22 33 44 55 66 77 88 99 1010
GND11 GND12
R122 33_0402_5%~D
1 2
R1424 330_0402_5%~D
12
R1420 220_0402_5%~D
12
C17
484.
7U_0
603_
6.3V
4Z~D
1
2
R123 33_0402_5%~D
1 2
R15
96
15K_
0402
_5%
~D
12R
1595
15K_
0402
_5%
~D
12
C14
370.
1U_0
402_
16V4
Z~D
1
2
U1
OZ77C6LN-A1_QFN32~D 10.1
VCC5V_IN5VCC5V_IN28
UPD-17UPD+16
RST#14
NC30NC31
XI/48M_IN3XO4
MODE0/SC_LED#32MODE11MODE22
GND11GND13GND26
+3.3V_OUT 29
DPD- 19DPD+ 18
EGATED- 21EGATED+ 20
SC_VCC 27
SC_RST# 24SC_CLK 23
SC_C4 22SC_IO 25
SC_DET# 15
RF_OUT 8RF_IN/RX 7
RF_CLK 9RF_AUX 10
VR_C
PR6
VR_C
PR12C1443
1U_0603_10V4Z~D
12
R14
25
4.7K
_040
2_5%
~D
12
R14
17
15K_
0402
_5%
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_OC5#
USB_OC3#
USB_OC4#
USB_OC6#
USB_SIDE_EN#
USB_BACK_EN#
USBP5_D+
USBP5_D-
USBP6_D+
USBP6_D-
LED_10_GRN_R#LED_100_ORG_R#
LAN_ACTLED_YEL_R#
SW_LAN_TX0+
SW_LAN_TX1+SW_LAN_TX1-
SW_LAN_TX0-
SW_LAN_TX2+
SW_LAN_TX3-SW_LAN_TX3+SW_LAN_TX2-
USBP5_D+USBP5_D-
USBP6_D-USBP6_D+
INT_MIC-INT_MIC+
R_SATA_ACT
USBP4-USBP4+
BATT_GREEN_LEDBATT_AMBER_LED
BREATH_GREEN_LED
R_BT_ACTR_MPCI_ACT
USBP3-USBP3+
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
+USB_BACK_PWR
+USB_BACK_PWR
+5V_SUS
+5V_SUS
+USB_SIDE_PWR
+3VLAN
+USB_SIDE_PWR
+2.5VLAN
+USB_SIDE_PWR +USB_BACK_PWR
USB_OC5# 23
USB_OC3# 23
USB_OC4# 23
USB_OC6# 23USB_BACK_EN#38
USB_SIDE_EN#38
SW_LAN_TX2+ 29SW_LAN_TX2- 29SW_LAN_TX3+ 29SW_LAN_TX3- 29
LED_10_GRN_R# 29LED_100_ORG_R# 29
LAN_ACTLED_YEL_R# 29
SW_LAN_TX0+ 29SW_LAN_TX0- 29SW_LAN_TX1+ 29SW_LAN_TX1- 29
USBP5-23
USBP5+23
USBP6-23
USBP6+23INT_MIC-27INT_MIC+27
R_SATA_ACT 43
USBP4-23USBP4+23
BATT_GREEN_LED43BATT_AMBER_LED43R_BT_ACT43R_MPCI_ACT43
BREATH_GREEN_LED43
USBP3-23USBP3+23
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
USB 2.0 Port
32 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USB Port
Rear USB Ports
Place ESD diodes as close as USB connector.
JUSB1
FOX_UB9112C-SB201-4F~D
A_VCC1A_D-2A_D+3A_GND4
B_VCC5B_D-6B_D+7B_GND8
G19G210G311G412
R290_0402_5%~D 1 2
C3430.1U_0402_16V4Z~D
1
2
L8 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C34210U_0805_10V4Z~D
1
2
L7 DLW21SN900SQ2_0805~D@
11
44 3 3
2 2
C90.1U_0402_16V4Z~D
1
2
R280_0402_5%~D 1 2
C19
0.1U
_040
2_16
V4Z~
D
1
2
U17
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
U186
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
R270_0402_5%~D 1 2
C1310U_0805_10V4Z~D
1
2
U14
TPS2062DR_SO8~D
GND1IN2EN1#3EN2#4
OC1# 8OUT1 7OUT2 6OC2# 5
R260_0402_5%~D 1 2
+
C18
150U
_D2_
6.3V
M~D
1
2
JIO
TYCO_3-1775014-0~D
11 2 233 4 455 6 677 8 899 10 10
12 1214 141111
13131515 16 161717 18 181919 20 202121 22 222323 24 242525 26 2627272929 28 28
30 30
GND31GND32GND33
GND 34GND 35GND 36
C17
450.
1U_0
402_
16V4
Z~D
1
2
U187
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
C29
20.
1U_0
402_
16V4
Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDC_AC_BITCLK
ICH_SYNC_MDC
ICH_SDOUT_MDC
ICH
_AC
_SD
OU
T_M
DC
TER
M
ICH_SDOUT_MDC
MD
C_A
C_B
ITC
LK_T
ERM
MDC_SDIN
MDC_AC_BITCLK
ICH_RST_MDC_R#
ICH_RST_MDC_R#
+3.3V_SUS
+5V_SUS
ICH_SYNC_MDC22ICH_AC_SDIN122
MDC_AC_BITCLK22
ICH_SDOUT_MDC22
MDC_RST_DIS#38
ICH_RST_MDC#22
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
BT PORT and MDC
33 70Tuesday, February 07, 2006
Compal Electronics, Inc.
1
3
5
7
9
11 12
10
8
6
4
2GND
IAC_SDATA0
IAC_SYNC
IAC_SDATAIN
IAC_RESET#
RES
RES
3.3V
GND
GND
IAC_BITCLK
GND
New MDC connector.
W=20 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R98
10_0
402_
5%~D
@
12
C89
0.1U
_040
2_16
V4Z~
D
1
2
R1443100K_0402_5%~D
12
C8610P_0402_50V8J~D
@
1
2
Connector for MDC Rev1.5
JMDC
TYCO_1-1775149-2~D
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
R40
610
_040
2_5%
~D@
12
R14420_0402_5%~D
@
1 2
R144110K_0402_5%~D
12
C40
34.
7U_0
603_
6.3V
4Z~D
1
2
R9133_0402_5%~D
1 2
G
D S
Q64BSS138W-7-F_SOT323~D
2
1 3
C39610P_0402_50V8J~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_HUBP2_D+
ICH_SMBCLK
USB_HUBP2_D-
ICH_SMBDATA
WWAN_RADIO_DIS#
LED_WLAN_OUT#
PCIE_IRX_WLANTX_N2PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_CPCIE_ITX_WLANRX_P2_C
USBP0+USBP0-
WLAN_RADIO_DIS#_RPLTRST#
UIM_DATAUIM_CLK
UIM_VPP
PCIE_IRX_WANTX_N1PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_CPCIE_ITX_WANRX_P1_C
USB_HUBP2_D-
USB_HUBP2_D+
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PLTRST#
PCIE_WAKE#
UIM_CLKUIM_VPPUIM_RESETUIM_DATA
UIM_RESET
WLAN_RADIO_DIS#_R
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
+3VLAN
+SIM_PWR
+3.3V_RUN
+1.5V_RUN+3VLAN
+1.5V_RUN
+1.5V_RUN+3VLAN
+3VLAN
+SIM_PWR
ICH_SMBCLK 6,23,28ICH_SMBDATA 6,23,28
CLK_PCIE_MINI26
COEX1_BT_ACTIVE40COEX2_WLAN_ACTIVE40
CLK_PCIE_MINI2#6
PCIE_IRX_WLANTX_N223
ICH_SMBCLK 6,23,28
PCIE_IRX_WLANTX_P223
ICH_SMBDATA 6,23,28
MINI2CLK_REQ#6
PCIE_ITX_WLANRX_N2_C23PCIE_ITX_WLANRX_P2_C23
PCIE_IRX_WANTX_N123PCIE_IRX_WANTX_P123
PCIE_ITX_WANRX_N1_C23PCIE_ITX_WANRX_P1_C23
USB_HUBP2+38
USB_HUBP2-38
CLK_PCIE_MINI16CLK_PCIE_MINI1#6
MINI1CLK_REQ#6
PLTRST# 10,21,23,28
PCIE_WAKE#28,38
PCIE_WAKE#28,38
WWAN_RADIO_DIS# 23
LED_WLAN_OUT# 43
USBP0- 23USBP0+ 23
BT_ACTIVE 40,43
8051_TX39
8051_RX 39WLAN_RADIO_DIS#38
PLTRST# 10,21,23,28
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Mini Card
34 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+1.5V
+-9%
+-5%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
Mini CardWire less WAN
Wire less LAN
Mini CardMini-Card Latch
Mini-Card LatchC
117
0.04
7U_0
402_
16V4
Z~D
1
2
C17
870.
047U
_040
2_16
V4Z~
D
@
1
2
JCLIP1
TYCO_1775837-1~D
GND11GND22GND33GND44
C17904.7U_0603_6.3V4Z~D
1
2
R1610 0_0402_5%~D
1 2
R15780_0402_5%~D 1 2
JCLIP2
TYCO_1775837-1~D
GND11GND22GND33GND44
JMINI1
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
C17
860.
047U
_040
2_16
V4Z~
D
@
1
2
C168
0.047U_0402_16V4Z~D
1
2
C136
33P_0402_50V8J~D
1
2
R24
0_0402_5%~D
@1 2
C166
0.047U_0402_16V4Z~D
1
2
D2003RB751S40T1_SOD523-2~D
21
R15770_0402_5%~D 1 2
C55
33P
_040
2_50
V8J~
D
1
2
C60
33P
_040
2_50
V8J~
D
1
2
C46
30.
047U
_040
2_16
V4Z~
D
1
2C15
90.
1U_0
402_
16V4
Z~D
1
2
C170
0.1U_0402_16V4Z~D
1
2
L101 DLW21SN900SQ2_0805~D@11
44 3 3
2 2
C56
33P
_040
2_50
V8J~
D
1
2
JSIM
SUYIN_254020MA006G502ZL~D
VCC1RST2CLK3
GND 4VPP 5
I/O 6
NC 8NC7
R1603 0_0402_5%~D@1 2
C131
22U_0805_6.3VAM~D
1
2
C77
0.1U_0402_16V4Z~D
1
2
C17
471U
_060
3_10
V4Z~
D
1
2
R1609 0_0402_5%~D
1 2
D5NNCD5.6LG~D
2 31
45
C440
0.047U_0402_16V4Z~D
1
2
C464
0.047U_0402_16V4Z~D
1
2
JMINI2
TYCO_1775838-1~D
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
+
C14
333
0U_V
_6.3
VM_R
25~D
1
2
C17
850.
1U_0
402_
16V4
Z~D
1
2
C57
33P
_040
2_50
V8J~
D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QUIETE#DOCK_PCI_EN#
QBUFEN#
DOCK_SERR#
DOCK_LOCK#
PCI_C_BE3#
PCI_SERR#
DOCK_C_BE2#
PCI_PLOCK#
PCI_PIRQA#
PCI_AD24
DOCK_TRDY#
DOCK_PCIRST#
PCI_C_BE1#DOCK_C_BE0#
PCI_PERR#
PCI_PAR
PCI_C_BE0#
DOCK_SPME#
PCI_STOP#
DOCK_GNT0#
DOCK_PAR
DOCK_STOP#
DOCK_PIRQA#
PCI_TRDY#
SYS_PME#DOCK_C_BE3#
DOCK_DEVSEL#
PCI_IRDY#
PCI_C_BE2#
DOCK_IRDY#PCI_FRAME#
DOCK_PCI_IDSEL
DOCK_PERR#
DOCK_FRAME#
PCI_DEVSEL#
DOCK_C_BE1#
PCI_GNT0#PCI_RST#
PCI_AD22
+VCC_QBUFD
PCI_AD26
PCI_AD15
PCI_AD16
PCI_AD30
PCI_AD28
PCI_AD25
PCI_AD18
PCI_AD2
PCI_AD5
PCI_AD20
PCI_AD10
PCI_AD7
PCI_AD31
PCI_AD17
PCI_AD24
PCI_AD1
PCI_AD29
PCI_AD14
PCI_AD4
PCI_AD21
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD8
PCI_AD0
PCI_AD9
PCI_AD19
PCI_AD6
PCI_AD11PCI_AD12PCI_AD13
DOCK_AD30
DOCK_AD27
DOCK_AD18
DOCK_AD24
DOCK_AD23
DOCK_AD14
DOCK_AD6
DOCK_AD3DOCK_AD2
DOCK_AD13
DOCK_AD26
DOCK_AD0
DOCK_AD15
DOCK_AD11
DOCK_AD1
DOCK_AD28
DOCK_AD8
DOCK_AD21
DOCK_AD25
DOCK_AD10
DOCK_AD19
DOCK_AD16
DOCK_AD22
DOCK_AD31
DOCK_AD7
DOCK_AD5
DOCK_AD20
DOCK_AD17
DOCK_AD9
DOCK_AD12
DOCK_AD29
DOCK_AD4
QUIETE#
QUIETE#
+3.3V_RUN
+5V_RUN+VCC_QBUF
DOCK_PCI_EN#36
QBUFEN#38
DOCK_PAR 36
PCI_TRDY#21,30
PCI_FRAME#21,30,36
DOCK_C_BE1# 36
SYS_PME#30,38
DOCK_TRDY# 36
PCI_DEVSEL#21,30
DOCK_GNT0# 36
DOCK_C_BE0# 36
PCI_PIRQA#21
DOCK_IRDY# 36
PCI_GNT0#21,36
DOCK_DEVSEL# 36
PCI_C_BE3#21,30
DOCK_LOCK# 36
PCI_C_BE1#21,30DOCK_C_BE2# 36
DOCK_FRAME# 36
PCI_PERR#21,30
PCI_PAR21,30
DOCK_PERR# 36
PCI_RST#21,30,31
PCI_STOP#21,30
DOCK_SPME# 36
PCI_C_BE2#21,30
DOCK_PIRQA# 36
DOCK_SERR# 36
PCI_IRDY#21,30,36
PCI_SERR#21
PCI_PLOCK#21
DOCK_PCI_IDSEL 36
PCI_C_BE0#21,30
DOCK_PCIRST# 36
DOCK_STOP# 36
DOCK_C_BE3# 36
PCI_AD[0..31]21,30
DOCK_AD[0..31] 36
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
DOCKING BUFFER
35 70Tuesday, February 07, 2006
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C18240.47U_0402_16V4Z~D
1 2
U185
SN74AHC1G32DCKR_SC70-5~DINB2
INA1O 4
P5
G3
U194
PI5C34X2245BE_BQSOP80~D
NC11A12A23A34A45A56A67A78A89GND110NC211A912A1013A1114A1215A1316A1417A1518A1619GND220NC321A1722A1823A1924A2025A2126A2227A2328A2429GND330NC431A2532A2633A2734A2835A2936A3037A3138A3239GND440
VCC4 80OE1# 79
B1 78B2 77B3 76B4 75B5 74B6 73B7 72B8 71
VCC3 70OE2# 69
B9 68B10 67B11 66B12 65B13 64B14 63B15 62B16 61
VCC2 60OE3# 59
B17 58B18 57B19 56B20 55B21 54B22 53B23 52B24 51
VCC1 50OE4# 49
B25 48B26 47B27 46B28 45B29 44B30 43B31 42B32 41
C18
220.
1U_0
402_
16V4
Z~D
1
2
R133210K_0402_5%~D
12
C13250.1U_0402_16V4Z~D 1 2
D27
RB751S40T1_SOD523-2~D
2 1D26
RB751S40T1_SOD523-2~D
2 1
C13280.1U_0402_16V4Z~D
1 2 R1335100K_0402_5%~D 1
2
C18
230.
47U
_040
2_16
V4Z~
D
1
2
U184
PI5C162861BE_BQSOP48~D
A02A13A24A35A46A57A68A79A810A911
A1014A1115A1216A1317A1418A1519
B0 46B1 45B2 44B3 43B4 42B5 41B6 40B7 39B8 38B9 37
B10 34B11 33B12 32B13 31B14 30B15 29
GND1 12GND2 24NC11
NC213
OE147OE235 VCC2 48VCC1 36
A1620A1721A1822A1923
B16 28B17 27B18 26B19 25
C13290.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_AD28
DOCK_AD13
DOCK_AD22
DOCK_OWNS_PCI
DOCK_SIO_ALERT#
DOCK_AD31
TV_Y
TV_C
DOCK_C_BE2#
DOCK_AD30
DOCK_AD8
VGA_RED
DOCK_AD4
DOCK_AD23
DOCK_AD11
PCI_IRDY#
DOCK_AD16
DOCK_AD0
DOCK_AD10
Z3306
DOCK_AD11
DOCK_AD0
DOCK_AD19
DOCK_AD5
DOCK_AD3
DOCK_AD7
DOCK_AD31
DOCK_AD9
DOCK_AD4
DOCK_TRDY#
DOCK_AD26
PCI_GNT0#
DOCK_AD6
D_LAD2
DOCK_C_BE0#
TV_CVBS
DOCK_AD14
DOCK_AD18
DOCK_C_BE1#
DOCK_AD20
DOCK_AD12
DOCK_AD6
DOCK_AD30
PCI_FRAME#
DOCK_LAN_ACTLED_YEL#
G_DOC_PWRSRC
DOCK_AD2
DOCK_AD7
TV_Y
DOCK_OWNS_PCI
DOCK_AD29
R_PIDEACT
DOCK_AD8
DOCK_TIP
DOCK_AD14
DOCK_AD10
DOCK_AD2
DOCK_AD27
DOCK_AD25
DOCK_AD17
VGA_RED
DOCK_DC_IN
DOCK_C_BE3#
DOCK_AD17
DOCK_AD25
TV_CVBS
DOCK_AD24
Z3305
DOCK_LED_100#
DOCK_AD20
DOCK_AD16
DOCK_RING
DOCK_AD15
TV_C
DOCK_AD21
DOCK_AD18
DOCK_AD28DOCK_AD1
VGA_BLU
DOCK_AD21
D_LAD0
DOCK_AD19
DOCK_PWR_EN
DOCK_AD13
DOCK_AD5
DOCK_AD27
VGA_GRN
DOCK_AD12
DOCK_STOP#
Z330
7
DOCK_AD22
DOCK_PCIRST#
DOCK_AD15
DOCK_PERR#
VGA_GRN
DOCK_AD29
D_LAD1
DOCK_AD1
DOCK_AD23
DOCK_LED_10#
SPDIF_DOCK
DOCK_AD24
VGA_BLU
D_LAD3
DOCK_AD9
DOCK_AD3
DOCK_DET# DOCK_DET#
Z3308
DOCK_RING
DOCK_TIP
DOCK_DET#
USBP7-USBP7+
CLK_DOCKPCI_33M
PCI_REQ0#
DOCK_AD26
VSYNC_RHSYNC_R
TV_C
TV_CVBS
TV_Y
+3.3V_SUS
+PWR_SRC
+3.3V_ALW
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+2.5VLAN
+5V_ALW
DOCK_FRAME#35
DAT_KBD 39
DOCK_TRDY# 35
DOCK_LAN_TX3+ 29
CLK_DOCKPCI_33M6
VGA_BLU20,52
CLK_KBD 39
DOCK_AD[0..31] 35
DOCK_LAN_TX3- 29
VGA_GRN20,52
VGA_RED20,52
DOCK_SMB_INT# 39
DOCK_GNT0# 35
DVI_TX0-53
D_LFRAME# 38
DOCK_IRDY# 35
DVI_DETECT 52
PCI_GNT0#21,35
PS_ID_IN44
DOCK_DEVSEL# 35
DVI_TX0+53
DVI_SDATA 52
PCI_FRAME#21,30,35
DVI_CLK+53
DVI_SCLK 52
PCI_IRDY#21,30,35
DVI_TX1-53
D_DLRQ1# 38 D_LAD0 38
DVI_TX1+53
DOCK_C_BE3# 35
DOCK_LOCK#35
DAT_DOCK39
DOCK_SMB_DAT39
DOCK_PCI_IDSEL 35
TV_CVBS52
DOCK_PAR35
DOCK_LED_100#29
DOCK_C_BE2#35
SPDIF_DOCK26
DOCK_LAN_TX0-29
CLK_DOCK39
D_LAD138
DVI_CLK-53
D_LAD238
D_SERIRQ 38
TV_Y52
DOCK_LAN_TX1-29
DVI_TX2-53
R_PIDEACT 43
DOCK_SIO_ALERT# 38
DOCK_PCIRST# 35
DOCK_SMB_CLK39
D_LAD338
DOCK_LAN_ACTLED_YEL# 29
DOCK_C_BE0# 35
TV_C52
DOCK_PERR# 35
D_CLKRUN# 38
DOCK_STOP# 35
DOCK_PCI_EN#35
DOCK_SERR#35DVI_TX2+53
DOCK_C_BE1# 35
DOCK_LAN_TX2+ 29
DOCK_PIRQA#35
DOCK_LAN_TX0+29
DOCK_SPME#35
DOCK_DC_IN 44
DOCK_LAN_TX1+29DOCK_LAN_TX2- 29
DOCK_PWR_EN38
DOCK_LED_10#29
DAT_DDC2 20,52CLK_DDC2 20,52
DOCKED 29,38
USBP7- 23USBP7+ 23
PCI_REQ0# 21
HSYNC_R 20VSYNC_R 20
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
DOCKING CONN.
36 70Tuesday, February 07, 2006
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
self power dock
NB
PWR_SRC
no power dock
DVI_TX4-DVI_TX4+
DVI_TX3+DVI_TX3-
DVI_TX5+DVI_TX5-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
U177NC7SZ04P5X_NL_SC70-5~D
A2 Y 4
P5
NC
1
G3
R1322100K_0402_5%~D
12
U178
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
R13
2510
0K_0
402_
5%~D
12
C1817
0.1U_0402_16V4Z~D
12
R13260_0402_5%~D@
1 2
C12980.01U_0402_16V7K~D
12
G
D
S
Q612N7002W-7-F_SOT323~D
2
13
C18
2710
00P_
0402
_50V
7K~D
1
2
C13010.1U_0603_50V4Z~D
1
2
JDOCKA
TYCO_2-1612415-1~D
S11S22S33S44S55S66S77S88S99S1010S1111S1212S1313
S1515
S1717S1818S1919S2020S2121S2222S2323S2424S2525S2626S2727S2828S2929S3030S3131S3232S3333S3434S3535S3636S3737S3838S3939S4040S4141S4242S4343
S4545
S4747S4848S4949S5050S5151S5252S5353S5454S5555
S69 69S70 70S71 71S72 72S73 73S74 74S75 75S76 76S77 77S78 78S79 79S80 80S81 81S82 82S83 83S84 84S85 85S86 86S87 87S88 88S89 89S90 90S91 91S92 92S93 93S94 94S95 95S96 96S97 97S98 98S99 99
S100 100S101 101S102 102S103 103S104 104S105 105S106 106S107 107S108 108S109 109S110 110S111 111S112 112S113 113S114 114S115 115S116 116S117 117S118 118S119 119S120 120S121 121S122 122
S125 125S126 126S127 127S128 128
M136 136
R1790 75_0402_1% 1 2
Q60DDTC144EUA-7-F_SOT323~D
2
13
C12990.01U_0402_16V7K~D 1 2R1334
33_0402_5%~D
@12
Q59FDS4435_NL_SO8~D
4
78
65
123
JDOCKB
TYCO_2-1612415-1~D
S137137S138138S139139S140140S141141S142142S143143S144144S145145S146146S147147S148148S149149S150150S151151S152152S153153S154154S155155S156156S157157S158158S159159S160160S161161S162162S163163S164164S165165S166166S167167S168168S169169S170170S171171S172172S173173S174174S175175S176176S177177S178178S179179S180180S181181S182182S183183S184184S185185S186186S187187S188188S189189S190190
S205 205S206 206S207 207S208 208S209 209S210 210S211 211S212 212S213 213S214 214S215 215S216 216S217 217S218 218
S220 220
S222 222S223 223S224 224S225 225S226 226S227 227S228 228S229 229S230 230S231 231S232 232S233 233S234 234S235 235S236 236S237 237S238 238S239 239S240 240S241 241S242 242S243 243S244 244S245 245S246 246S247 247S248 248
S250 250
S252 252S253 253S254 254S255 255S256 256S257 257S258 258S259 259
S193193S194194S195195S196196
M204204
C18200.1U_0402_16V4Z~D
1
2
C1819
0.1U_0402_16V4Z~D
1 2
R1791 75_0402_1% 1 2
C12970.01U_0402_16V7K~D
1 2
U179
74AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5 D25
SM05TCT_SOT23-3~D @
231
R1321100K_0402_5%~D
12 C1821
1000P_0402_50V7K~D
1
2
C18180.1U_0402_16V4Z~D
1
2
C29
10.
1U_0
603_
50V4
Z~D
1
2
R1792 75_0402_1% 1 2
C132722P_0402_50V8J~D
@1
2
JWIRE
MOLEX_53398-0471~D
11223344
C13000.01U_0402_16V7K~D
12
R1323100K_0402_5%~D
12
U18074AHC1G08GW_SOT353-5~D
IN11
IN22 G3
O 4
P5
C12
960.
1U_0
603_
50V4
Z~D
1
2
R1324100K_0402_5%~D
12
JDOCKC
TYCO_2-1612415-1~D
P1P1
P2P2
P3P3
P4P4
P5 P5
P6 P6
P7 P7
P8 P8
MH1MH1 MH2 MH2
SHLD5MH9
SHLD1MH5
SHLD2MH6
SHLD3 MH7
SHLD6MH10
SHLD4 MH8
SHLD7 MH11
SHLD8 MH12
MH14 MH14MH16 MH16MH13MH13
MH15MH15
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IRVCC
SD_MODE
RTS0TXD0#
DTR0
RXD0#DSR0
CTS0
TXD0
3243C1-
3243C1+
RI0
DCD0
CTS0#
RTS0#
DSR0#
DCD0#DTR0#
3243C2+
3243C2-
RXD0
3243V+
3243V-
RI0RXD0#
DTR0RTS0TXD0#
DCD0
CTS0DSR0
RI0#
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
IRRX 38
IRTX38
D_IRMODE38
DSR0#38
DTR0#38
TXD038RTS0#38
DCD0#38
RXD038CTS0#38
RUN_ON19,39,41,42,46,47,48,58
RI0#38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Serial & FIR
37 70Tuesday, February 07, 2006
Compal Electronics, Inc.
FIR
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C12550.47U_0402_16V4Z~D
1 2
C27
227
0P_0
402_
50V7
K~D
@
1
2C26
227
0P_0
402_
50V7
K~D
@
1
2
C12540.1U_0402_16V4Z~D
1
2
C25
827
0P_0
402_
50V7
K~D
@
1
2
JSIO
SUYIN_070921MR009S203BR~D
DCD01DSR06RXD0#2RTS0F7TXD0F#3CTS08DTR0F4RI09GND05
GND110GND211
R12
9110
K_04
02_5
%~D
12
C25
727
0P_0
402_
50V7
K~D
@
1
2
C12560.1U_0402_16V4Z~D
1 2
C25
927
0P_0
402_
50V7
K~D
@
1
2C23
827
0P_0
402_
50V7
K~D
@
1
2
R128747_0805_5%~D
12
R12890_0402_5%~D 1 2
C12570.47U_0402_16V4Z~D
1 2
C12
594.
7U_0
603_
6.3V
4Z~D
1
2
C12
600.
1U_0
402_
16V4
Z~D
1
2
C12580.47U_0402_16V4Z~D
1 2
C12
614.
7U_0
603_
6.3V
4Z~D
1
2
U175
TFDU6102-TR3_8P~D
VCC6
SD_MODE5
IRED_CATHODE2
TXD3
IRED_ANODE 1
RXD 4
MODE 7
GND 8
U173
MAX3243ECUI+T_TSSOP28~D
V- 3
VCC
26
FORCEOFF#22
C1+28V+ 27
C1-24C2+1
C2-2
FORCEON23GND 25
T1OUT 9T2OUT 10T3OUT 11
R1IN 4R2IN 5R3IN 6R4IN 7R5IN 8
T1IN14T2IN13T3IN12R1OUT19R2OUT18R3OUT17R4OUT16R5OUT15R2OUTB20
INVALID# 21
R12
9010
K_04
02_5
%~D
12
C26
027
0P_0
402_
50V7
K~D
@
1
2C25
627
0P_0
402_
50V7
K~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS
IRQ_SERIRQ
CLK_SIO_14M
D_LAD1
D_LAD3
LPC_LDRQ1#
D_LAD0
D_LAD2
D_DLRQ1#
D_LFRAME#
IRTX
D_SERIRQ
D_CLKRUN#
IRRX
REG_EN
CLKRUN#LPC_LDRQ0#
SIO_VDDA
USB_HUBP4+USB_HUBP4-
USBP1+USBP1-USB_HUBP1+USB_HUBP1-USB_HUBP2+USB_HUBP2-USB_HUBP3+USB_HUBP3-
ECE5018_XTAL1
LPC_LAD1LPC_LAD0
LPC_LAD2LPC_LAD3
PLTRST2#CLK_PCI_5018
LPC_LFRAME#
RUNPWROK
RI0#
CTS0#
TXD0
DTR0#
RXD0
D_IRMODE
DCD0#
PCIE_WAKE#
PCIE_WAKE#
SYS_PME#DOCK_SIO_ALERT#
DOCK_SIO_ALERT#
PBAT_PRES#SBAT_PRES#
CHG_SBATTCHG_PBATT
SBAT_LOW
BEEP
DOCKEDQBUFEN#DOCK_PWR_EN
BC_CLKBC_DATBC_INT
SBAT_ALARM#PBAT_ALARM#
SBAT_ALARM#
PBAT_ALARM#
LAN_TPM_EN#LAN_LOW_PWRAUDIO_AVDD_ON
ICH_PME#ICH_PCIE_WAKE#
FPBACK_EN
CPU_PROCHOT#
BID3BID2BID1BID0
BID1
BID2
BID0
BID3
RTS0#DSR0#
CLK_PCI_5018
CLK_SIO_14M
THERMTRIP_SIO
WLAN_RADIO_DIS#
SNIFFER_WIRELESS_ON/OFF#
BAY_MODPRES#SC_DET#
USB_SIDE_EN#USB_BACK_EN#
D_CLKRUN#
D_SERIRQ
D_DLRQ1#
MDC_RST_DIS#
LAN_TPM_EN#
ADAPT_OC
SYS_PME#
5V_CAL_SIO#IMVP6_PROCHOT#
IMVP6_PROCHOT#
NB_MUTE
SPDIF_SHDNECE5018_XTAL2
DOCK_HP_MUTE#HP_NB_SENSE
DOCK_HP_MUTE#
MODC_EN#HDDC_EN#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
USBP1+ 23USBP1- 23USB_HUBP1+ 30USB_HUBP1- 30USB_HUBP2+ 34USB_HUBP2- 34USB_HUBP3+ 31USB_HUBP3- 31USB_HUBP4+ 40USB_HUBP4- 40
LPC_LAD[0..3] 22,28,39
PLTRST2# 21,39CLK_PCI_5018 6
CLKRUN# 23,30,39
IRQ_SERIRQ 23,28,30,39
LPC_LFRAME# 22,28,39
LPC_LDRQ1# 22LPC_LDRQ0# 22
CLK_SIO_14M 6
D_DLRQ1# 36
D_LAD1 36D_LAD2 36D_LAD3 36
D_LAD0 36
D_LFRAME# 36D_CLKRUN# 36
D_SERIRQ 36
RUNPWROK 39,42,49,54
IRTX37IRRX37
DSR0#37
RXD037TXD037
DTR0#37CTS0#37
RI0#37
RTS0#37
D_IRMODE37
DCD0#37
SYS_PME#30,35DOCK_SIO_ALERT#36PBAT_PRES#45SBAT_PRES#45,51
CHG_PBATT51CHG_SBATT51
SBAT_LOW51
BEEP26
DOCKED29,36QBUFEN#35DOCK_PWR_EN36
BC_CLK39
BC_INT39BC_DAT39
PBAT_ALARM#45SBAT_ALARM#45
LAN_TPM_EN#28LAN_LOW_PWR28AUDIO_AVDD_ON26
ICH_PME#21ICH_PCIE_WAKE#23
THERMTRIP_SIO18
WLAN_RADIO_DIS# 34
SNIFFER_WIRELESS_ON/OFF#43
BAY_MODPRES#25SC_DET#31
USB_SIDE_EN#32USB_BACK_EN#32
PCIE_WAKE#28,34
FPBACK_EN19
MDC_RST_DIS#33ADAPT_OC50
5V_CAL_SIO#18IMVP6_PROCHOT#49
NB_MUTE27
CPU_PROCHOT#7
SPDIF_SHDN26LOM_CABLE_DETECT28
DOCK_HP_MUTE#26HP_NB_SENSE26,27
5V_CAL_SIO2#18
HDDC_EN#41MODC_EN#41
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
ECE5018
38 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Route RBIAS and its return to pin 128 veryshort.
TEST_PIN is a No Connect
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
<---Blue Tooth
<---Mini1 WWAN
X020 1X011 1
1 X001
BID0BID3
M01M00REVBID2 BID1
0 0
0
000
00000
000
Place closely pin 56
Place closely pin 64
<---Smart Card
<---PC Card Bay
X0310 0 1
C17
594.
7U_0
603_
6.3V
4Z~D
1
2
C17500.1U_0402_16V4Z~D
1
2
C17530.1U_0402_16V4Z~D
1
2
C17
624.
7U_0
603_
6.3V
4Z~D
1
2
R16
00
1M_0
402_
5%~D
12
R94
10K_
0402
_5%
~D
@
12
R1363 10K_0402_5%~D
1 2
C17
600.
1U_0
402_
16V4
Z~D
1
2
R107 10K_0402_5%~D 1 2
R34 100K_0402_5%~D
1 2
C67
4.7U
_060
3_6.
3V4Z
~D
1
2
C14522P_0402_50V8J~D
@
1
2
R418 10K_0402_5%~D
1 2
R117110K_0402_5%~D
12
R1646 100K_0402_5%~D
12
C17520.1U_0402_16V4Z~D
1
2
R1437 100K_0402_5%~D
12
R660_0402_5%~D
12
C1452
15P_0402_50V8J~D
1 2
R1362 10K_0402_5%~D
1 2R
405
10K_
0402
_5%
~D
12
R55 0_0402_5%~D@ 12
C17540.1U_0402_16V4Z~D
1
2
C145115P_0402_50V8J~D
1 2
C17
560.
1U_0
402_
16V4
Z~D
1
2
R13522_0402_5%~D
@
12
R95
10K_
0402
_5%
~D
12
L104BLM18PG181SN1_0603~D
1 2
R108 10K_0402_5%~D @1 2
R159910K_0402_5%~D
12
C14422P_0402_50V8J~D
@
1
2
LPC
DLPC
USB
GPIO
ECE5018
CLK
TEST
U215
ECE5018 A0_VTQFP128~D
GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104
VDDA33 8
VSS 23
VDDA33 14
VSS 51
VDDA33 20
VSS 36
GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT#58BC_DAT59BC_CLK60
VCC
134
GPIOE[0]/RXD1GPIOE[1]/TXD2GPIOE[2]/RTS#3GPIOE[3]/DSR#4GPIOE[4]/CTS#5GPIOE[5]/DTR#84GPIOE[6]/RI#83GPIOE[7]/DCD#6
CLKRUN# 37
DCLK_RUN# 38
SER_IRQ 39
DSER_IRQ 40
LRESET# 41LFRAME# 42
DLFRAME# 43
LDRQ1# 44
DLDRQ1# 45
LDRQ0# 46
LAD3 47
DLAD3 48
LAD2 49
DLAD2 50
LAD1 52
VCC
157
DLAD1 53
LAD0 54
DLAD0 55
PCICLK 56
GPIOB[0]/INIT#65GPIOB[1]/SLCTIN#66GPIOC[2]/SCLT67GPIOC[3]/PE68GPIOC[4]/BUSY69GPIOC[5]/ACK#70GPIOC[6]/ERROR#71GPIOC[7]/ALF#73GPIOD[0]/STROBE#74GPIOC[1]/PD775GPIOC[0]/PD676GPIOB[7]/PD577GPIOB[6]/PD478GPIOB[5]/PD379GPIOB[4]/PD280GPIOB[3]/PD181GPIOB[2]/PD082
CLKI (14.318 MHz) 64
GPIOD[1]61GPIOD[2]62
GPIOD[3]/VBUS_DET63
CAP_LDO 86
VCC
185
VSS 96
GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31
GPIOH[6]32GPIOH[7]33
GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95
SYSOPT1/GPIOH[2]106SYSOPT0/GPIOH[3]107
VCC
110
8
GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112
IRTX113IRRX114
GPIOF[3]/IRMODE/IRRX3B115GPIOF[2]/IRTX2116GPIOF[1]/IRRX2117GPIOF[0]/IRMODE/IRRX3A118
VCC1 119
VDD18 120
VSS 17
XTAL2 122XTAL1/CLKIN 123
VDDA18PLL 124VDDA33PLL 125
ATEST 126
RBIAS 127
VSS 11
VSS 128VSS 121VSS 87VSS 72
USBDP0 9USBDN0 10USBDP1 13USBDN1 12USBDP2 15USBDN2 16USBDP3 19USBDN3 18USBDP4 21USBDN4 22
PWRGD 7
OUT65 105
TEST_PIN 35
C17
614.
7U_0
603_
6.3V
4Z~D
1
2
C17
550.
1U_0
402_
16V4
Z~D
1
2
Y124MHZ_12PF_1BX24000CE1B~D
12
R1620 10K_0402_5%~D
1 2C1751
0.1U_0402_16V4Z~D
1
2
R40
410
K_04
02_5
%~D
@
12
C17
570.
1U_0
402_
16V4
Z~D
1
2
R15
9812
K_04
02_1
%~D
12
R1645 100K_0402_5%~D
12
R1361 10K_0402_5%~D
1 2
R1440 100K_0402_5%~D@12
R1369 10K_0402_5%~D
1 2
R419 10K_0402_5%~D@1 2
C17584.7U_0603_6.3V4Z~D
1
2
R13422_0402_5%~D
@
12
R87 100K_0402_5%~D@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LAD[0..3]
CLK_KBD
DAT_KBD
DAT_SMB
CLK_SMB
CLK_DOCK
DAT_DOCK
CLK_PCI_5004
LID_CL#
VAUX_EN
SIO_EXT_SMI#FCLK
LPC_LFRAME#
KSO16
KSO5
SIO_SLP_S3#
BAT1_LED#
LPC_LAD1
CLK_PCI_5004
KSI1KSI2
MEC5004_XTAL1
RUNPWROK
MEC5004_XTAL2
PLTRST2#
CLK_KBD
KSO3
VGA_IDENTIFY
NUM_LED#
LID_CL_SIO#
CLKRUN#
KSI3
KSI7
KSO0
KSO8
SIO_THRM#
KSO15
SIO_SLP_S5#
SBAT_SMBCLK
IRQ_SERIRQ
ICH_EC_SPI_CLK
SIO_A20GATE
KSI0
RESET_OUT#
FAN1_TACH
SFPI_EN
MEC5004_XTAL1
SNIFFER_PWR_SW#
DAT_TP_SIO
LPC_LAD3
KSI6
PBAT_SMBCLK
SCRL_LED#
FWP#
SIO_EXT_SCI#
PS_ID
KSO1
KSO9
FWP#
RUN_ON
CLK_TP_SIO
KSO7
KSO11
PBAT_SMBDAT
BREATH_LED
BC_INT
SBAT_SMBDAT
CLK_DOCK
KSO10ACAV_IN
KSO14ALWON
HOST_DEBUG_TX
LPC_LAD2
DAT_DOCK
DAT_KBD
KSI4
KSO6
CAP_LED#
DEBUG_ENABLE#
LPC_LAD0
ATF_INT#
LID_CL_SIO#
SUS_ON
HOST_DEBUG_RX
KSO2
BAT2_LED#
POWER_SW_IN#
KSI5
KSO12KSO13
SIO_RCIN#
SNIFFER_PWR_SW#
BC_DATBC_CLK
SIO_EXT_WAKE#
KSO4
CLK_SMBDAT_SMB
DOCK_SMB_DATDOCK_SMB_CLK
VGA_IDENTIFY
PS_ID_DISABLE#
DOCK_SMB_INT#
DOCK_SMB_INT#
SNIFFER#
POWER_SW_IN# POWER_SW#
POWER_SW_IN1#
POWER_SW_IN1#
DEBUG_ENABLE#
SIO_PWRBTN#BAT_SEL#
SPI_CS_L#
DOCK_SMB_DAT
DOCK_SMB_CLK
SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
KSO17
MEC5004_XTAL2
MEC5004_XOSEL
ICHO_FDATAIN
ICHI_FDATAOUTFCLK
SPI_CS_R#
ICHO_ECI_SPI_DATAICHI_ECO_SPI_DATA
ICHO_FDATAINICHI_FDATAOUT
SFPI_EN
SIO_BIAPWM
ITP_DBRESET#
ATF_INT#
BAT_SEL#
8051_RX8051_TX
ALWON
SNIFFER_LED_OFF#
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+RTC_CELL
+5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_SUS+3.3V_SUS
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME#22,28,38
PLTRST2#21,38
LPC_LAD[0..3]22,28,38
CLKRUN#23,30,38
CLK_PCI_50046
KSI[0..7]40
KSO[0..17]40
BAT1_LED# 43BAT2_LED# 43
RESET_OUT# 42
RUNPWROK 38,42,49,54
ACAV_IN 18,50,51
CLK_TP_SIO40DAT_TP_SIO40
ALWON 46
BREATH_LED 43
FAN1_TACH 18
CLK_SMB 18
SIO_A20GATE22
CLK_KBD36DAT_KBD36
DAT_DOCK36CLK_DOCK36
ICH_EC_SPI_CLK23
PBAT_SMBCLK 45,50PBAT_SMBDAT 45,50
SIO_EXT_SCI# 23
SIO_EXT_SMI# 23
BC_INT38
BC_CLK38BC_DAT38
SIO_THRM#23
IRQ_SERIRQ23,28,30,38
SBAT_SMBCLK 19,45SBAT_SMBDAT 19,45
VAUX_EN 41,46SUS_ON 41,42,46RUN_ON 19,37,41,42,46,47,48,58
SIO_SLP_S5# 23SIO_SLP_S3# 23
SIO_RCIN# 22SIO_EXT_WAKE# 23
PS_ID 44
LID_CL# 40
SCRL_LED# 43CAP_LED# 43
NUM_LED# 43
ATF_INT# 18
BIA_PWM 19,52
DAT_SMB 18
DOCK_SMB_DAT 36DOCK_SMB_CLK 36
PS_ID_DISABLE# 44
DOCK_SMB_INT# 36
POWER_SW# 18,40
SNIFFER# 43
SIO_PWRBTN#23BAT_SEL#50
ICHI_ECO_SPI_DATA23ICHO_ECI_SPI_DATA23
ITP_DBRESET# 7,23
8051_TX348051_RX34
SNIFFER_LED_OFF# 43
SPI_CS#23
SPI_CS_R#
Title
Size Document Number R ev
Date: Sheet o fLA-2792 1.0
EMC5004
39 70Tuesday, February 07, 2006
Compal Electronics, Inc.
32 KHz ClockSame as Laguna
Place closely pin 58
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1=Flash Recovery Enabled0=Flash Recovery Disabled
Bat2 = Amber LEDBat1 = Green LED
Flash write protect bottom 4Kof internal bootblock flash
low=write protected
0 = UMA
1 = Discrete Gfx
20mA drive pins
150 MIL SO8
200 MIL SO8
Flash ROM
R1752 no stuff when doingflash recovery
Work Around
C17694.7U_0603_6.3V4Z~D
1
2
R12510K_0402_5%~D
1 2
R1608 4.7K_0402_5%~D
1 2
C1050.1U_0402_16V4Z~D
1
2
R1618 10K_0402_5%~D 12
R139100K_0402_5%~D
12
R10
310
K_0
402_
5%~D
12
LPC Interface
Host/8051
Keyboard and Mouse Interface
BC Bus
PWR SW
U216
MEC5004_VTQFP128~D
GPIO82/FAN_TACH3 43
SGPIO35 1SGPIO36 (SFPI_EN) 2
SGPIO37 3
SGPIO43 4
GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41
GPIO5/KSO1514GPIO4/KSO1415
OUT11/PWM1 46OUT10/PWM0 45
OUT9/PWM2 47
OUT5/KBRST50
OUT2/PWM3 48
PWRGD 49
nRESET_OUT/OUT6 53
ACAV_IN 128
POWER_ SW_IN1# 126
AB1A_DATA 5AB1A_CLK 6AB1B_DATA 7AB1B_CLK 8
KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225
KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032
KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO738KSI1/GPIO639KSI0/SGPIO3040
KCLK77KDAT78EMCLK79EMDAT80
POWER_ SW_IN0# 127
VC
C1
21
KSO5/GPIO127
VR
_CA
P22
VS
S26
KSO17/GPIOA112KSO16/GPIOA013
VS
S51
VC
C1
44
GPIO96/TOUT1 52
SGPIO44/MSCLK/SPCLK2 54SGPIO45/MSDATA/SPDOUT2 55
SER_IRQ56
LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363
VS
S74
CLKRUN#64
VC
C1
65
nEC_SCI/SPDIN2 66
SGPIO31/TIN1/SPCLK1 67SGPIO47/SPDOUT1 68SGPIO46/SPDIN1 69
SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71
TEST_PIN 72
GPIOA3/WINDMON 73
GPIO94/IMCLK75GPIO95/IMDAT76
VC
C1
83
GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82
VS
S88
nFWP 84
SGPIO42 89SGPIO41 90SGPIO40 91
SGPIO34/A20M92
VS
S_P
LL10
1
HSTCLK102
FLCLK103
VC
C_P
LL10
4
HSTDATAIN105
FLDATAIN106
HSTDATAOUT107
FLDATAOUT108
FLCS0109FLCS1110
VS
S11
3
nBAT_LED 114nPWR_LED 115
VC
C1
116
OUT7/nSMI 11
GPIO83/32KHZ_OUT 117
BGPO0 118
ALWON 120
XTAL1122
XOSEL123
XTAL2124
AG
ND
125
POWER_ SW_IN2# 119
GPIO11/AB2A_DATA 93GPIO12/AB2A_CLK 94
GPIO13/AB2B_DATA 95GPIO14/AB2B_CLK 96
GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112
GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10
GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98
GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100
BC_CLK87BC_DAT86BC_INT85
VC
C0
121
C17660.1U_0402_16V4Z~D
1
2
R1607 4.7K_0402_5%~D
1 2
R157910K_0402_5%~D
12
R16
3610
K_0
402_
5%~D
12
U213
M25P80-VMW6TP_SO8~D
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
C17
390.
1U_0
402_
16V
4Z~D
1
2
R1120_0402_5%~D
1 2
R178847_0402_5%~D
1 2
R16
0410
K_0
402_
5%~D
@
12
R620_0402_5%~D
1 2
R4821M_0402_5%~D
12 R131 2.2K_0402_5%~D
1 2
R13022_0402_5%~D
@
12
R25 100K_0402_5%~D
@1 2
R105 10K_0402_5%~D
1 2
R175310K_0402_5%~D
12
R470100K_0402_5%~D
12
C17670.1U_0402_16V4Z~D
1
2
R447 4.7K_0402_5%~D
1 2
R93
10K_0402_5%~D
1 2
JDEBUGMolex_53261
@1 12 23 3
5 54 4
T7PAD~D
L105 BLM18AG121SN1D_0603~D
1 2
R468 4.7K_0402_5%~D
1 2
C17640.1U_0402_16V4Z~D
1
2
R9710K_0402_5%~D
@
12
C13
01U
_060
3_10
V4Z
~D 1
2
R1785 0_0402_5%~D
12
R119100K_0402_5%~D
12
R3110K_0402_5%~D
1 2
R99 8.2K_0402_5%~D
12
L106BLM18AG121SN1D_0603~D
12
T6PAD~D
C13422P_0402_50V8J~D
@
1
2
R100 8.2K_0402_5%~D
12
R138100K_0402_5%~D@
12
R47410K_0402_5%~D
12
R10
210
0K_0
402_
5%~D
@12
R1752 0_0402_5%~D
1 2
G
D
SQ202N7002W-7-F_SOT323~D
@
2
13
C14
5022
P_0
402_
50V
8J~D
1
2
R110
0_0402_5%~D
1 2
R16
0510
K_0
402_
5%~D
@
12
R449 4.7K_0402_5%~D
1 2
C4820.047U_0402_16V4Z~D
1
2
D2002RB751S40T1_SOD523-2~D
@
21
C176510U_0805_10V4Z~D
1
2
C17630.1U_0402_16V4Z~D
1
2C
BE
Q19PMST3906_SOT323-3~D
@1
2
3
R163510K_0402_5%~D
12
R444 2.2K_0402_5%~D
1 2
C22
4.7U_0603_6.3V6M~D
@
1 2
R469 4.7K_0402_5%~D
1 2
U217
M25P80-VMW6TP_SO8~D
@
S#1Q2W#3VSS4
VCC 8HOLD# 7
C 6D 5
R160610K_0402_5%~D
12
R30100K_0402_5%~D
12
R47510K_0402_5%~D@
12
R1637 100K_0402_5%~D
12
Y232.768K_12.5PF_Q13MC30610003~D
14
23
R47310_0402_5%~D
12
C461U_0603_10V4Z~D
1
2
C14
4922
P_0
402_
50V
8J~D
1
2
R127 47_0402_5%~D
1 2
R63 0_0402_5%~D@12
C1768
0.1U_0402_16V4Z~D
12
R10410K_0402_5%~D
@
1 2
R106 10K_0402_5%~D
1 2
R23
0_0402_5%~D
@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO4
KSI0
KSO13
KSO11
KSO14
KSO12
KSI5
KSO5
KSO0
KSO3
KSO7
KSO9
KSI2
KSO8
KSO2
KSI6
KSI4KSI3
KSO1
KSO15
KSO10
KSI7
KSO6
KSI1
KSI6KSI7
DAT_TP_SIO
CLK_TP_SIO
TP_DATA
KSO16KSO17
KSO17 POWER_SW#
SP_X
R_CAP_LED#R_SCRL_LED#
R_NUM_LED#
SP_GND
POWER_SW#
SP_V+SP_Y
KSO10KSO11KSO9KSO14KSO13KSO15KSO16KSO12KSO0KSO2KSO1KSO3KSO8KSO6KSO7KSO4KSO5KSI0KSI3KSI1KSI5KSI2KSI4
COEX3USB_HUBP4-
SP_V+SP_Y
COEX2_WLAN_ACTIVESP_GND
TP_DATA
SP_X
TP_CLK
USB_HUBP4+BT_RADIO_DIS#
LID_CL#
TP_CLK
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+5V_RUN
KSI[0..7]39
KSO[0..17]39
R_SCRL_LED#43
CLK_TP_SIO 39
DAT_TP_SIO 39
POWER_SW#18,39R_NUM_LED#43R_CAP_LED#43
LID_CL#39
BT_RADIO_DIS# 23
USB_BIO-31
BT_ACTIVE 34,43
USB_BIO+31
COEX2_WLAN_ACTIVE34
USB_HUBP4+38
COEX1_BT_ACTIVE34
USB_HUBP4-38
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
INT KB
40 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Power Switch
Touch PAD
C75
100P
_040
2_50
V8J~
D
@
1
2
C32
100P
_040
2_50
V8J~
D
@
1
2
C5610.1U_0402_16V4Z~D
1
2
C57
0
33P
_040
2_50
V8J~
D
1
2
C56
010
P_0
402_
50V8
J~D
1
2
C6 10
0P_0
402_
50V8
J~D
@
1
2
C62
0.1U
_040
2_16
V4Z~
D
1
2
C8 10
0P_0
402_
50V8
J~D
@
1
2
C14
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC020003Y0L H-CONN SET ZJXMB-LCD 14 WXGA+
LVDS cable
C39
100P
_040
2_50
V8J~
D
@
1
2
C3 10
0P_0
402_
50V8
J~D
@
1
2
C5640.1U_0402_16V4Z~D
1
2
C34
100P
_040
2_50
V8J~
D
@
1
2
C20
100P
_040
2_50
V8J~
D
@
1
2
C15
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-110P H5.9 SMART
SM CARD BODY
C33
100P
_040
2_50
V8J~
D
@
1
2
R6
10K_
0402
_5%
~D
12
PWR_SW@SHORT PADS~D
11 2 2
Part Number Description
DC020004T0L H-CONN SET ZJXMB-TP
T/P wire set cable
C5 10
0P_0
402_
50V8
J~D
@
1
2
JKYBRD
FOX_GS12403-0001K-8F~D
11
33
55
77
1111
99
1313
1515
1717
1919
2121
2323
2525
2727
2929
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
30303131323233333434
35 3536 3637 3738 3839 3940 40
GND 41GND 42
R51
74.
7K_0
402_
5%~D
12
Part Number Description
DC000001Q0L PCMCIA TYCO1759096-1
PCMCIA BODY
C31
100P
_040
2_50
V8J~
D
@
1
2
R51
54.
7K_0
402_
5%~D
12
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN
C12
100P
_040
2_50
V8J~
D
@
1
2
C21
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
DC020003Z0L H-CONN SET ZJXMB-MDC
MDC wire set cable
R51
810
K_04
02_5
%~D 1
2
Part Number Description
GC20323MX00 BATT CR2032 3V220MAH MAXELL
RTC BATT
C54
0.1U
_040
2_16
V4Z~
D
1
2
T31 PAD~D
C35
10P
_040
2_50
V8J~
D 1
2
C11
100P
_040
2_50
V8J~
D
@
1
2
C7 10
0P_0
402_
50V8
J~D
@
1
2
C45
100P
_040
2_50
V8J~
D
@
1
2
C23
10P
_040
2_50
V8J~
D 1
2C
630.
047U
_040
2_16
V4Z~
D
1
2
C1802100P_0402_50V8J~D
@
1
2
L2BLM18AG601SN1D_0603~D
1 2
C10
100P
_040
2_50
V8J~
D
@
1
2
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak
Part Number Description
DC020004A0L H-CONN SET ZJXMB-B/T MODU
Bluetooth wire set cable
C17
100P
_040
2_50
V8J~
D
@
1
2
C30
100P
_040
2_50
V8J~
D
@
1
2
C16
100P
_040
2_50
V8J~
D
@
1
2
C56
210
P_0
402_
50V8
J~D
1
2
C4 10
0P_0
402_
50V8
J~D
@
1
2
C74
100P
_040
2_50
V8J~
D
@
1
2
C25
100P
_040
2_50
V8J~
D
@
1
2
C17
8910
0P_0
402_
50V8
J~D
@
1
2
JTPAD
JST_BM30B-SRDS-G-TFC~D
11 2 233 4 455 6 6
8 810 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 30
77991111131315151717191921212323252527272929G131 G2 32
C59
610
0P_0
402_
50V8
J~D
@
1
2
L1BLM18AG601SN1D_0603~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_5V#
MOD_EN
N21917830
RUN_ENABLE
HDD_EN_5V
SUS_ON
SUS_ENABLE
SUS_ON_5V#
RUN_ON_5V#
SUS_ON_5V#
+15V_SUS+5V_ALW
+5V_SUS
+5V_RUN
+5V_SUS+15V_SUS
+5VMOD
+PWR_SRC+PWR_SRC
+1.8V_SUS
+1.8V_RUN
+5VHDD
+15V_SUS+5V_SUS
+5V_RUN
+3.3V_SRC+3.3V_RUN
+5V_RUN
+15V_SUS
+5V_ALW
+3.3V_SRC
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+5V_RUN +3.3V_RUN +1.5V_RUN +0.9V_DDR_VTT +2.5V_RUN
+1.8V_SUS
+VDD_CORE+1.8V_RUN
RUN_ON19,37,39,42,46,47,48,58
MODC_EN#38
ENAB_3VLAN 28
VAUX_EN39,46
HDDC_EN#38
SUS_ON39,42,46
RUN_ENABLE46
GFX_RUN_ON 58
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
POWER CONTROL
41 70Tuesday, February 07, 2006
Compal Electronics, Inc.
+3VSUS Source
Run Planes Enable
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5VRUN Source
DC/DC Interface
+5VMOD Source
2
+1.8VRUN Source
+5V_HDD Source
HDD PWR+3VRUN Source
1A Rating
Discharg Circuit
G
D
S Q91
2N70
02W
-7-F
_SO
T323
~D
@
2
13
R1617470K_0402_5%~D
12
R17
931K
_040
2_5%
~D
@
12
S
GD Q50
SI3456BDV-T1-E3_TSOP6~D
3
624
51
G
D
S Q90
2N70
02W
-7-F
_SO
T323
~D
@
2
13
R21520K_0402_5%~D
12
G
D
S Q26
2N70
02W
-7-F
_SO
T323
~D
2
13G
D
S
Q83
2N70
02W
-7-F
_SO
T323
~D
2
13
C17
210
U_0
805_
10V4
Z~D
1
2
R16
1620
0K_0
402_
5%~D
12
G
D
SQ222N7002W-7-F_SOT323~D
2
13
R1293100K_0402_5%~D
12
R17
971K
_040
2_5%
~D
@
12
G
D
S
Q852N7002W-7-F_SOT323~D
2
13
G
D
S Q88
2N70
02W
-7-F
_SO
T323
~D
@
2
13
G
D
S Q28
2N70
02W
-7-F
_SO
T323
~D@
2
13
R17650_0402_5%~D
1 2
C1804470P_0402_50V7K~D@
1
2
S
GD Q57
SI3456BDV-T1-E3_TSOP6~D
3
624
51
G
D
S Q87
2N70
02W
-7-F
_SO
T323
~D
@
2
13
S
GD
Q23SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
Q58DDTC144EUA-7-F_SOT323~D
2
13
R507100K_0402_5%~D
12
R175720K_0402_5%~D
12
R223100K_0402_5%~D
12
Q24SI4800BDY-T1-E3_SO8~D
365
78
2
4
1R202100K_0402_5%~D
12
G
D
S Q92
2N70
02W
-7-F
_SO
T323
~D
@
2
13
R2148
10K_0402_5%~D
12
R1759100K_0402_5%~D
12R1758
100K_0402_5%~D
12
PJP22
@PAD-OPEN 4x4m
1 2
R1295100K_0402_5%~D
12
C17
8210
U_0
805_
10V4
Z~D
1
2
C28
310
U_0
805_
10V4
Z~D
1
2
PJP24
PAD-OPEN 4x4m@
1 2
C12
6310
U_0
805_
10V4
Z~D
1
2
G
D
S
Q82
2N70
02W
-7-F
_SO
T323
~D
2
13
R14820K_0402_5%~D
12
R2149
10K_0402_5%~D
12
R17
961K
_040
2_5%
~D
@
12
R17
6630
_060
3_5%
12
R17
941K
_040
2_5%
~D
@
12
C54
70.
1U_0
603_
50V4
Z~D
@
1
2 R50
410
0K_0
402_
5%~D
12
R22220K_0402_5%~D
12
R1764100K_0402_5%~D
1 2
G
D
S Q172N7002W-7-F_SOT323~D
2
13
C28
447
00P_
0402
_25V
7K~D
1
2
Q51DDTC144EUA-7-F_SOT323~D
2
13
R18
0330
_060
3_5%
@
12
Q14SI4800BDY-T1-E3_SO8~D
365
78
2
4
1
C12
620.
1U_0
603_
50V4
Z~D
1
2
R1615100K_0402_5%~D
12
C17880.047U_0402_16V4Z~D
1
2
C28
510
U_0
805_
10V4
Z~D
1
2
R17
981K
_040
2_5%
~D
@
12
Q6SI4800BDY-T1-E3_SO8~D
365
78
2
4
1
G
D
S
Q862N7002W-7-F_SOT323~D
2
13
R1614100K_0402_5%~D
12
C54
610
U_0
805_
10V4
Z~D
1
2
G
D
S Q89
2N70
02W
-7-F
_SO
T323
~D
2
13
R17
9530
_060
3_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUNPWROK
IMVP_PWRGD
RESET_OUT#
3VRUNRC
Z401
2
ICH_PWRGD
ICH_PWRGD# COINCELL
+3.3V_SUS+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+COINCELL
+3.3VX
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
+COINCELL
+3.3V_RUN +1.8V_SUS
+3.3V_RUN +3.3V_SUS
+3.3V_RUN +1.5V_RUN
+1.5V_RUN +1.05V_VCCP
+3.3V_RUN +SDC_IN
+PWR_SRC +3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN +SDC_IN
+3.3V_SUS
+3.3V_ALW
RUN_ON19,37,39,41,46,47,48,58
SUSPWROK 18,23
RUNPWROK 38,39,49,54
RESET_OUT#39
IMVP_PWRGD23,49
ICH_PWRGD# 18
ICH_PWRGD 10,23
SUS_ON39,41,46
SUSPWROK_1P8V48
1.5V_RUN_PWRGD47
2.5V_RUN_PWRGD18
1.05V_RUN_PWRGD47
0.9V_DDR_PWRGD48
GFX_CORE_PWRGD58
GFX_PCIE_PWRGD58
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Power Good
42 70Tuesday, February 07, 2006
Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
For EMI
U24A
74LVC3G14DC_VSSOP8~D
P8
A1 Y 7
G4
C1813
0.047U_0402_16V4Z~D
@1 2
C4830.1U_0402_16V4Z~D 1 2
R319 0_0402_5%~D
12
R1383100K_0402_5%~D
12
R49 0_0402_5%~D
12
C1808
0.047U_0402_16V4Z~D
@1 2
U26D
74VHC08MTCX_NL_TSSOP14~D
IN113
IN212 OUT 11
P14
G7
D15BAT54CW_SOT323~D
32
1
JCOIN
MOLEX_53398-0271~D
1122
U24C
74LVC3G14DC_VSSOP8~D
P8
A3 Y 5
G4
U26B
74VHC08MTCX_NL_TSSOP14~D
IN14
IN25 OUT 6
P14
G7
G
D
S
Q72N7002W-7-F_SOT323~D
2
13
C1814
0.047U_0402_16V4Z~D
@ 1 2
C1811
0.047U_0402_25V4Z~D
1 2
G
D
S
Q412N7002W-7-F_SOT323~D
2
13
R313 0_0402_5%~D
12
R453100K_0402_5%~D
12
R4630_0402_5%~D
1 2
C5281U_0603_10V4Z~D
1
2
C5200.01U_0402_16V7K~D
1
2
C4800.1U_0402_16V4Z~D 1 2
U26C
74VHC08MTCX_NL_TSSOP14~D
IN110
IN29 OUT 8
P14
G7
C1807
0.047U_0402_16V4Z~D
@1 2
R4711K_0402_5%~D
12
R334 0_0402_5%~D
12
U24B
74LVC3G14DC_VSSOP8~D
P8
A6 Y 2
G4
C1812
0.047U_0402_16V4Z~D
@1 2
R2171 0_0402_5%~D@ 12
R49420K_0402_5%~D
12C1809
0.047U_0402_16V4Z~D
@1 2
R138610K_0402_5%~D
12
U26A74VHC08MTCX_NL_TSSOP14~DIN11
IN22 OUT 3
P14
G7
C1806
0.047U_0402_16V4Z~D
@1 2
R2170 0_0402_5%~D 12
C1810
0.047U_0402_25V4Z~D
1 2
C18160.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BREATH_LED_B
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
R_MPCI_ACT
BAT2_LED#
BATT_AMBER_LED
SNIFFER#
BREATH_GREEN_LED
SNIFFER_WIRELESS_ON/OFF#
R_BT_ACT
SNIFFER_GREEN#
SNIFFER_YELLOW#
SNIFFER_G
SNIFFER_Y
BT_ACTIVE
SATA_ACT# SATA_ACT#_R
+3.3V_ALW
+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN +3.3V_RUN
+3.3V_ALW
BREATH_LED39
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
SNIFFER_WIRELESS_ON/OFF#38
SNIFFER#39
BREATH_GREEN_LED 32
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
R_BT_ACT 32
SNIFFER_GREEN#18
SNIFFER_YELLOW#18
BT_ACTIVE34,40
R_PIDEACT 36
R_SATA_ACT 32
SNIFFER_LED_OFF#39
SATA_ACT#22
SNIFFER_LED_OFF#39
Title
Size Document Number R ev
Date: Sheet o fLA-2792 1.0
PAD and Standoff
43 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
Disable HDD LED
FD7
FIDUCIAL MARK~D
1
R15
100_0402_5%~D
1 2
R20 220_0402_5%~D
1 2
JSNIFF
1BS008-13130-7F_4P~D11
22
33
44
Q16DDTA114EUA-7-F_SOT323~D
2
13
G
D
SQ4BSS138W-7-F_SOT323~D
2
13
FD9
FIDUCIAL MARK~D
1
CLIP1EMI_CLIP
@
GND 1
R1
56_0402_5%~D
1 2
H28@H_O115X31D115X31N
1
H31@H_C24D24N
1
Q13DDTA114EUA-7-F_SOT323~D
2
13
FD17
FIDUCIAL MARK~D
1
Q18DDTA114EUA-7-F_SOT323~D
2
13
CLIP4EMI_CLIP
@
GND 1
R237330_0402_5%~D
12
H29
@H_O115X31D115X31N
1
H6@H_C236B256D110
1
H4H_T256B63D47
1
H7@H_C315D110
1
H11@H_T315B237D118
1
FD12
FIDUCIAL MARK~D
1
FD13
FIDUCIAL MARK~D
1
C
BE
Q65PMST3906_SOT323-3~D 1
2
3
R5
220_0402_5%~D
1 2
R5610K_0402_5%~D
12
H17@H_T217B315D98
1
R19 220_0402_5%~D
1 2
H12@H_C315D118
1
FD16
FIDUCIAL MARK~D
1
R144910K_0402_5%~D@
12
R14480_0402_5%~D @
1 2
FD21
FIDUCIAL MARK~D
1
H27@H_C472D431X376
1
Q1DDTA114EUA-7-F_SOT323~D
2
13
R2
330_0402_5%~D
1 2
G
DS
Q66BSS138W-7-F_SOT323~D
2
13
H19@H_C217D91
1
H5@H_C315D110
1
FD25
FIDUCIAL MARK~D
1
FD20
FIDUCIAL MARK~D
1
H26@H_C472D376
1
H2H_T146B217D91
1H20
@H_T217B315D98
1
FD18
FIDUCIAL MARK~D
1
FD24
FIDUCIAL MARK~D
1
CLIP5EMI_CLIP
@
GND 1
H30@H_O115X31D115X31N
1
H16@H_T217B315D98
1
R81K_0402_5%~D 1 2
H18@H_C217D91
1
FD6
FIDUCIAL MARK~D
1
FD11
FIDUCIAL MARK~D
1
H3@H_C315D110
1
FD19
FIDUCIAL MARK~D
1
FD8
FIDUCIAL MARK~D
1
FD3
FIDUCIAL MARK~D
1
H13@H_C315D118
1
FD22
FIDUCIAL MARK~D
1
Q35DDTA114EUA-7-F_SOT323~D
2
13
CLIP3EMI_CLIP
@
GND1
FD4
FIDUCIAL MARK~D
1
EB
CQ3MMST3904-7-F_SOT323~D
2
31
H32@H_C24D24N
1
R143410K_0402_5%~D
1 2
FD15
FIDUCIAL MARK~D
1
FD1
FIDUCIAL MARK~D
1
R231330_0402_5%~D
12
H1H_T146B217D91
1
CLIP6EMI_CLIP
@
GND1
Y
G
D4
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
R7610K_0402_5%~D
12
H8@H_T217B315D98
1
FD10
FIDUCIAL MARK~D
1
Q2DDTA114EUA-7-F_SOT323~D
2
13
R310K_0402_5%~D
1 2
H9@H_C315D110
1 FD5
FIDUCIAL MARK~D
1
H14@H_T315B237D118
1
R265
330_0402_5%~D
1 2
FD23
FIDUCIAL MARK~D
1
FD14
FIDUCIAL MARK~D
1
H10@H_C315D110
1 FD2
FIDUCIAL MARK~D
1
H15@H_C315D118
1
CLIP2EMI_CLIP
@
GND1
R21330_0402_5%~D
12
Q5DDTA114EUA-7-F_SOT323~D
21
3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+ADP_DCIN
DOCK_DC_IN
PS_ID_IN
PWR_ID
PS_ID_IN
+3.3V_ALW+5V_ALW
+5V_ALW
+DC_IN
+PWR_SRC+3.3VX
+5V_ALW
PS_ID 39
PS_ID_DISABLE# 39
PS_ID_IN36
DOCK_DC_IN36
Title
Size Document Number R ev
Date: Sheet o f
1.0
+DCIN
44 70Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
THESE CAPS MUST BENEXT TO JCHG
DC_IN+ Source
Z-series AC AdaptorConnctor
+3.3VX Source
LA-2792
PR
710
K_0
402_
1%~D
12
PR
11
150K
_040
2_1%
~D
12
PR
610
0K_0
402_
1%~D
12
PC
610
U_1
206_
25V6
M~D
1
2
PR
1015
K_0
402_
1%~D
12
EB
CPQ2MMST3904-7-F_SOT323~D
2
31
PC
40.
1U_0
603_
25V
7K~D
12
PR346
0_0402_5%~D
@1 2
PC
310
00P
_040
2_50
V7K~
D1
2
PR
1310
0K_0
402_
1%~D
12
TYCO_1566065-2~DPJPDC1
Low_PWR 1
DC+_1 2
DC+_2 3
DC-_1 4
DC-_2 5GND_16
GND_27
GND_38
GND_49
MH
1M
H2
PC
20.
47U
_080
5_25
V7k
12
PL34FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
50.
1U_0
603_
25V
7K~D
12
PC72.2U_0603_6.3V6K~D
1
2
G
D S
PQ1
FDV301N_SOT23~D
2
1 3
PD
2D
A20
4U_S
OT3
23~D
231
PL2FBMA-L18-453215-900LMA90T_1812~D 1 2
PQ3FDS6679Z_SO8~D
3 6
5
78
2
4
1
MIC5235-3.3BM5_SOT23-5~D
PU1
IN1
GN
D2
OUT 5
NC 4EN3
PR18433_0402_5%~D 1 2
PR
124.
7K_0
603_
5%~D
@
12
PD
41D
A20
4U_S
OT3
23~D
@
231
PL1FBM-L11-160808-601LMT 0603~D
12
PD53SM24_SOT23
@ 2 31
PC
11U
_080
5_25
V4Z
~D
12
PR
22.
2K_0
402_
5%~D
12
PR299
100_0402_5%~D
@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Z4304Z4305Z4306
Z4301Z4302Z4303
PBATT+
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
SBATT+
PBAT_PRES# 38PBAT_SMBDAT 39,50
PBAT_ALARM# 38
PBAT_SMBCLK 39,50
SBAT_ALARM# 38
SBAT_PRES# 38,51SBAT_SMBDAT 19,39SBAT_SMBCLK 19,39
Title
Size Document Number Rev
Date: Sheet o f
1.0
Battery Conn.
45 70Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
ESD Diodes
Primary Battery Connector
SUYIN_20175A-09G1TOP view
9
8
7
6
5
4
3
2
1
ESD Diodes
Secondary Battery Connector
LA-2792
PR304100_0402_5%~D
1 2
PR302100_0402_5%~D
1 2
PC
230
0.1U
_060
3_25
V7K~
D
12
PR301100_0402_5%~D
1 2
PC
1022
00P_
0402
_50V
7K~D
12
PD42DA204U_SOT323~D @
231 PD45
DA204U_SOT323~D @
231
PL6FBMA-L18-453215-900LMA90T_1812~D 1 2
PJP1
TYCO_1734077-1~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
PR303100_0402_5%~D
1 2
PR
1910
K_04
02_1
%~D
12
PR23100_0402_5%~D
1 2
PL32FBMA-L18-453215-900LMA90T_1812~D
1 2
PD43DA204U_SOT323~D @
231
PR20100_0402_5%~D
1 2
PC
231
2200
P_04
02_5
0V7K
~D
12
PD9DA204U_SOT323~D @
231 PD12
DA204U_SOT323~D @
231PD10
DA204U_SOT323~D @
231 PD11
DA204U_SOT323~D @
231
PC
90.
1U_0
603_
25V7
K~D
12
PR
300
10K_
0402
_5%
~D
12
PBATT1
SUYIN_200277MR009G506ZR~D
BATT1+ 1
SMB_CLK 3SMB_DAT 4
BATT_PRES# 5SYSPRES# 6
BATT2- 9GND10GND11
BATT2+ 2
BATT_VOLT 7BATT1- 8
PR21100_0402_5%~D
1 2
PD44DA204U_SOT323~D @
231
PR22100_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+15V
S
MAX
1999
_SKI
P#
MAX8734_REF
+15VS_L
+15V_SUSP
+5V_SUSP
+5V_ALW
+PWR_SRC
+3.3V_SRCP
+VCC_MAX1999
+3.3V_SRCP
+15V_SUSP
+3.3V_SRCP
+15V_SUS
+5V_SUS+5V_SUSP
+3.3V_SRC
+VCC_MAX1999
+DC1_PWR_SRC
+VCC_MAX1999
NC_TEST2
NC_TEST1
+3.3V_ALW+3.3VX
+3.3V_SRC
+3.3V_ALW
SUSPWROK_5V 48
SUS_ON39,41,42
RUN_ON 19,37,39,41,42,47,48,58
MAX8734_REF
THERM_STP# 18
ALWON39
THERM_STP#18
SUS_ON39,41,42
VAUX_EN39,41
RUN_ENABLE 41
Title
Size Document Number R ev
Date: Sheet o f
1.0
+3.3V/+5V/+15V
46 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Typical:4A Typical:5APeak current:8A Peak current:7A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
OCP point is from 8.2A to 10.5A OCP point is from 8A to 11.2A
DELL CONFIDENTIAL/PROPRIETARY
Place these CAPsclose to FETs
DC/DC +3V/ +5V/ +15VPlace these CAPsclose to FETs
LA-2792
PC
1710
U_1
206_
25V
6M~D
1
2
+
PC
245
330U
_D3L
_6.3
V_R
25~D
@
1
2
PC
231U
_060
3_10
V6K
~D
12
PL84.7U_STQB125A-4722_8A_30%~D
14
32
PD
13E
C11
FS2_
SO
D10
6~D
21
PL22FBM-L11-453215-900LMAT_1812~D
1 2
PR3430_0402_5%~D@
12G
D
S PQ80RHU002N06_SOT323
@
2
13
PR460_0402_5%~D
12
PC
224.
7U_1
206_
25V
6K~D
12
PR
3745
.3K
_040
2_1%
~D
12
PR
3812
.7K
_040
2_1%
~D
12
PC
3610
00P
_040
2_50
V7K~
D
@
12
PR
4724
0K_0
402_
5%~D
12
PC
331U
_060
3_10
V6K
~D
12
PC
260.
1U_0
603_
25V
7K~D
12
PC
152.
2U_1
206_
25V
7M~D
12
PR412K_0402_1%~D
1 2
PJP5
PAD-OPEN 4x4m
1 2
PR322.2_0603_5%~D
1 2
PR3440_0402_5%~D
@12
PC
1922
00P
_040
2_50
V7K~
D
12
PJP6
PAD-OPEN 4x4m
1 2
PU3
MAX8734AEEI_QSOP28~D
SHDN6
BST328
DH326
LX327
DL324
OUT322
LX5 15
DL5 19
FB5 9PRO 10
ILIM5 11ILIM3 5REF 8
V+20
VCC17
LDO5 18
BST5 14
DH5 16
OUT5 21N.C. 1
TON 13GND 23
SK
IP12
LDO325
FB37
ON33ON54
PGOOD 2
PR3450_0402_5%~D
12
PQ78SI4800BDY-T1_SO8~D
365 7 8
2
4
1
PR
270_
1206
_5%
~D
12
PL94.7U_SPC-1205P-4R7B_+40-20%~D
1 2 PC280.1U_0603_25V7K~D
12
PR
188
453K
_040
2_1%
~D
12
PR500_0402_5%~D
@
12
PC
2522
00P
_040
2_50
V7K~
D
12
PQ77SI4800BDY-T1_SO8~D
36 578
2
4
1
PC
344.
7U_1
206_
10V
7K~D
12
PR
510_
0402
_5%
~D 12
PC2510.1U_0603_25V7K~D
12
PC
300.
1U_0
402_
10V
7K~D
12
PD
35M
MB
Z524
5B_S
OT2
3~D
1
2 3
+
PC
2933
0U_D
3L_6
.3V
_R25
~D
1
2P
C26
810
U_1
206_
25V
6M~D
@
1
2
PR203100_0805_5%~D
1 2
PJP4
PAD-OPEN 4x4m
1 2
PR3530_0402_5%~D
@
12
PR
349
0_04
02_5
%~D 1
2
PQ5SI4810BDY_SO8~D
36 578
2
4
1
PR480_0402_5%~D
@
12PR49
1K_0402_1%~D
1 2
PC
210.
1U_0
603_
25V
7K~D
12P
C20
4.7U
_120
6_25
V6K
~D
@
12
PC
1610
U_1
206_
25V
6M~D
1
2
PC
156
2.2U
_120
6_25
V7M
~D
12
PC270.1U_0603_25V7K~D
1 2
PR290_0603_5%~D
1 2
PC
180.
1U_0
603_
25V
7K~D
12
PD
14R
B71
7F_S
OT3
23~D
2 31
+
PC
3133
0U_D
3L_6
.3V
_R25
~D
1
2
PR3540_0402_5%~D
12
PU17TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PR
4210
0K_0
402_
1%~D
12
PC
320.
1U_0
402_
10V
7K~D
12
PR3550_0603_5%~D
@
12
PR
347
100K
_040
2_1%
~D
@ 12
PR2847_0603_5%~D
12
+
PC
244
330U
_D3L
_6.3
V_R
25~D
@
1
2
PR
4424
3K_0
402_
1%~D
12
PQ6SI4810BDY_SO8~D
365 7 8
2
4
1
S
GD
PQ82
FDC655BN_NL_SSOT-6~D
3
6 24
5 1
PJP25
PAD-OPEN 4x4m
1 2
PR3560_0603_5%~D
@
12
PC
241U
_060
3_10
V6K
~D
12
+
PC
252
100U
_25V
_M
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+1.5VRUNP_L +VCCP_1P05VP_L
+1.5V_RUNP +1.5V_RUN
+5V_SUS
+1.5V_RUNP +VCCP_1P05VP
+PWR_SRC +DC2_PWR_SRC
+VCCP_1P05VP +1.05V_VCCP
RUN_ON19,37,39,41,42,46,48,58
1.05V_RUN_PWRGD 42
RUN_ON 19,37,39,41,42,46,48,58
1.5V_RUN_PWRGD42
Title
Size Document Number Rev
Date: Sheet o f
1.0
+1.5VSUSP /+VCCP_1P05VP
47 70Tuesday, February 07, 2006
Compal Electronics, Inc.
+1.5VRUNP / +VCCP_1P05VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Max current:5A Peak current:10A Typical:8A
OCP=7.08~11.96AOCP=14.23~18.39A
LA-2792
PQ8
FDS
8880
_SO
8~D
36 578
2
4
1
PR277
0_0603_5%~D
12
PR21610_0805_5%~D
12
PC
262
2200
P_04
02_5
0V7K
~D
12
PR
226
30.1
K_0
603_
1%~D
12
PC
205
1U_0
603_
10V6
K~D
12
PC2101000P_0402_50V7K~D
@ 12
PR2780_0603_5%~D
12
PC
162
10U
_120
6_25
V6M
~D
1
2 PC
163
10U
_120
6_25
V6M
~D
1
2
PR22528.7K_0603_1%~D
12
PC
211
1000
P_04
02_5
0V7K
~D
@
12
PR
221
19.6
K_04
02_1
%~D
12P
C16
90.
01U
_040
2_25
V7K~
D
12
PD
36
RB
751V
_SO
D32
3~D
21
PJP23
PAD-OPEN 4x4m
1 2
PQ40
FDS
6670
AS
_SO
8~D
365 7 8
2
4
1
PC
164
0.1U
_060
3_25
V7K~
D
12
PR2820_0402_5%~D
@
12
PC1730.01U_0402_25V7K~D
1 2
PC
261
0.01
U_0
402_
25V7
K~D
12
PC
265
100P
_040
2_50
V8K
@
12
PL25FBM-L11-453215-900LMAT_1812~D 1 2
PR223124K_0402_1%
1 2
PL263.8uH_SIL104-3R8_6A_30%~D
1 2
PC
159
10U
_120
6_25
V6M
~D
1
2
PC
170
0.01
U_0
402_
25V7
K~D
12
+
PC
168
330U
_D2E
_2.5
VM_R
9~D
1
2 PQ83
FDS
6670
AS
_SO
8~D
36 578
2
4
1PR220
2.1K_0402_1%~D
1 2
PC
264
100P
_040
2_50
V8K
@
12
PC
166
0.1U
_060
3_25
V7K~
D
12
PC
160
10U
_120
6_25
V6M
~D
1
2
PJP20
PAD-OPEN 4x4m
1 2
PC
161
0.1U
_060
3_25
V7K~
D
12
PC1720.01U_0402_25V7K~D
1 2
PR2191.43K_0402_1%~D
1 2
PR2800_0402_5%~D
12
PC
208
10U
_080
5_6.
3V5K
~D
@
12
PR279
0_0402_5%~D
12
PR224124K_0402_1%
1 2
PJP21
PAD-OPEN 4x4m
1 2
PR2721K_0402_1%~D
12
ISL6227CA-T
PU9
ISL6227CA-T_SSOP28~D
GND 1
LGATE1 2
PGND1 3
PHASE1 4
UGATE1 5
BOOT1 6
ISEN1 7
EN1 8
VOUT1 9VSEN1 10
OCSET1 11
SOFT1 12
DDR 13VIN 14
PG1 15PG2/REF16
SOFT217
OCSET218
VSEN219VOUT220
EN221
ISEN222
BOOT223
UGATE224
PHASE225
PGND226
LGATE227
VCC28
PR
222
5.11
K_0
402_
1%~D
12
PC
207
10U
_080
5_6.
3V5K
~D
@
12
PR2271K_0402_1%~D
12
PC
167
0.1U
_060
3_25
V7K~
D
12
PL271.5uH_SIL104-1R5_10A_30%~D
1 2
PC
263
2200
P_04
02_5
0V7K
~D
12
PJP19
PAD-OPEN 4x4m
1 2
PQ38
FDS
8880
_SO
8~D
365 7 8
2
4
1
PC
165
2.2U
_080
5_10
V6K~
D
12
PD
37R
B75
1V_S
OD
323~
D
21
PR
281
0_04
02_5
%~D
@12
+
PC
206
330U
_D2E
_2.5
VM_R
9~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VSUSP_L
88550_AVDD
88550_AVDD
+1.8V_SUSP
+1.8V_SUSP
+1.8V_SUSP
+5V_SUS
+1.8V_SUS
+PWR_SRC
+0.9V_DDR_VTTP
+3.3V_SUS
+1.8V_SUSP
+0.9V_DDR_VTTP +0.9V_DDR_VTT
+DDR_PWR_SRC
+3.3V_RUN
SUSPWROK_1P8V 42
SUSPWROK_5V 46
RUN_ON 19,37,39,41,42,46,47,58
0.9V_DDR_PWRGD 42
V_DDR_MCH_REF 10,16,17
Title
Size Document Number R ev
Date: Sheet o f
1.0
48 70Tuesday, February 07, 2006
Compal Electronics, Inc.
Design current 8A for +1.8V_SUSPPeak current 10.1A for +1.8VSUSP
DELL CONFIDENTIAL/PROPRIETARY
+1.8VSUSP/ +0.9V_DDR_VT
Design current 1.05A for +0.9V_DDR_VTTPPeak current 1.5A for +0.9V_DDR_VTTP
OCP point is 12.7A for +1.8VSUSP
+1.8VSUSP/ +0.9V_DDR_VTTDDR2 Termination
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PR193, PD20 are only used with the second-source MAX8632.
LA-2792
+
PC
7133
0U_D
2E_2
.5V
M~D
1
2
PC
631U
_060
3_10
V6K
~D
12
+
PC
7033
0U_D
2E_2
.5V
M~D
1
2
PC
740.
1U_0
402_
10V
7K~D
12
PR20420_0603_1%~D
12
PR20248.7K_0402_1%~D
12
PU6
ISL88550A_TQFN28~D
SK
IP25
VD
D22
PGND123
LX19
AV
DD
26
REF3
TON1
OV
P/ U
VP
2
SS
8
GN
D24
POK1 5
POK2 6
VTT 12
STBY 7
TP0
28
VOUT16 REFIN 14
FB15
VTTR 10
ILIM
4
PGND2 11
DH18
DL21
VTTS 9
SHDN 27
VIN 17BST20
VTTI 13
GN
D29
PR840_0402_5%~D @
12
PR
194
100K
_040
2_1%
~D
12
PL141.4UH_HMU1350-1R4PF_15A_20%~D
1 2
3
PQ
34IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC770.1U_0402_10V7K~D
12
PD
20R
B75
1V-4
0_S
OD
323~
D
@
21
PC
624.
7U_1
206_
10V
7K~D
12
PC
720.
1U_0
402_
10V
7K~D
12
PJP9PAD-OPEN 4x4m1 2
PR
195
100K
_040
2_1%
~D
@ 12
PR73
1_0603_5%~D
12
PC14610U_0805_6.3V6M~D
1
2
PJP11
PAD-OPEN 4x4m
1 2
PL24FBM-L11-453215-900LMAT_1812~D
1 2
PC
157
10U
_080
5_6.
3V6M
~D
1
2
PR3480_0402_5%~D
1 2
PR193
10_1206_5%~D
@12
PJP10PAD-OPEN 4x4m1 2
PC1550.22U_0402_6.3V 5K~D
12
PC
5610
U_1
206_
25V
6M~D
1
2
PR2120_0402_5%~D
12
PC
154
10U
_080
5_6.
3V6M
~D
1
2
PC680.22U_0603_10V7K~D
1 2
PR2130_0402_5%~D
12
PC661000P_0402_50V7K~D
12
PC641U_0603_10V6K~D
12
PC
5822
00P
_040
2_50
V7K~
D
12P
C57
0.1U
_060
3_25
V7K
~D
12
PC
153
10U
_080
5_6.
3V6M
~D
1
2
PJP32PAD-OPEN 4x4m1 2
PC
5510
U_1
206_
25V
6M~D
1
2
PQ
11IR
F783
2_S
O8~
D
36 578
2
4
1
PR
200
100K
_040
2_1%
~D
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
VSUM
VSUM
VSUM
VO
VO
VSUM
VO
VO
PHASE1
PHASE2
PHASE3
+PWR_SRC
+VCC_CORE
+CPU_PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+5V_RUN
+5V_RUN
+CPU_PWR_SRC
+5V_RUN
+3.3V_RUN
+CPU_PWR_SRC
+5V_RUN
+VCC_CORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
VID08VID18VID28
VID48VID38
VID58VID68
H_DPRSTP#7,22
DPRSLPVR23
H_PSI#8
RUNPWROK38,39,42,54
RUNPWROK38,39,42,54
VSSSENSE8
VCCSENSE8
IMVP_PWRGD 23,42
IMVP6_PROCHOT#38
CLK_ENABLE#6
Title
Size Document Number R ev
Date: Sheet o f
1.0
+VCORE
49 70Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR2440_0402_5%~D
12
PQ
61FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PC
249
0.1U
_060
3_25
V7K
~D
12
PC
228
2200
P_0
402_
50V7
K~D
12
PC
175
4.7U
_120
6_25
V6K
~D
12 P
C27
010
U_1
206_
25V
6M~D
@
1
2
PQ
42IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PC
194
4.7U
_120
6_25
V6K
~D
12
PC
223
0.1U
_060
3_25
V7K
~D
12
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC201
330P_0402_50V7K~D
12
PC
224
2200
P_0
402_
50V7
K~D
12
PR238147K_0402_1%~D
12
PR2341.91K_0603_1%~D
12
PC
272
10U
_120
6_25
V6M
~D
@
1
2
PQ
56FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PC
215
0.06
8U_0
402_
10V
7K~D
1
2
PC
241
1U_0
603_
10V
6K~D
12
PR2540_0402_5%~D
12
PR2290_0603_5%~D
12
PR2707.68K_0805_1%~D
12
PC2501500P_0402_50V7K~D
1 2
PR2530_0402_5%~D
12
PR3280_0603_5%~D
12
PC213
1000P_0402_50V7K~D
12
PC
227
0.1U
_060
3_25
V7K
~D
12
PR2620_0603_5%~D
12
PH
2
6.8K
B_0
603_
5%_E
RTJ
1VR
682J
~D
12
PR3317.68K_0805_1%~D
12PR372
0_0402_5%~D
12
PR2390_0402_5%~D
12
PC
229
0.01
U_0
402_
16V
7K~D
1
2
PC
177
10U
_120
6_25
V6M
~D
1
2PQ
57IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PR27110_0402_1%~D
12
PR2646.34K_0402_1%~D
12
PR248
499_0402_1%~D
12
PC1790.22U_0603_10V7K~D
1 2
PC
260
0.1U
_060
3_25
V7K
~D
12
PC197
1000P_0402_50V7K~D
12
PC
192
4.7U
_120
6_25
V6K
~D
12
PR26910K_0402_1%~D
1 2
PR32910_0402_1%~D
12
PC2430.22U_0603_10V7K~D
12
PC
240
2200
P_0
402_
50V7
K~D
12
PC1980.22U_0603_10V7K~D
1 2
PL28FBMA-L18-453215-900LMA90T_1812~D 1 2
PR2410_0402_5%~D
12
PC190680P_0402_50V7K~D
1 2
PC
246
1500
P_0
805_
50V7
K
@
12
PJP30
PAD-OPEN 4x4m
1 2
PC2420.22U_0603_10V7K~D
1 2
PC
248
1500
P_0
805_
50V7
K
@
12
PR
263
4.53
K_0
402_
1%~D
12
PR2840_0402_5%~D
@ 12
PL310.45UH_MPC1040LR45_27A_20%~D1
3
4
2
PR2870_0603_5%~D
12
PR2681K_0402_1%~D
12
PC195220P_0402_50V8J~D
1 2
PQ
60FD
S70
88S
N3_
SO
8~D
G 2
D3
S1
PR23210_0402_1%~D
12
PR
233
10_0
603_
5%~D
12
PU11
ISL6260CRZ-T_QFN40~D
VW8
PGD_IN2
PSI#1
DPRSLPVR36
DPRSTP#37
VID634 VID533
RTN13
FB10
COMP9
VS
S19
VDIFF11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#38
VR_TT#4
RBIAS3
NTC5
SOFT6
VID028VID129VID230VID331VID432
3V3
39
VSUM 17
VSEN12
VR_ON35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DR
OO
P14
VD
D20
VIN
18
PG
OO
D40
GND41
PR2520_0402_5%~D
12
PC
180
0.01
U_0
402_
25V
7K~D
12
PC
176
10U
_120
6_25
V6M
~D
1
2
PC214
1000P_0402_50V7K~D
12
PR22810_0603_5%~D
12
PR2430_0402_5%~D
12
PL330.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PR258
2.21K_0402_1%~D
12
PC
178
1U_0
603_
10V
6K~D
12
PC
182
1U_0
603_
10V
6K~D
12
PC
239
0.1U
_060
3_25
V7K
~D
12
PC
196
1U_0
603_
10V
6K~D
12
PR2400_0402_5%~D
12
PC1810.22U_0603_10V7K~D
12
PR2420_0402_5%~D
12
PR2317.68K_0805_1%~D
12
PR
261
2.43
K_0
402_
1%~D
12
PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PC2000.22U_0603_10V7K~D
12
PC
191
0.33
U_0
603_
10V
7K
1
2
PQ
50IR
F782
1_S
O8~
D
S1
S2
S3
G4
D8
D7
D6
D5
PR257
332_0402_1%~D
12
PR
266
15K
_040
2_1%
~D
12
PC
247
1500
P_0
805_
50V7
K
@
12
PL290.45UH_MPC1040LR45_27A_20%~D
1
3
4
2
PR26710.5K_0402_1%
12
PC
271
10U
_120
6_25
V6M
~D
@
1
2
PR2490_0402_5%~D
@ 12
PJP31
PAD-OPEN 4x4m
1 2
PR25982.5K_0402_1%~D
12
PR26011.5K_0402_1%~D
12
PR33010K_0402_1%~D
1 2
PC1870.01U_0402_16V7K~D
12
PR
290
0_06
03_5
%~D
12
PR2450_0402_5%~D
12
PC
193
10U
_120
6_25
V6M
~D
1
2
PR23010K_0402_1%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8731_IINP
MAX8731_REF
LDO
LDO
+VCHGR_B +VCHGR_L
MAX8731_REF
MAX8731_IINP
+VCHGR
+DC_IN
+5V_ALW
CHAGER_SRC+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
+5V_ALW
ACAV_IN18,39,51
PBAT_SMBCLK39,45
PBAT_SMBDAT39,45
BAT_SEL#39
ADAPT_OC 38
Title
Size Document Number Rev
Date: Sheet o f
1.0
Charger
50 70Tuesday, February 07, 2006
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin DetectorHigh 17.9 VLow 17.24 V
LA-2792
PR2750_0603_5%~D
1 2
PC2041U_0603_10V6K~D
1 2
PC
114
10U
_120
6_6.
3V7K
~D
1
2
PC
259
10P
_040
2_50
V8J~
D1
2
G
D
S PQ81RHU002N06_SOT323
2
13
PC
121
0.1U
_040
2_10
V7K~
D
12
PR
364
27.4
K_04
02_1
%~D 1
2
PC
255
100P
_040
2_50
V8K
12
PR
149
10K_
0402
_1%
~D1
2
PR
341
15.8
K_04
02_1
%~D
12
PC
258
0.01
U_0
402_
25V7
K~D
12
PC253220P_0402_50V7K~D
1
2
PR
362
301K
_040
2_1%
~D
12
PU19BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PC
267
3300
PF_0
402_
50V7
K~D
12
PC
254
0.01
U_0
402_
25V7
K~D
12
PC
106
10U
_120
6_25
V6M
~D
1
2
PC
256
100P
_040
2_50
V8K
12
PR335
0_0402_5%~D
1 2
PR
367
100K
_040
2_5%
~D1
2
PL19FBMA-L18-453215-900LMA90T_1812~D 1 2
PC
113
10U
_120
6_6.
3V7K
~D
1
2
PQ79
IRF7
821_
SO
8~D
S1
S2
S3
G4
D8
D7
D6
D5
PC110
0.01U_0402_25V7K~D
12
PR1380.01_2512_1%~D
4
2
1
3
PC
127
2200
P_04
02_5
0V7K
~D
12
PR3360_0402_5%~D
12
PR373
1K_0603_1%~D
1 2
PR342806K_0402_1%~D
12
PR
148
4.7K
_040
2_5%
~D
12
PR
363
59K_
0402
_1%
~D
12
PC
203
0.1U
_060
3_25
V7K~
D
12
PU19ALM393DR_SO8~D
IN+3
IN-2O 1
P8
G4
PC2210.1U_0402_10V7K~D
12
PR3370_0402_5%~D
@
12
PC
257
100P
_040
2_50
V8K
12
PC1021U_0805_25V4Z~D
12
PR3654.32M_0402_1%~D1 2
PC
128
0.1U
_060
3_25
V7K~
D
12
PL205.6U_HMU1356-5R6_8.8A_20%~D
12
PQ76SI4810BDY_SO8~D
365 7 8
2
4
1
PC
105
10U
_120
6_25
V6M
~D
1
2
PC
119
0.01
U_0
402_
25V7
K~D
12
PC
103
2200
P_04
02_5
0V7K
~D
12
PR
150
10K_
0402
_1%
~D
12
PC
118
0.01
U_0
402_
25V7
K~D
12
PC
112
0.1U
_060
3_25
V7K~
D
12
1SS
355_
SOD
323~
DP
D54
21
PC
122
1U_0
603_
10V6
K~D
12
PR361
0_0402_5%~D
1 2
PC
273
10U
_120
6_25
V6M
~D
@
1
2
PR27433_0603_1%~D
12
PC2021U_0603_10V6K~D
1 2
PR142150K_0402_1%~D
12
PC
9910
U_1
206_
25V6
M~D
1
2
PC
104
0.1U
_060
3_25
V7K~
D
12
PC
212
0.01
U_0
402_
25V7
K~D
12
PR368100_0402_5%~D
1 2
PD
40R
B75
1V_S
OD
323~
D
21
PR146
0_0402_5%~D
1 2
PQ75
SI4
800B
DY
-T1_
SO8~
D
@
365 7 8
2
4
1
PC
266
0.01
U_0
603_
50V7
K~D
@
1
2
PR1450.01_2512_1%~D
4
2
1
3
PC
120
0.1U
_040
2_10
V7K~
D
12
PR14320K_0402_1%~D
12
PR3601_0603_1%~D 12
PU8
MAX8731_TQFN28~D
DHI 24
CSIP 18
LX 23
FBSA 15
SDA9
IINP8
GN
D1
DCIN22
ACIN2
VDD11
SCL10
ACOK13
BATSEL14
BST 25
FBSB 16
CCS4
LDO 21
VCC 26
CSS
P28
CSIN 17
PGND 19
DLO 20
CCV6
CCI5
CSS
N27
REF3
DAC7
GND12
GND29
PR
366
100K
_040
2_1%
~D 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_NCHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,50
SBAT_PRES#38,45
SBAT_LOW38
Title
Size Document Number Rev
Date: Sheet o f
1.0
Selector
51 70Tuesday, February 07, 2006
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
LA-2792
PR322100K_0402_5%~D
1 2
PR
315
470K
_040
2_5%
~D
12
FDS4935_SO8~D
PQ65
G2 2D28
S1 3D15
S2 1D27
G1 4D16
G
D
S
PQ67RHU002N06_SOT323
2
13
G
D
S
PQ73RHU002N06_SOT323
2
13
PR32410K_0402_5%~D
1 2
PD49B540C~D
2 1
PR308100K_0402_5%~D@
12
PC2350.1U_0603_25V7K~D
1 2
PR31647K_0402_1%~D
1 2
PR31947K_0402_1%~D
1 2
PR
305
10K_
0402
_5%
~D1
2
PU14BLM393DR_SO8~D
IN+5
IN-6 O 7
P8
G4
PC2340.1U_0603_25V7K~D
1 2
PD51
RB715F_SOT323
2
31
PR30910K_0402_5%~D
12
PR307100K_0402_5%~D
12
PR
311
33K_
0402
_5%
~D
12
PQ62SI4835BDY_SO8~D
365
78
2
4
1
PR325100K_0402_5%~D
1 2
G
D
SPQ74RHU002N06_SOT323
2
13
PR
320
470K
_040
2_5%
~D
12
PR31210K_0402_5%~D
12
PC
236
0.1U
_060
3_25
V7K~
D
@ 12
PU14ALM393DR_SO8~D
IN+3
IN-2 O 1
P8
G4
PD48
RB715F_SOT323
2
31
PD50
RB715F_SOT323
2
31
PC
232
2200
P_04
02_5
0V7K
~D
12
PC
237
0.1U
_060
3_25
V7K~
D
12
PQ66SI4835BDY_SO8~D
365
78
2
4
1
PR30610K_0402_5%~D
12
PR
318
33K_
0402
_5%
~D
12
PR
326
32.4
K_04
02_1
%~D
12
PQ70SI4835BDY_SO8~D
365
78
2
4
1
PU15TC7SH32FU_SSOP5~D
I02
I11 O 4
P5
G3
PQ71SI4835BDY_SO8~D
36
5
78
2
4
1
G
D
S
PQ63RHU002N06_SOT323
2
13
PR321147K_0402_1%~D
1 2
PQ69SI4835BDY_SO8~D
3 65
78
2
4
1
PR
314
470K
_040
2_5%
~D
12
PR313100K_0402_5%~D
12
PR
323
42.2
K_04
02_1
%~D
12
PD47B540C~D
2 1
G
D
S
PQ64RHU002N06_SOT323
2
13
PR310100K_0402_5%~D
12
PR
317
10K_
0402
_5%
~D
12
G
D
S
PQ68RHU002N06_SOT323
2
13
PC
233
0.1U
_060
3_25
V7K~
D
12
PQ72SI4835BDY_SO8~D
3 6
5
78
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_MTX_GRX_N[0:15]
PEG_MTX_GRX_P[0:15]
PEG_MRX_GTX_P[0:15]
PEG_MRX_GTX_N[0:15]
DVI_SCLK
DVI_SDATA
LCD_DDCCLK
LCD_DDCDATA
PEG_MRX_GTX_C_P0PEG_MRX_GTX_C_N0
PEG_MRX_GTX_P0PEG_MRX_GTX_N0
PEG_MRX_GTX_N1PEG_MRX_GTX_P1
PEG_MRX_GTX_N2PEG_MRX_GTX_P2
PEG_MRX_GTX_N3PEG_MRX_GTX_P3
PEG_MRX_GTX_N4PEG_MRX_GTX_P4
PEG_MRX_GTX_N5PEG_MRX_GTX_P5
PEG_MRX_GTX_N6PEG_MRX_GTX_P6
PEG_MRX_GTX_N7PEG_MRX_GTX_P7
PEG_MRX_GTX_N8PEG_MRX_GTX_P8
PEG_MRX_GTX_N9PEG_MRX_GTX_P9
PEG_MRX_GTX_N10PEG_MRX_GTX_P10
PEG_MRX_GTX_N11PEG_MRX_GTX_P11
PEG_MRX_GTX_N12PEG_MRX_GTX_P12
PEG_MRX_GTX_N13
PEG_MRX_GTX_N14PEG_MRX_GTX_P14
PEG_MRX_GTX_N15PEG_MRX_GTX_P15
PEG_MRX_GTX_P13
PEG_MRX_GTX_C_P1PEG_MRX_GTX_C_N1
PEG_MRX_GTX_C_P2PEG_MRX_GTX_C_N2
PEG_MRX_GTX_C_P3PEG_MRX_GTX_C_N3
PEG_MRX_GTX_C_P4PEG_MRX_GTX_C_N4
PEG_MRX_GTX_C_P5PEG_MRX_GTX_C_N5
PEG_MRX_GTX_C_P6PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P7PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_P8PEG_MRX_GTX_C_N8
PEG_MRX_GTX_C_P9PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_P10PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_P11PEG_MRX_GTX_C_N11
PEG_MRX_GTX_C_P12PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_P13PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_P14PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_P15PEG_MRX_GTX_C_N15
DAT_DDC2VGADDCCLKCLK_DDC2
I2CH_SCL
I2CH_SDA
TV_CVBS
VGA_RED
RAM_CFG1
PEG_MRX_GTX_C_P15
PEG_MRX_GTX_C_N11
PEG_MTX_GRX_N15
PEG_MTX_GRX_N6
LCD_DDCCLK
GFX_CORE_CNTRL
PEG_MRX_GTX_C_N7
PEG_MRX_GTX_C_N5
PEG_MRX_GTX_C_P2
PEG_MTX_GRX_N11
I2CH_SDA
VGA_BLU
PANEL_BKEN
BIA_PWM
PLTRST_DELAY#
CLK_PCIE_VGA
PEG_MRX_GTX_C_P10
PEG_MTX_GRX_P7
PEG_MTX_GRX_P2
XTALSSIN_R
DVI_SDATA
PCI_DEVID2
XTALOUTBUFF
PEG_MRX_GTX_C_P1
PEG_MTX_GRX_P3
PEG_MTX_GRX_N1
DACB_RSET
VGA_VSYNC
PEG_MRX_GTX_C_P6
PEG_MRX_GTX_C_P5
PEG_MRX_GTX_C_N0
PEG_MTX_GRX_P0
VGADDCCLK
DACAVREF
PEG_MRX_GTX_C_N15
PEG_MRX_GTX_C_P9PEG_MRX_GTX_C_N8PEG_MRX_GTX_C_P8
PEG_MTX_GRX_N12
I2CH_SCL
VGA_HSYNC
ENVDD
PEG_MRX_GTX_C_N2
PEG_MTX_GRX_N7
PEG_MTX_GRX_P1
VGADDCDAT
PEG_MRX_GTX_C_N10
PEG_MRX_GTX_C_N6
PEG_MRX_GTX_C_P0
PEG_MTX_GRX_N14PEG_MTX_GRX_P14
PEG_MTX_GRX_N3
DVI_SCLK
CLK_PCIE_VGA#
PEG_MTX_GRX_P15
RAM_CFG0
PEG_MTX_GRX_P10
PEG_MTX_GRX_N8
PCI_DEVID3
XTALOUT
PEG_MRX_GTX_C_P12
PEG_MRX_GTX_C_P3
PEG_MRX_GTX_C_P14
PEG_MRX_GTX_C_P4
PEG_MTX_GRX_P13
PEG_MTX_GRX_P12
PEG_MTX_GRX_N10
PEG_MTX_GRX_N4
PCI_DEVID1
DVI_DETECT
PEG_MRX_GTX_C_P11
PEG_MTX_GRX_N9
PEG_MTX_GRX_P5
LCD_DDCDATA
TV_C
RAM_CFG2
PEG_MRX_GTX_C_P13
PEG_MRX_GTX_C_P7
PEG_MTX_GRX_P11
PEG_MTX_GRX_P9
PEG_MTX_GRX_P6
RAM_CFG3
PEG_MRX_GTX_C_N14
PEG_MRX_GTX_C_N1
DACBVREF
VGA_GRN
PEG_MRX_GTX_C_N13
PEG_MRX_GTX_C_N12
PEG_MRX_GTX_C_N3
PEG_MTX_GRX_N13
PEG_MTX_GRX_P8
PCI_DEVID0
PEG_MRX_GTX_C_N9
PEG_MRX_GTX_C_N4
PEG_MTX_GRX_N5
PEG_MTX_GRX_P4
PEG_MTX_GRX_N2
PEG_MTX_GRX_N0
TV_Y
VGADDCDAT
XTALIN
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_RUN
PEG_MTX_GRX_P[0:15]12
PEG_MTX_GRX_N[0:15]12
PEG_MRX_GTX_P[0:15]12
PEG_MRX_GTX_N[0:15]12
CLK_PCIE_VGA6
PLTRST_DELAY#23
VGA_HSYNC 20VGA_VSYNC 20
DAT_DDC220,36CLK_DDC220,36
CLK_NV_27M6
XTALOUTBUFF57
XTALSSIN57
CLK_NVSS_27M6
PCI_DEVID3 57
RAM_CFG1 57
DVI_SDATA 36
VGA_RED 20,36
PCI_DEVID1 57
TV_CVBS 36
RAM_CFG3 57
RAM_CFG0 57
PANEL_BKEN 19
DVI_SCLK 36
TV_C 36
CLK_PCIE_VGA#6
RAM_CFG2 57
LCD_DDCDATA 19
ENVDD 19
VGA_GRN 20,36
GFX_CORE_CNTRL 58
PCI_DEVID0 57
DVI_DETECT 36
LCD_DDCCLK 19
VGA_BLU 20,36
PCI_DEVID2 57
BIA_PWM 19,39
TV_Y 36
THERMTRIP_VGA# 18
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M PCIE,GPIO,CLK
52 70Tuesday, February 07, 2006
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
<---DVI
<---SVIDEO
<---CRT
R21014.7K_0402_5%~D
12
G
D S
Q20092N7002W-7-F_SOT323~D
2
1 3
C20030.1U_0402_10V7K~D
12
C20240.1U_0402_10V7K~D
12
C20090.1U_0402_10V7K~D
12
C20220.1U_0402_10V7K~D
12
G
DS
Q252N7002W-7-F_SOT323~D
@
2
13
C20310.1U_0402_10V7K~D
12
C20120.1U_0402_10V7K~D
12
T2020 PAD
R2005 2.2K_0402_5%~D
1 2
C20040.1U_0402_10V7K~D
12T2026 PAD
C220518P_0402_50V8J~D@
12
G
D S
Q20082N7002W-7-F_SOT323~D
2
1 3
C20160.1U_0402_10V7K~D
12
C20280.1U_0402_10V7K~D
12
C20320.1U_0402_10V7K~D
12
C2001 0.01U_0402_16V7K~D
1 2
C20250.1U_0402_10V7K~D
12
T2021 PAD
R2009 124_0402_1%~D
1 2
C20330.1U_0402_10V7K~D
12
C20060.1U_0402_10V7K~D
12
C20150.1U_0402_10V7K~D
12
R212510K_0402_5%~D
12
C20080.1U_0402_10V7K~D
12
R2129 10K_0402_5%~D
1 2
C20130.1U_0402_10V7K~D
12
C20100.1U_0402_10V7K~D
12
R2010 124_0402_1%~D
1 2
C20070.1U_0402_10V7K~D
12
C20180.1U_0402_10V7K~D
12
R2128 10K_0402_5%~D
1 2
R2127
10K_0402_5%~D
1 2
DVO
/ G
PIO
PCI E
XPR
ESS
TESTCL
K
Part 1 of 5
DACs
I2C
U2001A
G72M-V-N-A2_BGA533~D
PEX_RX0AF1PEX_RX0_NAG2PEX_RX1AG3PEX_RX1_NAG4PEX_RX2AF4PEX_RX2_NAF5PEX_RX3AG6PEX_RX3_NAG7PEX_RX4AF7PEX_RX4_NAF8PEX_RX5AG9PEX_RX5_NAG10PEX_RX6AF10PEX_RX6_NAF11PEX_RX7AG12PEX_RX7_NAG13PEX_RX8AG15PEX_RX8_NAG16PEX_RX9AF16PEX_RX9_NAF17PEX_RX10AG18PEX_RX10_NAG19PEX_RX11AF19PEX_RX11_NAF20PEX_RX12AG21PEX_RX12_NAG22PEX_RX13AF22PEX_RX13_NAF23PEX_RX14AG24PEX_RX14_NAG25PEX_RX15AG26PEX_RX15_NAF27
PEX_TX0AD5PEX_TX0_NAD6PEX_TX1AE6PEX_TX1_NAE7PEX_TX2AD7PEX_TX2_NAC7PEX_TX3AE9PEX_TX3_NAE10PEX_TX4AD10PEX_TX4_NAC10PEX_TX5AE12PEX_TX5_NAE13PEX_TX6AD13PEX_TX6_NAC13PEX_TX7AC15PEX_TX7_NAD15PEX_TX8AE15PEX_TX8_NAE16PEX_TX9AC18PEX_TX9_NAD18PEX_TX10AE18PEX_TX10_NAE19PEX_TX11AC21PEX_TX11_NAD21PEX_TX12AE21PEX_TX12_NAE22PEX_TX13AD22PEX_TX13_NAD23PEX_TX14AF25PEX_TX14_NAE25PEX_TX15AE24PEX_TX15_NAD24
PEX_REFCLKAE3PEX_REFCLK_NAE4
PEX_RST_NAC6
XTALINB1
XTALOUTC2
XTALOUTBUFFC3
XTALSSINC1
GPIO0 A9GPIO1 D9GPIO2 A10GPIO3 B10GPIO4 C10GPIO5 C12GPIO6 B12GPIO7 A12GPIO8 A13GPIO9 B13
GPIO10 B15GPIO11 A15GPIO12 B16
MIOBD0 G2MIOBD1 G3MIOBD2 J2MIOBD3 J1MIOBD4 K4MIOBD5 K1MIOBD6 M2MIOBD7 M1MIOBD8 N1MIOBD9 N2
MIOBD10 N3MIOBD11 R3
MIOB_HSYNC G4MIOB_VSYNC F1
MIOB_DE G1MIOB_CTL3 F2
MIOB_CLKIN R2MIOB_CLKOUT K2
MIOB_CLKOUT_N K3
MIOB_VREF J4
DACA_HSYNC AD4DACA_VSYNC AC4
DACA_RED AE1DACA_BLUE AD2
DACA_GREEN AD1DACA_IDUMP U9DACA_RSET AD3
DACA_VREF AB4
DACB_RED F4DACB_BLUE D5
DACB_GREEN E4DACB_IDUMP L9DACB_RSET D6
DACB_VREF E7
I2CA_SCL D10I2CA_SDA E10I2CB_SCL F9I2CB_SDA F10I2CC_SCL E9I2CC_SDA D8I2CH_SCL C7I2CH_SDA B7
IFPAB_VPROBE N6IFPCD_VPROBE M5
JTAG_TCK AE27JTAG_TDI AD27
JTAG_TDO AE26JTAG_TMS AD26
JTAG_TRST_N AD25TESTMODE D7
PEX_TSTCLK_OUT AF13PEX_TSTCLK_OUT_N AF14
DACB_HSYNC E6DACB_VSYNC F5
C20200.1U_0402_10V7K~D
12
C20170.1U_0402_10V7K~D
12
C20140.1U_0402_10V7K~D
12
R2133
0_0402_5%~D
@1 2
C20230.1U_0402_10V7K~D
12
R2002 2.2K_0402_5%~D
1 2
C20210.1U_0402_10V7K~D
12
R11
610
K_04
02_5
%~D
12
C20050.1U_0402_10V7K~D
12
C22
0418
P_0
402_
50V8
J~D
@
1
2
C20190.1U_0402_10V7K~D
12
R2003 2.2K_0402_5%~D
1 2
C20270.1U_0402_10V7K~D
12
R2100
4.7K_0402_5%~D
12
R2132 0_0402_5%~D 1 2
R21310_0402_5%~D
1 2
R2006 2.2K_0402_5%~D
1 2
C20020.1U_0402_10V7K~D
12
C20300.1U_0402_10V7K~D
12
C20260.1U_0402_10V7K~D
12
C20110.1U_0402_10V7K~D
12
C2174 0.01U_0402_16V7K~D
1 2C20290.1U_0402_10V7K~D
12
Y2001
27MHz_16PF_6P27000126~D
@
OUT 3
GND 2
GND4
IN1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBBA3
DQSA4
FBBA4FBBA5
FBAA0FBAA2
FBAWE#
FBBA2
FBARAS#
FBAD0FBAD1FBAD2FBAD3
FBAA5
CLKA1CLKA1#
CLKA0#CLKA0
DQMA#4
DQMA#6
FBAA4FBACAS#
DQMA#[0:7]
DQSA[0:7]
FBAA[0:11]
FBAD[0:63]
FBBA[2:5]
DQMA#3
DQMA#1
DQMA#5
DQSA3
DQSA1
DQSA7
FBA_VREF1
FBAD4FBAD5FBAD6FBAD7
FBAD12FBAD13FBAD14FBAD15
FBAD8FBAD9FBAD10FBAD11
FBAD20FBAD21FBAD22FBAD23
FBAD28FBAD29FBAD30FBAD31
FBAD24FBAD25FBAD26FBAD27
FBAD16FBAD17FBAD18FBAD19
FBAD36FBAD37FBAD38FBAD39
FBAD44FBAD45FBAD46FBAD47
FBAD40FBAD41FBAD42FBAD43
FBAD32FBAD33FBAD34FBAD35
FBAD52FBAD53FBAD54FBAD55
FBAD60FBAD61FBAD62FBAD63
FBAD56FBAD57FBAD58FBAD59
FBAD48FBAD49FBAD50FBAD51
FBA_CKE
LCD_A1-
LCD_A0+LCD_A0-LCD_A1+
LCD_ACLK+LCD_ACLK-
LCD_A2-LCD_A2+
LCD_BCLK-LCD_BCLK+
LCD_B0-LCD_B0+
LCD_B1-LCD_B1+
LCD_B2-LCD_B2+
VGA_THERMDNVGA_THERMDP
DVI_TX0-
DVI_TX1-DVI_TX1+
DVI_TX2-
DVI_TX0+DVI_CLK-
DVI_TX2+
DVI_CLK+
DVI_TX0-
DVI_TX1-
DVI_TX1+
DVI_TX2-
DVI_CLK+
DVI_TX2+
DVI_CLK-
DVI_TX0+
PEX_PLL_EN_TERM100SUB_VENDOR
3GIO_ADR_0
3GIO_ADR_13GIO_ADR_2
FBAA7
FBAA10
DQSA6
DQMA#0
FBAA3
DQMA#7
FBA_BA0
FBAA11
DQSA5
FBA_BA1
FBAA1
FBACS1#
DQSA2
FBAA6
FBAA8
DQMA#2
FBACS0#
DQSA0
FBAA9
MIOA_HSYNC
+3.3V_RUN
+1.8V_RUN
IFPC_IOVDD
FBACS1# 56FBACS0# 56FBAWE# 56FBA_BA0 56
FBA_CKE 56
FBARAS# 56
FBA_BA1 56
FBACAS# 56
CLKA0 56CLKA0# 56CLKA1 56CLKA1# 56
FBAA[0:11] 56
FBBA[2:5] 56
FBAD[0:63] 56
DQSA[0:7] 56
DQMA#[0:7] 56
LCD_ACLK+19LCD_ACLK-19LCD_A0+19LCD_A0-19LCD_A1+19LCD_A1-19LCD_A2+19LCD_A2-19
LCD_BCLK+19LCD_BCLK-19LCD_B0+19LCD_B0-19LCD_B1+19LCD_B1-19LCD_B2+19LCD_B2-19
VGA_THERMDN 18VGA_THERMDP 18
DVI_TX0+36
DVI_TX1+36DVI_TX1-36
DVI_CLK+36
DVI_TX0-36
DVI_TX2+36
DVI_CLK-36
DVI_TX2-36
PEX_PLL_EN_TERM100 57SUB_VENDOR 57
3GIO_ADR_0 57
3GIO_ADR_1 573GIO_ADR_2 57
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M Memory Interface
53 70Tuesday, February 07, 2006
Compal Electronics, Inc.
10mil10mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Strap for G72
R20
3410
K_04
02_5
%~D
12
T2001PAD
R20
191K
_040
2_5%
~D
12
Part 3 of 5
LVD
S/TM
DS
NCG
ENER
AL
SERIAL
U2001C
G72M-V-N-A2_BGA533~D
IFPA_TXC_NU4 IFPA_TXCT4 MIO_A_D0 A2
MIO_A_D2 A3
MIO_A_D4 A4
MIO_A_D1 B3
MIO_A_D5 B4MIO_A_D6 B6
MIO_A_HSYNC C4
MIO_A_D8 C6
NC_3 C13
MIO_A_D3 D4
NC_0 D12NC_1 E12NC_2 F12
MIO_A_D9 G5
MIO_A_D7 P4
MIO_A_D10 V4
IFPA_TXD0N4IFPA_TXD0_NN5IFPA_TXD1R5IFPA_TXD1_NR4IFPA_TXD2T5IFPA_TXD2_NT6IFPA_TXD3R6IFPA_TXD3_NP6IFPB_TXCW5IFPB_TXC_NW6IFPB_TXD4W3IFPB_TXD4_NW2IFPB_TXD5AA2IFPB_TXD5_NAA3IFPB_TXD6AB1IFPB_TXD6_NAA1IFPB_TXD7AB3IFPB_TXD7_NAB2
IFPAB_RSETU6
IFPC_TXCV1IFPC_TXC_NW1IFPC_TXD0T1IFPC_TXD0_NR1IFPC_TXD1T3IFPC_TXD1_NT2IFPC_TXD2V2IFPC_TXD2_NV3
IFPCD_RSETJ3
BUFRST_N A6
STEREO F7
SWAPRDY A7THERMDN C9THERMDP B9
ROM_SCLK D2ROM_SI F3
ROM_SO D3ROMCS_N D1
R202210K_0402_1%~D
12
R20181K_0402_5%~D
12
C20
360.
022U
_040
2_16
V7K~
D
1
2
R2096 49.9_0402_1%~D
12
R2097 49.9_0402_1%~D
12
C2176 0.01U_0402_16V7K~D
1 2R2092 49.9_0402_1%~D
12
C2178 0.01U_0402_16V7K~D
1 2
C2179 0.01U_0402_16V7K~D
1 2R2098 49.9_0402_1%~D
12
MEM
OR
Y IN
TER
FAC
E
Part 2 of 5
U2001B
G72M-V-N-A2_BGA533~D
FBAD0A26FBAD1C24FBAD2B24FBAD3A24FBAD4C22FBAD5A25FBAD6B25FBAD7D23FBAD8G22FBAD9J23FBAD10E24FBAD11F23FBAD12J24FBAD13F24FBAD14G23FBAD15H24FBAD16D16FBAD17E16FBAD18D17FBAD19F18FBAD20E19FBAD21E18FBAD22D20FBAD23D19FBAD24A18FBAD25B18FBAD26A19FBAD27B19FBAD28D18FBAD29C19FBAD30C16FBAD31C18FBAD32N26FBAD33N25FBAD34R25FBAD35R26FBAD36R27FBAD37T25FBAD38T27FBAD39T26FBAD40AB23FBAD41Y24FBAD42AB24FBAD43AB22FBAD44AC24FBAD45AC22FBAD46AA23FBAD47AA22FBAD48T24FBAD49T23FBAD50R24FBAD51R23FBAD52R22FBAD53T22FBAD54N23FBAD55P24FBAD56AA24FBAD57AA27FBAD58AA26FBAD59AB25FBAD60AB26FBAD61AB27FBAD62AA25FBAD63W25
FBA_CMD0 G27FBA_CMD1 D25FBA_CMD2 F26FBA_CMD3 F25FBA_CMD4 G25FBA_CMD5 J25FBA_CMD6 J27FBA_CMD7 M26FBA_CMD8 C27FBA_CMD9 C25
FBA_CMD10 D24FBA_CMD11 N27FBA_CMD12 G24FBA_CMD13 J26FBA_CMD14 M27FBA_CMD15 C26FBA_CMD16 M25FBA_CMD17 D26FBA_CMD18 D27FBA_CMD19 K26FBA_CMD20 K25FBA_CMD21 K24FBA_CMD22 F27FBA_CMD23 K27FBA_CMD24 G26FBA_CMD25 B27FBA_CMD26 N24
FBADQM0 D21FBADQM1 F22FBADQM2 F20FBADQM3 A21FBADQM4 V27FBADQM5 W22FBADQM6 V22FBADQM7 V24
FBADQS_RN0 A22FBADQS_RN1 E22FBADQS_RN2 F21FBADQS_RN3 B21FBADQS_RN4 V26FBADQS_RN5 W23FBADQS_RN6 V23FBADQS_RN7 W27
FBADQS_WP0 B22FBADQS_WP1 D22FBADQS_WP2 E21FBADQS_WP3 C21FBADQS_WP4 V25FBADQS_WP5 W24FBADQS_WP6 U24FBADQS_WP7 W26
FB_VREF A16
FBA_CLK0 L24FBA_CLK0_N K23
FBA_CLK1 M22FBA_CLK1_N N22FBA_REFCLK M23
FBA_REFCLK_N M24FBA_DEBUG K22
R2094 49.9_0402_1%~D
12
R202110K_0402_1%~D
12
R2093 49.9_0402_1%~D
12
R2099 49.9_0402_1%~D
12
R2095 49.9_0402_1%~D
12C2177 0.01U_0402_16V7K~D
1 2
R200110K_0402_5%~D
12
R20
1710
K_04
02_5
%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLLVDD
FBA_PLLAVDD
IFPC_IOVDD
DACA_VDD
PEX_PLLDVDD
MIOBCAL_PD_VDDQ
PEX_PLLAVDD
PLLVDD
DACB_VDD
IFPCD_PLLVDD
IFPAB_PLLVDD
IFPAB_IOVDD
DACB_VDDDACA_VDD
G72_PLLVDD
G72_PLLVDD
RUNPWROK
FBA_PLLAVDD
+VDD_CORE
+3.3V_RUN
+1.2VRUN
+3.3V_RUN
+3.3V_RUN
+1.2VRUN
+1.8V_RUN
PEX_PLLAVDD
+1.8V_RUN
+1.8V_RUN+1.8V_RUN
+3.3V_RUN
IFPC_IOVDD
+2.5V_RUN
+2.5V_RUN
+2.5V_RUN
+1.2VRUN
+3.3V_RUN
+1.2VRUN
RUNPWROK38,39,42,49
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M Power
54 70Tuesday, February 07, 2006
Compal Electronics, Inc.
1808mA
40mA
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
20mA180mA
40mA
40mA
70mA140mA
C21
800.
022U
_040
2_16
V7K~
D
1
2
C21
070.
022U
_040
2_16
V7K~
D
1
2
C20
75
0.01
U_0
402_
16V7
K~D
1
2
C22
154.
7U_0
603_
6.3V
4Z~D
1
2
C20
530.
1U_0
402_
10V7
K~D
1
2
C21
170.
1U_0
402_
10V7
K~D
1
2
C20
590.
1U_0
402_
10V7
K~D
1
2
L2129BLM18AG121SN1D_0603~D
12
C21
150.
1U_0
402_
10V7
K~D
1
2
G
D
S
Q2012SI1303DL-T1-E3_SOT323-3~D
2
13
C20
424.
7U_0
603_
6.3V
4Z~D
1
2
C21
180.
1U_0
402_
10V7
K~D
1
2
L2012BLM18AG121SN1D_0603~D
12
C20
7310
U_0
805_
4VAM
~D
1
2
C20
4310
U_0
805_
4VAM
~D
1
2
C21
120.
022U
_040
2_16
V7K~
D
1
2
C22
0147
00P_
0402
_25V
7K~D
1
2
L2004
BLM18AG121SN1D_0603~D
1 2
C21
040.
022U
_040
2_16
V7K~
D
1
2
C20
5822
00P_
0402
_50V
7K~D
1
2
C22
074.
7U_0
603_
6.3V
4Z~D
1
2
C20
370.
022U
_040
2_16
V7K~
D
1
2
C21
252.
2U_0
603_
6.3V
6K~D
1
2
C20
864.
7U_0
603_
6.3V
4Z~D
1
2
C22
06
0.1U
_040
2_10
V7K~
D
1
2
R203240.2_0402_1%~D
12
C21
130.
1U_0
402_
10V7
K~D
1
2
C20
470.
1U_0
402_
10V7
K~D
1
2
C20980.1U_0402_10V7K~D
1
2
C21
190.
1U_0
402_
10V7
K~D
1
2
C20
450.
022U
_040
2_16
V7K~
D
1
2
C20
6947
0P_0
402_
50V7
K~D
1
2
C21
084.
7U_0
603_
6.3V
4Z~D
1
2
C20
824.
7U_0
603_
6.3V
4Z~D
1
2
C20
554.
7U_0
603_
6.3V
4Z~D
1
2
C20
380.
022U
_040
2_16
V7K~
D
1
2
C21
212.
2U_0
603_
6.3V
6K~D
1
2
C20
400.
1U_0
402_
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K~D
1
2
Part 4 of 5
POW
ER
U2001D
G72M-V-N-A2_BGA533~D
VDD_27T16VDD_28T17VDD_29U12VDD_30U13VDD_31U15VDD_32U16VDD_33W13VDD_34W15VDD_35W16
VDD_17N17 VDD_16N11 NV_PLLAVDDN9 VDD_14M17 VDD_13M16 VDD_12M15
VDD_26T15
VDD_6L16
VDD_10M13
VDD_5L15 VDD_4L13 VDD_3L12 VDD_2J11 VDD_1J10 VDD_0J9
VDD_11M14
VDD_18R9VDD_19R11VDD_20R17VDD_21T9VDD_22T11VDD_23T12VDD_24T13VDD_25T14
VDD_9M12
PEX_IOVDD_0 W17PEX_IOVDD_1 W18PEX_IOVDD_2 AB10PEX_IOVDD_3 AB11PEX_IOVDD_4 AB14
VDD_7M9VDD_8M11
PEX_IOVDD_5 AB15
VDD_LP_0W9VDD_LP_1W10
VDD33_0F13VDD33_1F14VDD33_2J12VDD33_3J13VDD33_4J15VDD33_5J16
PLLVDD H4
FBA_PLLAVDD D13
FBA_PLLVDD D14
FBCAL_PD_VDDQ D15
FBVTT_0E15FBVTT_1F15FBVTT_2F16FBVTT_3J17FBVTT_4J18FBVTT_5L19FBVTT_6N19FBVTT_7R19FBVTT_8U19FBVTT_9W19
PEX_IOVDDQ_0 AA4PEX_IOVDDQ_1 AB5PEX_IOVDDQ_2 AB6PEX_IOVDDQ_3 AB7PEX_IOVDDQ_4 AB8PEX_IOVDDQ_5 AB9PEX_IOVDDQ_6 AB12PEX_IOVDDQ_7 AB13PEX_IOVDDQ_8 AB16PEX_IOVDDQ_9 AB17
PEX_IOVDDQ_10 AB18
PEX_PLLAVDD Y6PEX_PLLDVDD AA5
MIOB_VDDQ_0 K5MIOB_VDDQ_1 K6MIOB_VDDQ_2 L6
MIOBCAL_PD_VDDQ J5
IFPA_IOVDD W4IFPB_IOVDD Y4IFPC_IOVDD L4
IFPAB_PLLVDD V5
IFPCD_PLLVDD M4
DACA_VDD AE2DACB_VDD F8
FBVDDQ_0F17FBVDDQ_1F19FBVDDQ_2J19FBVDDQ_3J22FBVDDQ_4L22FBVDDQ_5M19FBVDDQ_6P22FBVDDQ_7T19FBVDDQ_8U22FBVDDQ_9Y22 CLAMP D11
VDD_LP_3W12 VDD_LP_2W11
PEX_IOVDD_6 AB20PEX_IOVDD_7 AB21
PEX_IOVDDQ_11 AB19PEX_IOVDDQ_12 AC9PEX_IOVDDQ_13 AC11PEX_IOVDDQ_14 AC12PEX_IOVDDQ_15 AC16PEX_IOVDDQ_16 AC17PEX_IOVDDQ_17 AC19PEX_IOVDDQ_18 AC20
MIO_A_VDDQ_0 F6MIO_A_VDDQ_1 G6MIO_A_VDDQ_2 J6
C20
610.
1U_0
402_
10V7
K~D
1
2
L2126BLM18AG121SN1D_0603~D
1 2
C20
7210
U_0
805_
4VAM
~D
1
2
C20
500.
1U_0
402_
10V7
K~D
1
2
C22
024.
7U_0
603_
6.3V
4Z~D
1
2
C20
5610
U_0
805_
10V4
Z~D
1
2
C20
800.
022U
_040
2_16
V7K~
D
1
2
C20
8410
00P_
0402
_50V
7K~D
1
2
C20
654.
7U_0
603_
6.3V
4Z~D
1
2
C20
8947
00P_
0402
_25V
7K~D
1
2
C20
6647
00P_
0402
_25V
7K~D
1
2
C20
390.
1U_0
402_
10V7
K~D
1
2
C20
5710
U_0
805_
10V4
Z~D
1
2
L2127BLM18AG121SN1D_0603~D
1 2
C21
0147
00P_
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7K~D
1
2
C21
050.
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_040
2_16
V7K~
D
1
2
C20
704.
7U_0
603_
6.3V
4Z~D
1
2
C20
761U
_060
3_10
V4Z~
D
1
2
C20
6847
0P_0
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K~D
1
2
C21
750.
1U_0
402_
16V4
Z~D
1
2
C20
790.
1U_0
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16V4
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1
2C
2081
220P
_040
2_50
V7K~
D
1
2
C20
440.
1U_0
402_
10V7
K~D
1
2
C20
8847
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_25V
7K~D
1
2
C21
0247
00P_
0402
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7K~D
1
2
C20
9047
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1
2
L2009BLM18AG121SN1D_0603~D
12
C20
600.
1U_0
402_
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K~D
1
2
C21
160.
1U_0
402_
10V7
K~D
1
2
T2003PAD
C20
4622
00P_
0402
_50V
7K~D
1
2
C20
920.
1U_0
402_
10V7
K~D
1
2
C20
630.
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_040
2_16
V7K~
D
1
2
L2010
BLM18AG121SN1D_0603~D
12
C21
0347
00P_
0402
_25V
7K~D
1
2
C21
110.
022U
_040
2_16
V7K~
D
1
2
C22
1447
0P_0
402_
50V7
K~D
1
2
C21
0047
00P_
0402
_25V
7K~D
1
2
C20
672.
2U_0
603_
6.3V
6K~D
1
2
C21
060.
022U
_040
2_16
V7K~
D
1
2
C21270.1U_0402_10V7K~D
1
2
C20
8547
0P_0
402_
50V7
K~D
1
2
C20
410.
1U_0
402_
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K~D
1
2
L2125BLM18AG121SN1D_0603~D
1 2L2002
BLM18PG181SN1_0603~D
12
C20
540.
1U_0
402_
10V7
K~D
1
2
R214310K_0402_5%~D
1 2
C20
520.
1U_0
402_
10V7
K~D
1
2
C20
64
0.1U
_040
2_10
V7K~
D
1
2
C20
910.
1U_0
402_
10V7
K~D
1
2
C20
510.
1U_0
402_
10V7
K~D
1
2
C20
480.
1U_0
402_
10V7
K~D
1
2
C21
2647
0P_0
402_
50V7
K~D
1
2
C21
2247
0P_0
402_
50V7
K~D
1
2
G
D
S Q20132N7002W-7-F_SOT323~D
2
13
C21
094.
7U_0
603_
6.3V
4Z~D
1
2
C21
2447
00P_
0402
_25V
7K~D
1
2
L2128BLM18AG121SN1D_0603~D
1 2
C22
0347
0P_0
402_
50V7
K~D
1
2
C21
2047
00P_
0402
_25V
7K~D
1
2
C20
830.
1U_0
402_
10V7
K~D
1
2
C20
8747
00P_
0402
_25V
7K~D
1
2
C20
7147
00P_
0402
_25V
7K~D
1
2
C21
140.
1U_0
402_
10V7
K~D
1
2
C20
971U
_060
3_10
V4Z~
D
1
2
C20
620.
022U
_040
2_16
V7K~
D
1
2
C20
930.
1U_0
402_
10V7
K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M Ground
55 70Tuesday, February 07, 2006
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
GN
D
Part 5 of 5
U2001E
G72M-V-N-A2_BGA533~D
GND_0B2GND_1B5GND_2B8GND_3B11GND_4B14GND_5B17GND_6B20GND_7B23GND_8B26GND_9E2GND_10E5GND_11E8GND_12E11GND_13E14GND_14E17GND_15E20GND_16E23GND_17E26GND_18F11GND_19H2GND_20H6GND_21H23GND_22H26GND_23J14GND_24K9GND_25K19GND_26L2GND_27L5GND_28L11GND_29L14GND_30L17GND_31L23GND_32L26GND_33N12GND_34N13GND_35N14GND_36N15GND_37N16GND_38P2GND_39P5GND_40P9GND_41P11GND_42P12GND_43P13GND_44P14GND_45P15GND_46P16GND_47P17GND_48P19GND_49P23GND_50P26GND_51R12GND_52R13GND_53R14GND_54R15GND_55R16GND_56U2GND_57U5GND_58U11GND_59U14
FBCAL_PU_GND E13FBCAL_TERM_GND H22
FBA_PLLGND C15
PLLGND H5
PEX_PLLGND AA6
MIOBCAL_PU_GND M3
IFPAB_PLLGND V6IFPCD_PLLGND M6
GND_85 AF2GND_86 AF3GND_87 AF6GND_88 AF9GND_89 AF12GND_90 AF15GND_91 AF18GND_92 AF21GND_93 AF24GND_94 AF26
GND_60 U17GND_61 U23GND_62 U26GND_63 V9GND_64 V19GND_65 W14GND_66 Y2GND_67 Y5GND_68 Y23GND_69 Y26GND_70 AC2GND_71 AC8GND_72 AC14GND_73 AC23GND_74 AC26GND_75 AD8GND_76 AD9GND_77 AD11GND_78 AD12GND_79 AD14GND_80 AD16GND_81 AD17GND_82 AD19GND_83 AD20GND_84 AC5
R210430_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBAWE#
FBA_CKE
CLKA0CLKA0#
R_FBACS1#
DQMA#6
FBAA3
FBAA0
FBAA2FBAA1
FBAA11FBAA10
FBAA8FBAA9
FBAA6FBAA5
FBAA7
FBAA4
DQSA4
DQSA6
FBBA[2:5]
FBA_BA0FBA_BA1
FBAA1
FBAA11
FBAA8FBAA9
FBAA7
FBA_CKE
CLKA1#
FBBA4FBBA5
FBA_VREF
FBA_BA0FBA_BA1
DQMA#2
DQMA#3
FBARAS#
DQSA3
DQSA2
FBACAS#
FBAD[0:63]
DQSA[0:7]
DQMA#[0:7]
FBAA[0:11]
FBAWE#FBACS0#
R_FBACS1#
FBAD28
FBAD27
FBA_VREF
FBARAS#
FBAD24
FBACS0#
FBACAS#
FBBA3
CLKA1
FBBA2
FBAA0
DQMA#4
FBAA6
FBAA10FBAD30
FBAD13DQMA#1
DQMA#0
DQSA1
DQSA0
FBAD29
FBAD31
FBAD25FBAD26
FBAD7
FBAD4
FBAD1FBAD6
FBAD0
FBAD2
FBAD35FBAD34
FBAD38FBAD39
FBAD33FBAD32
FBAD56FBAD62
FBAD57
FBAD59
FBAD58FBAD61
FBAD63
FBAD43FBAD40
FBAD45
FBAD44
DQMA#5
DQMA#7
DQSA7
DQSA5
FBAD60
FBAD55FBAD54
FBAD50FBAD51FBAD52
FBAD53
FBAD17
FBAD22
FBAD18
FBAD20FBAD23
FBAD21
FBAD16
FBAD19
FBAD3FBAD5
FBAD37FBAD36
FBAD41FBAD42
FBAD46
FBAD47
FBAD48FBAD49
FBAD9
FBAD11
FBAD12
FBAD15FBAD8
FBAD10FBAD14
CLKA1#
CLKA0
CLKA0#
CLKA1
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN +1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
FBA_BA053FBA_BA153
FBARAS#53FBACAS#53FBAWE#53FBACS0#53
FBA_CKE53
FBACS1#53
FBAA[0:11]53
FBBA[2:5]53
DQMA#[0:7]53
DQSA[0:7]53
FBAD[0:63]53
CLKA053CLKA0#53
CLKA153CLKA1#53
CLKA053
CLKA0#53
CLKA153
CLKA1#53
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M External DDR
56 70Tuesday, February 07, 2006
Compal Electronics, Inc.
10mil
Place close to U2003
Place close to U2004
Reserve for Hynix 8Mx32
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U2003
Close to U2004
U2003
K4D553235F-VC33_FBGA144~D
DQ0 B7DQ1 C6DQ2 B6DQ3 B5DQ4 C2DQ5 D3DQ6 D2DQ7 E2DQ8 K13DQ9 K12
DQ10 J13DQ11 J12DQ12 G13DQ13 G12DQ14 F13DQ15 F12DQ16 F3DQ17 F2DQ18 G3DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
A0N5A1N6A2M6A3N7A4N8A5M9A6N9A7N10A8/APN11A9M8A10L6A11M7BA0N4BA1M5
DM0B3DM1H12DM2H3DM3B12
DQS0B2DQS1H13DQS2H2DQS3B13
VREFN13MCLM13RFU1L9RFU2M10
RAS#M2CAS#L2WE#L3CS0#N2
CKEN12
CKM11CK#M12
VDD D7VDD D8VDD E4VDD E11VDD L4VDD L7VDD L8VDD L11
VDDQ C3VDDQ C5VDDQ C7VDDQ C8VDDQ C10VDDQ C12VDDQ E3VDDQ E12VDDQ F4VDDQ F11VDDQ G4VDDQ G11VDDQ J4VDDQ J11VDDQ K4VDDQ K11
VSSQ
B4VS
SQB1
1VS
SQD
4VS
SQD
5VS
SQD
6VS
SQD
9VS
SQD
10VS
SQD
11VS
SQE6
VSSQ
E9VS
SQF5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5VS
SQJ1
0VS
SQK5
VSSQ
K10
VSS
THF6
VSS
THF7
VSS
THF8
VSS
THF9
VSS
THG
6VS
S TH
G7
VSS
THG
8VS
S TH
G9
VSS
THH
6VS
S TH
H7
VSS
THH
8VS
S TH
H9
VSS
THJ6
VSS
THJ7
VSS
THJ8
VSS
THJ9
VSSE7VSSE8VSSE10VSSK6VSSK7VSSK8VSSK9VSSL5VSSL10VSSE5
NCC4NCC11NCH4NCH11NCL12NCL13NCM3NCM4NCN3
C21
4810
00P_
0402
_50V
7K~D
1
2
C21
3210
00P_
0402
_50V
7K~D
1
2
C21
350.
1U_0
402_
10V7
K~D
1
2
U2004
K4D553235F-VC33_FBGA144~D
DQ0 B7DQ1 C6DQ2 B6DQ3 B5DQ4 C2DQ5 D3DQ6 D2DQ7 E2DQ8 K13DQ9 K12
DQ10 J13DQ11 J12DQ12 G13DQ13 G12DQ14 F13DQ15 F12DQ16 F3DQ17 F2DQ18 G3DQ19 G2DQ20 J3DQ21 J2DQ22 K2DQ23 K3DQ24 E13DQ25 D13DQ26 D12DQ27 C13DQ28 B10DQ29 B9DQ30 C9DQ31 B8
A0N5A1N6A2M6A3N7A4N8A5M9A6N9A7N10A8/APN11A9M8A10L6A11M7BA0N4BA1M5
DM0B3DM1H12DM2H3DM3B12
DQS0B2DQS1H13DQS2H2DQS3B13
VREFN13MCLM13RFU1L9RFU2M10
RAS#M2CAS#L2WE#L3CS0#N2
CKEN12
CKM11CK#M12
VDD D7VDD D8VDD E4VDD E11VDD L4VDD L7VDD L8VDD L11
VDDQ C3VDDQ C5VDDQ C7VDDQ C8VDDQ C10VDDQ C12VDDQ E3VDDQ E12VDDQ F4VDDQ F11VDDQ G4VDDQ G11VDDQ J4VDDQ J11VDDQ K4VDDQ K11
VSSQ
B4VS
SQB1
1VS
SQD
4VS
SQD
5VS
SQD
6VS
SQD
9VS
SQD
10VS
SQD
11VS
SQE6
VSSQ
E9VS
SQF5
VSSQ
F10
VSSQ
G5
VSSQ
G10
VSSQ
H5
VSSQ
H10
VSSQ
J5VS
SQJ1
0VS
SQK5
VSSQ
K10
VSS
THF6
VSS
THF7
VSS
THF8
VSS
THF9
VSS
THG
6VS
S TH
G7
VSS
THG
8VS
S TH
G9
VSS
THH
6VS
S TH
H7
VSS
THH
8VS
S TH
H9
VSS
THJ6
VSS
THJ7
VSS
THJ8
VSS
THJ9
VSSE7VSSE8VSSE10VSSK6VSSK7VSSK8VSSK9VSSL5VSSL10VSSE5
NCC4NCC11NCH4NCH11NCL12NCL13NCM3NCM4NCN3
R20361K_0402_1%~D
12
R2042120_0402_5%~D
12
C21
3922
U_0
805_
6.3V
AM~D
1
2
C21
5022
U_0
805_
6.3V
AM~D
1
2
C21
300.
1U_0
402_
10V7
K~D
1
2
C21
490.
01U
_040
2_16
V7K~
D
1
2
C21
440.
01U
_040
2_16
V7K~
D
1
2
C21
420.
1U_0
402_
10V7
K~D
1
2
C21
360.
1U_0
402_
10V7
K~D
1
2
C21
290.
1U_0
402_
10V7
K~D
1
2
C21
310.
1U_0
402_
10V7
K~D
1
2
C21
330.
01U
_040
2_16
V7K~
D
1
2
C21
470.
1U_0
402_
10V7
K~D
1
2
R20351K_0402_1%~D
12
C21
3422
U_0
805_
6.3V
AM~D
1
2
C21
4310
00P_
0402
_50V
7K~D
1
2
C21
4522
U_0
805_
6.3V
AM~D
1
2
C21
460.
1U_0
402_
10V7
K~D
1
2
C21
3710
00P_
0402
_50V
7K~D
1
2
C21
410.
1U_0
402_
10V7
K~D
1
2
R2037
0_0402_5%~D
12
C21
380.
01U
_040
2_16
V7K~
D
1
2R2039
120_0402_5%~D
12
C21
280.
1U_0
402_
10V7
K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RAM_CFG3
RAM_CFG1RAM_CFG2
RAM_CFG0
PEX_PLL_EN_TERM100
SUB_VENDOR3GIO_ADR_03GIO_ADR_13GIO_ADR_2
PCI_DEVID3
+3VL
PCI_DEVID2PCI_DEVID1PCI_DEVID0
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
RAM_CFG052RAM_CFG152RAM_CFG252RAM_CFG352
PEX_PLL_EN_TERM10053
SUB_VENDOR533GIO_ADR_0533GIO_ADR_1533GIO_ADR_253
PCI_DEVID352
XTALSSIN52
XTALOUTBUFF52
PCI_DEVID252PCI_DEVID152PCI_DEVID052
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M Spread Spectrum & Strapping
57 70Tuesday, February 07, 2006
Compal Electronics, Inc.
VBIOS on card (pull high)0VBIOS with system BIOS (pull down)
0001
1001
ROM_TYPE[1:0]
RAM_CFG[3:0]
NV44M
0100
PEX_PLL_TERM MIOAD0
01
ValueSTRAPS PIN DESCRIPTION
MIOBD10 Parallel=00, SERIAL AT25F=01 DEFAULT,Serial SST45VF=10, LPC=11
SUB_VENDOR
0
MIOAD1
2.5V I/O
RAM_CFG[3:0]
0000
0001
ValueSTRAPS DESCRIPTION
Reserved
300MHz, 1.8V
CONFIG
8Mx32 DDR
0010
0011
Reserved
01004Mx32 DDR
4Mx32 DDR
1.8V I/O
Reserved 0101
0110
0111Reserved
1100
8Mx32 DDR monolithic (64bit NV44 )
8Mx32 DDR monolithic (32bit NV44 )
4Mx32 DDR generic (64bit NV44)
4Mx32 DDR generic (32bit NV44)
350MHz, 1.8V
00108Mx32 DDR (Samsung K4D55323QF-GC)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
*
MIOB_VSYNC
MIOBD0
MIOBD1
MIOBD8
MIOBD9
-1.75% (DOWN)
S0
±0.875% (CENTER)
0
1
S0 Internal pull up
R21
302K
_040
2_5%
~D
12
R11710K_0402_5%~D
12
R20
552K
_040
2_5%
~D
@
12
R21
362K
_040
2_5%
~D
12R
2047
2K_0
402_
5%~D
@
12
U2010
P1819GF-08SR_SO8~D
@
XIN/CLKIN1VSS2D_C3ModOUT4 REFCLK 5PD# 6VDD 7XOUT 8
R20
512K
_040
2_5%
~D
@
12 R
2135
2K_0
402_
5%~D
12R
2045
2K_0
402_
5%~D
@
12
C21
97
0.1U
_040
2_10
V7K~
D
@
1
2
R20
6110
K_04
02_5
%~D
12
R21
200_
0402
_5%
~D@ 12
R20
462K
_040
2_5%
~D
@
12R
2044
2K_0
402_
5%~D
12 R
2056
2K_0
402_
5%~D
@
12
R20
6910
K_04
02_5
%~D
12
R20
5810
K_04
02_5
%~D
@
12
R21
23
10K_
0402
_5%
~D
@ 12 R
2124
10K_
0402
_5%
~D
@ 12
R21
372K
_040
2_5%
~D
12R
2049
2K_0
402_
5%~D
12
R20
6010
K_04
02_5
%~D
12
L2123BLM18AG121SN1D_0603~D@
1 2
R20
502K
_040
2_5%
~D
@
12
R20
5910
K_04
02_5
%~D
12
C21
9610
U_0
805_
10V4
Z~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GFX
_REF
+GPU_PWR_SRC
GFX_REF
GFX_+5V_RUN
GFX_CORE_CNTRL
+VDD_CORE+VCC_GFX_CORE
+1.2VRUN+1.2VRUNP
+PWR_SRC
+VCC_GFX_CORE
+1.8V_SUS
+5V_SUS
+1.2VRUNP
+3.3V_RUN
RUN_ON19,37,39,41,42,46,47,48
GFX_CORE_PWRGD42
GFX_PCIE_PWRGD42
GFX_CORE_CNTRL52
GFX_RUN_ON41
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
NVG72M VDD_CORE
58 70Tuesday, February 07, 2006
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place near GND pin 24
De-p
op D
2 fo
r IS
L885
50
De-pop R2152 for ISL88550
Design specs:TDC: 7APeak: 9AOCP: 12A
output voltage adjustable network
EC
C22
2810
00P_
0402
_50V
7K~D
1
2
C22
270.
22U
_040
2_10
V4Z~
D
1
2
R18020_0402_5%~D@
12
PJP2002
PAD-OPEN 43X79
1 2
D20
01R
B75
1V_S
OD
323~
D
21
C22
2122
00P_
0402
_50V
7K~D
1
2
L2013FBMA-L11-453215-900LMA60T_1812~D
1 2
R2162100K_0402_5%~D
12
Q2011FDS6676AS_NL_SO8~D
4
7 865
123
C22
300.
01U
_040
2_16
V7K~
D
1
2
PJP2001
PAD-OPEN 43X118
1 2
C22
3322
U_0
805_
6.3V
AM~D
1
2
R2150511K_0402_1%~D
12
R215110_0805_5%~D
1 2
R216710K_0402_5%~D
@
12
C221610U_0805_10V4Z~D
1
2C
2217
1U_0
603_
10V4
Z~D
1
2
R216057.6K_0402_1%~D
12
R216810K_0402_5%~D @
12
C22
222.
2U_0
603_
6.3V
6K~D
1
2
C22
3222
U_0
805_
6.3V
AM~D
1
2
L20011UH_MPLC0730L1R0_11A_20%~D
1 2
C22
1910
U_1
206_
25V6
M~D
1
2
U2008
MAX8632ETI+_TQFN28~D
VTTR10
VTTS9
VTT12
PGND211
REFIN14
VTTI13
STBY#7
SHDN#27
POK26
POK15
VIN17
GN
D29
SS8
GN
D24
SKIP
#25
ILIM
4
REF 3
TON 1
FB 15
VOUT 16
PGND1 23
DL 21
LX 19
DH 18
BST 20VDD
22
OVP
/UVP
2
TP0
28
AVD
D26
+
C22
2433
0U_D
2E_2
.5VM
_R9~
D
1
2
R21
6610
0K_0
402_
5%~D
@
12
C22
200.
1U_0
603_
50V4
Z~D
1
2
R215724.9K_0402_1%~D
12
R2156511K_0402_1%~D
12
C22
290.
047U
_040
2_16
V4Z~
D
1
2
R2155
1_0603_5%~D
1 2
Q2010HAT2198R-EL-E_SO8~D
S1
D6
D5
D7
D8
S2
G4
S3
C2234100P_0402_50V8J~D@
1
2
C22
311U
_060
3_10
V4Z~
D
1
2
C22
350.
01U
_040
2_16
V7K~
D
@
1
2
G
D
S
Q2014BSS138W-7-F_SOT323~D
@ 2
13
R215261.9K_0402_1%~D
1
2
R2164118K_0402_1%~D @
12
R21
63
4.99
K_04
02_1
%~D
12
R1801 0_0402_5%~D
12
R21611.21K_0402_1%~D
1 2
C22
260.
1U_0
402_
10V7
K~D
1
2
R2153
0_0402_5%~D
@12
+
C22
2533
0U_D
2E_2
.5VM
_R9~
D
@
1
2
R21
6530
1_04
02_1
%~D
@
12
C22230.22U_0603_10V7K~D
1 2
R2154
0_0402_5%~D
@12
C22
1810
U_1
206_
25V6
M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 1
59 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
1 0.2
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
31 H/W 05/27 RogerSmart card pin definition not match thecage pin define
Change JSC pin connection, pin1 connect to GND, pin2 connect toSC_DET# ~ pin10 connect to +SC_PWR
2 52 H/W 05/27 Roger TV out no out put Add R1790, R1791, R1792 for 75 ohms 0.2
3 40 H/W 05/27 RogerRemove power switch to save placementspacing 0.2Remove SW1. Reseve R1793 pad for power switch
4 20 H/W 05/27 RogerDocking CRT HSYNC, VSYNC connect to theout put side of buffer
DOCK_HSYNC connect from U190 pin4 to docking connector pin 209,DOCK_VSYNC connect from U191 pin4 to docking connector pin 210 0.2
5 32 H/W 05/27 Roger Improve RJ45 center tap driving Connect +2.5VLAN to JIO pin 14 for RJ45 center tap 0.2
6 39 H/W 05/27 Roger SPI ROM pass trough mode connect errorChange FDATAIN to ICHO_FDATAIN and connect from U216 pin 106 to U213pin5. Chagne FDATAOUT to ICHI_FDATAOUT and connect from U216 pin 108 toR1788 pin1
0.2
7 39 H/W 05/27 Roger Flash Recovery strapping issue Change R474, R475 from 100K to 10K 0.2
43 H/W 05/30 Brike None Delete H21 and change H4 footprint from H_C176D122to H_C176D102 0.29
8 H/W 05/30 Brike Change net from +3VALW to +3VSRCTo fix MEC5004 VCC1 power lading 0.2
10 58 H/W 05/30 Brike To meet VGA core power rating Change footprint to JUMP_43X118 0.2
11 39 H/W 06/01 Will For delay MEC5004 internal 1.8V reg. Modified C1769 from 4.7UF to 22UF. 0.2
39 H/W 06/01 Will None14 Change power on SPI ROM (pins 3 and 8) from +3VALW to +3VSUS
0.2
0.2
None13 0.2Will06/01H/W41 Add pullup R2149 to HDDC_EN# and R2148 MODC_EN#.
To improve rise time of serial DOfrom SPI ROM.12 0.2Will06/01H/W23 Modified R389 from 10K to 1K..
15 58 H/W 06/01 Brike None U2008 pin 16 change pull-up panle to +3VRUN
16 13 H/W 06/01 Lester L34 value change to BLM18PG181SN1_0603~D 0.2Intel Checklist recommends a 1 nH ferrite which calculates to 200 ohm.
17 06 H/W 06/01 Lester Add resistor for cystal drive currentlimiting
Add R32 0 ohm resistor 0.2
18 39 H/W 06/01 Will Correct SPI connection for SMSC recommandICH7M.P5 connect to MEC 5004.107, MEC5004.108 connect to SPI ROM.5.ICH7M.P2 connect to MEC 5004.105, MEC5004.106 connect to SPI ROM.2 0.2
Roger06/02H/W3819 Add R1440 100K for LAN_TPM_EN# (VBUS_DET)SMSC recommond add VBUS_DET pull upresistor 0.2
33 H/W 06/02 Roger20 Add MDC disable circuit Add R1441, R1442, R1443, Q64. ECE5018 pin 67 program MDC_RST_DIS# 0.2
21 34 H/W 06/06 Roger 0.2Change U8 NNCD6.8RL-A to D5 NNCD5.6LGNone
ALL
NoneRoger06/06H/W323 Fixed USB table
24 27 H/W 06/14 RogerU10 (STAC9200) pin21 (GPIO0) is anlogpower plane 0.3Change R156 pull up from +3VSUS to +VDDA
0.2
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Changed-List History 2
60 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
25 0.3
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
7 H/W 06/14 RogerChange ITP debug to XDP debug definitionfor Yonah CPU
Change R387, R417, R391, R436, R416, R415 to 56 ohms. Add R33 56 ohms.Change R424 to 1K ohms.
26 39 H/W 06/14 Roger For easier flash EC code Add short pad and change R475 to 1K ohms 0.3
27 40 H/W 06/14 Roger For easier power switch Change R1793 to a pad like CMOS pad 0.3
28 34 H/W 06/14 Roger ME change mini card stand off to Latch Remove H22,H23,H24,H25. Add JCLIP1,JCLIP2 0.3
Roger06/14H/W4229 Add C1806,C1807,C1808,C1809,C1810,C1811EMI reqest add caps for the splite powerplane that PCI bus routed 0.3
Roger30 41 H/W 06/16Reserve discharg circuit for +5VRUN,+3VRUN,+1.8VRUN,+1.5VRUN,+0.9V_DDR_VTT,+2.5VRUNpower rails
Add R1793,R1794,R1795,R1796,R1797,R1798,Q87,Q88,Q89,Q90,Q91,Q92 0.3
31 58 H/W 06/20 RogerReplace ISL6269 and MAX1510 circuits withMAX8632 solution Remove ISL6269 and MAX1510 circuit. Add MAX8632 circuit 0.3
32 28 H/W 06/21 Gautam Reserve ST M45PE20 for LOM EEPROM Add U3 (ST M45PE20) co-layout with U188 (AT45BCM021B) 0.3
33 42 H/W 06/23 GaryEMI reqest add caps for the splite powerplane that PCI bus routed
Add C1812~C184 0.047uF_0402. Change C1810, C1811 from 0603 to 0402package 0.3
34 38 H/W 06/23 Roger +3VRUN leakage at AC mode in S5 Change R1362 pull up from +3VSRC to +3VRUN 0.3
35 All H/W 06/24 Roger Follow Dell USB assignment recommendation Update USB table, block diagram and connection 0.3
06/24H/W36 39 0.3Change C1769 for 22uF 0805 size to 4.7uF 0603 size4.7uF cap for VR_Cap pin of REV B 5504Will
H/WAll37Change +3V/+5V design to follow DellrecommendationWill06/24 0.3Change +3VSRC to +3VALW except for LOM
39 Required by Intel for B0 Yonah.Lester06/24H/W7 0.3Add R1378 (51_0603_1%) for TEST2 pulldown
Change R1364 from 1.15K to 1.18K_0402_1% 0.3Gautam06/24H/W2838IEEE testing the voltage level are closerto the higher end of IEEE range
40 39 H/W 06/24 Lester Required by Intel for B0 Yonah. Populate R1752 and add note "No stuff when doing flash recovery" 0.3
41 58 H/W 06/27 JoeyChange Gfx VDD_CORE controller powersource Change +5VSUS to +5VRUN. Change +3VSUS to +3VRUN. Depop C2225 0.3
42 33 H/W 06/28 Rossana MDC signal by pass caps not require Delete C93, C82, C73 0.3
43 31,40 H/W 06/28 RossanaReseved USB port of OZ77C6 for Biometricsreader
Change JTPAD from 10 pins to 20 pins. Add USB_BIO+/- on U1 pin18,19connect to JPAD pin9,11 0.3
44 30 H/W 06/28 Rossana Gerber Gate List issue Remove C1783, C1784 0.3
45 34 H/W 06/28 Rossana Gerber Gate List issue Remove L18, R149, and R144 - direct connect USB to Wireless LAN card 0.3
46 34 H/W 06/28 Rossana Gerber Gate List issue Add R1603 connect to JMINI2 pin46, outgoing signal BT_ACTIVE 0.3
47 34 H/W 06/28 Rossana Gerber Gate List issue Add series 0-ohms R1609, R1610 for pins 3 and 5 of JMINI2 0.3
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Changed-List History 2
61 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
48 0.3
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
34 H/W 06/28 Change C159 and C1785 from 10uF to 0.1uFGerber Gate List issueRossana
49 34 H/W 06/28 Gerber Gate List issueRossana Add T1 test point for JMINI1 pin 42 0.3
50 36 H/W 06/28 Rossana Gerber Gate List issue Add C1817~1820 for U180,U178,U179,U177 0.3
3951 Change R30 pull up from +3VSRC to +3VALWGerber Gate List issueRossana06/28H/W 0.3
52 43 06/28 RossanaChange sniffer switch type, the activedirection swap
WIRELESS_ON/OFF# connection from pin1 to pin 4 of JSNIFF, pin3 connectto GND, pin2 NC, pin 1 connect to SNIFFER#H/W 0.3
53 36 06/28 Rossana Gerber Gate List issue Add C1821 1000pF for +DOCK_PWR_SRC, add C1827 1000pF for DOCK_DC_INH/W 0.3
54 Add C1822 0.1uF_0402 and C1823,C1824 .47uF_0402 for QBUF powerRossana06/28H/W35 0.3Gerber Gate List issue
55 26,27 H/W 06/29 Rossana Gerber Gate List issue 0.3Follow Dell "Travis_Audio_0628" reference circut design
56 39 H/W 06/29 Will Gerber Gate List issue 0.3Change L4 form MURATA BLM11A121S to BLM18PG181SN1
57 24 H/W 06/30 Will Gerber Gate List issue Remove C375, C37 for ICH_V5REF_RUN, remove C420 for ICH_V5REF_SUS 0.3
58 24 H/W 06/30 Will Gerber Gate List issue Add R37 0.5 ohm 0603 resistor connect to L42 pin1 0.3
59 Scott24 H/W 06/30 Gerber Gate List issue Populate C347 and C442 0.3
Change C450 for 220uF to 330uF poly cap 0.3Scott60 Gerber Gate List issue06/3024 H/W
61 Roger Match Dell JTPAD pinout definition 0.3Match Dell JTPAD pinout definition, add C62, C63 for BIO power railbypass40 H/W 06/30
62 26,27 H/W 06/30 Gerber Gate List issueR162 change from 8.2K to 2.2K, remove D33, D34, Change C1800, C1801from 1uF to 2.2uF, change C534 from 0.1uF to 1uF, del C533. 0.3Rossana
63 26 H/W 06/30 Gerber Gate List issueRossanaHP_NB_SENSE move from GPIO2 to GPIO0 of U10, add series resistor 0 ohmfor this signal 0.3
64 7 H/W 07/07 Roger Support A1 Yanah CPU 0.3De-pop R513, R514 for A1 yanah CPU
65 56 H/W 07/25 Roger Set VRAM VREF to 50% of VDDQ 0.4Change R2035, R2036 to 1K_0402_1%
66 54 H/W 07/25 Roger Nvidia G72 design change 0.4De-pop L2008, C2094, C2095, C2096 for FBA_PLLVDD
67 54 H/W 07/25 Roger Nvidia G72 design change 0.4Remove C2110 and NC for CLAMP (D11)
68 54 H/W 07/25 Roger Nvidia G72 power design change 0.4Remove L2003, L2006, L2007, L2124, L2008, C2094, C2095, C2096
69 54 H/W 07/25 Roger Nvidia G72 power design change 0.4Pop L2129, C2206, C2207 for G72_PLLVDD
70 7 H/W 08/01 Roger Gerber Gate List issue item 6 0.4Change Change R417 to 150 ohm, R415 to 51 ohm, R387 to 39.2 ohm, R436to 27.4 ohm, R391 to 680 ohm, R424 to 22.6 ohm
71 38 H/W 08/01 0.4Change R110 from 68 ohm to 75 ohm for H_PROCHOT# pull upRoger Gerber Gate List issue item 8
72 43 H/W 08/01 0.4Change the voltage rail on sniffer LED pull-ups (at Q13 and Q16) from+3VALW to +3VSUSRoger Gerber Gate List issue item 9
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
62 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Roger None 0.4Remove unnecessary capacitor C1805773 08/01H/W
Roger Gerber Gate List issue item 12 0.4Remove Q84, C1804. Connect U15 pin1 to VGA_THERMDP, U15 pin2to VGA_THERMDN74 18 H/W 08/01
75 H/W 08/01 Roger 0.4Depop U46 and C5440 Hall switch design on touch pad moudle
76 H/W18 08/01 RogerAdd a thermistor circuit to VCP input (pin 3) for the SODIMM tempsensor. Add Q15, R476, R477, R478, C66 0.4Gerber Gate List issue item 13
77 57 H/W 08/01 Roger Gerber Gate List issue item 15 Remove Gxf thermal sensor U2007 (ADM1032), C2181, C2182 0.4
78 38 H/W 08/01 Roger 0.4Move NB_MUTE from U215 pin 107 to pin73Gerber Gate List issue item 19
79 16,17 H/W 08/01 Roger 0.4Gerber Gate List issue item 20,21 Remove R178, pop R177
80 10,23 H/W 08/01 Roger Gerber Gate List issue item 22,23 Depop R253, populate R1799 0.4
81 38 H/W 08/01 Roger Change board ID for X01 0.4Depop R419 and populate R405
0.4Connect 2.5V_RUN_PWRGD net to LDO_POK pin. Add depop R4982 42 08/02H/W Roger Gerber Gate List issue item3
Add R1800 31.6K ohm resistor for Vmargin circuit.83 18 08/02 0.4H/W Roger Gerber Gate List issue item11
84 23 Change R389 from 1K to 10KH/W 08/02 Roger Gerber Gate List issue item5 0.4
85 33, 40 H/W 08/04 Delete JBT and move components to JTAP. 0.4Steven Conbine the BT and TP in 30 PIN connector.
86 42 H/W 08/04 Steven Gerber Gate List issue item3 Add Depop resister R2169, R2170, R2171. 0.4
87 22, 23 H/W 08/04 StevenFor intel NAPA platform check list 1.5request.
Chnage R425 from 33Ohm pull-down to 8.2KOhm pull-up. And add pull-upresister R227 in SIO_RCIN#. 0.4
88 16 H/W 08/09 Roger V_DDR_MCH_REF discharge issue 0.4Add R51 (100K_0402) connect to V_DDR_MCH_REF
23 H/W89 08/09 Roger Leakage issue when system into S3 Change SIO_EXT_SMI#, SIO_EXT_SCI# pull up to +3VSUS 0.4
90 36 H/W 08/09 Remove R1320, R1319Roger Refer Dell docking reference circuit 0.4
91 12 H/W 08/09 Depop R357Roger Gerber Gate List issue item 28 0.4
92 38 H/W 08/09 Roger Move SPDIF_SHDN from pin31 to pin76, remove R1601, R1602, net SYSOPT0Follow Dell EC GPIO assignment 0.4
93 28 H/W 08/10 Roger Gerber Gate List issue item 30 0.4Add R53 4.7K resistor for LOM_SO pull down
94 28 H/W 08/10 Roger Gerber Gate List issue item 33 0.4Connect BCM5752 pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.Series no stuff resistor R55
95 24 H/W 08/10 Roger Gerber Gate List issue item 37 0.4Connect BCM5752 pin C4 to ECE5018 pin75 net name LOM_CABLE_DETECT.Series no stuff resistor R55
96 38 H/W 08/10 Roger Gerber Gate List issue item 39 0.4R1171 change pull up from +3VRUN to +3VSUS
97 38 H/W 08/10 Roger Gerber Gate List issue item 42 Add a 4.7uF cap for ECE5018 VDDA33 coupling 0.4
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
63 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Roger 0.4Add a 0 Ohm 0402 resistor R62 in series with the RTC_CELL and EMC5004pin 1213998 08/10H/W Gerber Gate List issue item 43
Roger 0.4R513, R514 pull up to +VCCP99 7 H/W 08/10 Follow Intel CRB circuit
0.4RogerAdd resistor R63 (0_0402_5%) between the BIA_PWM signal and MEC5004pin 73100 39 H/W 08/10 Gerber Gate List issue item 46
0.4RogerH/W39101 Change ITP_DBRESET# connection from EMC5004 pin 55 to pin96Gerber Gate List issue item 4708/10
RogerH/W22102 Add no stuff C69 (0.1U_0402_16V4Z) between THRMTRIP_ICH# and GND 0.4Gerber Gate List issue item 5008/10
103 41 H/W Roger08/10 None 0.4Change R1795 pin 1 connect from +1.8VRUN to +1.8VSUS for discharge
Roger08/10H/W23104 Move pull-up R388 to pin 1 side of R1787 0.4Gerber Gate List issue item 51
105 6 H/W 08/10 Roger 0.4Add C70 (0.1U_0402_16V4Z) for +CK_VDD_MAIN decoupling. Remove R291,R343, R329 to save spacingGerber Gate List issue item 29
106 7 H/W 08/11 Roger 0.4Remove R513 and R514 platform no longer use Yonah A00Gerber Gate List issue item 68
107 42 H/W 08/11 Roger Gerber Gate List issue item 65 0.4Populate 0ohm for R49, R313, R319, R334
108 41 H/W 08/11 Roger Gerber Gate List issue item 67 0.4Change R494 to 20K
109 7 0.4Add no stuff C71 and C72 for +VCCP of JITP H/W 08/11 Roger Gerber Gate List issue item 69
110 7 Roger Gerber Gate List issue item 70H/W 08/11 Change R416 and R33 from 56 ohm to 54.9 ohm 0.4
111 12 RogerH/W 08/11 Gerber Gate List issue item 72 0.4Delete R333 to follow reference schematics
112 28 0.4H/W 08/11 Roger Gerber Gate List issue item 34Add R68 (20K_0402_5%) and R70 (39K_0402_1%) for LAN_LOW_PWR voltagedivider connect to pin K5
113 26,27,38 H/W 0.408/12 Roger Gerber Gate List issue item 75DOCK_HP_MUTE# for GPIO2 of codec connect to ECE5018 pin 81. EAPD forGPIO3 of codec connect to additional Q11 gate
114 38 H/W 08/15 0.4Roger Gerber Gate List issue item 38 Chnge SYS_PME# pull up from +3VRUN to +3VALW. Add no stuff R71 in series
115 38 H/W 08/15 Roger Gerber Gate List issue item 41 0.4Remove HP_NB_SENSE from ECE5018 pin 106 to pin 82
106 23 0.4H/W Roger Gerber Gate List issue item 188,189 Depop R428,Change value of R75 to 10k ohms08/15
107 6 H/W Roger NVidia 27MHz clock has to be 1.2V max 0.4Add R73 150 ohms for CLK_NV_27M voltage divider08/15
108 52 H/W Roger Gerber Gate List issue item 211 0.4Add R74 0 ohms in series to PLTRST_DELAY#08/15
109 40 0.4H/W Roger Gerber Gate List issue item 48 Change R1750 and R1751 to L1 and L208/16
110 40 H/W 0.408/16 Roger Gerber Gate List issue item 48 Change R1750 and R1751 to L1 and L2
111 39 H/W 08/16 Roger Gerber Gate List issue item 217 0.4Remove R166. Move R1635 for AFT_INT# move to page 39
112 0.439 H/W 08/16 Roger Add pull up for open drain out put Add R93 pull up to +3VALW for BAT_SEL#
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
64 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
113 38 H/W 08/16 0.4RogerMute internal speaker when docking aduiojack plug in Add pull down resistor for DOCK_HP_MUTE#
114 58 H/W 09/07 Roger 0.4G72MV VDDCORE fixed to 1.0 VDepop R2164,R2165,R2166,R2167,R2168,Q2014,C2235. Change R2160 from 69.8Kohms to 57.6K ohms
115 06 H/W 09/07 Roger Follow Dell CoE schematics 0.5Change C329, C333 from 33pF to 27pF
116 43 H/W 09/14 Roger Blue tooth LED too bright Change R8 from 3.3K to 1K ohms
117 41 H/W 09/14 Roger +1.8VSUS discharge low issue Populate Q89, R1795
H/W39118 LID_CL# can't assert lowRoger09/14 Change R482 from 100K to 1M ohms
119 39 H/W 09/14 RogerR470 from 10K to 100K isfor save the pull up current. R470 from 10K to 100K
120 34, 39 H/W 10/13 StevenConnect 8051TX to WWAN Pin 19 and Connect8051RX to WWAN Pin 42. Modified.
121 22 H/W 10/15 StevenGerber Gate List issue item 60. Per M07ICH reference schematics rev A05. Add R12 0-ohm tuning resistor between R36 pin2 and X1 pin1 0.5
0.5
0.5
0.5
0.5
0.5
122 41 H/W 10/17 Steven Gerber Gate List issue item 66 Change R1795 to a 30 ohm 0603 resistor 0.5
123 52 H/W 10/17 StevenGerber Gate List issue item 67. Use 27MHzclock from CK410. Pop R2131, R2132, and depop Y2001, C2204, C2205, and R2133 0.5
124 19 H/W 10/17 StevenGerber Gate List issue item 65. Make sureBIA_PWM logic high level is at +3.3V. Add R92 pullup to +3VRUN on BIA_PWM 0.5
125 39 H/W 10/18 StevenMEC5004 per SMSC recommendations to addcircuit for improving POR issue.
Add de-pop components R23, R25, R97, R102, R104, Q20, Q19, C22, D2002.And change C1769 to 22U. 0.5
126 38 H/W 10/18 Steven change board ID to X02 Pop R95, R419 and De-pop R108, R405. 0.5
127 23 H/W 10/18 StevenGerber Gate List issue item 78. Pull upLAMP_STAT# to +3VRUN Change R75 pull-up to +3.3V_RUN. 0.5
128 40 H/W 10/18 StevenGerber Gate List issue item 77. add 10pFcap between GND and pin2 of L1/L2. Add capacitor C23, C35. 0.5
129 6 H/W 10/19 StevenGerber Gate List issue item 72. Inductordesign follow M07 design on L40,L32(Size:0805).
Change L32, L40 from 0603 to 0805. 0.5
130 23 H/W 10/19 StevenGerber Gate List issue item 79.SATA_DET# is pull up to +3.3V_SUS. Change R784 pull up to +3.3V_SUS.
0.5
Gerber Gate List issue item 84
Change the 32 high frequency decoupling caps, 0805 X5R, from 22uFto 10uF.Depop C354 and C618.Change C352, C496, C497, and C365 from 330uF/7mOhm to 330uF/6mOhm SP caps.
0.5
Gerber Gate List issue item 82 Connect PLTRST# instead of PLTRST_DELAY# to WLAN and WWAN connectors. 0.5
Steven
Steven
10/2010/20
10/20
H/W
H/W
9
34
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132
23128 10/20H/W IMVP_PWRGD glitch issue Add C82 0.1uF cap on IMVP_PWRGD to filter the glitch 0.5Steven
10/21 Steven Q68 surge currentH/W28129 Add R120 (0603) and C80 0.1uF cap Q68 pin1 for reduce surge current 0.5
130 0.5BT & HDD LED is on when the SNIFFER is turned on. Added a circuit (FET and Resistors) to keep the BT LED & HDD LED off
when the SNIFFER is turned on40,43 H/W 10/21 Steven
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
65 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.538 H/W 10/21 Steven Depop R1440Gerber Gate List issue item 81131
0.534 H/W 10/22 Steven Add Intel WoWLAN Support Circuit Add pop components Q21 and R101, and un-pop componet R24.132
18 H/W 10/24 0.5133 StevenGerber Gate List issue item 89. ChangeOTP trip temperature to 88 deg C. Change R249 to 332K and R262 to 118K.
39 H/W134 10/24 StevenGerber Gate List issue item 90. Pop SMSCworkround circuit for 11/7 build. 0.5Pop R23, R25, R97, R102, R104, Q20, Q19, C22, D2002.
135 39 H/W 10/24 StevenGerber Gate List issue item 91. Add a 0ohm pulldown resistor on TEST_PIN. Add R110 0Ohm resister. 0.5
136 52 H/W 10/24 StevenGerber Gate List issue item 94. ConnectGPIO9 of G72 to THERMTRIP3# of EMC4000. Add 0 Ohm resister R112 and connect to EMC4000. 0.5
137 58 H/W 10/24 Steven Gerber Gate List issue item 95. Change R2155 from 0 to 1 Ohm. 0.5
138 58 H/W 10/24 Steven Gerber Gate List issue item 96. Change +5V_RUN to +5V_SUS at VDD. 0.5
139 58 H/W 10/24 Steven Gerber Gate List issue item 97. Change +3.3V_RUN to +3.3V_SUS at R2158. 0.5
140 58 H/W 10/24 Steven Gerber Gate List issue item 98. Change +1.8V_RUN to +1.8V_SUS at pin 13. 0.5
141 52 H/W 10/24 StevenGerber Gate List issue item 113. Add a10K pull-down to TESTMODE pin on G72. Add 10K Ohm resister R116. 0.5
142 43 H/W 10/24 StevenGerber Gate List issue item 111. Removeone of the pull-ups on SNIFFER_LED_OFF#. Remove Pull up resister R1447. 0.5
143 43 H/W 10/24 Steven Gerber Gate List issue item 111. More R76 to pin 1 of Q66 and populate 0.5
0.534 H/W 10/24 Steven Add Intel WoWLAN Support Circuit144 Replace Q21 and R101 to D2003.
0.520 H/W 10/24 Steven145 Add resister R101 and R114.Gerber Gate List issue item 109. Add 39ohm resistors at output of U190 and U191.
18 H/W 10/24 0.5146 Steven
Gerber Gate List issue item 93. Addthermistor circuit to VCP2 (pin 40) ofEMC4000. Please route to 5V_CAL_SIO2#(pin 80, GPIO B4 on ECE5018).
Add thermistor circuit R479, R480, R481, C36, Q21.
54 H/W 10/24 0.5147 StevenGerber Gate List issue item 106. ChangeFBCAL_PD_VDDQ terminating resistor. Change R2032 from 37.4 to 40.2 ohms.
54 H/W 10/24 0.5148 StevenGerber Gate List issue item 105. ChangeFBCAL_PU_GND terminating resistor. Change R2104 from 37.4 to 30 ohms.
149 43 H/W 10/24 0.5StevenGerber Gate List issue item 114.Modified SATA_ACT# LED sniffer disablecircuit.
Modified the circuit and Add and D2004. Chnage Q1 to 3904,R1149/1448 change to 10K and 1K.
150 58 H/W 10/25 0.5StevenGerber Gate List issue item 120. Pull upR2159 to +3.3V_SUS. Change R2159 to pull up +3V_SUS.
151 40 H/W 10/25 StevenGerber Gate List issue item 119. For fixthe IMVP_PWRGOOD glitch issue.
Change delay circuit R1764 from 200KOhm, C1788 to 470PF to +1.8V_runand +3V_run. 0.5
152 43 H/W 10/25 StevenGerber Gate List issue item 104. Modifiedthe SATA_ACT# circuit.
Modified the circuit Pull up R1449 to +5V_SUS and R1445 to +5V_run.R2 move to Q1 pin 3, SNIFFER_LED change to GPIO82. 0.5
153 34 H/W 10/25 StevenGerber Gate List issue item 115. ChangeLTRST_DELAY# to PLTRST# on WLAN. Chnage PLTRST_DELAY# to PLTRST# on the WLAN connector. 0.5
154 58 H/W 10/25 StevenGerber Gate List issue item 117. ModifiedVcore voltage switching circuit. Change R2168 to +3.3V_SUS. 0.5
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
66 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.557 H/W 10/25 StevenDepop R2120, U2010, R2123, R2124, C2196, C2197 and L2123.Add R117 10Kpull down resister.
Gerber Gate List issue item 118. Depopthe discrete spread spectrum circuit.155
0.5156 H/W 10/25 Steven Add D2005 (RB751) in U190, U191 Pin 5.Gerber Gate List issue item 116. Adddiode HSYNC and VSYNC buffers.20
157 H/W 10/25 Steven Change 0Ohm resister to Q25.For improving Gerber Gate List issue item94 leakage issue.18 0.5
158 H/W 10/25 Steven58 Cancelled Gerber Gate List issue item 97. Change +3.3V_SUS to +3.3V_RUN at R2159. 0.5
159 40, 43 H/W 10/26 Steven Modified HDD/BT disable circuit. Move 40 BT Disable circuit to 43. 0.5
H/W58160 0.5Remove R2158 and R2159.Gerber Gate List issue item 121. Deleteresistors R2158 and R2159 on sheet 58.Steven10/26
41 H/W161 10/29 StevenFor improving power sequence add RCdelay and Discharge circuit.
Add R1765, C1804 for delay +3V_run circuit. Add non-populatecomponent. Q26, Q28, R1803, R1766. 0.5
162 58 H/W 10/29 StevenFor pop option 8632 shutdown pin sourceAdd two resister.
Add Non-populate R1802 and Populate component R1801. For Pop option8632 Enable source. 0.5
163 41 H/W 11/03 Steven Populate the HDD power switch circuit Pop Q51, R507, Q50 and Depop PJP24. 0.5
164 31 H/W 11/03 Steven For passing EMVCo test. Change R1424 from 220 to 330Ohm. 0.5
165 43 H/W 11/03 Steven SNIFFER_LED_OFF# is a push/pull signal. De-pop R1449. 0.5
166 27 H/W 11/03 Steven To improve audio quality Change C199 to 0.022uF and pop R164, depop R170. 0.5
167 39 H/W 11/11 Steven Change SMSC MEC5004 from version C to D.Change U216 P/N to D version. Depop R102, R97, R25, R23, R104, D2002,Q19, Q20, C22. And chnage C1769 value from 22UF to 4.7UF. 0.5
168 56 H/W 11/11 StevenChange VRAM parts to K4D553235F-VC33 asDELL request. Change VRAM P/N to K4D553235F-VC33 (SA55323000L). 0.5
169 39 H/W 11/11 StevenChange DOCK_SMB_CLK and DOCK_SMB_DAT forconsistent with other M07 platforms.
Change R99 and R100 resister from 100K to 8.2K Ohm. And R1618 changeto 10K. 0.5
170 42 H/W 11/11 StevenProvide pull-up resister toGFX_CORE_PWRGD for 1.2Vrun power used. Pop R2170 for provide pull-up resister. 0.5
171 43 H/W 11/11 Steven For improve LED brightness issue.Change R2 value from 56Ohm to 330Ohm. And modified R15 from 150Ohm to100Ohm. 0.5
172 28 H/W 11/12 StevenFor Q68 broken issue. Modified R120 valuefor protect base pin. Change R120 from 0Ohm to 2KOhm. 0.5
173 20 H/W 11/12 StevenFor DELL request change D32 and D2005 toRB500. Change D32 and D2005 from RB751 to RB500. 0.5
174 27 H/W 11/12 Steven For improve Audio THD+n performance. Change C113, C114 and C146 from 1UF to 2.2U. 0.5
175 27 H/W 11/22 Steven For adjust Audio gain to 15.6DB. Pop R170, De-pop R164. 0.5
42176 H/W 12/06 For improving SUSPWROK turn on issue. Modified Q7 to 2N7002. 0.6Steven
177 23, 38 H/W 12/06 StevenFor solving HD warn boot parking soundissue.
Change HDDC_EN#, MODC_EN# from ICH7 to ECE5018 Pin 106, 107 (GPIOH2/3),and Depop R2148, R2149. 0.6
178 7 H/W 12/06 Steven Add a De-pop resister for CPU test 1 PIN. Add De-pop resister R1387. 0.6
179 39 H/W 12/07Add an damping resister for improvingSPI_CS# overshoot issue. Add 47Ohm resister R127. 0.6Steven
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
67 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.639 H/W 12/09 Steven Change R444 to 4.7KOhm resister.For solving SBAT_SMBDAT rising time overspec issue.179
180 6 H/W 12/12 StevenFor Gerber Gating list item 14 Depoppullup resistor on ICH_CLKREQ#. Depop resister R1761. 0.6
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38 H/W 12/12 StevenFor Gerber Gating list item 17 Updateboard ID to A00 Pop R405, depop R419. 0.6
31 H/W 12/12 StevenFor Gerber Gating list item 11 add 47pFcapacitors to the USB_BIO+/- pins tofix bio sensor ESD issue.
Add 2 capaciotr C83, C84 in USB_BIO+/-. 0.6
41 H/W 12/14 StevenFor GPIOH[3:2] need, chnage pullupresister power plane to always. Change pullup resister R2148, R2149 for +3.3V_SUS to +3.3V_ALW. 0.6183
41 H/W 12/15184 StevenFor Gerber Gating list item 18. Changepullup resister to 10K. Change pullup resister R2148, R2149 for 100K to 10KOhm. 0.6
185 39 H/W 12/19 StevenFor Gerber Gating list item 21. Add 0 ohmseries resistor to SPI_CS# at MEC5004. Add series resister R112 at MEC5004 side. 0.6
186 31 H/W 12/19 Steven For improving USB BIO sensor EMI issue. Add Pop L5, and depop resister R122, R123. 0.6
187 40 H/W 12/20 StevenFor DELL EMI request for add a 0.1uFcapacitor in JTPAD. Add 0.1uF capacitor C54. 0.6
188 28 H/W 12/30 StevenFor Q68 damage issue change form BCP69 toMBT35200 as ZRS solution. Use MBT35200 to replace Q68. Modified. 0.6
189 7 H/W 12/30 StevenIntel Design Guide 1.0 to change H_RESETpull-up resister to 51Ohm. Change resister R416 to 51Ohm. 0.6
H/W190 39 01/04 StevenFor enable MEC5004 BIOS write protectfunction. Pop R139 and de-pop R138. 0.6
191 27 For adjust Audio gain to 21.6 DB. DePop R170, pop R164.H/W 01/07 Benson 0.6
192 28 H/W 01/09 StevenFor Q68 issue to reserve soft startcircuit. Change R120 to 0Ohm, and depop C80. 0.6
193 58 H/W 01/09 Steven For avoiding GPU leakage issue. Change R2168 pull-up from +3.3V_run to +3.3V_sus. 0.6
194 20 H/W 01/20 StevenFor fixing issue with projector usinglong cable.
Change R101,R114 from 39 ohm to 0 ohm 0.6
195 19 H/W 01/20 Steven Change R235 from 200K ohm to 100K ohmFor stronger the VGS driving in Battery Mode
196 6 H/W 01/20 Steven The Drive Level too high Change R32 from 0 ohm to 470 ohm
22197 H/W 01/20 Steven The Negative Resistance too low Change X1 spec from CL=20pF to 6 pF and C38,C40 from 12pF to 2.2pF
H/W 01/20 StevenThe Frequency too high & Drive Level too high38198
Change Y1 spec from CL=20pF to 12pF and C1451,C1452 from 22P to 15P
199 H/W 01/20 Steven None Depop L5 ,pop R122,R123 33 ohm
200 H/W 01/20 Steven Change R74 from 0 ohm to 10K ohm and pull-down itTo fix PLTRST_DELAY# glitch23
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201 23 H/W 02/06 Steven For solving USB strength issue. Change R113 from 22.6Ohm to 22Ohm. 0.6
H/W 02/0739 Steven For solving primary battery hand issue. Change R447, R449 to 4.7KOHm; R444, R131 to 2.2KOhm. 0.6202
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Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 1
68 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#
1 0.2
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
0.2
2 46 PWR 06/01MAX8734 LDO soft start issue. Delete PR27 4.7_1210_5%(SD000007E8L)
Un-pop PC20 4.7U_1206_25V6K(SE093106M8L) 0.2
3 46 PWR PWR_SRC noise issue Un-pop PC252 100U_25V_M(SF10004M008) 0.2
4 44/45 PWR +3VALW change to +3VSRCRename net +3VALW to +3VSRC
0.2
5 47 PWR VCCP high/low side MOSFET change from IR to InfineonNo-stuff PC207 and PC208
PQ38 change from IR7821(SB57821008L) to BSO072N03S(SB00000418L)PQ40 change from IR7832(SB57832008L) to BSO072N03S(SB00000418L)Un-pop PC207 and PC208 10U_0805_6.3V5K(SE093106M8L)
0.2
46 PWR 06/01 SahaM4 input current more than MAX8734 LDO3output 100mA
Delete PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L)Add PR350 0_0402_5%(SD02800008L) connact LDO3 to ON3 PU18 74AHCT1G08GW AND GATE(SA00000L30L) PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L)
Saha
06/01 Saha
06/01 Saha
06/01 Saha
6 PWR 06/01 Saha VCCP_1P05VP OCP issue(5A)47 PR224 change from 124K_0402_1%(SD03412438L) to 60.4K_0402_1%(SD03460428L) 0.2
7 PWR 06/01 Saha Choke height issue.(5.6mm change to 5.0mm)47/48 PL14 and PL27 change from 1.4U_HMU1356-1R4_15.5A H5.6mm(SH04814AM8L)to 1.4U_HMU1350-1R4_15A H5.0mm(SH000004H8L)
8 PWR 06/01 Saha44 PSID materiel change by Dell PQ1 change from BSS138_SOT23(SB50138008L) to FDV301_SOT23(SB50301008L)
PWR9 50 06/01 Saha New version MAX8731 PIN1 define GND Un-pop PR337 0_0402_5%(SD02800008L),Pop PR336 0_0402_5%(SD02800008L)
0.2
0.2
0.2
10 PWR50 06/02 Saha Add RC filter at pin 23 of MAX8731 Add PR360 1_0603_1%(SD014100B8L) PC253 220P_0402_50V7K(SE074221K8L) 0.2
11 PWR46/48 06/02 Saha Add support for Reliability voltagemargining tests
Add PR356, PR355 and PR359 0_0603_5%(SD01300008L) PR353 and PR354 0_0402_5%(SD02800008L) 0.2
PWR12 06/1648 PC70 and PC71 change from 330U_D3L_6.3V_R25(SGA00000N8L)to 330U_D2E_2.5VM_R15(SGA19331D0L)
Change output capactior rating voltagefrom 6.3V to 2.5V
Saha0.3
PWR13 06/2249 Change VCORE DPRSLPVR input resistor value PR248 change from 0_0402_5%(SD02800008L) to 499_0402_1%(SD03449900L)Saha 0.3
14 PWR 06/2250 Add power limit schematic Depop PR361 80.6K_0402_1%, PR362 200K_0402_1%, PR363 121K_0402_1%,PR364 3.01K_0402_1%, PR365 499K_0402_1%, PR366 100K_0402_1%,PR367 100K_0402_1%, PC254 0.01U_0402_25V8K, PC255 100P_0402_50V8K,PC256 100P_0402_50V8K, PC257 100P_0402_50V8K, PC258 0.01U_0402_25V8K,PC259 10P_0402_50J8K, PQ81 RHU002N06_SOT323, PU19 LM393DR_SO8
Saha 0.3
15 PWR 06/2946 Discreate 3VALW and 3VSRC.Add PU17 SN74AHC1G32DCKR OR GATE(SA00732018L), PR49 1K_0402_1%(SD03410018L) PQ82 FDC655BN_NL(SB000004P8L )Delete PR352 1K_0402_1%(SD03410018L) PR351 0_0402_5%(SD02800008L) PR350 0_0402_5%(SD02800008L) PU18 74AHCT1G08GW AND GATE(SA00000L30L)
Saha 0.3
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
69 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
18 47 PWR ISL6227 Issuechange 1.05V/1.5VHigh/Low side MOSFETchange 1.05V chokeadjust OCP and ISEN value
VCC Change from +5VRUN to +5VSUS.EN1 and EN2 change from RUNPWROK to RUN_ON.PR221 change from 20K_04-2_1%(SD03420028L ) to 19.6K_0402_1%(SD00000358L)PQ8 change from FDS6994S(SB56994008L) to FDS8880(SB000004U8L)Add PQ83 FDS6670AS(SB000004T8L)PQ38 change from BSO072N03S(SB00000418L) to FDS8880(SB000004U8L)PQ40 change from BSO072N03S(SB00000418L) to FDS6670AS(SB000004T8L)PL27 change from 1.4U_HMU1350(SH000004H8L) to 1.5U_SIL104(SH04215A08L)Add PC261 0.01U_0402(SE068103K8)Add PC262 and PC263 2200P_0402(SE074222K8L)PR219 change from 825_0402_1%(SD03482508L) to 1.43K_0402_1%(SD03414318L)PR220 change from 825_0402_1%(SD03482508L) to 2.1K_0402_1%(SD03421018L)PR223 change from 69.8K_0402_1%(SD03469828L) to 124K_0402_1%(SD03412438L)PR224 change from 60.4K_0402_1%(SD03460428L) to 124K_0402_1%(SD03412438L)
0.3Saha
19 PWR Saha49 ISL6260 Issue0.3
20 PWR50 Saha Change +VCHGR output CAP from 1206 to 1210 0.3
16 PWR 06/29 0.3Add PR27 0_1206_5%(SD00100000L)46 Saha Add V+ input Resistor
17 PWR 06/2945/51 Saha Rename +3VSRC to +3VALWBattery conn. and battery selector +3VSRCchange to +3VALW 0.3
06/29
Delete PR338, PR339 and PR340 2.7_0603_5%Change PC246, PC247, PC248 to 1500P_0805-----UnpopChange PH1 from ERTJ1VR103J(SL20000020L) to NCP15WM474J03RB(SL20000098L)PR284 change from 15.8K_0402_1%(SD03415828L) to 0_0402_5%(SD02800008L)Add PC260 0.1U_0603(SE042104K8L)
06/29
06/29 PC113 and PC114 change from 10U_1206(SE142106M8L) to 10U_1210(SE056106K8L)
08/1221 PWR47 Saha Add VSEN capacitor 0.4Add PC265 and PC264 100P_0402_50V8K(SE071101K8L)
22 08/1247 PWR Saha Delete PGOOD pull high resistor 0.4Delete PR283 100K_0402_1%(SD03410038L)De-pop PR195 100K_0402_1%(SD03410038L)
23 48 08/12PWR Saha Delete reliability test resistor Delete PR283 110K_0603_1%, PR359 0_0603_1%, and PR82 59.6K_0603_1% 0.4
24 49 08/12PWR Saha Adjust VCORE load line PR267 change from 7.87K_0402_1%(SD03478718L) to 9.09K_0402_1%(SD034909100)PR231, PR331, and PR270 change from 7.68K_0402_1%(SD00000238L) to7.68K_0805_1%(SD00000B08L)
0.4
25 49 08/12PWR Saha Delete H_PROCHOT# resistor Delete PR235 0_0402_5%(SD02800008L ) 0.4
26 50 PWR 10/17 Saha Add RC filter in FBSA/B PIN Add PR368 and PR369 100_0402_5%(SD02810008L)Add PC266 and PC267 0.01U_0603_50V7K(SE025103K8L)Un-pop PR371 and PR370 0_0402_5%
0.5
27 46 PWR 10/17 Saha EMI request: change BST3 resestor Change PR32 from 0_0603_5%(SD01300008L) to 2.2_0603_5%(SD013220B8L) 0.5
28 46 PWR 10/17 Saha change 3V out put CAP height change PC31 from 330U_6.3V_R25 H1.9(SGA00001C8L ) to330U_6.3V_R25 H2.8(SGA0000089L) 0.5
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Title
Size Document Number Rev
Date: Sheet o fLA-2792 1.0
Changed-List History 2
70 70Tuesday, February 07, 2006
Version Change List ( P. I. R. List )
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
29 PWR 10/17 0.5Populate PR361-PR367, PC254-259, PU19, PQ81. Change PR361 from 80.6k to 0. Change PR362 from 200k to 301k.Change PR363 from 121k to 59k. Change PR364 from 3.01k to 27.4k.Change PR365k from 499k to 4.32Meg.
50 Saha Populate UL circuit
30 PWR 10/2049 Saha Change VCC_CORE OCP, SOFT,and DPRSTP# value
PR260 change from 20K_0402_1%(SD03420028L) to 11.5K_0402_1%(SD03411520L)PC187 change from 0.022U_0402_16V7K(SE076223K8L) to0.01U_0402_16V7K(SE076103K8L)Add PR372 0_0402_5%(SD02800008L)Delete PR246 0_0402_5%(SD02800008L)Un-pop PR249 0_0402_5%(SD02800008L)
0.5
PWR31 Change PU6 BST resistorSaha10/2048 0.5PR73 change from 0_0603_5%(SD01300008L) to 1_0603_5%(SD013100B8L)
32 PWR Change PQ2 from RUH002N06 to 390444 10/20 Saha PQ2 change from RHU002N06(SB50206008L) to MMST3904(SB000002R0L) 0.5
33 49 PWR 11/12 Adjust CPU Load LineSaha
PR267 change from 9.09K_0402_1%(SD03490918L) to 10.5K_0402 _1%(SD03410528L)PR261 change from 3.57K_0402_1%(SD03435718L) to 2.47K_0402 _1%(SD03424318L)Add PC252 100U_25V_(6.3X7.7)(SF10004M08L)Add PC215 0.068U_10VX7R_0402 (SE102683K8L)
0.5
34 50 PWR 12/6 Saha Deeply dischargered battery problem.Add PD54 1SS355_sod323(SC1SS35500L)Add PR373 1K_0603_1%(SD01410018L) 0.5
5035 Add PC267 3300PF_0402_50V7K(SE074332K8L)Depop PC266 0.01U_0603_50V7K(SE025103K8L)
Follow Coe A09 schematicSaha12/6PWR0.5
36 47 PWR 12/15 Saha Follow GGL 1214 item19. Depop PR12 0.6
37 49 50 46 PWR 1/7 Saha Add PC270~PC273 and PC268 10U_1206_25V6M(SE142106M8L)For acoustical issue 0.6