DATASHEETIR23N0LF

Document Number: 91209S-81352-Rev. A, 16-Jun-08 1

Power MOSFET

IRFP23N50L, SiHFP23N50LVishay Siliconix

FEATURES Superfast Body Diode Eliminates the Need for

External Diodes in ZVS Applications Lower Gate Charge Results in Simpler Drive

Requirements Enhanced dV/dt Capabilities Offer Improved Ruggedness Higher Gate Voltage Threshold Offers Improved Noise

Immunity Lead (Pb)-free Available

APPLICATIONS Zero Voltage Switching SMPS Telecom and Server Power Supplies Uninterruptible Power Supplies Motor Control Applications

Notesa. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. Starting TJ = 25 C, L = 1.5 mH, RG = 25 , IAS = 23 A (see fig. 12).c. ISD 23 A, dI/dt 430 A/s, VDD VDS, TJ 150 C.d. 1.6 mm from case.

PRODUCT SUMMARYVDS (V) 500RDS(on) () VGS = 10 V 0.190Qg (Max.) (nC) 150Qgs (nC) 44Qgd (nC) 72Configuration Single

N-Channel MOSFET

G

D

S

TO-247

GD

S

Available

RoHS*COMPLIANT

ORDERING INFORMATIONPackage TO-247

Lead (Pb)-free IRFP23N50LPbFSiHFP23N50L-E3

SnPbIRFP23N50LSiHFP23N50L

ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise notedPARAMETER SYMBOL LIMIT UNITDrain-Source Voltage VDS 500

V Gate-Source Voltage VGS 30

Continuous Drain Current VGS at 10 VTC = 25 C ID

23ATC = 100 C 15

Pulsed Drain Currenta IDM 92Linear Derating Factor 2.9 W/C Single Pulse Avalanche Energyb EAS 410 mJ Repetitive Avalanche Currenta IAR 23 A Repetitive Avalanche Energya EAR 37 mJ Maximum Power Dissipation TC = 25 C PD 370 W Peak Diode Recovery dV/dtc dV/dt 14 V/ns Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150

C Soldering Recommendations (Peak Temperature) for 10 s 300d

Mounting Torque 6-32 or M3 screw10 lbf in1.1 N m

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 912092 S-81352-Rev. A, 16-Jun-08


Notesa. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. Pulse width 300 s; duty cycle 2 %.c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising fom 0 to 80 % VDS. d. Coss eff. (ER) is a fixed capacitance that stores the same energy time as Coss while VDS is rising fom 0 to 80 % VDS.

THERMAL RESISTANCE RATINGSPARAMETER SYMBOL TYP. MAX. UNITMaximum Junction-to-Ambient RthJA - 40

C/WCase-to-Sink, Flat, Greased Surface RthCS 0.24 -Maximum Junction-to-Case (Drain) RthJC - 0.34

SPECIFICATIONS TJ = 25 C, unless otherwise notedPARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITStaticDrain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 A 500 - - V VDS Temperature Coefficient VDS/TJ Reference to 25 C, ID = 1 mAd - 0.27 - V/C Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 A 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = 30 V - - 100 nA

Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 50 A

VDS = 400 V, VGS = 0 V, TJ = 125 C - - 2.0 mADrain-Source On-State Resistance RDS(on) VGS = 10 V ID = 14 Ab - 0.190 0.235 Forward Transconductance gfs VDS = 50 V, ID = 14 Ab 12 - - S DynamicInput Capacitance Ciss VGS = 0 V,

VDS = 25 V, f = 1.0 MHz, see fig. 5

- 3600 -

pF

Output Capacitance Coss - 380 -Reverse Transfer Capacitance Crss - 37 -

Output Capacitance Coss

VGS = 0 V

VDS = 1.0 V , f = 1.0 MHz - 4800 -VDS = 400 V , f = 1.0 MHz - 100 -

Effective Output Capacitance Coss eff. VDS = 0 V to 400 Vc - 220 -Effective Output Capacitance(Energy Related) Coss eff. (ER) VDS = 0 V to 400 Vd - 160 -Internal Gate Resistance RG f = 1 MHz, open drain - 1.2 - Total Gate Charge Qg

VGS = 10 V ID = 23 A, VDS = 400 V

see fig. 6 and 13b

- - 150nC Gate-Source Charge Qgs - - 44

Gate-Drain Charge Qgd - - 72Turn-On Delay Time td(on) VDD = 250 V, ID = 23 A

RG = 6.0, VGS = 10 V

see fig. 10b

- 26 -

nsRise Time tr - 94 -Turn-Off Delay Time td(off) - 53 -Fall Time tf - 45 -Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current IS MOSFET symbolshowing the integral reversep - n junction diode

- - 23A

Pulsed Diode Forward Currenta ISM - - 92

Body Diode Voltage VSD TJ = 25 C, IS = 14 A, VGS = 0 Vb - - 1.5 V

Body Diode Reverse Recovery Time trrTJ = 25 C

IF = 23 A,dI/dt = 100 A/sb

- 170 250ns

TJ = 125 C - 220 330

Body Diode Reverse Recovery Charge QrrTJ = 25 C - 560 840 C

TJ =1 25 C - 980 1500Reverse Recovery Current IRRM TJ = 25 C - 7.6 11 AForward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

S

D

G



TYPICAL CHARACTERISTICS 25 C, unless otherwise noted

Fig. 1 - Typical Output Characteristics

Fig. 2 - Typical Output Characteristics

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

0.1 1 10 1000.001

0.01

0.1

1

10

100

I D,

Dra

in-to

-Sou

rce C

urr

ent (A

)

4.5 V

20s PULSE WIDTHTj = 25 C

VDS, Drain-to-Source Voltage (V)

TOP 15V VGS

10V 8.0V 7.0V 6.0V 5.5V 5.0V

BOTTOM 4.5V

10 1000.1

10

100

20s PULSE WIDTHTj = 150 C


1

1I D, D

rain

-to

-So

urc

e C

urr

ent

(A)

4,5 V

TOP 15V VGS

10V 8.0V 7.0V 6.0V 5.5V 5.0V

BOTTOM 4.5V

1.0 6.0 11.0 16.0

VGS, Gate-to-Source Voltage (V)

1.00

10.00

100.00

1000.00

I D, D

rain

-to

So

urc

e C

urr

ent

(A)

TJ = 25 C

TJ = 150 C

20 s PULSE WIDTH

TJ = 150C

-60 -40 -20 0 20 40 60 80 100 140 1600.0

0.5

1.0

1.5

2.0

2.5

3.0ID = 23 A

VGS = 10 V

120

TJ, Junction Temperature (C)

R DS(

ON

), D

rain

-to

-So

urc

e O

n R

esis

tan

ce

(N

orm

aliz

ed)



Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 9 - Maximum Safe Operating Area

Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Typical Source-Drain Diode Forward Voltage

Fig. 10 - Maximum Drain Current vs. Case Temperature

1 10 100 100010

100

1000

10000

100000

C, C

apac

itan

ce (p

F)


VGS = 0 V, f = 1 MHZCiss = Cgs + Cgd, Cds SHORTEDCrss = CgdCoss = Cds + Cgd

Ciss

Coss

Crss

0

VDS , Drain-to-Source Voltage (V)

0

5

10

15

20

25

Ener

gy (

J)

100 200 300 400 500 600

OPERATION IN THIS AREA LIMITED 1000

100

10

110 100 1000 10000

TC = 25 C


I D, D

rain

Cu

rre

nt (A

)

BY RDS(ON)

10us

100us

1ms

10msTJ = 150 CSingle Pulse

240

2

5

7

10

12

0 48 72 96 120

V GS,

G

ate-

to-S

ourc

e V

olta

ge (V

)

QG, Total Gate Charge (nC)

ID = 23

VDS = 400 VVDS = 250 VVDS = 100 V

0.00.10

1.00

10.00

100.00

0.5 1.0 1.5 2.0

I SD,

R

eve

rse

Dra

in C

urr

en

t (A)

VSD, Source-to-Drain Voltage (V)

TJ = 150 C

TJ = 25 C

VGS = 0 V

50 75 100 1500

5

10

15

20

25

25 125

I D, D

rain

Cu

rre

nt (A

)

TC, Case Temperature (C)



Fig. 11a - Switching Time Test Circuit Fig. 11b - Switching Time Waveforms

Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 13 - Threshold Voltage vs. Temperature Fig. 14 - Maximum Avalanche Energy s. Drain Current

Pulse width 1 sDuty factor 0.1 %

RD

VGSRG

D.U.T.

10 V

+-

VDS

VDD

VDS90 %

10 %VGS

td(on) tr td(off) tf

0.001

0.01

0.1

1

10

0.00001 0.0001 0.001 0.01 0.1 1

Ther

ma

l Res

pons

e

(Z thJ

C)

t1, Rectangular Pulse Duration (sec)

D = 0.50

0.20

0.10

0.050.020.01 SINGLE PULSE(THERMAL RESPONSE)

Notes:1. Duty factor D = t1 / t22. PeakT

J = P DM x Z thJC + T C

PDM

t 1

t 2

- 75 - 50 - 25 0 25 50 75 100 1251.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

150

ID = 250 A

V GS(

th) G

ate

Thre

shol

d Vo

ltage

(V)

TJ, Temperature (C)

0

150

300

450

600

750

25 50 75 100 125 150

E AS,

Si

ngle

Pu

lse

Ava

lanc

he E

nerg

y (m

J)

Starting T , Junction Temperature (C)

IDTOP 10A 15ABOTTOM 23A



Fig. 15a - Unclamped Inductive Test Circuit Fig. 15b - Unclamped Inductive Waveforms

Fig. 16a - Gate Charge Test Circuit Fig. 16b - Basic Gate Charge Waveform

RGIAS

0.01tp

D.U.T

LVDS

+-

VDD

Driver

A

15 V

20 V IAS

VDStp

D.U.T.

3 mA

VGS

VDS

IG ID

0.3 F0.2 F

50 k

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-

QGS QGD

QG

VG

Charge

10 V



Fig. 17 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for SiliconTechnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, andreliability data, see http://www.vishay.com/ppg?91209.

P.W. Period

dI/dt

Diode RecoverydV/dt

Ripple 5%

Body Diode Forward DropRe-AppliedVoltage

ReverseRecoveryCurrent

Body Diode ForwardCurrent

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D = P.W.Period

+

-

+

+

+-

-

-

* VGS = 5V for Logic Level Devices

Peak Diode Recovery dV/dt Test Circuit

RGVDD

dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test

D.U.T Circuit Layout Considerations Low Stray Inductance

Ground Plane Low Leakage Inductance

Current Transformer

*

DatasheetDisclaimer

DATASHEETIR23N0LF

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