17

18

1

26

18

17

SDIPHP-30L

1

22

23

30

1

22

23

30

Features• IPM 650 V, 50 A 3-phase inverter bridge including control ICs for gates driving• 3.3 V, 5 V TTL/CMOS inputs with hysteresis• Under-voltage lockout of gate drivers• Built-in bootstrap diodes• Short-circuit protection• Shutdown input/fault output• Separate open emitter outputs• Comparator for fault protection• Short-circuit rugged• Very fast, soft recovery diodes• Fully isolated package• Isolation rating of 2500 Vrms/min• 100 kΩ NTC for temperature monitoring

Applications• HVAC• GPI• Servo motor

DescriptionThis new IPM (intelligent power module) is part of the high power SLLIMM (smalllow-loss intelligent molded module) family and provides a compact, high-performanceAC motor drive in a simple, rugged design. It combines driver control with improvedshort-circuit rugged 650 V trench gate field-stop IGBTs, resulting ideal for 3-phaseinverters motor drives.

Product status link

STGIK50CH65T

Product summary

Order code STGIK50CH65T

Marking GIK50CH65T

Package SDIPHP-30L

Packing Tube

SLLIMM high power IPM, 3-phase inverter, 50 A, 650 V short-circuit rugged IGBT

STGIK50CH65T

Datasheet

DS13811 - Rev 1 - September 2021For further information contact your local STMicroelectronics sales office.

www.st.com

1 Internal schematic and pin description

Figure 1. Internal schematic diagram and pin configuration

(29) P

(26) W

(23) NW

(24) NV

(25) NU

Low-side IC

High-side IC

FO (18)CFO (19)CIN (20)GND (21)

VCCL (22)

LINu (15)LINv (16)LINw (17)

VCCHu (3)

HINu (4)

OUTu (1)VBOOTu (2)

NTCT (14)

DBC substrate

Boot-Di

High-side IC

High-side IC

OUTv (5)VBOOTv (6)

VCCHv (7)

HINv (8)

OUTw (9) VBOOTw (10)

VCCHw (11)

HINw (12)

Boot-Di

Boot-Di

(30) NC

NC (13)

(27) V(28) U

GADG170920211009GT

STGIK50CH65TInternal schematic and pin description

DS13811 - Rev 1 page 2/21

Table 1. Pin description

Pin Symbol Description

1 OUTu High-side reference output for U phase

2 VBOOTu Bootstrap voltage for U phase

3 VCCHu High-side voltage power supply for U phase

4 HINu High-side logic input for U phase

5 OUTv High-side reference output for V phase

6 VBOOTv Bootstrap voltage for V phase

7 VCCHv High-side voltage power supply for V phase

8 HINv High-side logic input for V phase

9 OUTw High-side voltage power supply for

10 VBOOTw Bootstrap voltage for W phase

11 VCCHw High-side voltage power supply for W phase

12 HINw High-side logic input for W phase

13 NC Not connected (cut pin)

14 T NTC thermistor output

15 LINu Low-side logic input for U phase

16 LINv Low-side logic input for V phase

17 LINw Low-side logic input for W phase

18 FO Shutdown/fault output

19 CFO Capacitor for fault output setting

20 CIN Comparator input

21 GND Ground

22 VCCL Low-side voltage power supply

23 NW Negative DC input for W phase

24 NV Negative DC input for V phase

25 NU Negative DC input for U phase

26 W W phase output

27 V V phase output

28 U U phase output

29 P Positive DC input

30 NC Not connected

Note: It is required the external connection between the following couple of pins:• OUTu (1) and U (28)• OUTv (5) and V (27)• OUTw (9) and W (26).

STGIK50CH65TInternal schematic and pin description

DS13811 - Rev 1 page 3/21

2 Absolute maximum ratings

TJ = 25 °C unless otherwise noted.

Table 2. Inverter parts

Symbol Parameter Value Unit

VPN Supply voltage between P -NU, -NV, -NW 500 V

VPN(surge) Supply voltage (surge) between P -NU, -NV, -NW 550 V

VCES Collector-emitter voltage each IGBT 650 V

IC Continuous collector current each IGBT 50 A

ICP Peak collector current each IGBT (less than 1 ms) 100 A

PTOT Total power dissipation at TC = 25 °C each IGBT 150 W

VPN(SP)Self-protection supply voltage limit, VCC = 13.5 – 16.5 V, TJ = 150 °C,non-repetitive, less than 2µs 400 V

Table 3. Control parts

Symbol Parameter Min. Max. Unit

VCC Supply voltage applied between VCCHx-GND, VCCL-GND - 0.5 25 V

VBOOT Bootstrap voltage - 0.5 25 V

VOUT Output voltage applied between OUTx and GND - 0.5 650 V

VCIN Comparator input voltage - 0.5 VCCL+0.3 V

VINH Logic input voltage applied between HINx and GND - 0.5 VCCHx+0.3 V

VINL Logic input voltage applied between LINx and GND - 0.5 VCCL+0.3 V

VFO Fault output voltage - 0.5 VCCL+0.3 V

IFO Fault output sink current 1 mA

ΔVCC/Δt Change rate of VCC supply voltage time -1 1 V/μs

Table 4. Bootstrap diode

Symbol Parameter Min. Max. Unit

VR-BS Bootstrap diode reverse voltage - 650 V

Table 5. Total system

Symbol Parameter Value Unit

VISOIsolation withstand voltage applied between each pin and heat sink plate

(AC voltage, t = 60 s)2500 Vrms

TJIGBT and FRD operating junction temperature range -40 to 175

°CDriver IC and bootstrap diode operating junction temperature range -40 to 150

TC Module case operating temperature range -40 to 125 °C

STGIK50CH65TAbsolute maximum ratings

DS13811 - Rev 1 page 4/21

Table 6. Thermal data

Symbol Parameter Value Unit

RthJCThermal resistance, junction-to-case single IGBT 1

°C/WThermal resistance, junction-to-case single diode 2

STGIK50CH65TAbsolute maximum ratings

DS13811 - Rev 1 page 5/21

3 Electrical characteristics

TJ = 25 °C unless otherwise specified.

3.1 Inverter parts

Table 7. Inverter parts

Symbol Parameter Test conditions Min. Typ. Max. Unit

ICES Collector cut-off current VCE = 650 V, VCC = Vboot = 15 V - 25 µA

VCE(sat)Collector-emitter saturationvoltage

VCC = Vboot = 15 V, VIN(1) = 5 V,

IC = 50 A- 1.8 2.3

VVCC = Vboot = 15 V, VIN(1) = 5 V,

IC = 50 A, TJ = 175 °C- 2.2

VF Diode forward voltageVIN(1) = 0 V, IC = 50 A - 2.0 2.5

VVIN(1) = 0 V, IC = 50 A, TJ = 175 °C - 2.25

1. Applied between HINx, LINx and GND for x = U, V, W.

STGIK50CH65TElectrical characteristics

DS13811 - Rev 1 page 6/21

Table 8. Inductive load switching time and energy

Symbol Parameter Test conditions Min. Typ. Max. Unit

High-side

ton(1) Turn-on time

VDD = 300 V, VCC = Vboot = 15 V,

VIN(2) = 0 to 5 V, IC = 50 A

- 860 - ns

tc(on)(1) Crossover time on - 386 - ns

toff(1) Turn-off time - 1464 - ns

tc(off)(1) Crossover time off - 137 - ns

trr(1) Reverse recovery time - 370 - ns

Eon Turn-on switching energy - 2.70 - mJ

Eoff Turn-off switching energy - 1.12 - mJ

Err Reverse recovery energy - 0.244 - mJ

Low-side

ton(1) Turn-on time

VDD = 300 V, VCC = Vboot = 15 V,

VIN(2) = 0 to 5 V, IC = 50 A

- 605 - ns

tc(on)(1) Crossover time on - 266 - ns

toff(1) Turn-off time - 962 - ns

tc(off)(1) Crossover time off - 110 - ns

trr(1) Reverse recovery time - 405 - ns

Eon Turn-on switching energy - 2.16 - mJ

Eoff Turn-off switching energy - 0.85 - mJ

Err Reverse recovery energy - 0.192 - mJ

1. ton and toff include the propagation delay time of the internal drive. tc(on) and tc(off) are the switching times of the IGBT itselfunder the internally given gate driving conditions.

2. Applied between HINx, LINx and GND for x = U, V, W.

STGIK50CH65TInverter parts

DS13811 - Rev 1 page 7/21

Figure 2. Switching time test circuit

OUT

VBOOT

VCCH

HIN

VBusCBus

Input

H-s

ide

L-si

de

L

VCCL

GND

GND

CIN

FO

LIN

VBOOT

VCC

VFO

RFFVce

IC

0V

5V

GADG200920211533GT

Figure 3. Switching time definition

AM09223V1

VCE IC IC

VIN

t ONt C(ON)

VIN(ON)

(a) turn-on (b) turn-off

t rr

VIN

VCE

t OFFt C(OFF)

VIN(OFF)

100% IC 100% IC

10% IC 90% IC 10% VCE 10% VCE 10% IC

STGIK50CH65TInverter parts

DS13811 - Rev 1 page 8/21

3.2 Control/protection partsUnless specifically noted, TC = -40 °C to 125 °C, VPN = 300 V, VVCCxH = VVCCL = 15 V, RFF = 10 kΩ, CFF = 0 μF,and VFO = 5 V. The shipping test is performed at TA = 25 °C and 125 °C for the electrical characteristics shownbelow (except for the parameters specified by design and not tested in production).

Table 9. Control/protection parts

Symbol Parameter Test condition Min. Typ. Max. Unit

VVCCHx_H VCCHx pin operating voltage 9.2 10.2 11.3 V

VVCCHx_L VCCHx pin operating stop voltage 8.7 9.7 10.8 V

VVCCHx_HYS VCCHx pin hysteresis 0.5 V

VVCCL_H VCCL pin operating voltage 11.2 12.6 13.3 V

VVCCL_L VCCL pin operating stop voltage 10.7 12.1 12.8 V

VVCCL_HYS VCCL pin hysteresis 0.5 V

VVBOOTx-OUTx_H VBOOTx-OUTx operating voltage 11.0 12.1 12.8 V

VVBOOTx-OUTx_L VBOOTx-OUTx operating stop voltage 10.5 11.6 12.3 V

VVBOOTx-OUTx _HYS VBOOTx-OUTx hysteresis 0.5 V

IVCCHx VCCHx pin input currentVHINx = 0 V, each pin 1.1 2.0 mA

VHINx = 5 V, each pin 1.1 2.0 mA

IVCCL VCCL pin input currentVLINx = 0 V 1.9 3.2 mA

VLINx = 5 V 1.9 3.2 mA

IVBOOTx-OUTx VBOOTx-OUTx input current

VVBOOTx-OUTx = 15 V,

VINxH = 0 V,

in 1-phase operation

0.09 0.30 mA

VVBOOTx-OUTx = 15 V,

VINxH = 5 V,

in 1-phase operation

0.11 0.30 mA

Input signal

VHINx_HHINx pin high-level input thresholdvoltage 2.0 2.5 V

VHINx_LHINx pin low-level input thresholdvoltage 1.0 1.5 V

VHINx_HYS HINx pin hysteresis 0.5 V

VLINx_H LINx high-level input threshold voltage 2.0 2.5 V

VLINx_LLINx pin low-level input thresholdvoltage 1.0 1.5 V

VLINx_HYS LINx pin hysteresis 0.5 V

IHINx HINx pin input Current VHINx = 5 V, each pin 0.25 0.50 mA

ILINx LINx pin input Current VLINx = 5 V, each pin 0.25 0.50 mA

tHINx_MIN(ON)(1) HINx pin minimum response pulsewidth (On) 0.34 0.50 μs

tHINx_MIN(OFF)(2) HINx pin minimum response pulsewidth (Off) 0.36 0.50 μs

STGIK50CH65TControl/protection parts

DS13811 - Rev 1 page 9/21

Symbol Parameter Test condition Min. Typ. Max. Unit

tLINx_MIN(ON)(2) LINx pin minimum response pulsewidth (On) - 0.26 0.50 μs

tLINx_MIN(OFF)(2) LINx pin minimum response pulsewidth (Off) - 0.27 0.50 μs

Fault signal output and shutdown signal input

VFO_H FO pin shutdown release voltage 2.0 2.5 V

VFO_L FO pin shutdown threshold voltage 1.0 1.5 V

VFO_HYS FO pin shutdown hysteresis 0.5 V

VFO_HFO pin output voltage in normaloperation

VFO = 5 V, RFF = 10 kΩ,VCIN = 0 V 4.8 5.0 V

VFO_L VFO pin error signal output voltageVFO = 5 V, RFF = 10 kΩ,VCIN = 1 V - 0.05 0.50 V

tFO(1)(2) FO pin CIN hold time

CCFO = 0 μF 0.012 0.030 0.060 ms

CCFO = 0.001 μF 0.20 0.32 0.44 ms

CCFO = 0.01 μF 2.0 3.2 4.4 ms

CCFO = 0.1 μF 20 32 44 ms

CCFO = 1 μF 200 320 440 ms

Protection

VCIN _H CIN pin overcurrent detection voltage 0.46 0.50 0.54 V

VCIN _L CIN pin overcurrent release voltage 0.32 0.38 0.44 V

VCIN _HYS CIN pin overcurrent hysteresis 0.12 V

tCIN _DELAY CIN pin detection delay time 0.3 0.5 μs

ICIN CIN pin input current VCIN = 0.5 V 2.5 μA

1. Specified By Design – Not tested in production.2. For a relation between tFO and CCFO, see Figure 5. The shipping test is performed with the condition at CCFO = 0.01 μF

only.

Figure 4. Total bootstrap current vs fsw

2.4

1.8

1.2

0.6

0.00 4 8 12 16

IVBOOTx-OUTx (mA)

fsw (kHz)

VCC = 15 VTJ = 125 °Cδ = 50%

GADG200920211651GT

Figure 5. tFO - CCFO characteristics

10 2

10 1

10 0

10 -2 10 -1

tFO (ms)

CCFO (μF)

GADG200920211703GT

STGIK50CH65TControl/protection parts

DS13811 - Rev 1 page 10/21

Figure 6. CIN test circuit and time definition

L-si

deVCCL

GND

CIN

FO

LIN

RFF

0 V

1 V

VFO

VCC V

NWNVNU

U 1 VCIN

VFO

U

t

t

t

50%

15 VtCIN_DELAY

50%

0

0

0

GADG200920211621GT

R

STGIK50CH65TControl/protection parts

DS13811 - Rev 1 page 11/21

4 Bootstrap diode

Table 10. Bootstrap diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

VF_BS Bootstrap diode forward voltage IF_BS = 10 mA 0.4 0.9 1.4 V

RS_BS Bootstrap diode series resistor 12 20 28 Ω

Figure 7. Bootstrap diode static characteristics

GADG210920210925GT

1.5

1.0

0.5

0.00 10 20 30 40

VF (V)

IF (mA)

TJ = 150 °C

TJ = 25 °C

STGIK50CH65TBootstrap diode

DS13811 - Rev 1 page 12/21

5 NTC thermistor

Table 11. NTC thermistor

Symbol Parameter Test condition Min. Typ. Max. Unit

R25 Resistance TA = 25 °C 100 kΩ

B25/85 B-constant (25−85 °C) 4395 K

T Operating temperature range -40 175 °C

Figure 8. NTC resistance vs temperature

GADG210920210944GT

5000

4000

3000

2000

1000

0-50 -25 0 25 50 75 100

R(kΩ)

T (°C)

Min.

Max.Typ.

Figure 9. NTC resistance vs temperature zoom

GADG210920210939GTzoom

11

8

5

275 85 95 105 115

R(kΩ)

T (°C)

Max.

Typ.

Min.

STGIK50CH65TNTC thermistor

DS13811 - Rev 1 page 13/21

6 Application circuit example

Figure 10. Application circuit example

IGBT

2

IGBT

3

IGBT

4

IGBT

5

IGBT

6

D2

D3

D4 D5

D6

H-side L-side

OU

Tw(9

)VB

OO

Tw(1

0)VC

CH

w(1

1)H

INw

(12)

NC

(13)

T (1

4)

FO (1

8)C

FO (1

9)C

IN (2

0)G

ND

(21)

VCC

L (2

2)

H-side

OU

Tv(5

)VB

OO

Tv(6

)VC

CH

v(7

)H

INv

(8)

IGBT

1D

1

H-side

OU

Tu(1

)VB

OO

Tu(2

)VC

CH

u(3

)H

INu

(4)

(25)

NU

(24)

NV

(23)

NW

(26)

W

(27)

V

(28)

U

NTC

V Bus

(29)

P(3

0) N

C

M

CBu

sC

5

PWR

_GN

D

V CC

CVC

CC

3D

Z1

CBO

OT

C4

DZ2

CBO

OT

C4

DZ2

CBO

OT

C4

DZ2

MICROCONTROLLER

HIN

u

HIN

v

HIN

w

CC

FO

RC

FC

CF

Rsh

untto M

CU

/op-

amp

V T_P

U

R2

C2

V T

V FO

RFF

CFF

C1

R1

C1

R1

C1

R1

LIN

u(1

5)LI

Nu

R1

C1

C1

C1

LIN

v(1

6)LI

Nv

R1

LIN

w(1

7)LI

Nw

R1

SGN

_GN

D

PWR

_GN

DSG

N_G

ND

Application designers are free to use a different scheme according to the device specifications.

STGIK50CH65TApplication circuit example

DS13811 - Rev 1 page 14/21

6.1 Guidelines1. External connections between the pins OUTu‐U, OUTv‐V and OUTw‐w are required.2. Input signals HIN, LIN are active‐high logic. A 20 kΩ (typ.) pull‐down resistor is built‐in for each input pin. To

prevent input signal oscillation, the wiring of each input should be as short as possible and the use of RCfilters (R1, C1) on each input signal is suggested. The filters should be done with a time constant of about100 ns and placed as close as possible to the IPM input pins.

3. The use of a bypass capacitor CVCC (aluminum or tantalum) can help reduce the transient circuit demandon the power supply. Also, to reduce high frequency switching noise distributed on the power lines, it issuggested to place a decoupling capacitor C3 (100 to 220 nF, with low ESR and low ESL), as close aspossible to each VCC pin and in parallel with the bypass capacitor.

4. The use of RC filter (RCF, CCF) for preventing protection circuit malfunction is suggested. The time constant(RCF x CCF) should be set to 1 μs and the filter must be placed as close as possible to the CIN pin.

5. The FO is an input/output pin. It should be pulled up to a power supply (i.e., MCU bias at 3.3 - 5 V) by aresistor value able to match the VFO_L and VFO_H threshold voltages mainly. In case of 3.3 or 5 V pull upvoltage, the suggested resistor value is from 5.6 kΩ to 68 kΩ.The RC filter on FO could have also impact onthe re-starting time after a fault event so it must be placed as close as possible to the FO pin.

6. A decoupling capacitor C2 between 1 nF and 10 nF can be used to increase the noise immunity of the signalon the NTC thermistor. Its effectiveness is improved if the capacitor is placed close to the MCU.

7. The decoupling capacitor C4 (100 to 220 nF with low ESR and low ESL) in parallel with each CBOOT isuseful to filter high frequency disturbances. Both CBOOT and C4 (if present) should be placed as close aspossible to each U, V, W and respective VBOOT pins.

8. To prevent overvoltage on the VCC pins, a Zener diode (DZ1) can be used. Similarly, on the VBOOT pins, aZener diode (DZ2) can be placed in parallel with each CBOOT.

9. The use of the decoupling capacitor C5 (100 to 220 nF, with low ESR and low ESL) in parallel with theelectrolytic capacitor CBus is useful to prevent surge destruction. Both capacitors C5 and CBus should beplaced as close as possible to the IPM (C5 has priority over CBus).

10. When the application requires a galvanic isolation between low and high voltage, use of high speed (highCMR) opto-coupler is recommended.

11. Low inductance shunt resistors should be used for phase leg current sensing.12. In order to avoid malfunction, the wiring between N pins, the shunt resistor and PWR_GND should be as

short as possible.13. The connection of SGN_GND to PWR_GND at only one point (close to the shunt resistor terminal) can help

to reduce the impact of power ground fluctuation.14. Parallel connection of switches or legs on the same or multiple IPMs is not suggested.

These guidelines ensure the device specifications for application designs. For further details, please refer to therelevant application note.

Table 12. Recommended operating conditions

Symbol Parameter Test conditions Min. Typ. Max. Unit

VPN Supply voltage Applied between P-Nu, NV, Nw 300 400 V

VCCHx Control supply voltage Applied between VCCHx-GND 13.5 15 16.5 V

VCCL Control supply voltage Applied between VCCL-GND 13.5 15 16.5 V

VBS High-side bias voltageApplied between VBOOTi-OUTi

for i = U, V, W13 15 18.5 V

tdead Blanking time to prevent arm-short For each input signal 1.5 µs

fPWM PWM input signal-40 °C < TC < 100 °C

-40 °C < TJ < 125 °C20 kHz

TC Case operation temperature 125 °C

STGIK50CH65TGuidelines

DS13811 - Rev 1 page 15/21

7 Electrical characteristics (curves)

Figure 11. Output characteristics

GADG210920211037OC25

80

60

40

20

00.0 0.6 1.2 1.8

IC (A)

VCE (V)

VCC = 15 V

Figure 12. VCE(sat) vs collector current

GADG210920211038VCEC

2.4

1.6

0.8

0.00 20 40 60 80

VCE(sat) (V)

IC (A)

VCC = 15 V

TJ = 175 °C

TJ = 25°C

Figure 13. IC vs case temperature

GADG210920211039CCT

50

40

30

20

10

00 25 50 75 100 125 150

IC (A)

TC (°C)

VCC ≥ 15 V,TJ ≤ 175 °C

Figure 14. Diode VF vs forward current

GADG210920211040DVF

2.8

2.1

1.4

0.7

0.00 20 40 60 80

VF (V)

IF (A)

TJ = 175 °C

TJ = 25°C

Figure 15. Eon switching energy vs collector current

GADG210920211041SLCon

10

8

6

4

2

00 20 40 60 80

Eon (mJ)

IC (A)

VDD = 300 V, VCC = VBOOT = 15 V

Eon (HS) @ 175 °C

Eon (LS) @ 175 °C

Eon (HS) @ 25 °C

Eon (LS) @ 25 °C

Figure 16. Eoff switching energy vs collector current

GADG210920211042SLCoff

4

3

2

1

00 20 40 60 80

Eoff (mJ)

IC (A)

VDD = 300 V, VCC = VBOOT = 15 V

Eoff (HS) @ 175 °C

Eoff (LS) @ 175 °C

Eoff (HS) @ 25 °C

Eoff (LS) @ 25 °C

STGIK50CH65TElectrical characteristics (curves)

DS13811 - Rev 1 page 16/21

Figure 17. Normalized thermal impedance for IGBT

GADG210920211047ZTH_IGBT

10 -1

10 -2

10 -3

10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0

K

t (s)

Single pulse ZthJC = K*RthJC

Figure 18. Normalized thermal impedance for FRD

GADG210920211047ZTH_FRD

10 -1

10 -2

10 -3

10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0

K

t (s)

ZthJC = K*RthJC

Single pulse

STGIK50CH65TElectrical characteristics (curves)

DS13811 - Rev 1 page 17/21

8 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,depending on their level of environmental compliance. ECOPACK specifications, grade definitions and productstatus are available at: www.st.com. ECOPACK is an ST trademark.

8.1 SDIPHP-30L package information

Figure 19. SDIPHP-30L package outline and mechanical data (dimensions are in mm)

DM00727478_1

BOTTOM VIEW

D C C

1 22

2330

46.00 0.15 3.25 0.15

2.35 - 0.050.15+ (x8) 1.00 - 0.05

0.15+ (x8)

15.50

0.20

15.50

0.2031.00

0.30

1.00 - 0.050.15+ (x21) 0.50 - 0.05

0.15+ (x21)

52.50 0.30

QR Code

2.65

3.60

3.60

4.25

3.30 0.20 (x2)

TOP VIEW

E F

G

1.55

5.60

0.20

(6.3)

(7.3)

12.70

0.70

4.32 0.50 (x5) 1.78 0.50 (x16)

1.73

0.30MaxResidual of Tie Bar

3.70 (x2)

(3.23)(3.23)2.04 0.30

(2.01)

(9.21)

3.95 0.30 7.62 0.5 (x4) 6.6 0.5 3.3 0.5 (x2)

35.90

0.70

(17.7)

(17.7)

0.50

2 0.1 2.05 0.1

(1.55)

3.10 0.10

(2)

(4.67)

(2.71)

(12.79)

(13.5)

35.4

0.4

HEAT SINK SIDE

(0~5)

(R0.5) (x2)

3.7( )

3.3( )

3.5( )

Section "C-C" Detail "D"

1.6

1.75

4.32

(1.0)

(0.6)(1.0)

Detail "E" Detail "F"

(0.5)

Detail "G"

1.4MAX

STGIK50CH65TPackage information

DS13811 - Rev 1 page 18/21

Revision history

Table 13. Document revision history

Date Revision Changes

23-Sep-2021 1 First release.

STGIK50CH65T

DS13811 - Rev 1 page 19/21

Contents

1 Internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

3 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

3.1 Inverter parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2 Control/protection parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Bootstrap diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

5 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

6 Application circuit example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

6.1 Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

8 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

8.1 SDIPHP-30L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

STGIK50CH65TContents

DS13811 - Rev 1 page 20/21

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to STproducts and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. STproducts are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design ofPurchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or servicenames are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2021 STMicroelectronics – All rights reserved

STGIK50CH65T

DS13811 - Rev 1 page 21/21