Data ManipulationData Manipulation

CSC 2001TTU

CSC 2001TTU

Now what?Now what?

Program can be represented (and stored) like data. So, now what happens?

The program needs to retrieved from memory and executed.

Program can be represented (and stored) like data. So, now what happens?

The program needs to retrieved from memory and executed.

Program executionProgram execution

Need to “add” some special purpose registers to the CPU to help with this.Program counter

Keeps up with location in program (address of next instruction).

Instruction registerHolds the instruction being executed.

Need to “add” some special purpose registers to the CPU to help with this.Program counter

Keeps up with location in program (address of next instruction).

Instruction registerHolds the instruction being executed.

Program executionProgram execution

Control unit’s basic algorithmthe machine cycle

fetchdecodeexecuterepeat

Control unit’s basic algorithmthe machine cycle

fetchdecodeexecuterepeat

Program executionProgram execution

FetchRetrieve the next instruction from

memory and increment the program counter.

DecodeDecode the bit pattern in the instruction

register.Execute

Perform the action required by the decoded instruction.

FetchRetrieve the next instruction from

memory and increment the program counter.

DecodeDecode the bit pattern in the instruction

register.Execute

Perform the action required by the decoded instruction.

ExampleExample

Let’s say each memory cell is a byte.

Our memory addresses are 1 byte.Program counter: 1 byte

Our instructions each take 2 bytes.Instruction register: 2 bytesMust increment program counter by 2

each time.

Let’s say each memory cell is a byte.

Our memory addresses are 1 byte.Program counter: 1 byte

Our instructions each take 2 bytes.Instruction register: 2 bytesMust increment program counter by 2

each time.

Example (continued)Example (continued)

2141: A1 21 A2 413138: A3 31 A4 382142: A5 21 A6 423170: A7 31 A8 701138: A9 11 AA 391270: AB 12 AC 703170: AD 31 AE 703238: AF 32 B0 38C000: B1 C0 B2 00

2141: A1 21 A2 413138: A3 31 A4 382142: A5 21 A6 423170: A7 31 A8 701138: A9 11 AA 391270: AB 12 AC 703170: AD 31 AE 703238: AF 32 B0 38C000: B1 C0 B2 00

1. Program counter: A12. Instruction register: 2141

Program counter: A33. Decode 21414. Execute 21415. Instruction register: 3138

Program counter: A56. Decode 31387. Execute 3138

.

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Instruction setInstruction set

We’ve seen addition, jump, load, store.

We haven’t looked at logical operationsAND, OR, XOR

We’ve seen addition, jump, load, store.

We haven’t looked at logical operationsAND, OR, XOR

Logic instructions: ANDLogic instructions: AND

10011010

AND 11001001

10001000

00001111

AND 10101010

00001010

10011010

AND 11001001

10001000

00001111

AND 10101010

00001010

Logic instructions: ORLogic instructions: OR

10011010

OR 11001001

11011011

00001111

OR 10101010

10101111

10011010

OR 11001001

11011011

00001111

OR 10101010

10101111

Logic instructions: XORLogic instructions: XOR

10011010

XOR 11001001

01010011

00001111

XOR 10101010

10100101

10011010

XOR 11001001

01010011

00001111

XOR 10101010

10100101

Bit maps and maskingBit maps and masking

Using a bit string to represent the presence (or absence) of something.

Meaning of bit string specific to use.Examples:

attendancekeeping up with what users have seen

within a computer application

Using a bit string to represent the presence (or absence) of something.

Meaning of bit string specific to use.Examples:

attendancekeeping up with what users have seen

within a computer application

Masking with ANDMasking with AND

Checking for the presence of a 1. 10011010

AND 10000000

10000000

10011010

AND 00000001

00000000

Checking for the presence of a 1. 10011010

AND 10000000

10000000

10011010

AND 00000001

00000000

Masking with ORMasking with OR

Setting a bit without disturbing other bits

10011010

OR 00000001

10011011

10011010

OR 10000000

10011010

Setting a bit without disturbing other bits

10011010

OR 00000001

10011011

10011010

OR 10000000

10011010

Masking with XORMasking with XOR

Complementing a bit map (or part of a bit map)

10011010

XOR 11111111

01100101

10011010

XOR 11110000

01101010

Complementing a bit map (or part of a bit map)

10011010

XOR 11111111

01100101

10011010

XOR 11110000

01101010

Rotating/shiftingRotating/shifting

10011010 01001101

10011010 10110100

10110100 11011010

10011010 01001101

10011010 10110100

10110100 11011010

circular shift

logical shifts doubling

halving

two’s complementrepresentation

Communicating with other devices

Communicating with other devices

Controllersmediates communication between

computer and devicetranslates messages back and forth

has to speak both “languages”

plugs in system bus and can be found at a particular “port” on the bus

Controllersmediates communication between

computer and devicetranslates messages back and forth

has to speak both “languages”

plugs in system bus and can be found at a particular “port” on the bus

Communicating with other devices

Communicating with other devices

Computer typically doesn’t blindly flood a device with data.Device might not be able to keep up.Coordination occurs through a two-

way communication (handshake) that lets the computer know about the device’s status

Computer typically doesn’t blindly flood a device with data.Device might not be able to keep up.Coordination occurs through a two-

way communication (handshake) that lets the computer know about the device’s status

Communication ratesCommunication rates

Rate of bit transferbps (bits per second)KbpsMbpsGbps

Rate of bit transferbps (bits per second)KbpsMbpsGbps

Communication typesCommunication types

parallelmultiple bits sent simultaneously

down several linesfaster, but more complicated

serialone bit at a time sent along same

wire

parallelmultiple bits sent simultaneously

down several linesfaster, but more complicated

serialone bit at a time sent along same

wire

Exam 1 reviewExam 1 review

Try not to surprise on tests

However, these notes are not necessarily comprehensive

Aim for understanding over memorizingBut the two are not mutually exclusive

Try not to surprise on tests

However, these notes are not necessarily comprehensive

Aim for understanding over memorizingBut the two are not mutually exclusive

Exam 1 reviewExam 1 review

Chapters 0 - 20.1 - 0.41.1 - 1.72.1 - 2.5

Lectures

Chapters 0 - 20.1 - 0.41.1 - 1.72.1 - 2.5

Lectures

Chapter 0Chapter 0

What is an algorithm?What is the process of abstraction?Charles BabbageAda Byron, Countess of LovelaceGrace HopperWill not ask much on history.Will not ask dates.

What is an algorithm?What is the process of abstraction?Charles BabbageAda Byron, Countess of LovelaceGrace HopperWill not ask much on history.Will not ask dates.

Data storageData storage

Boolean operatorsGates

Evaluate inputsTranslate between Boolean logic and circuit

Convert between bases 10, 2, and 16Basic memory organizationUnderstand seek time, latency time,

access time, transfer time

Boolean operatorsGates

Evaluate inputsTranslate between Boolean logic and circuit

Convert between bases 10, 2, and 16Basic memory organizationUnderstand seek time, latency time,

access time, transfer time

Data storageData storage

Representing textDon’t memorize ASCII tableBasic difference between ASCII and

UNICODEBitmap imagesRepresenting sound

Representing textDon’t memorize ASCII tableBasic difference between ASCII and

UNICODEBitmap imagesRepresenting sound

Data storageData storage

NumbersIntegers

Two’s complementConversionAddingOverflow problem

Floating pointGiven rules regarding translation,

perform translation

NumbersIntegers

Two’s complementConversionAddingOverflow problem

Floating pointGiven rules regarding translation,

perform translation

Data manipulationData manipulation

Basic architectureBasic machine language

RISC vs. CISCUnderstand and be able to work with

sample machine language (Appendix will be provided here if needed.)

Basic architectureBasic machine language

RISC vs. CISCUnderstand and be able to work with

sample machine language (Appendix will be provided here if needed.)