Dalmore 13 UMA -...
57
A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of LA-7741 0.1 Cover Sheet 1 56 Thursday, June 23, 2011 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of LA-7741 0.1 Cover Sheet 1 56 Thursday, June 23, 2011 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of LA-7741 0.1 Cover Sheet 1 56 Thursday, June 23, 2011 Compal Electronics, Inc. BOM P/N : PCB NO : COMPAL CONFIDENTIAL MODEL NAME : Dalmore 13 UMA REV : 0.1 (X00) DELL CONFIDENTIAL/PROPRIETARY PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. @ : Nopop Component QAL70 2011-06-23 1@ 2@ MB Type TPM EN/ TCM DIS TPM DIS/ TCM EN BOM P/N TPM DIS/ TCM DIS 2@ 3@ 3@ 4@ CONN@ : Connector Component GPIO MAP: Ivy Bridge + Panther POINT @ LA-7741P(DAB00000800) 4619EO31L01 TPM ;4519EO31L02 TPM/TAA Rev0.9 TAA @TAA SPI ON BOARD @SPI Part Number Description DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA MB PCB Part Number Description DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA MB PCB
Transcript of Dalmore 13 UMA -...
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Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Cover Sheet
1 56Thursday, June 23, 2011
Compal Electronics, Inc.
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Dalmore 13 UMA
REV : 0.1 (X00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
@ : Nopop Component
QAL70
2011-06-23
1@
2@
MB Type
TPM EN/ TCM DIS
TPM DIS/ TCM EN
BOM P/N
TPM DIS/ TCM DIS 2@
3@
3@
4@
CONN@ : Connector Component
GPIO MAP:
Ivy Bridge + Panther POINT@
LA-7741P(DAB00000800)
4619EO31L01 TPM ;4519EO31L02 TPM/TAA
Rev0.9
TAA @TAA
SPI ON BOARD @SPI
Part Number Description
DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA
MB PCB
Part Number Description
DA80000I700 PCB 0FH LA-6562P REV0 M/B UMA
MB PCB
A
A
B
B
C
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D
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Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
UMA Block Diagram
2 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
USB 2.0 Port
Block Diagram
USB2.0 [3,8]
SATA5
DOCK LAN
DAI
DOCKING PORT
VGA
VGA
LVDS
PI3V713-AZLEXVideo Switch
CRT CONN
1333/1600 MHz
USB5USB4
100MHz
33MHz
W25Q32BVSSIG
64M 4K sector
100MHzPCI Express BUS
USB3.0/2.0
USB3.0/2.0+PS
on IO board
On IO board
PCIE4
LVDS CONN
PCI Express BUS
PCIE x1
HD Audio I/F
WWAN
Combo JackRJ45
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
1/2 Mini Card
WiFi ON/OFF
PCH XDP Port
CPU XDP Port
DC/DC Interface
Memory BUS (DDR3)
LED
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7DDRIII-DIMM X2
KB CONN
LPC BUS1/2 Mini Card
TP CONN
BCM5882
USHSmart Card
Lane x 8
FDI
RFID
16M 4K sector
HDD
SATA Repeater
Parade PS8520B
USB7
E-Module
Dig.
MIC
Trough LVDS Cable
INT.Speaker
ECE5048
PCIE1PCIE3
China TCM1.2
Lane x 4
USB6
PCIE5
92HD90B3HDA Codec
USB10
Trough CableCamera
USB
LAN SWITCH
PI3L720
82579LM
Intel Lewisville
SATA RepeaterPS8511B
PCIE2
TDA8034HN
SSX44B
SATA
E-SATASATA
EXPRESSCard
BT 4.0
Option
SDXC/MMC
OZ600FJ0LN
Card Reader
SPI
To Docking side
SMSC SIO
BGA 2C 1023P
INTEL
DMI2
Ivy Bridge
BGA 989P
Panther POINT-M
BC BUS
Fingerprint
CONN
DAI
DOCK LAN
FP_USB
SMSC KBC
MEC5055
Full Mini CardWLAN/WiFi
HDMI CONN
DPC
DPD
DPB
For MB/DOCK
VGA
PI5USB1457A USB
Power Share
USB3.0
USB3.0
USB3.0 [4]
W25Q64BVSSIGPP
FFS LNG3DM
USH Module
Discrete TPM
AT97SC3204
USB3.0
PS8710B USB3.0 Repeater
PWM FANBC BUS
SMSC
4021
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Index and Config.
3 56Thursday, June 23, 2011
Compal Electronics, Inc.
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MINI CARD-2 WLAN
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
MINI CARD-1 WWAN
POWER STATES
Lane 5
Lane 6
Express card
MMI
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS
+5V_ALW
+5V_RUN
+3.3V_ALW_PCH
+1.5V_MEM
S0
S3
S5 S4/AC don't exist
ON
powerplane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO
+1.05V_M
E3 Module Bay (USB3)
WLAN
WWAN
DOCKING8
9
USH->BIO
10 Express card
11
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
JESATA1 ( right side)
PCH
Lane 7
Lane 8 None
10/100/1G LOM
12
13
+1.05V_M
+1.8V_RUN
+1.05V_RUN_VTT
+3.3V_RUN
+0.75V_DDR_VTT
+1.5V_RUN
+VCC_CORE
+1.05V_RUN
1/2vMINI CARD-3 PCIE
HDD
NA
ODD/ E3 Module Bay
SATA
SATA 0
DESTINATION
NA
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
ESATA
Dock
0
1
BIO
NAUSH
need to update Power Status and PM
Table
MLK DOCK
JMINI3(PP)
JUSB1 (Right side )
JUSB2 (Rear Left side)
Camera
Bluetooth
Dock DP port 2
UMA DP/HDMI Port
Port C
Connetion
Port D
Port B
Dock DP port 1
MB HDMI Conn
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP S3#
SLPS5#
HIGH
Signal
State
SLPS4#
HIGH HIGH
ALWAYSPLANE
ON
MPLANE
ON
SUSPLANE
RUNPLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLPA#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
NA
NA
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Power Rail
4 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pop option
+1.0V_LAN
BATTERY
+PWR_SRC
ADAPTER
FDC654P+BL_PWR_SRC
EN_INVPWR
SI3456BDVSI3456BDV
HD
DC
_E
N
+5V_MOD
MO
DC
_E
N
CHARGER
+3.3V_ALW
RT8205LZQW
+15V_ALW
+5V_ALW
ALWON
SI3456
+3.3V_LAN+3.3V_SUS
RUN_ON
RU
N_O
N
+3.3V_RUN
+5V_HDD
Q21
(Q30)(Q27)
(PU2)
(Q34)
+5V_RUN
TPS22966DPUR
(U78)
+VCC_CORE
MAX17511
(PU9)
+1.5V_MEM +0.75V_DDR_VTT
DD
R_O
N
0.7
5V
_D
DR
_V
TT
_O
N
RT8207MZQW
(PU16)
+1.05V_RUN_VTT +1.05V_M
SIO
_S
LP
_A
#
SU
S_O
N
S13456
(Q54)
1.0
5V
_0.8
V_P
WR
OK
SI3456
+3.3V_M
(Q58)
M_O
N
+3.3V_ALW_PCH
PC
H_A
LW
_O
N
SI3456
(Q49)
+1.5V_RUN
RUN_ON
NTGS4141N
(Q59)
AU
X_O
N
+1.8V_RUN
RU
N_O
N
(PU15)
+3.3V_WLAN
SI3456
(Q38)
AU
X_E
N_W
OW
L
SI4164
(Q63)
+1.05V_RUN
(PU7)
RU
N_O
N
+3.3V_M
Pop option
CP
U_V
TT
_O
N
AO4728
(QC3)
+1.5V_CPU_VDDQ
CPU1.5V_S3_GATE
SY8033BDBCSN1003055
(PU17)
TPS51212DSCR
TPS51461RGER1.05V_VTTPWRGD
(PU13)
+VCC_SA
RT8207MZQW
(PU16)TPS22966DPUR
(U78)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
SMBUS TOPOLOGY
5 56Thursday, June 23, 2011
Compal Electronics, Inc.
MEC 5065
MEM_SMBDATA
MEM_SMBCLK
KBC
C9
H14
+3.3V_ALW_PCH
2.2K
2.2K
200 DIMMA
SMBUS Address [A4]
202
DIMMB
SMBUS Address [A0]
200
202
C8
G12
+3.3V_LAN
2.2K
2.2K
LAN_SMBCLK
LAN_SMBDATA
+3.3V_ALW
129
127
SMBUS Address 2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
2.2K
B4
A3
1A
1A
A4
B5
2.2K
2.2K
LCD_SMBCLK
LCD_SMBDAT1B
1B
1C
1C
B59
A56
+3.3V_ALW2.2K
2.2K
100 ohm
100 ohmBATTERYCONN
7
6 SMBUS Address [0x16]PBAT_SMBCLK
PBAT_SMBDAT
3A
1E
1E
2B
2B
B501G
1GA47
B7
A7
+3.3V_ALW2.2K
2.2K
2D
2D
30
29BAY_SMBDAT
BAY_SMBCLKE3 Module Bay
SMBUS Address [0xd2]
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_SUS2.2K
2.2K
SMBUS Address [C8]LOM
CHARGER_SMBCLK
CHARGER_SMBDAT Charger SMBUS Address [0x12]
SML1_SMBDATA
PCH
SML1_SMBCLK
E14M16
A50
B53
3A
B6A5
+3.3V_ALW_PCH2.2K
2.2K
USH
+3.3V_ALW
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW2.2K
2.2K
53
51SMBUS Address [TBD]XDP1
SMBUS Address [TBD]XDP2
53
51
M9
L9 SMBUS Address [0xa4]
10
9
31
28
G SensorSMBUS Address [3B]
2N7002
2N7002
+3.3V_RUN2.2K
2.2K
14
13
2.2K
2.2K
Express card
7
8 SMBUS Address [TBD]
APR_EC: 0x48 SPR_EC: 0x70 MSLICE_EC: 0x72 USB: 0x59 AUDIO: 0x34 SLICE_BATTERY: 0x17 SLICE_CHARGER: 0x13
SMBUS Address [0x9a]@
@
+3.3V_ALW
WWANSMBUS Address [TBD]32
30
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CRX_PTX_P1DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4
FDI_CTX_PRX_N6FDI_CTX_PRX_N5
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3
FDI_CTX_PRX_P5FDI_CTX_PRX_P4
FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_FSYNC0FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_CTX_PRX_N0
PEG_COMP
EDP_COMP
EDP_COMP
TP_G48
+1.05V_RUN_VTT
+1.05V_RUN_VTT
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_P3<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_N0<16>
DMI_CTX_PRX_N0<16>DMI_CTX_PRX_N1<16>DMI_CTX_PRX_N2<16>DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>DMI_CTX_PRX_P1<16>DMI_CTX_PRX_P2<16>DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N1<16>FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N4<16>FDI_CTX_PRX_N3<16>FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N7<16>FDI_CTX_PRX_N6<16>FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_P2<16>FDI_CTX_PRX_P1<16>FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P5<16>FDI_CTX_PRX_P4<16>FDI_CTX_PRX_P3<16>
FDI_FSYNC0<16>
FDI_LSYNC0<16>
FDI_CTX_PRX_P7<16>FDI_CTX_PRX_P6<16>
FDI_LSYNC1<16>
FDI_FSYNC1<16>
FDI_INT<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (1/6)
6 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PEG Compensation
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
eDP Compensation
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
T23
PAD~D@T23
PAD~D@
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
eDP
U1A
IVY-BRIDGE_BGA1023~D
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
eDP
U1A
IVY-BRIDGE_BGA1023~D
DMI_RX#[0]M2
DMI_RX#[1]P6
DMI_RX#[2]P1
DMI_RX#[3]P10
DMI_RX[0]N3
DMI_RX[1]P7
DMI_RX[2]P3
DMI_RX[3]P11
DMI_TX#[0]K1
DMI_TX#[1]M8
DMI_TX#[2]N4
DMI_TX#[3]R2
DMI_TX[0]K3
DMI_TX[1]M7
DMI_TX[3]T3
DMI_TX[2]P4
FDI0_TX#[0]U7
FDI0_TX#[1]W11
FDI0_TX#[2]W1
FDI0_TX#[3]AA6
FDI1_TX#[0]W6
FDI1_TX#[1]V4
FDI1_TX#[2]Y2
FDI1_TX#[3]AC9
FDI0_TX[0]U6
FDI0_TX[1]W10
FDI0_TX[2]W3
FDI0_TX[3]AA7
FDI1_TX[0]W7
FDI1_TX[1]T4
FDI1_TX[2]AA3
FDI1_TX[3]AC8
FDI0_FSYNCAA11
FDI1_FSYNCAC12
FDI_INTU11
FDI0_LSYNCAA10
FDI1_LSYNCAG8
PEG_ICOMPIG3
PEG_ICOMPOG1
PEG_RCOMPOG4
PEG_RX#[0]H22
PEG_RX#[1]J21
PEG_RX#[2]B22
PEG_RX#[3]D21
PEG_RX#[4]A19
PEG_RX#[5]D17
PEG_RX#[6]B14
PEG_RX#[7]D13
PEG_RX#[8]A11
PEG_RX#[9]B10
PEG_RX#[10]G8
PEG_RX#[11]A8
PEG_RX#[12]B6
PEG_RX#[13]H8
PEG_RX#[14]E5
PEG_RX#[15]K7
PEG_RX[0]K22
PEG_RX[1]K19
PEG_RX[2]C21
PEG_RX[3]D19
PEG_RX[4]C19
PEG_RX[5]D16
PEG_RX[6]C13
PEG_RX[7]D12
PEG_RX[8]C11
PEG_RX[9]C9
PEG_RX[10]F8
PEG_RX[11]C8
PEG_RX[12]C5
PEG_RX[13]H6
PEG_RX[14]F6
PEG_RX[15]K6
PEG_TX#[0]G22
PEG_TX#[1]C23
PEG_TX#[2]D23
PEG_TX#[3]F21
PEG_TX#[4]H19
PEG_TX#[5]C17
PEG_TX#[6]K15
PEG_TX#[7]F17
PEG_TX#[8]F14
PEG_TX#[9]A15
PEG_TX#[10]J14
PEG_TX#[11]H13
PEG_TX#[12]M10
PEG_TX#[13]F10
PEG_TX#[14]D9
PEG_TX#[15]J4
PEG_TX[0]F22
PEG_TX[1]A23
PEG_TX[2]D24
PEG_TX[3]E21
PEG_TX[4]G19
PEG_TX[5]B18
PEG_TX[6]K17
PEG_TX[7]G17
PEG_TX[8]E14
PEG_TX[9]C15
PEG_TX[10]K13
PEG_TX[11]G13
PEG_TX[12]K10
PEG_TX[13]G10
PEG_TX[14]D8
PEG_TX[15]K4
eDP_AUXAF4
eDP_AUX#AG4
eDP_TX[0]AC1
eDP_TX[1]AA4
eDP_TX[2]AE10
eDP_TX[3]AE6
eDP_COMPIOAF3
eDP_HPD#AG11
eDP_ICOMPOAD2
eDP_TX#[0]AC3
eDP_TX#[1]AC4
eDP_TX#[2]AE11
eDP_TX#[3]AE7
RC1
24.9_0402_1%~D
RC1
24.9_0402_1%~D
12
VSS
NCTF
U1I
IVY-BRIDGE_BGA1023~D
VSS
NCTF
U1I
IVY-BRIDGE_BGA1023~D
VSS[181]BG17
VSS[182]BG21
VSS[183]BG24
VSS[184]BG28
VSS[185]BG37
VSS[186]BG41
VSS[187]BG45
VSS[188]BG49
VSS[189]BG53
VSS[190]BG9
VSS[191]C29
VSS[192]C35
VSS[193]C40
VSS[194]D10
VSS[195]D14
VSS[196]D18
VSS[197]D22
VSS[198]D26
VSS[199]D29
VSS[200]D35
VSS[201]D4
VSS[202]D40
VSS[203]D43
VSS[204]D46
VSS[205]D50
VSS[206]D54
VSS[207]D58
VSS[208]D6
VSS[209]E25
VSS[210]E29
VSS[211]E3
VSS[212]E35
VSS[213]E40
VSS[214]F13
VSS[215]F15
VSS[216]F19
VSS[217]F29
VSS[218]F35
VSS[219]F40
VSS[220]F55
VSS[221]G51
VSS[222]G6
VSS[223]G61
VSS[224]H10
VSS[225]H14
VSS[226]H17
VSS[227]H21
VSS[228]H4
VSS[229]H53
VSS[230]H58
VSS[231]J1
VSS[232]J49
VSS[233]J55
VSS[234]K11
VSS[235]K21
VSS[236]K51
VSS[237]K8
VSS[238]L16
VSS[239]L20
VSS[240]L22
VSS[241]L26
VSS[242]L30
VSS[243]L34
VSS[244]L38
VSS[245]L43
VSS[246]L48
VSS[268]P14
VSS[269]P16
VSS[270]P18
VSS[271]P21
VSS[272]P58
VSS[273]P59
VSS[274]P9
VSS[275]R17
VSS[276]R20
VSS[277]R4
VSS[278]R46
VSS[279]T1
VSS[280]T47
VSS[281]T50
VSS[282]T51
VSS[283]T52
VSS[284]T53
VSS[285]T55
VSS[286]T56
VSS[287]U13
VSS[288]U8
VSS[289]V20
VSS[290]V61
VSS_NCTF_1A5
VSS_NCTF_2A57
VSS_NCTF_3BC61
VSS_NCTF_4BD3
VSS_NCTF_5BD59
VSS_NCTF_6BE4
VSS_NCTF_7BE58
VSS_NCTF_8BG5
VSS_NCTF_9BG57
VSS_NCTF_10C3
VSS_NCTF_11C58
VSS_NCTF_12D59
VSS_NCTF_13E1
VSS_NCTF_14E61
VSS[250]M4
VSS[251]M58
VSS[252]M6
VSS[253]N1
VSS[254]N17
VSS[255]N21
VSS[256]N25
VSS[257]N28
VSS[258]N33
VSS[259]N36
VSS[260]N40
VSS[261]N43
VSS[262]N47
VSS[263]N48
VSS[264]N51
VSS[265]N52
VSS[266]N56
VSS[267]N61
VSS[247]L61
VSS[248]M11
VSS[291]W13
VSS[292]W15
VSS[293]W18
VSS[294]W21
VSS[295]W46
VSS[296]W8
VSS[297]Y4
VSS[298]Y47
VSS[299]Y58
VSS[300]Y59
VSS[249]M15
VSS[301]G48
RC2
24.9_0402_1%~D
RC2
24.9_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_HVREF_RST
VCCPWRGOOD_0_R
H_PM_SYNC
H_CATERR#
H_PROCHOT#_R
H_THERMTRIP#_R
PM_DRAM_PWRGD_CPU
VCCPWRGOOD_0_R
H_CATERR#
H_PROCHOT#
H_THERMTRIP#
CPU_DMICPU_DMI#
DDR3_DRAMRST#_CPU
XDP_DBRESET#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_TDI
XDP_PREQ#
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
CLK_XDP_ITP
CLK_XDP_ITP#
SM_RCOMP0
SM_RCOMP2SM_RCOMP1
XDP_TDIXDP_TDI_R
XDP_TDO_R XDP_TDO
PCH_PLTRST#_R
PCH_PLTRST#_R
PCH_PLTRST#_BUF
RUNPWROK_AND PM_DRAM_PWRGD_CPU
CPU_DPLLCPU_DPLL#
XDP_TDI_RXDP_TDO_R
XDP_TRST#
XDP_TCLKXDP_TMS
XDP_PRDY#XDP_PREQ#
SM_RCOMP2SM_RCOMP1SM_RCOMP0
XDP_DBRESET#XDP_DBRESET#_R
XDP_TRST#
XDP_PREQ#
XDP_TDI
CFD_PWRBTN#_XDP
XDP_PRDY#
XDP_TCLK
SYS_PWROK_XDPCLK_XDPCLK_XDP#
XDP_DBRESET#
XDP_HOOK2
XDP_TDO
XDP_RST#_R
XDP_TMS
H_CPUPWRGD_XDPH_CPUPWRGD
BPM#6BPM#7
CLK_XDP_ITP#CLK_XDP_ITP
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_CPU_VDDQ
+3.3V_ALW_PCH
+1.05V_RUN_VTT
+1.05V_RUN_VTT
XDP_DBRESET# <14,16>
DDR3_DRAMRST# <12>
H_THERMTRIP#<22>
H_CPUPWRGD<18>
H_PM_SYNC<16>
CPU_DETECT#<39>
H_PROCHOT#<40,51,53>
CLK_CPU_DMI <15>
PECI_EC<40>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
PCH_PLTRST#<14,17>
DDR_HVREF_RST_GATE<40>
DDR_HVREF_RST_PCH<15>
RUN_ON_CPU1.5VS3#<11,42>
RUNPWROK<39,40>
PM_DRAM_PWRGD<16>
CLK_CPU_DMI# <15>
H_SNB_IVB#<18>
DDR_HVREF_RST <12>
PLTRST_XDP#<17>
CFG0<9>SYS_PWROK<16,39>
SIO_PWRBTN#_R<14,16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (2/6)
7 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place near JXDP1
For ESD concern, please put near CPU
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
place RC129 near CPU 250mils~2530 mils
PU/PD for JTAG signals
Buffered reset to CPU
Open drain buffer
VR1 TOPOLOGY
Follow check list 0.5
M3 control
INTEL suggest RC64 and QC1 NO stuff by default
Max 500mils
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
place RC57 near CPU 300mils ~1530mils
T133 place near T107;T134 pleace near T127
G
D
S
QC1SSM3K7002FU_SC70-3~D
@G
D
S
QC1SSM3K7002FU_SC70-3~D
@2
13
RC47 0_0402_5%~D@RC47 0_0402_5%~D@1 2
RH106 0_0402_5%~DRH106 0_0402_5%~D1 2
RC
42
14
0_
04
02
_1
%~
DR
C4
21
40
_0
40
2_
1%
~D
12
RC44 62_0402_5%~DRC44 62_0402_5%~D1 2
CC
14
00
.1U
_0
40
2_
25
V6
K~
DC
C1
40
0.1
U_
04
02
_2
5V
6K
~D
1
2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@1 2
T129 PAD~D@ T129 PAD~D@
T125 PAD~D@ T125 PAD~D@
RC
45
20
0_
04
02
_1
%~
DR
C4
52
00
_0
40
2_
1%
~D
12
T127 PAD~D@ T127 PAD~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D12
RH108 0_0402_5%~D@RH108 0_0402_5%~D@1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@1 2
CC1770.047U_0402_16V4Z~DCC1770.047U_0402_16V4Z~D
1
2
RC28 130_0402_1%~DRC28 130_0402_1%~D1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D1 2
JXDP1
MOLEX_52435-2671
@JXDP1
MOLEX_52435-2671
@
OBSFN_A01
OBSFN_A12
GND3
OBSDATA_A[0]4
OBSDATA_A[1]5
GND6
OBSDATA_A[2]7
OBSDATA_A[3]8
GND9
HOOK010
HOOK111
HOOK212
HOOK313
HOOK414
HOOK515
VCCOBS_AB16
HOOK617
HOOK718
GND19
TDO20
TRSTn21
TDI22
TMS23
TCK124
GND27
GND28
GND25
TCK026
RC15 0_0402_5%~DRC15 0_0402_5%~D1 2
T134 PAD~D@ T134 PAD~D@
RC1241K_0402_1%~D@RC1241K_0402_1%~D@
12
RC16 1K_0402_5%~DRC16 1K_0402_5%~D1 2
RC4051_0402_1%~D
RC4051_0402_1%~D
12
RC25 0_0402_5%~DRC25 0_0402_5%~D1 2
RC32 51_0402_1%~D@RC32 51_0402_1%~D@ 12
RC8 1K_0402_5%~DRC8 1K_0402_5%~D1 2
RC6439_0402_5%~D
@RC6439_0402_5%~D
@
12
RC26 0_0402_5%~DRC26 0_0402_5%~D12
RC12200_0402_1%~DRC12200_0402_1%~D
12
T126 PAD~D@ T126 PAD~D@
RC29 51_0402_1%~DRC29 51_0402_1%~D12
RC57 56_0402_5%~DRC57 56_0402_5%~D1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D1 2
RC46 0_0402_5%~DRC46 0_0402_5%~D1 2
RC
4
75
_0
40
2_
1%
~D
RC
4
75
_0
40
2_
1%
~D
12
RC
43
25
.5_
04
02
_1
%~
DR
C4
32
5.5
_0
40
2_
1%
~D
12
T131 PAD~D@ T131 PAD~D@T128 PAD~D@ T128 PAD~D@
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
RC4151_0402_1%~D
RC4151_0402_1%~D
12
RC13010K_0402_5%~DRC13010K_0402_5%~D
12
RH107 0_0402_5%~DRH107 0_0402_5%~D1 2
T130 PAD~D@ T130 PAD~D@ T133 PAD~D@ T133 PAD~D@
CC
65
0.1
U_
04
02
_2
5V
6K
~D
CC
65
0.1
U_
04
02
_2
5V
6K
~D
1
2
RC504.99K_0402_1%~D
RC504.99K_0402_1%~D
12
RC13 0_0402_5%~DRC13 0_0402_5%~D1 2
RC27 51_0402_1%~DRC27 51_0402_1%~D12
UC1
SN74LVC1G07DCKR_SC70-5~D
UC1
SN74LVC1G07DCKR_SC70-5~D
NC1
A2
GND3
Y4
VCC5
RC19 1K_0402_1%~DRC19 1K_0402_1%~D12
RC17 1K_0402_5%~DRC17 1K_0402_5%~D1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D1 2
G
DS
QC2BSS138W-7-F_SOT323-3~D
G
DS
QC2BSS138W-7-F_SOT323-3~D2
13
UC2
74AHC1G09GW_TSSOP5~D
UC2
74AHC1G09GW_TSSOP5~D
B1
A2
G3
O4
P5
RC126 56_0402_5%~D@RC126 56_0402_5%~D@1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D1 2
RH109 0_0402_5%~D@RH109 0_0402_5%~D@1 2
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U1B
IVY-BRIDGE_BGA1023~D
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U1B
IVY-BRIDGE_BGA1023~D
SM_RCOMP[1]BE43
SM_RCOMP[2]BG43
SM_DRAMRST#AT30
SM_RCOMP[0]BF44
BCLK#H2
BCLKJ3
DPLL_REF_CLK#AG1
DPLL_REF_CLKAG3
CATERR#C49
PECIA48
PROCHOT#C45
THERMTRIP#D45
SM_DRAMPWROKBE45
RESET#D44
PRDY#N53
PREQ#N55
TCKL56
TMSL55
TRST#J58
TDIM60
TDOL59
DBR#K58
BPM#[0]G58
BPM#[1]E55
BPM#[2]E59
BPM#[3]G55
BPM#[4]G59
BPM#[5]H60
BPM#[6]J59
BPM#[7]J61
PM_SYNCC48
PROC_DETECT#C57
PROC_SELECT#F49
UNCOREPWRGOODB46
BCLK_ITPN59
BCLK_ITP#N58
RC6 0_0402_5%~DRC6 0_0402_5%~D1 2
T107 PAD~D@ T107 PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D59
DDR_A_D31
DDR_A_D9
DDR_A_BS1
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D4
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_D24
DDR_A_D8
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D3
DDR_A_RAS#
DDR_A_D57
DDR_A_D54
DDR_A_D22DDR_A_D21
DDR_A_D6
DDR_A_D23
DDR_A_D7
DDR_A_BS2
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_WE#
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D2
DDR_A_CAS#
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_D60
DDR_A_D5
DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D0
DDR_A_BS0
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D1
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_B_D29
DDR_B_RAS#
DDR_B_D59
DDR_B_D50DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_WE#
DDR_B_BS2
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_CAS#
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_BS1
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_BS0
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA7DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
DDR_A_MA15
DDR_B_MA10DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_MA15
M_CLK_DDR#1
M_CLK_DDR#0
DDR_CS1_DIMMA#DDR_CS0_DIMMA#
M_CLK_DDR0
DDR_CKE0_DIMMA
M_CLK_DDR1
DDR_CKE1_DIMMA
M_ODT1M_ODT0
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#2DDR_A_DQS#1DDR_A_DQS#0
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS1DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS3DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS6
M_CLK_DDR3M_CLK_DDR#3DDR_CKE3_DIMMB
M_CLK_DDR#2M_CLK_DDR2
DDR_CKE2_DIMMB
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
M_ODT2M_ODT3
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS6
DDR_B_DQS0
DDR_A_D[0..63]<12>
DDR_A_BS0<12>DDR_A_BS1<12>DDR_A_BS2<12>
DDR_A_WE#<12>
DDR_A_CAS#<12>DDR_A_RAS#<12>
DDR_B_D[0..63]<13>
DDR_B_BS2<13>DDR_B_BS1<13>
DDR_B_WE#<13>
DDR_B_CAS#<13>DDR_B_RAS#<13>
DDR_B_BS0<13>
DDR_A_MA[0..15] <12>DDR_B_MA[0..15] <13>
M_CLK_DDR#1 <12>
M_CLK_DDR#0 <12>
DDR_CS0_DIMMA# <12>DDR_CS1_DIMMA# <12>
M_CLK_DDR0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
DDR_CKE1_DIMMA <12>
M_ODT0 <12>M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_CKE3_DIMMB <13>M_CLK_DDR#3 <13>M_CLK_DDR3 <13>
DDR_CKE2_DIMMB <13>M_CLK_DDR#2 <13>M_CLK_DDR2 <13>
DDR_CS3_DIMMB# <13>DDR_CS2_DIMMB# <13>
M_ODT3 <13>M_ODT2 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (3/6)
8 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DDR SYSTEM MEMORY B
U1D
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY B
U1D
IVY-BRIDGE_BGA1023~D
SB_CK[0]BA34
SB_CK[1]BA36
SB_CK#[0]AY34
SB_CK#[1]BB36
SB_CKE[0]AR22
SB_CKE[1]BF27
SB_ODT[0]AT43
SB_ODT[1]BG47
SB_DQS[4]BE51
SB_DQS#[4]BG51
SB_DQS[5]BA61
SB_DQS#[5]BA59
SB_DQS[6]AR59
SB_DQS#[6]AT60
SB_DQS[7]AK61
SB_DQS#[7]AK59
SB_DQS[0]AM2
SB_DQS#[0]AL3
SB_DQS[1]AV1
SB_DQS#[1]AV3
SB_DQS[2]BE11
SB_DQS#[2]BG11
SB_DQS[3]BD18
SB_DQS#[3]BD17
SB_MA[0]BF32
SB_MA[1]BE33
SB_MA[2]BD33
SB_MA[3]AU30
SB_MA[4]BD30
SB_MA[5]AV30
SB_MA[6]BG30
SB_MA[7]BD29
SB_MA[8]BE30
SB_MA[9]BE28
SB_MA[10]BD43
SB_MA[11]AT28
SB_MA[12]AV28
SB_MA[13]BD46
SB_MA[14]AT26
SB_MA[15]AU22
SB_DQ[0]AL4
SB_DQ[1]AL1
SB_DQ[2]AN3
SB_DQ[3]AR4
SB_DQ[4]AK4
SB_DQ[5]AK3
SB_DQ[6]AN4
SB_DQ[7]AR1
SB_DQ[8]AU4
SB_DQ[9]AT2
SB_DQ[10]AV4
SB_DQ[11]BA4
SB_DQ[12]AU3
SB_DQ[13]AR3
SB_DQ[14]AY2
SB_DQ[15]BA3
SB_DQ[16]BE9
SB_DQ[17]BD9
SB_DQ[18]BD13
SB_DQ[19]BF12
SB_DQ[20]BF8
SB_DQ[21]BD10
SB_DQ[22]BD14
SB_DQ[23]BE13
SB_DQ[24]BF16
SB_DQ[25]BE17
SB_DQ[26]BE18
SB_DQ[27]BE21
SB_DQ[28]BE14
SB_DQ[29]BG14
SB_DQ[30]BG18
SB_DQ[31]BF19
SB_DQ[32]BD50
SB_DQ[33]BF48
SB_DQ[34]BD53
SB_DQ[35]BF52
SB_DQ[36]BD49
SB_DQ[37]BE49
SB_DQ[38]BD54
SB_DQ[39]BE53
SB_DQ[40]BF56
SB_DQ[41]BE57
SB_DQ[42]BC59
SB_DQ[43]AY60
SB_DQ[44]BE54
SB_DQ[45]BG54
SB_DQ[46]BA58
SB_DQ[47]AW59
SB_DQ[48]AW58
SB_DQ[49]AU58
SB_DQ[50]AN61
SB_DQ[51]AN59
SB_DQ[52]AU59
SB_DQ[53]AU61
SB_DQ[54]AN58
SB_DQ[55]AR58
SB_DQ[56]AK58
SB_DQ[57]AL58
SB_DQ[58]AG58
SB_DQ[59]AG59
SB_DQ[60]AM60
SB_DQ[61]AL59
SB_DQ[62]AF61
SB_DQ[63]AH60
SB_CS#[0]BE41
SB_CS#[1]BE47
SB_CAS#AV43
SB_RAS#BF40
SB_WE#BD45
SB_BS[0]BG39
SB_BS[1]BD42
SB_BS[2]AT22
DDR SYSTEM MEMORY A
U1C
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY A
U1C
IVY-BRIDGE_BGA1023~D
SA_CK[0]AU36
SA_CK[1]AT40
SA_CK#[0]AV36
SA_CK#[1]AU40
SA_CKE[0]AY26
SA_CKE[1]BB26
SA_CS#[0]BB40
SA_CS#[1]BC41
SA_ODT[0]AY40
SA_ODT[1]BA41
SA_DQS[0]AJ11
SA_DQS#[0]AL11
SA_DQS[1]AR10
SA_DQS#[1]AR8
SA_DQS[2]AY11
SA_DQS#[2]AV11
SA_DQS[3]AU17
SA_DQS[4]AW45
SA_DQS#[4]AV45
SA_DQS[5]AV51
SA_DQS#[5]AY51
SA_DQS[6]AT56
SA_DQS#[6]AT55
SA_DQS[7]AK54
SA_DQS#[7]AK55
SA_MA[0]BG35
SA_MA[1]BB34
SA_MA[2]BE35
SA_MA[3]BD35
SA_MA[4]AT34
SA_MA[5]AU34
SA_MA[6]BB32
SA_MA[7]AT32
SA_MA[8]AY32
SA_MA[9]AV32
SA_MA[10]BE37
SA_MA[11]BA30
SA_MA[12]BC30
SA_MA[13]AW41
SA_MA[14]AY28
SA_MA[15]AU26
SA_DQ[0]AG6
SA_DQ[1]AJ6
SA_DQ[2]AP11
SA_DQ[3]AL6
SA_DQ[4]AJ10
SA_DQ[5]AJ8
SA_DQ[6]AL8
SA_DQ[7]AL7
SA_DQ[8]AR11
SA_DQ[9]AP6
SA_DQ[10]AU6
SA_DQ[11]AV9
SA_DQ[12]AR6
SA_DQ[13]AP8
SA_DQ[14]AT13
SA_DQ[15]AU13
SA_DQ[16]BC7
SA_DQ[17]BB7
SA_DQ[18]BA13
SA_DQ[19]BB11
SA_DQ[20]BA7
SA_DQ[21]BA9
SA_DQ[22]BB9
SA_DQ[23]AY13
SA_DQ[24]AV14
SA_DQ[25]AR14
SA_DQ[26]AY17
SA_DQ[27]AR19
SA_DQ[28]BA14
SA_DQ[29]AU14
SA_DQ[30]BB14
SA_DQ[31]BB17
SA_DQ[32]BA45
SA_DQ[33]AR43
SA_DQ[34]AW48
SA_DQ[35]BC48
SA_DQ[36]BC45
SA_DQ[37]AR45
SA_DQ[38]AT48
SA_DQ[39]AY48
SA_DQ[40]BA49
SA_DQ[41]AV49
SA_DQ[42]BB51
SA_DQ[43]AY53
SA_DQ[44]BB49
SA_DQ[45]AU49
SA_DQ[46]BA53
SA_DQ[47]BB55
SA_DQ[48]BA55
SA_DQ[49]AV56
SA_DQ[50]AP50
SA_DQ[51]AP53
SA_DQ[52]AV54
SA_DQ[53]AT54
SA_DQ[54]AP56
SA_DQ[55]AP52
SA_DQ[56]AN57
SA_DQ[57]AN53
SA_DQ[58]AG56
SA_DQ[59]AG53
SA_DQ[60]AN55
SA_DQ[61]AN52
SA_DQ[62]AG55
SA_DQ[63]AK56
SA_CAS#BE39
SA_RAS#BD39
SA_WE#AT41
SA_BS[0]BD37
SA_BS[1]BF36
SA_BS[2]BA28
SA_DQS#[3]AT17
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
CFG2
CFG7
TP_DC_TEST_BD1
DC_TEST_BE59_BE61
TP_DC_TEST_D1
TP_DC_TEST_BG58TP_DC_TEST_BG4
DC_TEST_A59_C59
DC_TEST_C4_D3
DC_TEST_BE1_BG1
TP_DC_TEST_D61
TP_DC_TEST_A4
TP_DC_TEST_BD61
DC_TEST_BG59_BG61
TP_DC_TEST_A58
DC_TEST_BE3_BG3
DC_TEST_A61_C61
VAXG_VAL_SENSEVSSAXG_VAL_SENSE
TP_VCC_DIESENSE
CFG0
CFG14CFG15CFG16CFG17
CFG12
CFG10CFG11
CFG13
CFG1CFG2CFG3CFG4CFG5CFG6CFG7CFG8CFG9
VCC_VAL_SNESEVSS_VAL_SNESE
+DIMM0_1_CA_CPU
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU+DIMM0_1_VREF_CPUVAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
+VCC_CORE
+VCC_GFXCORE
+DIMM0_1_VREF_CPU+DIMM0_1_CA_CPU
CFG0<7>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (4/6)
9 56Thursday, June 23, 2011
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediatelyfollowing xxRESETB de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device isconnected to the Embedded Display Port
1 : Disabled; No Physical Display Portattached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1:(Default) Normal Operation; Lane #definition matches socket pin map definition
EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
T120 PAD~D@ T120 PAD~D@
RC71
100_0402_1%~D
@RC71
100_0402_1%~D
@
12
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@1 2
T19 PAD~D@T19 PAD~D@
T14 PAD~D@T14 PAD~D@
T123 PAD~D@ T123 PAD~D@
RC53
1K_0402_1%~D
@ RC53
1K_0402_1%~D
@
12
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@1 2
T17 PAD~D@T17 PAD~D@T18 PAD~D@T18 PAD~D@
T119 PAD~D@ T119 PAD~D@
T15 PAD~D@T15 PAD~D@
RC541K_0402_1%~D
@ RC541K_0402_1%~D
@
12
RC69
100_0402_1%~D
@RC69
100_0402_1%~D
@
12
T118 PAD~D@ T118 PAD~D@
T12 PAD~D@T12 PAD~D@
T124 PAD~D@ T124 PAD~D@
T16 PAD~D@T16 PAD~D@
T22PAD~D @T22PAD~D @
RC56
1K_0402_1%~D
@ RC56
1K_0402_1%~D
@
12
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@1 2
T9 PAD~D@T9 PAD~D@
RESERVED
U1E
IVY-BRIDGE_BGA1023~D
RESERVED
U1E
IVY-BRIDGE_BGA1023~D
CFG[0]B50
CFG[1]C51
CFG[2]B54
CFG[3]D53
CFG[4]A51
CFG[5]C53
CFG[6]C55
CFG[7]H49
CFG[8]A55
CFG[9]H51
CFG[10]K49
CFG[11]K53
CFG[12]F53
CFG[13]G53
CFG[14]L51
CFG[15]F51
CFG[16]D52
CFG[17]L53
DC_TEST_A4A4
DC_TEST_A58A58
DC_TEST_A59A59
DC_TEST_A61A61
DC_TEST_BD1BD1
DC_TEST_BD61BD61
DC_TEST_BE1BE1
DC_TEST_BE3BE3
DC_TEST_BE59BE59
DC_TEST_BE61BE61
DC_TEST_BG1BG1
DC_TEST_BG3BG3
DC_TEST_BG4BG4
DC_TEST_BG58BG58
DC_TEST_BG59BG59
DC_TEST_BG61BG61
DC_TEST_C4C4
DC_TEST_C59C59
DC_TEST_C61C61
DC_TEST_D1D1
DC_TEST_D3D3
DC_TEST_D61D61
VCC_VAL_SENSEH43
VSS_VAL_SENSEK43
VAXG_VAL_SENSEH45
VSSAXG_VAL_SENSEK45
VCC_DIE_SENSEF48
RSVD41AH2
RSVD42AG13
RSVD43AM14
RSVD44AM15
RSVD8BA19
RSVD9AV19
RSVD10AT21
RSVD11BB21
RSVD12BB19
RSVD13AY21
RSVD14BA22
RSVD15AY22
RSVD16AU19
RSVD17AU21
RSVD18BD21
RSVD19BD22
RSVD20BD25
RSVD21BD26
RSVD22BG22
RSVD23BE22
RSVD24BG26
RSVD25BE26
RSVD26BF23
RSVD27BE24
RSVD45N50
RSVD30N42
RSVD31L42
RSVD32L45
RSVD33L47
RSVD34M13
RSVD35M14
RSVD36U14
RSVD37W14
RSVD38P13
RSVD39AT49
RSVD40K24
RSVD6H48
RSVD7K48
RSVD28BE7
RSVD29BG7
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@1 2
T121 PAD~D@ T121 PAD~D@
T10 PAD~D@T10 PAD~D@
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@1 2
T122 PAD~D@ T122 PAD~D@
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@1 2
T132 PAD~D@ T132 PAD~D@
RC51
1K_0402_1%~D
@ RC51
1K_0402_1%~D
@
12
T13 PAD~D@T13 PAD~D@
T11 PAD~D@T11 PAD~D@
RC52
1K_0402_1%~D
@ RC52
1K_0402_1%~D
@
12
T20 PAD~D@T20 PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDALRT#
VCCSENSE_RVSSSENSE_R
VIDSOUT
H_CPU_SVIDALRT#VIDSCLK
+VCC_CORE
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+1.05V_RUN_VTT
VSSSENSE <51>VCCSENSE <51>
VIDALERT_N <51>
VTT_SENSE <50>
VIDSCLK <51>VIDSOUT <51>
VTT_GND <50>
VCCP_PWRCTRL <50>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Sandy Bridge (5/6)
10 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CPU Power Rail Table
1.5
0.65-0.9
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
Voltage Rail
0.65-1.3
1.05/1
1.8
53
8.5
33
1.2
12-16
6
0.0-1.1
VoltageS0 Iccmax
Current (A)
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
*
* Description
5
+1.5V_MEM 1.5
Iccmax current changed for PDDG Rev0.7
Note: Place the PU resistors close to CPU
RC61 close to CPU 300 - 1500mils
CAD Note: Place the PU
resistors close to CPU
RC63 close to CPU 300 - 1500mils
DELL CONFIDENTIAL/PROPRIETARY
Place RC66, RC70 ,RC133near CPU
53A
8.5A
H_CPU_SVIDALRT# must be routed between theVIDSOUT and VIDSCLK lines to reduce crosstalk. 18 mils spacing to others.
RC70
100_0402_1%~D
RC70
100_0402_1%~D
12
RC75100_0402_1%~D
@RC75100_0402_1%~D
@
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D1 2
RC98 10_0402_1%~DRC98 10_0402_1%~D12
RC140 0_0402_5%~DRC140 0_0402_5%~D1 2
CC
57
31
U_
04
02
_6
.3V
6K
~D
CC
57
31
U_
04
02
_6
.3V
6K
~D
1
2
RC6075_0402_1%~DRC6075_0402_1%~D
12
RC66
100_0402_1%~D
RC66
100_0402_1%~D
12
RC63130_0402_1%~DRC63130_0402_1%~D
12
RC68 0_0402_5%~DRC68 0_0402_5%~D1 2
RC141
10K_0402_5%~D
@RC141
10K_0402_5%~D
@
12
RC67 0_0402_5%~DRC67 0_0402_5%~D1 2
RC133 10_0402_1%~DRC133 10_0402_1%~D1 2
POWER
CORE SUPPLY
PEG IO AND DDR IO
SENSE LINES
SVID
QUIET
RAILS
U1F
IVY-BRIDGE_BGA1023~D
POWER
CORE SUPPLY
PEG IO AND DDR IO
SENSE LINES
SVID
QUIET
RAILS
U1F
IVY-BRIDGE_BGA1023~D
VCC_SENSEF43
VSS_SENSEG43
VIDALERT#A44
VIDSCLKB43
VIDSOUTC44
VSS_SENSE_VCCIOAN17
VCC[1]A26
VCC[2]A29
VCC[3]A31
VCC[4]A34
VCC[5]A35
VCC[6]A38
VCC[7]A39
VCC[8]A42
VCC[9]C26
VCC[10]C27
VCC[11]C32
VCC[12]C34
VCC[13]C37
VCC[14]C39
VCC[15]C42
VCC[16]D27
VCC[17]D32
VCC[18]D34
VCC[19]D37
VCC[20]D39
VCC[21]D42
VCC[22]E26
VCC[23]E28
VCC[24]E32
VCC[25]E34
VCC[26]E37
VCC[27]E38
VCC[28]F25
VCC[29]F26
VCC[30]F28
VCC[31]F32
VCC[32]F34
VCC[33]F37
VCC[34]F38
VCC[35]F42
VCC[36]G42
VCC[37]H25
VCC[38]H26
VCC[39]H28
VCC[40]H29
VCC[41]H32
VCC[42]H34
VCC[43]H35
VCC[44]H37
VCC[45]H38
VCC[46]H40
VCC[47]J25
VCC[48]J26
VCC[49]J28
VCC[50]J29
VCC[51]J32
VCC[52]J34
VCC[53]J35
VCC[54]J37
VCC[55]J38
VCC[56]J40
VCC[57]J42
VCC[58]K26
VCC[59]K27
VCC[60]K29
VCC[61]K32
VCC[62]K34
VCC[63]K35
VCC[64]K37
VCC[66]K39
VCC[67]K42
VCC[68]L25
VCC[69]L28
VCC[70]L33
VCC[71]L36
VCC[72]L40
VCC[73]N26
VCC[74]N30
VCC[75]N34
VCC[76]N38
VCCIO[1]AF46
VCCIO[3]AG48
VCCIO[4]AG50
VCCIO[5]AG51
VCCIO[6]AJ17
VCCIO[7]AJ21
VCCIO[8]AJ25
VCCIO[9]AJ43
VCCIO[10]AJ47
VCCIO[11]AK50
VCCIO[12]AK51
VCCIO[13]AL14
VCCIO[14]AL15
VCCIO[15]AL16
VCCIO[16]AL20
VCCIO[17]AL22
VCCIO[18]AL26
VCCIO[19]AL45
VCCIO[20]AL48
VCCIO[21]AM16
VCCIO[22]AM17
VCCIO[23]AM21
VCCIO[24]AM43
VCCIO[25]AM47
VCCIO[26]AN20
VCCIO[27]AN42
VCCIO[28]AN45
VCCIO[29]AN48
VCCIO[30]AA14
VCCIO[31]AA15
VCCIO[32]AB17
VCCIO[33]AB20
VCCIO[34]AC13
VCCIO[35]AD16
VCCIO[36]AD18
VCCIO[37]AD21
VCCIO[38]AE14
VCCIO[39]AE15
VCCIO[40]AF16
VCCIO[41]AF18
VCCIO[42]AF20
VCCIO[43]AG15
VCCIO[44]AG16
VCCIO[45]AG17
VCCIO[46]AG20
VCCIO[47]AG21
VCCIO[48]AJ14
VCCIO[49]AJ15
VCCIO50W16
VCCIO51W17
VCCPQE[1]AM25
VCCPQE[2]AN22
VCCIO_SENSEAN16
VCCIO_SELBC22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_CPU1.5VS3
+V_SM_VREF_CNT
+1.8V_RUN
+VCC_GFXCORE
+1.5V_MEM
+1.5V_CPU_VDDQ
+1.5V_CPU_VDDQ
+VCC_SA
+1.5V_CPU_VDDQ
+1.5V_MEM +1.5V_CPU_VDDQ+3.3V_ALW2 +PWR_SRC_S
+V_SM_VREF_CNT
+1.5V_CPU_VDDQ
+VCC_GFXCORE
VCC_AXG_SENSE<51>VSS_AXG_SENSE<51>
VCCSA_VID_1 <54>VCCSA_VID_0 <54>
+VCCSA_SENSE <54>
CPU1.5V_S3_GATE<40>
RUN_ON_CPU1.5VS3# <7,42>
SIO_SLP_S3#<16,27,35,39,42,48>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Sandy Bridge (6/6)
11 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
6A
+V_SM_VREF should
have 20 mil trace width
5A
1.2A
33A
+1.5V_CPU_VDDQ Source
RC
84
1K
_0
40
2_
1%
~D
RC
84
1K
_0
40
2_
1%
~D
12
CC
18
01
0U
_0
60
3_
6.3
V6
M~
DC
C1
80
10
U_
06
03
_6
.3V
6M
~D
1
2
RC76100_0402_1%~D
@RC76100_0402_1%~D
@
1 2
CC
25
81
U_
04
02
_6
.3V
6K
~D
CC
25
81
U_
04
02
_6
.3V
6K
~D
1
2
CC
17
51
U_
04
02
_6
.3V
6K
~D
CC
17
51
U_
04
02
_6
.3V
6K
~D
1
2
RC138 0_0402_5%~DRC138 0_0402_5%~D1 2
RC74100K_0402_5%~DRC74100K_0402_5%~D
12
CC
18
11
0U
_0
60
3_
6.3
V6
M~
DC
C1
81
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
16
11
0U
_0
60
3_
6.3
V6
M~
DC
C1
61
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
26
41
U_
04
02
_6
.3V
6K
~D
CC
26
41
U_
04
02
_6
.3V
6K
~D
1
2
CC
25
01
U_
04
02
_6
.3V
6K
~D
CC
25
01
U_
04
02
_6
.3V
6K
~D
1
2
QC4A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
QC4A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
61
2
CC
16
51
0U
_0
60
3_
6.3
V6
M~
DC
C1
65
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
25
21
U_
04
02
_6
.3V
6K
~D
CC
25
21
U_
04
02
_6
.3V
6K
~D
1
2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@1 2
CC
16
21
0U
_0
60
3_
6.3
V6
M~
DC
C1
62
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
18
3
10
U_
06
03
_6
.3V
6M
~D
CC
18
3
10
U_
06
03
_6
.3V
6M
~D
1
2
RC
14
33
30
K_
04
02
_1
%~
DR
C1
43
33
0K
_0
40
2_
1%
~D
12
CC
16
31
0U
_0
60
3_
6.3
V6
M~
DC
C1
63
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
25
41
U_
04
02
_6
.3V
6K
~D
CC
25
41
U_
04
02
_6
.3V
6K
~D
1
2
CC
13
51
0U
_0
60
3_
6.3
V6
M~
DC
C1
35
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
16
61
0U
_0
60
3_
6.3
V6
M~
DC
C1
66
10
U_
06
03
_6
.3V
6M
~D
1
2
+
CC
17
6
33
0U
_D
2_
2.5
VM
_R
6M
~D
+
CC
17
6
33
0U
_D
2_
2.5
VM
_R
6M
~D
1
2
QC
4B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
C4
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
CC
25
51
U_
04
02
_6
.3V
6K
~D
CC
25
51
U_
04
02
_6
.3V
6K
~D
1
2
VSS
U1H
IVY-BRIDGE_BGA1023~D
VSS
U1H
IVY-BRIDGE_BGA1023~D
VSS[1]A13
VSS[2]A17
VSS[3]A21
VSS[4]A25
VSS[5]A28
VSS[6]A33
VSS[7]A37
VSS[8]A40
VSS[9]A45
VSS[10]A49
VSS[11]A53
VSS[12]A9
VSS[13]AA1
VSS[14]AA13
VSS[15]AA50
VSS[16]AA51
VSS[17]AA52
VSS[18]AA53
VSS[19]AA55
VSS[20]AA56
VSS[21]AA8
VSS[22]AB16
VSS[23]AB18
VSS[24]AB21
VSS[25]AB48
VSS[26]AB61
VSS[27]AC10
VSS[28]AC14
VSS[29]AC46
VSS[30]AC6
VSS[31]AD17
VSS[32]AD20
VSS[33]AD4
VSS[34]AD61
VSS[35]AE13
VSS[36]AE8
VSS[37]AF1
VSS[38]AF17
VSS[39]AF21
VSS[40]AF47
VSS[41]AF48
VSS[42]AF50
VSS[43]AF51
VSS[44]AF52
VSS[45]AF53
VSS[46]AF55
VSS[47]AF56
VSS[48]AF58
VSS[49]AF59
VSS[50]AG10
VSS[51]AG14
VSS[52]AG18
VSS[53]AG47
VSS[54]AG52
VSS[55]AG61
VSS[56]AG7
VSS[57]AH4
VSS[58]AH58
VSS[59]AJ13
VSS[60]AJ16
VSS[61]AJ20
VSS[62]AJ22
VSS[63]AJ26
VSS[64]AJ30
VSS[65]AJ34
VSS[66]AJ38
VSS[67]AJ42
VSS[68]AJ45
VSS[69]AJ48
VSS[70]AJ7
VSS[71]AK1
VSS[72]AK52
VSS[73]AL10
VSS[74]AL13
VSS[75]AL17
VSS[76]AL21
VSS[77]AL25
VSS[78]AL28
VSS[79]AL33
VSS[80]AL36
VSS[81]AL40
VSS[82]AL43
VSS[83]AL47
VSS[84]AL61
VSS[85]AM13
VSS[86]AM20
VSS[87]AM22
VSS[88]AM26
VSS[89]AM30
VSS[90]AM34
VSS[91]AM38
VSS[92]AM4
VSS[93]AM42
VSS[94]AM45
VSS[95]AM48
VSS[96]AM58
VSS[97]AN1
VSS[98]AN21
VSS[99]AN25
VSS[100]AN28
VSS[101]AN33
VSS[102]AN36
VSS[103]AN40
VSS[104]AN43
VSS[105]AN47
VSS[106]AN50
VSS[107]AN54
VSS[108]AP10
VSS[109]AP51
VSS[110]AP55
VSS[111]AP7
VSS[112]AR13
VSS[113]AR17
VSS[114]AR21
VSS[115]AR41
VSS[116]AR48
VSS[117]AR61
VSS[118]AR7
VSS[119]AT14
VSS[120]AT19
VSS[121]AT36
VSS[122]AT4
VSS[123]AT45
VSS[124]AT52
VSS[125]AT58
VSS[126]AU1
VSS[127]AU11
VSS[128]AU28
VSS[129]AU32
VSS[130]AU51
VSS[131]AU7
VSS[132]AV17
VSS[133]AV21
VSS[134]AV22
VSS[135]AV34
VSS[136]AV40
VSS[137]AV48
VSS[138]AV55
VSS[139]AW13
VSS[140]AW43
VSS[141]AW61
VSS[142]AW7
VSS[143]AY14
VSS[144]AY19
VSS[145]AY30
VSS[146]AY36
VSS[147]AY4
VSS[148]AY41
VSS[149]AY45
VSS[150]AY49
VSS[151]AY55
VSS[152]AY58
VSS[153]AY9
VSS[154]BA1
VSS[155]BA11
VSS[156]BA17
VSS[157]BA21
VSS[158]BA26
VSS[159]BA32
VSS[160]BA48
VSS[161]BA51
VSS[162]BB53
VSS[163]BC13
VSS[164]BC5
VSS[165]BC57
VSS[166]BD12
VSS[167]BD16
VSS[168]BD19
VSS[169]BD23
VSS[170]BD27
VSS[171]BD32
VSS[172]BD36
VSS[173]BD40
VSS[174]BD44
VSS[175]BD48
VSS[176]BD52
VSS[177]BD56
VSS[178]BD8
VSS[179]BE5
VSS[180]BG13
POWER
GRAPHICS
DDR3 - 1.5V RAILS
1.8V RAIL
SENSE
LINES
SA RAIL
SENSE LINES
QUIET RAILS
VREF
VCCSA VID
lines
U1G
IVY-BRIDGE_BGA1023~D
POWER
GRAPHICS
DDR3 - 1.5V RAILS
1.8V RAIL
SENSE
LINES
SA RAIL
SENSE LINES
QUIET RAILS
VREF
VCCSA VID
lines
U1G
IVY-BRIDGE_BGA1023~D
SM_VREFAY43
VAXG[1]AA46
VAXG[2]AB47
VAXG[3]AB50
VAXG[4]AB51
VAXG[5]AB52
VAXG[6]AB53
VAXG[7]AB55
VAXG[8]AB56
VAXG[9]AB58
VAXG[10]AB59
VAXG[11]AC61
VAXG[12]AD47
VAXG[13]AD48
VAXG[14]AD50
VAXG[15]AD51
VAXG[16]AD52
VAXG[17]AD53
VAXG[18]AD55
VAXG[19]AD56
VAXG[20]AD58
VAXG[21]AD59
VAXG[22]AE46
VAXG[23]N45
VAXG[24]P47
VAXG[25]P48
VAXG[26]P50
VAXG[27]P51
VAXG[28]P52
VAXG[29]P53
VAXG[30]P55
VAXG[31]P56
VAXG[32]P61
VAXG[33]T48
VAXG[34]T58
VAXG[35]T59
VAXG[36]T61
VAXG[37]U46
VAXG[38]V47
VAXG[39]V48
VAXG[40]V50
VAXG[41]V51
VAXG[42]V52
VAXG[43]V53
VAXG[44]V55
VAXG[45]V56
VAXG[46]V58
VAXG[47]V59
VAXG[48]W50
VAXG[49]W51
VAXG[50]W52
VAXG[51]W53
VAXG[52]W55
VAXG[53]W56
VAXG[54]W61
VDDQ[11]AM40
VDDQ[12]AN30
VDDQ[13]AN34
VDDQ[14]AN38
VDDQ[15]AR26
VDDQ[1]AJ28
VDDQ[2]AJ33
VDDQ[3]AJ36
VDDQ[4]AJ40
VDDQ[5]AL30
VDDQ[6]AL34
VDDQ[7]AL38
VDDQ[8]AL42
VDDQ[9]AM33
VDDQ[10]AM36
VCCPLL[1]BB3
VCCPLL[2]BC1
VCCSA_SENSEU10
VCCSA_VID[1]D49
VAXG[55]Y48
VAXG[56]Y61
VCCPLL[3]BC4
VAXG_SENSEF45
VSSAXG_SENSEG45
VCCSA[1]L17
VCCSA[10]R21
VCCSA[12]V16
VCCSA[13]V17
VCCSA[14]V18
VCCSA[4]N20
VCCSA[5]N22
VCCSA[6]P17
VCCSA[9]R18
VDDQ[16]AR28
VDDQ[17]AR30
VDDQ[18]AR32
VDDQ[19]AR34
VDDQ[20]AR36
VDDQ[21]AR40
VDDQ[22]AV41
VDDQ[23]AW26
VDDQ[24]BA40
VDDQ[25]BB28
VDDQ[26]BG33
VCCSA[11]U15
VCCSA[15]V21
VCCSA[16]W20
VCCSA[2]L21
VCCSA[3]N16
VCCDQ[1]AM28
VCCDQ[2]AN26
VCCSA[7]P20
VCCSA[8]R16
VDDQ_SENSEBC43
VSS_SENSE_VDDQBA43
VCCSA_VID[0]D48
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D12
CC
16
41
0U
_0
60
3_
6.3
V6
M~
DC
C1
64
10
U_
06
03
_6
.3V
6M
~D
1
2C
C2
56
1U
_0
40
2_
6.3
V6
K~
DC
C2
56
1U
_0
40
2_
6.3
V6
K~
D
1
2
RC82 0_0402_5%~DRC82 0_0402_5%~D1 2
CC
17
41
U_
04
02
_6
.3V
6K
~D
CC
17
41
U_
04
02
_6
.3V
6K
~D
1
2
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D12
CC
17
1
10
U_
06
03
_6
.3V
6M
~D
CC
17
1
10
U_
06
03
_6
.3V
6M
~D
1
2
RC72100K_0402_5%~DRC72100K_0402_5%~D
12
CC
25
31
U_
04
02
_6
.3V
6K
~D
CC
25
31
U_
04
02
_6
.3V
6K
~D
1
2
+
CC
16
7
33
0U
_D
2_
2V
M_
R6
M~
D
+
CC
16
7
33
0U
_D
2_
2V
M_
R6
M~
D
1
2
RC100
100_0402_1%~D
RC100
100_0402_1%~D
12
RC99
100_0402_1%~D
RC99
100_0402_1%~D
12
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D12
QC3AO4728L_SO8~D
QC3AO4728L_SO8~D
4
78
65
123
CC
16
8
10
U_
06
03
_6
.3V
6M
~D
CC
16
8
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
25
11
U_
04
02
_6
.3V
6K
~D
CC
25
11
U_
04
02
_6
.3V
6K
~D
1
2
CC
26
31
U_
04
02
_6
.3V
6K
~D
CC
26
31
U_
04
02
_6
.3V
6K
~D
1
2
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D12
CC
25
71
U_
04
02
_6
.3V
6K
~D
CC
25
71
U_
04
02
_6
.3V
6K
~D
1
2
CC
17
0
10
U_
06
03
_6
.3V
6M
~D
CC
17
0
10
U_
06
03
_6
.3V
6M
~D
1
2
RC
73
20
K_
04
02
_5
%~
D
@RC
73
20
K_
04
02
_5
%~
D
@12
CC
26
21
U_
04
02
_6
.3V
6K
~D
CC
26
21
U_
04
02
_6
.3V
6K
~D
1
2
CC
26
11
U_
04
02
_6
.3V
6K
~D
CC
26
11
U_
04
02
_6
.3V
6K
~D
1
2
CC
16
9
10
U_
06
03
_6
.3V
6M
~D
CC
16
9
10
U_
06
03
_6
.3V
6M
~D
1
2
CC
57
41
U_
04
02
_6
.3V
6K
~D
CC
57
41
U_
04
02
_6
.3V
6K
~D
1
2
CC
25
91
U_
04
02
_6
.3V
6K
~D
CC
25
91
U_
04
02
_6
.3V
6K
~D
1
2
RC
78
1K
_0
40
2_
1%
~D
RC
78
1K
_0
40
2_
1%
~D
12
RC139 0_0402_5%~DRC139 0_0402_5%~D
1 2
+
CC
17
23
30
U_
D2
_2
VM
_R
6M
~D
+
CC
17
23
30
U_
D2
_2
VM
_R
6M
~D
1
2
CC
26
01
U_
04
02
_6
.3V
6K
~D
CC
26
01
U_
04
02
_6
.3V
6K
~D
1
2C
C1
36
0.1
U_
06
03
_5
0V
7K
~D
CC
13
60
.1U
_0
60
3_
50
V7
K~
D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D18DDR_A_D19
DDR_A_D21
DDR_A_D26DDR_A_D27
DDR_A_D28DDR_A_D29
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D36DDR_A_D37
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_MA2DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_BS0DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0M_CLK_DDR#0
M_CLK_DDR1M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#M_ODT0
M_ODT1
DDR_A_D63
DDR_A_MA15
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D33
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D48
DDR3_DRAMRST#_RDDR3_DRAMRST#_R
DDR_HVREF_RST
DDR_HVREF_RST
+0.75V_DDR_VTT
+1.5V_MEM
+1.5V_MEM+1.5V_MEM
+3.3V_RUN
+0.75V_DDR_VTT+0.75V_DDR_VTT
+DIMM1_VREF_CA
+1.5V_MEM
+V_DDR_REF
+1.5V_MEM
+DIMM1_VREF_DQ
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+V_DDR_REFA_M3
+V_DDR_REFB_M3
+V_DDR_REFA_M3
+V_DDR_REF
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>DDR_A_CAS#<8>
DDR_A_BS0<8>
DDR_A_BS1 <8>
M_ODT0 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
M_CLK_DDR0<8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
M_ODT1 <8>
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
DDR_XDP_WAN_SMBCLK <13,15,27,34>DDR_XDP_WAN_SMBDAT <13,15,27,34>
DDR_HVREF_RST<7>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT1
12 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place near JDIMM1
Layout Note:Place near JDIMM1.203,204
Populate RD1, De-Populate RD7 for Intel DDR3VREFDQ multiple methods M1Populate RD7, De-Populate RD1 for Intel DDR3VREFDQ multiple methods M3
JDIMM1 H=4
Note:Check voltage tolerance of VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
CD
16
0.1
U_
04
02
_2
5V
6K
~D
CD
16
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
18
1U
_0
40
2_
6.3
V6
K~
DC
D1
81
U_
04
02
_6
.3V
6K
~D
1
2
CD
13
10
U_
06
03
_6
.3V
6M
~D
@C
D1
3
10
U_
06
03
_6
.3V
6M
~D
@
1
2
RD271K_0402_1%~DRD271K_0402_1%~D
12
CD
19
1U
_0
40
2_
6.3
V6
K~
DC
D1
91
U_
04
02
_6
.3V
6K
~D
1
2
JDIMM1
TYCO_2-2013022-2~D
JDIMM1
TYCO_2-2013022-2~D
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND1206
+
CD
14
33
0U
_S
X_
2V
Y~
D
+
CD
14
33
0U
_S
X_
2V
Y~
D
1
2
CD
7
10
U_
06
03
_6
.3V
6M
~D
CD
7
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
17
1U
_0
40
2_
6.3
V6
K~
DC
D1
71
U_
04
02
_6
.3V
6K
~D
1
2
CD
21
0.1
U_
04
02
_2
5V
6K
~D
CD
21
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
51
10
U_
06
03
_6
.3V
6M
~D
CD
51
10
U_
06
03
_6
.3V
6M
~D
1
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D1 2
CD
8
10
U_
06
03
_6
.3V
6M
~D
CD
8
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
22
2.2
U_
06
03
_6
.3V
6K
~D
CD
22
2.2
U_
06
03
_6
.3V
6K
~D
1
2
CD
12
.2U
_0
60
3_
6.3
V6
K~
DC
D1
2.2
U_
06
03
_6
.3V
6K
~D
1
2
CD
20
1U
_0
40
2_
6.3
V6
K~
DC
D2
01
U_
04
02
_6
.3V
6K
~D
1
2
CD
20
.1U
_0
40
2_
25
V6
K~
DC
D2
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
41
U_
04
02
_6
.3V
6K
~D
CD
41
U_
04
02
_6
.3V
6K
~D
1
2
RD7 0_0402_5%~DRD7 0_0402_5%~D1 2
CD
51
U_
04
02
_6
.3V
6K
~D
CD
51
U_
04
02
_6
.3V
6K
~D
1
2
CD
9
10
U_
06
03
_6
.3V
6M
~D
CD
9
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
11
10
U_
06
03
_6
.3V
6M
~D
CD
11
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
15
2.2
U_
06
03
_6
.3V
6K
~D
CD
15
2.2
U_
06
03
_6
.3V
6K
~D
1
2
G
DS QD2BSS138_NL_SOT23-3
G
DS QD2BSS138_NL_SOT23-3
2
13
CD
61
U_
04
02
_6
.3V
6K
~D
CD
61
U_
04
02
_6
.3V
6K
~D
1
2
RD29 0_0402_5%~D@RD29 0_0402_5%~D@ 1 2
CD
10
10
U_
06
03
_6
.3V
6M
~D
CD
10
10
U_
06
03
_6
.3V
6M
~D
1
2
G
DS QD1BSS138_NL_SOT23-3
G
DS QD1BSS138_NL_SOT23-3
2
13
CD
31
U_
04
02
_6
.3V
6K
~D
CD
31
U_
04
02
_6
.3V
6K
~D
1
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@ 1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D1 2
RD11 0_0402_5%~DRD11 0_0402_5%~D12
RD1 0_0402_5%~DRD1 0_0402_5%~D1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA7
DDR_B_D22
DDR_B_D19
DDR_B_D20
DDR_B_D62DDR_B_D59
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D27
DDR_B_D8
DDR_B_D52
M_ODT2
DDR_B_MA14
DDR_B_D57
DDR_B_DQS6
DDR_B_D43
DDR_B_DQS4
DDR_B_BS2
DDR_B_DQS#2
DDR3_DRAMRST#_R
DDR_B_D37DDR_B_D36
DDR_B_MA6
DDR_B_D23
DDR_B_D21
DDR_B_D41
DDR_B_MA3
DDR_B_D24
DDR_B_D63
DDR_B_D44
DDR_B_DQS#3
DDR_B_D40
DDR_CKE2_DIMMB
DDR_B_D5
DDR_B_DQS1
DDR_B_D9
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_D50
DDR_B_D48
DDR_B_D14
DDR_B_D61
DDR_B_MA4
DDR_B_MA1
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D7DDR_B_D6
DDR_B_D10
DDR_B_DQS#1
DDR_B_D55
DDR_B_D47
M_ODT3
DDR_B_D49
DDR_B_MA12
DDR_B_D15
DDR_B_D2
DDR_B_D0
M_CLK_DDR3
DDR_B_D28
DDR_B_DQS2
DDR_B_D4
DDR_B_RAS#
DDR_B_D34
DDR_B_D32
DDR_B_CAS#
DDR_B_D11
DDR_B_DQS#6
DDR_B_MA8
DDR_B_D25
DDR_B_D1
DDR_B_DQS7DDR_B_DQS#7
M_CLK_DDR#3
DDR_B_MA2
DDR_B_MA15
DDR_B_D29
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D30
DDR_B_D51
DDR_B_D35
DDR_B_D33
M_CLK_DDR2
DDR_B_D12
DDR_B_DQS#0
DDR_B_D16
DDR_B_D60
DDR_B_MA5
DDR_B_D18
DDR_B_D39
DDR_B_MA0
DDR_B_D58
DDR_B_MA10
DDR_B_D26
DDR_B_D3
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D31
DDR_B_D56
DDR_B_D42
DDR_B_DQS#4
DDR_B_MA13
M_CLK_DDR#2
DDR_B_MA9
DDR_B_D17
DDR_B_D13
DDR_B_DQS0
+1.5V_MEM
+0.75V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_MEM
+DIMM2_VREF_CA
+1.5V_MEM
+0.75V_DDR_VTT
+DIMM2_VREF_DQ
+V_DDR_REFB_M3
+V_DDR_REF
+V_DDR_REF
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>
DDR_B_CAS#<8>
DDR_CKE3_DIMMB <8>
DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8> DDR_B_RAS# <8>
DDR_B_BS1 <8>
DDR_B_BS2<8>
M_ODT2 <8>
DDR_CS3_DIMMB#<8>
DDR_CS2_DIMMB# <8>
M_CLK_DDR3 <8>M_CLK_DDR#3 <8>
M_ODT3 <8>
M_CLK_DDR2<8>M_CLK_DDR#2<8>
DDR3_DRAMRST#_R <12>
DDR_XDP_WAN_SMBCLK <12,15,27,34>DDR_XDP_WAN_SMBDAT <12,15,27,34>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
DDRIII-SODIMM SLOT2
13 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place near JDIMM2
Layout Note:Place near JDIMM2.203,204
JDIMMB H=8
Note:Check voltage tolerance of VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
Populate RD4, De-Populate RD8 for Intel DDR3VREFDQ multiple methods M1Populate RD8, De-Populate RD4 for Intel DDR3VREFDQ multiple methods M3
CD
39
1U
_0
40
2_
6.3
V6
K~
DC
D3
91
U_
04
02
_6
.3V
6K
~D
1
2
JDIMM2
TYCO_2-2013297-2~D
CONN@JDIMM2
TYCO_2-2013297-2~D
CONN@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND1206
CD
42
1U
_0
40
2_
6.3
V6
K~
DC
D4
21
U_
04
02
_6
.3V
6K
~D
1
2
+
CD
36
33
0U
_S
X_
2V
Y~
D
+
CD
36
33
0U
_S
X_
2V
Y~
D
1
2
CD
38
0.1
U_
04
02
_2
5V
6K
~D
CD
38
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
44
2.2
U_
06
03
_6
.3V
6K
~D
CD
44
2.2
U_
06
03
_6
.3V
6K
~D
1
2
RD15 0_0402_5%~DRD15 0_0402_5%~D12
CD
25
1U
_0
40
2_
6.3
V6
K~
DC
D2
51
U_
04
02
_6
.3V
6K
~D
1
2
CD
32
10
U_
06
03
_6
.3V
6M
~D
CD
32
10
U_
06
03
_6
.3V
6M
~D
1
2
RD8 0_0402_5%~DRD8 0_0402_5%~D1 2
CD
37
2.2
U_
06
03
_6
.3V
6K
~D
CD
37
2.2
U_
06
03
_6
.3V
6K
~D
1
2
CD
43
0.1
U_
04
02
_2
5V
6K
~D
CD
43
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
31
10
U_
06
03
_6
.3V
6M
~D
CD
31
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
23
2.2
U_
06
03
_6
.3V
6K
~D
CD
23
2.2
U_
06
03
_6
.3V
6K
~D
1
2
CD
41
1U
_0
40
2_
6.3
V6
K~
DC
D4
11
U_
04
02
_6
.3V
6K
~D
1
2
RD
61
0K
_0
40
2_
5%
~D
RD
61
0K
_0
40
2_
5%
~D
12
CD
33
10
U_
06
03
_6
.3V
6M
~D
CD
33
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
24
0.1
U_
04
02
_2
5V
6K
~D
CD
24
0.1
U_
04
02
_2
5V
6K
~D
1
2
CD
29
10
U_
06
03
_6
.3V
6M
~D
CD
29
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
40
1U
_0
40
2_
6.3
V6
K~
DC
D4
01
U_
04
02
_6
.3V
6K
~D
1
2
RD4 0_0402_5%~DRD4 0_0402_5%~D1 2
CD
34
10
U_
06
03
_6
.3V
6M
~D
CD
34
10
U_
06
03
_6
.3V
6M
~D
1
2
CD
26
1U
_0
40
2_
6.3
V6
K~
DC
D2
61
U_
04
02
_6
.3V
6K
~D
1
2
CD
27
1U
_0
40
2_
6.3
V6
K~
DC
D2
71
U_
04
02
_6
.3V
6K
~D
1
2
CD
28
1U
_0
40
2_
6.3
V6
K~
DC
D2
81
U_
04
02
_6
.3V
6K
~D
1
2
RD5 10K_0402_5%~DRD5 10K_0402_5%~D12
CD
35
10
U_
06
03
_6
.3V
6M
~D
@C
D3
51
0U
_0
60
3_
6.3
V6
M~
D@
1
2
CD
30
10
U_
06
03
_6
.3V
6M
~D
CD
30
10
U_
06
03
_6
.3V
6M
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_SDOUT
LPC_LDRQ1#LPC_LDRQ0#
PCH_JTAG_TCK
PCH_AZ_RST#
SATA_COMP
PCH_AZ_BITCLK
SRTCRST#
SATA_ACT#
PCH_RTCX1
PCH_RTCRST#
LPC_LAD0
PCH_RTCX2_R
PCH_INTVRMEN
PCH_JTAG_TDI
LPC_LAD3
INTRUDER#
PCH_AZ_SYNC_Q
IRQ_SERIRQ
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_INTVRMEN
PCH_RTCX2
+3.3V_ALW_PCH_JTAG
LPC_LAD2LPC_LAD1
LPC_LFRAME#
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_AZ_BITCLK
HDD_DET#_R
BBS_BIT0_R
PCH_AZ_SYNC
RBIAS_SATA3
SATA3_COMP
SPKR
IRQ_SERIRQ
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_DIN
PCH_SPI_DO
PCH_GPIO33
SPI_CLK64
SPI_DO64
SPI_WP#_SEL SPI_WP#_SEL_R
PCH_SPI_DIN SPI_DIN64
PCH_SPI_DO
PCH_SPI_CLK
SPI_WP#_SEL_RPCH_SPI_DO
SPI_CLK32SPI_DO32
PCH_SPI_CS0#
PCH_AZ_SYNC
PCH_AZ_SYNC
PCH_GPIO33
USB30_SMI#
PCH_SPI_CS0# PCH_SPI_CS0_R# PCH_SPI_CS1# PCH_SPI_CS1_R#
BBS_BIT0_R
PCH_AZ_SYNC_Q
XDP_DBRESET#
PCH_JTAG_TDI
RSMRST#_XDP
PCH_PWRBTN#_XDP
RSMRST#_XDP
PCH_JTAG_TCK
PCH_JTAG_TDO
PCH_JTAG_TMSPCH_RSMRST#_Q RSMRST#_XDP
SIO_PWRBTN#_R
1.05V_0.8V_PWROK_R
PCH_SPI_CS0#SPI_DIN32
SPI_DO32
SPI_CLK32
PCH_SPI_CS1_R#
SPI_HOLD#SPI_DIN32PCH_SPI_DINSPI_HOLD#
PCH_SPI_CLK
PCH_SPI_CLK
+RTC_CELL
+3.3V_RUN
+1.05V_RUN
+RTC_CELL
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_M +3.3V_M
+3.3V_RUN
+3.3V_ALW_PCH
+5V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH+1.05V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_M
PCH_AZ_CODEC_SDIN0<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_SDOUT<29>
IRQ_SERIRQ <32,39,40>
PCH_AZ_CODEC_RST#<29>
SATA_ACT# <43>
SPKR<29>
HDD_DET# <27>
PCH_AZ_CODEC_BITCLK<29>
PSATA_PRX_DTX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>PSATA_PTX_DRX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
SATA_PRX_DKTX_P5_C <38>SATA_PRX_DKTX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>SATA_PTX_DKRX_N5_C <38>
ESATA_PTX_DRX_P4_C <37>
ESATA_PRX_DTX_P4_C <37>ESATA_PRX_DTX_N4_C <37>
ESATA_PTX_DRX_N4_C <37>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>SATA_ODD_PTX_DRX_P1_C <28>
SATA_ODD_PRX_DTX_N1_C <28>
PCH_SATA_MOD_EN# <40>
ME_FWP<39>
LPC_LAD0 <32,34,39,40>LPC_LAD1 <32,34,39,40>LPC_LAD2 <32,34,39,40>LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ0# <39>LPC_LDRQ1# <39>
PCH_PLTRST#<7,17>
SPI_WP#_SEL<39>
USB30_SMI#<28>
1.05V_0.8V_PWROK<40,51>
XDP_DBRESET#<7,16>
SIO_PWRBTN#_R<7,16>
PCH_RSMRST#_Q<16,41>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (1/8)
14 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
Low - Enable External VRs
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
CMOS place near DIMM
HDD
E-SATA
DOCK
Low = Default
High = No RebootSPKR
No Reboot Strap
ODD/ E Module Bay
BBS_BIT0 - BIOS BOOT STRAP BIT 0
CMOS settingCMOS_CLR1
Open
Clear CMOSShunt
ME_CLR1
Keep CMOS
TPM setting
Shunt
Keep ME RTC Registers
Clear ME RTC Registers
Open
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
*
200 MIL SO864Mb Flash ROM 32Mb Flash ROM
200 MIL SO8
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
INTEL feedback 0302
INTEL HDA_SYNC
isolation circuit
CH1 clsoe to JXDP2CH6 clsoe to JXDP2
Link Done
RF team request
TAA config R895,R897,R900 need change to 0 ohm SD02800008L
RH355 100K_0402_5%~DRH355 100K_0402_5%~D12
JTAA1
TYCO_5-1775013-4~D
CONN@JTAA1
TYCO_5-1775013-4~D
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
G113
G214
G315
G416
G517
G618
R899 33_0402_5%~D@SPI R899 33_0402_5%~D@SPI1 2
R936 0_0402_5%~DR936 0_0402_5%~D1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D1 2
JXDP2
MOLEX_52435-2671
@JXDP2
MOLEX_52435-2671
@
OBSFN_A01
OBSFN_A12
GND3
OBSDATA_A[0]4
OBSDATA_A[1]5
GND6
OBSDATA_A[2]7
OBSDATA_A[3]8
GND9
HOOK010
HOOK111
HOOK212
HOOK313
HOOK414
HOOK515
VCCOBS_AB16
HOOK617
HOOK718
GND19
TDO20
TRSTn21
TDI22
TMS23
TCK124
GND27
GND28
GND25
TCK026
RH43 200_0402_1%~DRH43 200_0402_1%~D12
RH282100K_0402_5%~D
@RH282100K_0402_5%~D
@
12
RH39330K_0402_1%~D@RH39330K_0402_1%~D@
12
RH11 1M_0402_5%~DRH11 1M_0402_5%~D1 2
CH
60.1
U_0402_16V
4Z
~D
PX
DP
@
CH
60.1
U_0402_16V
4Z
~D
PX
DP
@
1
2
RH283 1K_0402_5%~D@RH283 1K_0402_5%~D@
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D1 2
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@12
R894 33_0402_5%~D@SPI R894 33_0402_5%~D@SPI1 2
ME1 SHORT PADS~D@ME1 SHORT PADS~D@
11
22
RH284 0_0402_5%~DPXDP@RH284 0_0402_5%~DPXDP@
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D1 2
CH10127P_0402_50V8J~D
@CH10127P_0402_50V8J~D
@
1
2
RH26 33_0402_5%~DRH26 33_0402_5%~D1 2
RH38330K_0402_1%~DRH38330K_0402_1%~D
12
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@1 2
R897 33_0402_5%~DR897 33_0402_5%~D1 2
CH4 1U_0402_6.3V6K~DCH4 1U_0402_6.3V6K~D1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D1 2
CH
10.1
U_0402_16V
4Z
~D
PX
DP
@
CH
10.1
U_0402_16V
4Z
~D
PX
DP
@
1
2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D1 2
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D12
RH
49
100_0402_1%
~D
RH
49
100_0402_1%
~D
12
RH22 20K_0402_5%~DRH22 20K_0402_5%~D1 2
RH44 200_0402_1%~DRH44 200_0402_1%~D12
RH661K_0402_1%~DRH661K_0402_1%~D
12
R8903.3K_0402_5%~D
@SPI R8903.3K_0402_5%~D
@SPI
12
RH
47
100_0402_1%
~D
RH
47
100_0402_1%
~D
12
R900 33_0402_5%~DR900 33_0402_5%~D1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D1 2
U52
W25Q64CVSSIG_SO8~D
@SPIU52
W25Q64CVSSIG_SO8~D
@SPI
CLK6
GND4
DIO5
DO2
/WP3
VCC8
/HOLD7
/CS1
R935 0_0402_5%~D@SPI R935 0_0402_5%~D@SPI1 2
RH2880_0603_5%~D
RH2880_0603_5%~D
12
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@1 2
CMOS1 SHORT PADS~D@CMOS1 SHORT PADS~D@
11
22
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D1 2
R901 33_0402_5%~D@SPI R901 33_0402_5%~D@SPI1 2
C7460.1U_0402_25V6K~D
@SPIC7460.1U_0402_25V6K~D
@SPI
1 2
RH210M_0402_5%~DRH210M_0402_5%~D
12
RH21 0_0402_5%~DPXDP@RH21 0_0402_5%~DPXDP@
1 2
RH45 200_0402_1%~DRH45 200_0402_1%~D12
RH41 10K_0402_5%~DPXDP@ RH41 10K_0402_5%~DPXDP@12
RH46 750_0402_1%~DRH46 750_0402_1%~D1 2
G
D S
QH1 BSS138W-7-F_SOT323-3~DG
D S
QH1 BSS138W-7-F_SOT323-3~D2
1 3
R898 0_0402_5%~D@R898 0_0402_5%~D@1 2
CH315P_0402_50V8J~D
CH315P_0402_50V8J~D
12
YH132.768KHZ_12.5PF_Q13FC1350000~DYH132.768KHZ_12.5PF_Q13FC1350000~D
12
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTCX1A20
RTCX2C20
INTVRMENC17
INTRUDER#K22
HDA_BCLKN34
HDA_SYNCL34
HDA_RST#K34
HDA_SDIN0E34
HDA_SDIN1G34
HDA_SDIN2C34
HDA_SDOA36
SATALED#P3
FWH0 / LAD0C38
FWH1 / LAD1A38
FWH2 / LAD2B37
FWH3 / LAD3C37
LDRQ1# / GPIO23K36
FWH4 / LFRAME#D36
LDRQ0#E36
RTCRST#D20
HDA_SDIN3A34
HDA_DOCK_EN# / GPIO33C36
HDA_DOCK_RST# / GPIO13N32
SRTCRST#G22
SATA0RXNAM3
SATA0RXPAM1
SATA0TXNAP7
SATA0TXPAP5
SATA1RXNAM10
SATA1RXPAM8
SATA1TXNAP11
SATA1TXPAP10
SATA2RXNAD7
SATA2RXPAD5
SATA2TXNAH5
SATA2TXPAH4
SATA3RXNAB8
SATA3RXPAB10
SATA3TXNAF3
SATA3TXPAF1
SATA4RXNY7
SATA4RXPY5
SATA4TXNAD3
SATA4TXPAD1
SATA5RXNY3
SATA5RXPY1
SATA5TXNAB3
SATA5TXPAB1
SATAICOMPIY10
SPI_CLKT3
SPI_CS0#Y14
SPI_CS1#T1
SPI_MOSIV4
SPI_MISOU3
SATA0GP / GPIO21V14
SATA1GP / GPIO19P1
JTAG_TCKJ3
JTAG_TMSH7
JTAG_TDIK5
JTAG_TDOH1
SERIRQV5
SPKRT10
SATAICOMPOY11
SATA3COMPIAB13
SATA3RCOMPOAB12
SATA3RBIASAH1
RH25 33_0402_5%~DRH25 33_0402_5%~D1 2
U53
W25Q32BVSSIG_SO8~D
@SPIU53
W25Q32BVSSIG_SO8~D
@SPI
CS#1
DO2
WP#3
GND4
VCC8
HOLD#7
CLK6
DI5
G
DS
QH7SSM3K7002FU_SC70-3~D
G
DS
QH7SSM3K7002FU_SC70-3~D2
13
RH3010K_0402_5%~DRH3010K_0402_5%~D
12
C1204
12P
_0402_50V
8J~
D
@
C1204
12P
_0402_50V
8J~
D
@
1
2
RH
48
100_0402_1%
~D
RH
48
100_0402_1%
~D
12
C7450.1U_0402_25V6K~DC7450.1U_0402_25V6K~D
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D1 2
R8913.3K_0402_5%~D
@SPIR8913.3K_0402_5%~D
@SPI
12
RH59 51_0402_1%~DRH59 51_0402_1%~D12
R895 33_0402_5%~DR895 33_0402_5%~D1 2
CH215P_0402_50V8J~D
CH215P_0402_50V8J~D
12
RH290 0_0402_5%~DRH290 0_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
XTAL25_IN
PCH_CL_RST1#
SML1_SMBCLK
PCH_CL_CLK1
SML1_SMBDATA
XTAL25_OUT
PCH_CL_DATA1
MEM_SMBCLK
MEM_SMBDATA
MEM_SMBCLK
JETWAY_14M
PCIE_PRX_EXPTX_N3
PCIE_PTX_EXPRX_P3PCIE_PTX_EXPRX_N3PCIE_PRX_EXPTX_P3
PCIE_PRX_EMBTX_P4PCIE_PRX_EMBTX_N4
PCIE_PTX_EMBRX_P4PCIE_PTX_EMBRX_N4
PCIE_PTX_WLANRX_N2PCIE_PRX_WLANTX_P2PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_P2
PCIE_PTX_WANRX_N1PCIE_PTX_WANRX_P1
PCIE_PRX_WANTX_P1PCIE_PRX_WANTX_N1
MINI3CLK_REQ#
MINI2CLK_REQ#
LANCLK_REQ#
PCIE_PTX_WPANRX_N5PCIE_PRX_WPANTX_P5PCIE_PRX_WPANTX_N5
PCIE_PTX_WPANRX_P5
EXPCLK_REQ#
MEM_SMBCLK
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
PCH_SMB_ALERT#
DDR_HVREF_RST_PCH
+XCLK_RCOMP
CLK_CPU_DMICLK_CPU_DMI#
PCH_GPIO74
CLK_PCI_LOOPBACK
CLK_BUF_DOT96CLK_BUF_DOT96#
CLK_BUF_CKSSCDCLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_BUF_BCLK
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_PCH_14M
DDR_HVREF_RST_PCH
PCH_GPIO74
CLK_BUF_CKSSCD
CLK_BUF_DOT96#CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_PCH_14M
CLK_BUF_BCLK
CLK_BUF_DMI
PEG_B_CLKRQ#
MINI1CLK_REQ#
PCIE_PRX_GLANTX_P7PCIE_PRX_GLANTX_N7
PCIE_PTX_GLANRX_N7PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_P6PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_N6PCIE_PTX_MMIRX_P6
EMBCLK_REQ#
PCI_TPM_TCM
SIO_14M
MMICLK_REQ#
PEG_A_CLKRQ#
PEG_A_CLKRQ#
CLK_80H
CLK_SIO_14MCLK_PCI_TPM_TCM
PCLK_80H
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_LAN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PCH_CL_DATA1 <34>
PCH_CL_CLK1 <34>
PCH_CL_RST1# <34>
SML1_SMBDATA <40>
DDR_XDP_WAN_SMBDAT <12,13,27,34>
DDR_XDP_WAN_SMBCLK <12,13,27,34>
PCIE_PRX_WLANTX_P2<34>PCIE_PRX_WLANTX_N2<34>
PCIE_PRX_WANTX_P1<34>PCIE_PRX_WANTX_N1<34>
PCIE_PTX_WLANRX_N2<34>PCIE_PTX_WLANRX_P2<34>
PCIE_PTX_WANRX_P1<34>PCIE_PTX_WANRX_N1<34>
PCIE_PTX_EMBRX_N4<28>
PCIE_PRX_EMBTX_P4<28>PCIE_PRX_EMBTX_N4<28>
PCIE_PTX_EMBRX_P4<28>
CLK_PCIE_EXP#<35>CLK_PCIE_EXP<35>
PCIE_PRX_EXPTX_P3<35>PCIE_PRX_EXPTX_N3<35>
EXPCLK_REQ#<35>
PCIE_PTX_EXPRX_P3<35>PCIE_PTX_EXPRX_N3<35>
CLK_PCIE_MINI2<34>
PCIE_PRX_WPANTX_N5<34>
MINI2CLK_REQ#<34>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI3#<34>
PCIE_PTX_WPANRX_P5<34>PCIE_PTX_WPANRX_N5<34>
PCIE_PRX_WPANTX_P5<34>
MINI3CLK_REQ#<34>
CLK_PCIE_MINI3<34>
CLK_PCIE_LAN#<31>
LANCLK_REQ#<31>
CLK_PCIE_LAN<31>
LAN_SMBDATA <31>
CLK_CPU_DMI# <7>CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
JETWAY_CLK14M <32>
CLK_PCIE_MINI1#<34>CLK_PCIE_MINI1<34>
MINI1CLK_REQ#<34>
PCIE_PTX_GLANRX_N7<31>
PCIE_PRX_GLANTX_P7<31>
PCIE_PTX_GLANRX_P7<31>
PCIE_PRX_GLANTX_N7<31>
DDR_HVREF_RST_PCH <7>
PCIE_PTX_MMIRX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_MMITX_N6<33>
CLK_CPU_ITP#<7>CLK_CPU_ITP<7>
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>CLK_PCIE_EMB<28>
CLK_PCIE_EMB#<28>
EMBCLK_REQ#<28>
CLK_PCIE_MMI#<33>CLK_PCIE_MMI<33>
SML1_SMBCLK <40>
LAN_SMBCLK <31>
MMICLK_REQ#<33>
PCLK_80H <34>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (2/8)
15 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
EXPRESS Card--->
Express card--->
MiniWLAN (Mini Card 2)--->
MiniWWAN (Mini Card 1)--->
E3 Module Bay--->
MiniWLAN (Mini Card 2)--->
10/100/1G LAN --->
1/2vMINI CARD-3 PCIE (Mini Card 3)--->
MiniWPAN (Mini Card 3)--->
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
CLOCK TERMINATION for FCIM and need close to PCH
MMI --->
eModule Bay--->
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
MMI Card--->
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Follow DG0.9 Device
down & Express/Mini
card topology
RF request
CH
18
12
P_
04
02
_5
0V
8J~
DC
H1
81
2P
_0
40
2_
50
V8
J~
D
1
2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D1 2
RH152 10K_0402_5%~DRH152 10K_0402_5%~D12
RH300 1K_0402_1%~DRH300 1K_0402_1%~D12
RH104 10K_0402_5%~DRH104 10K_0402_5%~D12
RH991M_0402_5%~DRH991M_0402_5%~D
12
RH87 10K_0402_5%~DRH87 10K_0402_5%~D1 2
RH94 10K_0402_5%~DRH94 10K_0402_5%~D12
RH309 0_0402_5%~DRH309 0_0402_5%~D12
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D12
RH79 10K_0402_5%~DRH79 10K_0402_5%~D1 2
QH5BDMN66D0LDW-7_SOT363-6~D
QH5BDMN66D0LDW-7_SOT363-6~D
3
5
4
RH311 22_0402_5%~DRH311 22_0402_5%~D12
RH91 10K_0402_5%~DRH91 10K_0402_5%~D1 2
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PERN1BG34
PERP1BJ34
PERN2BE34
PERP2BF34
PERN3BG36
PERP3BJ36
PERN4BF36
PERP4BE36
PERN5BG37
PERP5BH37
PERN6BJ38
PERP6BG38
PERN7BG40
PERP7BJ40
PERN8BE38
PERP8BC38
PETN1AV32
PETP1AU32
PETN2BB32
PETP2AY32
PETN3AV34
PETP3AU34
PETN4AY34
PETP4BB34
PETN5AY36
PETP5BB36
PETN6AU36
PETP6AV36
PETN7AY40
PETP7BB40
PETN8AW38
PETP8AY38
CLKOUT_PCIE0NY40
CLKOUT_PCIE0PY39
CLKOUT_PCIE1NAB49
CLKOUT_PCIE1PAB47
CLKOUT_PCIE2NAA48
CLKOUT_PCIE2PAA47
CLKOUT_PCIE3NY37
CLKOUT_PCIE3PY36
CLKOUT_PCIE4NY43
CLKOUT_PCIE4PY45
CLKOUT_PCIE5NV45
CLKOUT_PCIE5PV46
CLKIN_GND1_NBJ30
CLKIN_GND1_PBG30
CLKIN_DMI_NBF18
CLKIN_DMI_PBE18
CLKIN_DOT_96NG24
CLKIN_DOT_96PE24
CLKIN_SATA_NAK7
CLKIN_SATA_PAK5
XTAL25_INV47
XTAL25_OUTV49
REFCLK14INK45
CLKIN_PCILOOPBACKH45
CLKOUT_PEG_A_NAB37
CLKOUT_PEG_A_PAB38
PEG_A_CLKRQ# / GPIO47M10
PCIECLKRQ0# / GPIO73J2
PCIECLKRQ1# / GPIO18M1
PCIECLKRQ2# / GPIO20V10
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26L12
PCIECLKRQ5# / GPIO44L14
CLKOUTFLEX0 / GPIO64K43
CLKOUTFLEX1 / GPIO65F47
CLKOUTFLEX2 / GPIO66H47
CLKOUTFLEX3 / GPIO67K49
CLKOUT_DMI_NAV22
CLKOUT_DMI_PAU22
PEG_B_CLKRQ# / GPIO56E6
CLKOUT_PEG_B_PAB40
CLKOUT_PEG_B_NAB42
XCLK_RCOMPY47
CLKOUT_DP_PAM13
CLKOUT_DP_NAM12
CLKOUT_PCIE6NV40
CLKOUT_PCIE6PV42
PCIECLKRQ7# / GPIO46K12
CLKOUT_PCIE7NV38
CLKOUT_PCIE7PV37
CLKOUT_ITPXDP_NAK14
CLKOUT_ITPXDP_PAK13
SMBALERT# / GPIO11E12
SMBCLKH14
SMBDATAC9
SML0ALERT# / GPIO60A12
SML0CLKC8
SML0DATAG12
SML1ALERT# / PCHHOT# / GPIO74C13
SML1CLK / GPIO58E14
SML1DATA / GPIO75M16
CL_CLK1M7
CL_DATA1T11
CL_RST1#P10
PCIECLKRQ6# / GPIO45T13
QH5ADMN66D0LDW-7_SOT363-6~D
QH5ADMN66D0LDW-7_SOT363-6~D
6 1
2
RH81 10K_0402_5%~DRH81 10K_0402_5%~D12
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D1 2
RH304 10K_0402_5%~DRH304 10K_0402_5%~D12
RH98 10K_0402_5%~DRH98 10K_0402_5%~D1 2
RH313 22_0402_5%~DRH313 22_0402_5%~D12
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D12
RH315 22_0402_5%~D@RH315 22_0402_5%~D@ 12
RH74 10K_0402_5%~DRH74 10K_0402_5%~D1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D1 2
CH
11
32
7P
_0
40
2_
50
V8
J~
D@
CH
11
32
7P
_0
40
2_
50
V8
J~
D@
1
2
CH
11
12
7P
_0
40
2_
50
V8
J~
D@
CH
11
12
7P
_0
40
2_
50
V8
J~
D@
1
2
CH
19
12
P_
04
02
_5
0V
8J~
DC
H1
91
2P
_0
40
2_
50
V8
J~
D
1
2
RH77 10K_0402_5%~DRH77 10K_0402_5%~D1 2
CH
11
22
7P
_0
40
2_
50
V8
J~
D@
CH
11
22
7P
_0
40
2_
50
V8
J~
D@
1
2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D1 2
YH2
25MHZ_10PF_Q22FA2380049900~D
YH2
25MHZ_10PF_Q22FA2380049900~D
IN1
GND2
OUT3
GND4
RH301 10K_0402_5%~DRH301 10K_0402_5%~D12
RH80 10K_0402_5%~DRH80 10K_0402_5%~D12
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D12
RH78 10K_0402_5%~DRH78 10K_0402_5%~D1 2
RH97 10K_0402_5%~DRH97 10K_0402_5%~D12
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D12
RH314 22_0402_5%~DRH314 22_0402_5%~D12
RH76 10K_0402_5%~DRH76 10K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_LAN#
ME_SUS_PWR_ACK
PCH_RI#
CRT_IREF
PCH_CRT_DDC_DATPCH_CRT_DDC_CLK
HSYNCVSYNC
PCH_CRT_BLUPCH_CRT_GRNPCH_CRT_RED
ENVDD_PCH
BIA_PWM_PCH
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
PANEL_BKEN_PCH
SYS_PWROK_R
SIO_PWRBTN#_R
PCH_BATLOW#
DMI_COMP_R
PCH_RI#
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
XDP_DBRESET#
PCH_PWROK
AC_PRESENT
SUSACK#_R
PM_APWROK_R
RBIAS_CPY
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SUSCLK
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_SUS#
SUS_STAT#/LPCPD#
SIO_SLP_LAN#
H_PM_SYNC
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
SUS_STAT#/LPCPD#
PM_DRAM_PWRGD_R
LCD_ACLK+_PCHLCD_ACLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCHLCD_A1-_PCH
LCD_A0+_PCH
LCD_A2+_PCHLCD_A1+_PCH
LVD_IBG
LDDC_CLK_PCHLDDC_DATA_PCH
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
SYS_PWROKRESET_OUT#
DSWODVREN
PCH_SDVO_CTRLCLKPCH_SDVO_CTRLDATA
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
PCH_RSMRST#_Q
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
PCH_CRT_BLU<24>PCH_CRT_GRN<24>PCH_CRT_RED<24>
BIA_PWM_PCH<23>
ENVDD_PCH<23,39>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC1 <6>
FDI_LSYNC0 <6>
FDI_CTX_PRX_N0 <6>FDI_CTX_PRX_N1 <6>FDI_CTX_PRX_N2 <6>FDI_CTX_PRX_N3 <6>FDI_CTX_PRX_N4 <6>FDI_CTX_PRX_N5 <6>FDI_CTX_PRX_N6 <6>FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>FDI_CTX_PRX_P1 <6>FDI_CTX_PRX_P2 <6>FDI_CTX_PRX_P3 <6>FDI_CTX_PRX_P4 <6>FDI_CTX_PRX_P5 <6>FDI_CTX_PRX_P6 <6>FDI_CTX_PRX_P7 <6>
PANEL_BKEN_PCH<23>
RESET_OUT#<40>
XDP_DBRESET#<7,14>
SIO_PWRBTN#<40>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CTX_PRX_P1<6>DMI_CTX_PRX_P2<6>
DMI_CRX_PTX_N2<6>DMI_CRX_PTX_N1<6>
DMI_CTX_PRX_N1<6>DMI_CTX_PRX_N0<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N3<6>DMI_CTX_PRX_N2<6>
DMI_CRX_PTX_P3<6>DMI_CRX_PTX_P2<6>DMI_CRX_PTX_P1<6>
PM_APWROK<40>
SIO_PWRBTN#_R<7,14>
AC_PRESENT<40>
SUSACK#<39> PCH_DPWROK <39>
PCH_PCIE_WAKE# <40>
SIO_SLP_S4# <39>
SIO_SLP_S3# <11,27,35,39,42,48>
SIO_SLP_S5# <40>
H_PM_SYNC <7>
SIO_SLP_A# <39,42,49>
SIO_SLP_LAN# <31,39>
CLKRUN# <32,39,40>
SIO_SLP_SUS# <39>
PCH_RSMRST#_Q<14,41>
ME_SUS_PWR_ACK<40>
PCH_CRT_DDC_DAT <24>
SYS_PWROK<7,39>
PM_DRAM_PWRGD<7>
PCH_CRT_HSYNC<24>PCH_CRT_VSYNC<24>
PCH_CRT_DDC_CLK <24>
LCD_ACLK-_PCH<23>LCD_ACLK+_PCH<23>
LCD_A0-_PCH<23>LCD_A1-_PCH<23>LCD_A2-_PCH<23>
LCD_A2+_PCH<23>
LCD_A0+_PCH<23>LCD_A1+_PCH<23>
LDDC_DATA_PCH<23>LDDC_CLK_PCH<23>
DPC_PCH_LANE_N0 <38>
DPC_PCH_LANE_N1 <38>
DPC_PCH_LANE_N2 <38>
DPC_PCH_LANE_N3 <38>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_P3 <38>
DPC_PCH_DOCK_AUX <26>DPC_PCH_DOCK_HPD <38>
DPC_PCH_DOCK_AUX# <26>
PCH_DDPC_CTRLDATA <26>
PCH_DDPC_CTRLCLK <26>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_P3 <38>
PCH_DDPD_CTRLDATA <26>
PCH_DDPD_CTRLCLK <26>
DPD_PCH_DOCK_AUX <26>DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <38>
DPD_PCH_LANE_N1 <38>
DPD_PCH_LANE_N2 <38>
DPD_PCH_LANE_N3 <38>
DPD_PCH_DOCK_AUX# <26>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_CLK <25>
TMDSB_PCH_P0 <25>
HDMIB_PCH_HPD <25>
PCH_SDVO_CTRLDATA <25>
PCH_SDVO_CTRLCLK <25>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (3/8)
16 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
DSWODVREN - On Die DSW VR Enable
HIGH: RH127 STUFFED, RH129 UNSTUFFED
Enabled (DEFAULT)
Disabled
LOW: RH129 STUFFED, RH127 UNSTUFFED
Minimum speacing of 20mils for LVD_IBG
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI0RXNBC24
DMI1RXNBE20
DMI2RXNBG18
DMI3RXNBG20
DMI0RXPBE24
DMI1RXPBC20
DMI2RXPBJ18
DMI3RXPBJ20
DMI0TXNAW24
DMI1TXNAW20
DMI2TXNBB18
DMI3TXNAV18
DMI0TXPAY24
DMI1TXPAY20
DMI2TXPAY18
DMI3TXPAU18
DMI_ZCOMPBJ24
DMI_IRCOMPBG25
FDI_RXN0BJ14
FDI_RXN1AY14
FDI_RXN2BE14
FDI_RXN3BH13
FDI_RXN4BC12
FDI_RXN5BJ12
FDI_RXN6BG10
FDI_RXN7BG9
FDI_RXP0BG14
FDI_RXP1BB14
FDI_RXP2BF14
FDI_RXP3BG13
FDI_RXP4BE12
FDI_RXP5BG12
FDI_RXP6BJ10
FDI_RXP7BH9
FDI_FSYNC0AV12
FDI_FSYNC1BC10
FDI_LSYNC0AV14
FDI_LSYNC1BB10
FDI_INTAW16
PMSYNCHAP14
SLP_SUS#G16
SLP_S3#F4
SLP_S4#H4
SLP_S5# / GPIO63D10
SYS_RESET#K3
SYS_PWROKP12
PWRBTN#E20
RI#A10
WAKE#B9
SUS_STAT# / GPIO61G8
SUSCLK / GPIO62N14
ACPRESENT / GPIO31H20
BATLOW# / GPIO72E10
PWROKL22
CLKRUN# / GPIO32N3
SUSWARN#/SUSPWRDNACK/GPIO30K16
RSMRST#C21
DRAMPWROKB13
SLP_LAN# / GPIO29K14
APWROKL10
DPWROKE22
DMI2RBIASBH21
SLP_A#G10
DSWVRMENA18
SUSACK#C12
RH133 150_0402_1%~DRH133 150_0402_1%~D1 2
T61 PAD~DT61 PAD~DRH123 20_0402_1%~DRH123 20_0402_1%~D
1 2
T58 PAD~DT58 PAD~D
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
L_BKLTCTLP45
L_BKLTENJ47
L_CTRL_CLKT45
L_CTRL_DATAP39
L_DDC_CLKT40
L_DDC_DATAK47
L_VDD_ENM45
LVDSA_CLK#AK39
LVDSA_CLKAK40
LVDSA_DATA#0AN48
LVDSA_DATA#1AM47
LVDSA_DATA#2AK47
LVDSA_DATA#3AJ48
LVDSA_DATA0AN47
LVDSA_DATA1AM49
LVDSA_DATA2AK49
LVDSA_DATA3AJ47
LVDSB_CLK#AF40
LVDSB_CLKAF39
LVDSB_DATA#0AH45
LVDSB_DATA#1AH47
LVDSB_DATA#2AF49
LVDSB_DATA#3AF45
LVDSB_DATA0AH43
DDPB_0NAV42
DDPB_1NAV45
LVD_VREFHAE48
LVD_VREFLAE47
DDPD_2NBF42
DDPD_3NBJ42
DDPB_2NAU48
DDPB_3NAV47
DDPC_0NAY47
DDPC_1NAY43
DDPC_2NBA47
DDPC_3NBB47
DDPD_0NBB43
DDPD_1NBF44
DDPB_0PAV40
DDPB_1PAV46
DDPD_2PBE42
DDPD_3PBG42
DDPB_2PAU47
DDPB_3PAV49
LVDSB_DATA1AH49
LVDSB_DATA2AF47
LVDSB_DATA3AF43
LVD_IBGAF37
LVD_VBGAF36
DDPC_1PAY45
DDPC_0PAY49
DDPC_2PBA48
DDPC_3PBB49
DDPD_0PBB45
DDPD_1PBE44
CRT_BLUEN48
CRT_DDC_CLKT39
CRT_DDC_DATAM40
CRT_GREENP49
CRT_HSYNCM47
CRT_IRTNT42
CRT_REDT49
CRT_VSYNCM49
DAC_IREFT43
SDVO_CTRLCLKP38
SDVO_CTRLDATAM39
DDPC_CTRLCLKP46
DDPC_CTRLDATAP42
DDPD_CTRLCLKM43
DDPD_CTRLDATAM36
DDPB_AUXNAT49
DDPC_AUXNAP47
DDPD_AUXNAT45
DDPB_AUXPAT47
DDPC_AUXPAP49
DDPD_AUXPAT43
DDPB_HPDAT40
DDPC_HPDAT38
DDPD_HPDBH41
SDVO_TVCLKINPAP45
SDVO_TVCLKINNAP43
SDVO_STALLPAM40
SDVO_STALLNAM42
SDVO_INTPAP40
SDVO_INTNAP39
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D1 2
RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D12
T60 PAD~DT60 PAD~D
RH142 10K_0402_5%~DRH142 10K_0402_5%~D1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D1 2
RH118 0_0402_5%~DRH118 0_0402_5%~D1 2
RH132 150_0402_1%~DRH132 150_0402_1%~D1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D1 2
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D1 2
RH127 330K_0402_1%~DRH127 330K_0402_1%~D1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D1 2
T57 PAD~DT57 PAD~D
RH323 0_0402_5%~DRH323 0_0402_5%~D1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D1 2
RH124 20_0402_1%~DRH124 20_0402_1%~D1 2
T63 PAD~DT63 PAD~D
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D1 2
RH
31
6
2.2
K_
04
02
_5
%~
D
RH
31
6
2.2
K_
04
02
_5
%~
D
12
RH113 0_0402_5%~DRH113 0_0402_5%~D1 2
T59 PAD~DT59 PAD~D
RH322 10K_0402_5%~D@ RH322 10K_0402_5%~D@1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D1 2
RH129 330K_0402_1%~D@ RH129 330K_0402_1%~D@ 1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D1 2
RH134 100K_0402_5%~DRH134 100K_0402_5%~D1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D1 2
T62 PAD~DT62 PAD~D
T56 PAD~DT56 PAD~D
RH144 10K_0402_5%~DRH144 10K_0402_5%~D1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@1 2
RH
31
7
2.2
K_
04
02
_5
%~
D
RH
31
7
2.2
K_
04
02
_5
%~
D
12
RH1261K_0402_0.5%~D
RH1261K_0402_0.5%~D
12
RH112 750_0402_1%~DRH112 750_0402_1%~D1 2
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D1 2
RH116 0_0402_5%~DRH116 0_0402_5%~D1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@1 2
RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAM_MIC_CBL_DET#
PCH_PLTRST#PCH_PLTRST#_EC
USBP10+USBP10-
USBP11+USBP11-
USBP9+
USBP0-USBP0+
USBP3+
USBP5+
USBP7+
USBP3-
USBP1-
USBP9-
USBP8-USBP8+
USBP5-
USBP7-
USBP4-USBP4+
USBP1+
USBRBIAS
USB_OC4#_RUSB_OC3#USB_OC1#_RUSB_OC0#_R
USB_OC6#USB_OC5#
PCI_GNT3#
USB_OC2#
BBS_BIT1
BT_DET#
USBP6+USBP6-
USB_OC0#_R
USB_OC2#USB_OC3#
USB_OC5#USB_OC6#
USB_OC4#
USB_OC1#_R
PCI_REQ1#
PCH_PLTRST#
LCD_CBL_DET#
BT_DET#
PCI_GNT3#
FFS_PCH_INT
PCI_LOOPBACKOUT
PCI_MECPCI_5048
PCI_DOCK
BBS_BIT1
PCI_PIRQA#
PCI_PIRQC#PCI_PIRQD#
PCI_PIRQB#
CAM_MIC_CBL_DET#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
USBP12+USBP12-
SIO_EXT_SMI#
SIO_EXT_SMI#
PCH_GPIO3
PCH_GPIO3
USB_OC4#_R
CLK_PCI_MECCLK_PCI_5048
CLK_PCI_DOCKCLK_PCI_LOOPBACK
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
PCH_PLTRST#_EC <32,34,35,39,40>
USBP10+ <35>USBP10- <35>
USBP11+ <41>USBP11- <41>
USBP4+ <34>USBP5- <34>
USBP3+ <38>
USBP5+ <34>
USBP4- <34>
USBP3- <38>
USBP1+ <36>USBP1- <36>
USBP0- <36>USBP0+ <36>
USBP7+ <32>USBP7- <32>
USBP8+ <38>USBP8- <38>
USBP9+ <37>USBP9- <37>
USB_OC0# <36>
USBP6- <34>USBP6+ <34>
LCD_CBL_DET#<23>
PCIE_MCARD2_DET#<34>BT_DET#<41>
HDD_FALL_INT<27>
CLK_PCI_MEC<40>CLK_PCI_5048<39>
CLK_PCI_LOOPBACK<15>
CLK_PCI_DOCK<38>
PLTRST_LAN#<31>
PLTRST_USH#<32>PLTRST_MMI#<33>PLTRST_XDP#<7>
USBP12- <23>USBP12+ <23>
PCH_PLTRST#<7,14>
PLTRST_EMB#<28>
SIO_EXT_SMI# <40>
USB3RN1<36>
USB3TN1<36>
USB3TP1<36>
USB3RP1<36>
USB3RN2<36>
USB3RP2<36>
USB3TN2<36>
USB3TP2<36>
USB3RN4<38>
USB3RP4<38>
USB3TN4<38>
USB3TP4<38>
USB_OC4# <36>
CAM_MIC_CBL_DET#<23>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (4/8)
17 56Thursday, June 23, 2011
Compal Electronics, Inc.
Within 500 mils
DELL CONFIDENTIAL/PROPRIETARY
A16 swap override Strap/Top-Block
PCI_GNT#3
Swap Override jumper
Low = A16 swap
High = Default
Boot BIOS Strap
SATA_SLPD(BBS_BIT0)BBS_BIT1 Boot BIOS Location
0 0
Reserved (NAND)
PCI
SPI
LPC
0 1
1 0
1 1*
INTEL feedback 0307
----->Camera
----->Right side E-SATA
----->MLK DOCK
----->USH
----->Blue Tooth
----->Express Card
----->PP
----->WLAN/WIMAX
----->Right Side
----->WWAN/UWB
----->DOCK
----->Rear Left side
RF request
RH333
1K_0402_1%~D
@RH333
1K_0402_1%~D
@
12
RH356 0_0402_5%~DRH356 0_0402_5%~D1 2
RH332 10K_0402_5%~D@RH332 10K_0402_5%~D@1 2
RH15122.6_0402_1%~D
RH15122.6_0402_1%~D
1 2
CH
10
72
7P
_0
40
2_
50
V8
J~
D@
CH
10
72
7P
_0
40
2_
50
V8
J~
D@
1
2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D1 2
CH
10
92
7P
_0
40
2_
50
V8
J~
D@
CH
10
92
7P
_0
40
2_
50
V8
J~
D@
1
2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D1 2
RPH1
10K_1206_8P4R_5%~D
RPH1
10K_1206_8P4R_5%~D
1 82 73 64 5
RH338 0_0402_5%~DRH338 0_0402_5%~D1 2RH337 0_0402_5%~DRH337 0_0402_5%~D1 2
RH339 0_0402_5%~DRH339 0_0402_5%~D1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D1 2
CH
10
82
7P
_0
40
2_
50
V8
J~
D@
CH
10
82
7P
_0
40
2_
50
V8
J~
D@
1
2
RH335 0_0402_5%~DRH335 0_0402_5%~D1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D1 2
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD23AV5
RSVD1AY7
RSVD2AV7
RSVD3AU3
RSVD4BG4
RSVD5AT10
RSVD6BC8
RSVD7AU2
RSVD8AT4
RSVD17BB5
RSVD18BB3
RSVD19BB7
RSVD20BE8
RSVD21BD4
RSVD22BF6
RSVD9AT3
RSVD10AT1
RSVD11AY3
RSVD12AT5
RSVD13AV3
RSVD14AV1
RSVD15BB1
RSVD16BA3
RSVD25AT8
RSVD24AV10
RSVD26AY5
RSVD27BA2
RSVD28AT12
RSVD29BF3
PIRQA#K40
PIRQB#K38
PIRQC#H38
PIRQD#G38
REQ1# / GPIO50C46
REQ2# / GPIO52C44
REQ3# / GPIO54E40
GNT1# / GPIO51D47
GNT2# / GPIO53E42
GNT3# / GPIO55F46
PIRQE# / GPIO2G42
PIRQF# / GPIO3G40
PIRQG# / GPIO4C42
PIRQH# / GPIO5D44
USBP0NC24
USBP0PA24
USBP1NC25
USBP1PB25
USBP2NC26
USBP2PA26
USBP3NK28
USBP3PH28
USBP4NE28
USBP4PD28
USBP5NC28
USBP5PA28
USBP6NC29
USBP6PB29
USBP7NN28
USBP7PM28
USBP8NL30
USBP8PK30
USBP9NG30
USBP9PE30
USBP10NC30
USBP10PA30
USBP11NL32
USBP11PK32
USBP12NG32
USBP12PE32
USBP13NC32
USBP13PA32
PME#K10
CLKOUT_PCI0H49
CLKOUT_PCI1H43
CLKOUT_PCI2J48
USBRBIAS#C33
USBRBIASB33
OC0# / GPIO59A14
OC1# / GPIO40K20
OC2# / GPIO41B17
OC3# / GPIO42C16
OC4# / GPIO43L16
OC5# / GPIO9A16
OC6# / GPIO10D14
OC7# / GPIO14C14
CLKOUT_PCI4H40
CLKOUT_PCI3K42
PLTRST#C6
TP1BG26
TP2BJ26
TP3BH25
TP6AH38
TP7AH37
TP8AK43
TP9AK45
TP16Y13
TP17K24
TP18L24
TP19AB46
TP20AB45
TP21B21
TP22M20
TP23AY16
USB3Rn1BE28
USB3Rn2BC30
USB3Rn3BE32
USB3Rn4BJ32
USB3Rp1BC28
USB3Rp2BE30
USB3Rp3BF32
USB3Rp4BG32
USB3Tn1AV26
USB3Tn2BB26
USB3Tn3AU28
USB3Tn4AY30
USB3TP1AU26
USB3Tp2AY26
USB3Tp3AV28
USB3Tp4AW30
TP4BJ16
TP5BG16
TP15AM5
TP14AM4
TP13AH12
TP12H3
TP11N30
TP10C18
TP24BG46
RPH2
10K_1206_8P4R_5%~D
RPH2
10K_1206_8P4R_5%~D
1 82 73 64 5
RH331 10K_0402_5%~DRH331 10K_0402_5%~D1 2
RH105 22_0402_5%~DRH105 22_0402_5%~D12
CH1020.1U_0402_25V6K~DCH1020.1U_0402_25V6K~D
1 2
RH340 0_0402_5%~DRH340 0_0402_5%~D1 2
RH336 0_0402_5%~DRH336 0_0402_5%~D1 2
RH103 22_0402_5%~DRH103 22_0402_5%~D1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D1 2
CH
11
02
7P
_0
40
2_
50
V8
J~
D@
CH
11
02
7P
_0
40
2_
50
V8
J~
D@
1
2
RH160 22_0402_5%~DRH160 22_0402_5%~D12
RH342
1K_0402_1%~D
@RH342
1K_0402_1%~D
@1
2
T104PAD~D @T104PAD~D @
UH3
TC7SH08FU_SSOP5~D
UH3
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
RH327 10K_0402_5%~DRH327 10K_0402_5%~D1 2
RH102 22_0402_5%~DRH102 22_0402_5%~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_A20GATE
SIO_RCIN#
PM_LANPHY_ENABLE
MEDIA_DET#
TPM_ID0
PCH_GPIO17
SIO_EXT_SCI#
TPM_ID0
PCH_GPIO37
PCH_GPIO36
PCH_GPIO37
TEMP_ALERT#
TPM_ID1
PCH_GPIO17
TEMP_ALERT#
SIO_EXT_SCI#_R
TPM_ID1
USB_MCARD1_DET#
FFS_INT2
IO_LOOP#
IO_LOOP#
PCH_GPIO7
VSS_NCTF_32
VSS_NCTF_17
VSS_NCTF_29
VSS_NCTF_26
VSS_NCTF_25
VSS_NCTF_23
VSS_NCTF_15
VSS_NCTF_20
VSS_NCTF_16
VSS_NCTF_18
VSS_NCTF_30
VSS_NCTF_19
VSS_NCTF_21
VSS_NCTF_31
VSS_NCTF_28
VSS_NCTF_24
VSS_NCTF_27
VSS_NCTF_22
H_CPUPWRGD
SIO_RCIN#
PCH_GPIO69
INIT3_3V#
SIO_A20GATE
VSS_NCTF_4
VSS_NCTF_11
VSS_NCTF_5
VSS_NCTF_14
VSS_NCTF_2
VSS_NCTF_8
VSS_NCTF_13
VSS_NCTF_7
VSS_NCTF_9
VSS_NCTF_3
VSS_NCTF_10
VSS_NCTF_12
VSS_NCTF_6
VSS_NCTF_1
PCH_GPIO69
PCH_THRMTRIP#_R
SIO_EXT_WAKE# USH_DET#
EXPRCRD_DET#
CONTACTLESS_DET#
DF_TVS
NC_1
SIO_EXT_SCI#
KB_DET#
MEDIA_DET#
DF_TVSDF_TVS_R
CONTACTLESS_DET#
PCH_GPIO36
PCIE_MCARD3_DET#
KB_DET#
PCH_GPIO15
PCH_GPIO15
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
PCH_GPIO17
PCH_GPIO16
PCH_GPIO37
PCH_GPIO36
PCH_GPIO7
USH_DET#
PCH_GPIO16
PCH_GPIO16
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+3.3V_ALW_PCH
+VCCDFTERM
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PM_LANPHY_ENABLE<31>
SIO_EXT_SCI#<40>
PCIE_MCARD1_DET#<34>
TEMP_ALERT#<39>
USB_MCARD1_DET#<34>
FFS_INT2<27>
SIO_A20GATE <40>
H_CPUPWRGD <7>
SIO_RCIN# <40>
IO_LOOP#<30>
MEDIA_DET#<30>
KB_DET#<41>
CONTACTLESS_DET# <32>
PCIE_MCARD3_DET# <34>
SIO_EXT_WAKE#<39>
USB_MCARD2_DET# <34>
SLP_ME_CSW_DEV#<39>
H_SNB_IVB#<7>
EXPRCRD_DET#<35>
USH_DET#<32>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (5/8)
18 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
TPM_ID1TPM_ID0
0
1
0
0
01
1 1
China TPM
USH1.0 (For SSI)
USH2.0
No TPM, No China TPM
Layout note:Trace wide 10mil & length 30milAll NCTF pins should have thick traces at 45°from the pad.
Layout note:Trace wide 10mil & length 30milAll NCTF pins should have thick traces at 45°from the pad.
DMI & FDI Termination Voltage
DF_TVSSet to Vss when LOW
Set to Vcc when HIGH
PLACE RH150 CLOSE TO THE BRANCHING POINT
( TO CPU and NVRAM CONNECTOR)
RH149 need to close to CPU
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
Note: PCH has internal pull up 20k ohm onE3_PAID_TS_DET# (GPIO27)
RH53
4.7K_0402_5%~D
RH53
4.7K_0402_5%~D
12
RH172 10K_0402_5%~DRH172 10K_0402_5%~D12
RH177 10K_0402_5%~DRH177 10K_0402_5%~D12
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@12
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@12
RH358 1K_0402_1%~DRH358 1K_0402_1%~D1 2
RH26710K_0402_5%~D
1@ RH26710K_0402_5%~D
1@
12
CH97
0.1U_0402_25V6K~D
CH97
0.1U_0402_25V6K~D
1
2
RH150 0_0402_5%~DRH150 0_0402_5%~D1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D1 2
RH1492.2K_0402_5%~DRH1492.2K_0402_5%~D
12
RH266 10K_0402_5%~DRH266 10K_0402_5%~D12
RH27010K_0402_5%~D
2@ RH27010K_0402_5%~D
2@
12
RH265 10K_0402_5%~D@RH265 10K_0402_5%~D@12
RH164 100K_0402_5%~DRH164 100K_0402_5%~D1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D1 2
RH353
1K_0402_1%~D
@
RH353
1K_0402_1%~D
@
12
T106PAD~D@
T106PAD~D@
T108PAD~D @T108PAD~D @
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
GPIO27E16
GPIO28P8
GPIO24E8
GPIO57D6
LAN_PHY_PWR_CTRL / GPIO12C4
VSS_NCTF_1A4
VSS_NCTF_2A44
VSS_NCTF_3A45
VSS_NCTF_4A46
VSS_NCTF_5A5
VSS_NCTF_6A6
VSS_NCTF_7B3
VSS_NCTF_8B47
VSS_NCTF_9BD1
VSS_NCTF_10BD49
VSS_NCTF_11BE1
VSS_NCTF_12BE49
TACH2 / GPIO6H36
TACH0 / GPIO17D40
TACH3 / GPIO7E38
SATA3GP / GPIO37M5
SATA5GP / GPIO49 / TEMP_ALERT#V3
SCLOCK / GPIO22T5
SLOAD / GPIO38N2
SDATAOUT0 / GPIO39M3
SDATAOUT1 / GPIO48V13
PROCPWRGDAY11
RCIN#P5
PECIAU16
THRMTRIP#AY10
GPIO8C10
BMBUSY# / GPIO0T7
GPIO15G2
TACH1 / GPIO1A42
SATA2GP / GPIO36V8
INIT3_3V#T14
STP_PCI# / GPIO34K1
GPIO35K4
SATA4GP / GPIO16U2
VSS_NCTF_32F49
A20GATEP4
TACH4 / GPIO68C40
TACH6 / GPIO70C41
TACH7 / GPIO71A40
TACH5 / GPIO69B41
VSS_NCTF_17BH3
VSS_NCTF_18BH47
VSS_NCTF_19BJ4
VSS_NCTF_20BJ44
VSS_NCTF_21BJ45
VSS_NCTF_22BJ46
VSS_NCTF_23BJ5
VSS_NCTF_24BJ6
VSS_NCTF_25C2
VSS_NCTF_26C48
VSS_NCTF_27D1
VSS_NCTF_28D49
VSS_NCTF_29E1
VSS_NCTF_30E49
VSS_NCTF_31F1
TS_VSS4AK10
TS_VSS3AH10
TS_VSS2AK11
TS_VSS1AH8
NC_1P37
VSS_NCTF_13BF1
VSS_NCTF_14BF49
VSS_NCTF_15BG2
VSS_NCTF_16BG48
DF_TVSAY1
RH263 10K_0402_5%~DRH263 10K_0402_5%~D1 2
RH2712.2K_0402_5%~D
4@ RH2712.2K_0402_5%~D
4@
12
RH26820K_0402_5%~D
3@ RH26820K_0402_5%~D
3@
12
RH170 10K_0402_5%~DRH170 10K_0402_5%~D12
RH256 10K_0402_5%~DRH256 10K_0402_5%~D12
RH354 1K_0402_1%~DRH354 1K_0402_1%~D1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D12
RH259 0_0402_5%~DRH259 0_0402_5%~D1 2
RH158 10K_0402_5%~DRH158 10K_0402_5%~D12
RH262 56_0402_5%~DRH262 56_0402_5%~D12
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D1 2
RH260 1.5K_0402_1%~DRH260 1.5K_0402_1%~D1 2
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@12
RH181 10K_0402_5%~DRH181 10K_0402_5%~D12
RH272 10K_0402_5%~DRH272 10K_0402_5%~D1 2
RH203 10K_0402_5%~DRH203 10K_0402_5%~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VCCCLKDMI
+VCCADAC
+1.8V_RUN_LVDS
+VCCSPI
+VCCAPLLEXP
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
+1.8V_RUN
+VCCDFTERM
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VTT
+3.3V_M
+3.3V_RUN
+1.05V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (6/8)
19 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
INTEL feedback 0302
INTEL feedback 0307
3.3
1.05
1.05
1.1
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccASW
VccADAC3
VccADPLLA
VccADPLLB
VccSPI
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
1.05
0.001
0.001
0.001
0.228
0.903
0.063
0.08
0.08
0.047
1.7
0.01
5
VoltageS0 Iccmax
Current (A)
1.05
VccDSW3_3 0.001
3.3
3.3
VccDIFFCLKN 0.055
1.05VccIO 3.711
1.8 0.002VCCDFTERM
3.3VccRTC 2 (mA)
1.05VccClkDMI 0.07
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccSSC
VccALVDS 3.3
1.8VccTX_LVDS 0.04
0.001
0.095
PCH Power Rail Table
CH
47
1U
_0
40
2_
6.3
V6
K~
DC
H4
71
U_
04
02
_6
.3V
6K
~D
1
2
PJP66
PAD-OPEN1x1m
PJP66
PAD-OPEN1x1m
1 2
RH202 0_0603_5%~DRH202 0_0603_5%~D12
LH8100NH_HK1608R10J-T_5%_0603~D
LH8100NH_HK1608R10J-T_5%_0603~D
12
CH
10
52
2U
_0
80
5_
6.3
V6
M~
DC
H1
05
22
U_
08
05
_6
.3V
6M
~D
1
2
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
VCCCORE[1]AA23
VCCCORE[2]AC23
VCCCORE[3]AD21
VCCCORE[4]AD23
VCCCORE[5]AF21
VCCCORE[6]AF23
VCCCORE[7]AG21
VCCCORE[8]AG23
VCCCORE[9]AG24
VCCCORE[10]AG26
VCCCORE[11]AG27
VCCCORE[12]AG29
VCCCORE[13]AJ23
VCCCORE[14]AJ26
VCCCORE[15]AJ27
VCCDFTERM[4]AJ17
VCCDFTERM[3]AJ16
VCCIO[17]AN21
VCCIO[18]AN26
VCCIO[19]AN27
VCCIO[20]AP21
VCCIO[23]AP26
VCCIO[24]AT24
VCCIO[15]AN16
VCCIO[16]AN17
VCCIO[21]AP23
VCCIO[22]AP24
VCCADACU48
VCCTX_LVDS[1]AM37
VCCTX_LVDS[2]AM38
VCCALVDSAK36
VCCVRM[3]AT16
VCCVRM[2]AP16
VCCAPLLEXPBJ22
VccAFDIPLLBG6
VCCIO[28]AN19
VCCTX_LVDS[4]AP37
VCCTX_LVDS[3]AP36
VSSADACU47
VSSALVDSAK37
VCCIO[27]AP17
VCC3_3[6]V33
VCC3_3[7]V34
VCC3_3[3]BH29
VCCDFTERM[2]AG17
VCCDFTERM[1]AG16
VCCDMI[1]AT20
VCCIO[25]AN33
VCCIO[26]AN34
VCCCORE[16]AJ29
VCCCORE[17]AJ31
VCCSPIV1
VCCCLKDMIAB36
VCCDMI[2]AU20
LH1
BLM18PG181SN1_0603~D
LH1
BLM18PG181SN1_0603~D12
CH
10
61
0U
_0
60
3_
6.3
V6
M~
D
@
CH
10
61
0U
_0
60
3_
6.3
V6
M~
D
@1
2
CH
33
1U
_0
40
2_
6.3
V6
K~
DC
H3
31
U_
04
02
_6
.3V
6K
~D
1
2
CH
10
40
.01
U_
04
02
_1
6V
7K
~D
CH
10
40
.01
U_
04
02
_1
6V
7K
~D
1
2
CH
40
10
U_
06
03
_6
.3V
6M
~D
@
CH
40
10
U_
06
03
_6
.3V
6M
~D
@1
2
CH
31
1U
_0
40
2_
6.3
V6
K~
DC
H3
11
U_
04
02
_6
.3V
6K
~D
1
2
RH197 0_0603_5%~DRH197 0_0603_5%~D12
CH541U_0402_6.3V6K~DCH541U_0402_6.3V6K~D
1
2
CH
10
30
.01
U_
04
02
_1
6V
7K
~D
CH
10
30
.01
U_
04
02
_1
6V
7K
~D
1
2
CH
46
1U
_0
40
2_
6.3
V6
K~
DC
H4
61
U_
04
02
_6
.3V
6K
~D
1
2
CH
44
10
U_
06
03
_6
.3V
6M
~D
CH
44
10
U_
06
03
_6
.3V
6M
~D
1
2
CH
30
10
U_
06
03
_6
.3V
6M
~D
CH
30
10
U_
06
03
_6
.3V
6M
~D
1
2
CH
35
0.1
U_
04
02
_1
0V
7K
~D
CH
35
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
45
1U
_0
40
2_
6.3
V6
K~
DC
H4
51
U_
04
02
_6
.3V
6K
~D
1
2RH205 0_0603_5%~DRH205 0_0603_5%~D
12
CH491U_0402_6.3V6K~DCH491U_0402_6.3V6K~D
1 2
RH204 0_0603_5%~D@RH204 0_0603_5%~D@12
CH
34
0.0
1U
_0
40
2_
16
V7
K~
DC
H3
40
.01
U_
04
02
_1
6V
7K
~D
1
2
RH247 1UH_LB2012T1R0M_20%~D@ RH247 1UH_LB2012T1R0M_20%~D@1 2
CH520.1U_0402_10V7K~DCH520.1U_0402_10V7K~D
1
2
CH
48
1U
_0
40
2_
6.3
V6
K~
DC
H4
81
U_
04
02
_6
.3V
6K
~D
1
2
CH43
0.1U_0402_10V7K~D
CH43
0.1U_0402_10V7K~D
1
2
CH501U_0402_6.3V6K~DCH501U_0402_6.3V6K~D
1
2
CH
51
0.1
U_
04
02
_1
0V
7K
~D
CH
51
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
32
1U
_0
40
2_
6.3
V6
K~
DC
H3
21
U_
04
02
_6
.3V
6K
~D
1
2
CH
36
10
U_
06
03
_6
.3V
6M
~D
CH
36
10
U_
06
03
_6
.3V
6M
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCDSW3_3
+3.3V_RUN_VCC_CLKF33
+3.3V_RUN_VCC_CLKF33
+VCCRTCEXT
+VCCSST
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL+VCCSATAPLL
+VCCAPLL_CPY_PCH
+3.3V_RUN+5V_RUN
+3.3V_ALW_PCH+5V_ALW_PCH
+5V_ALW_PCH+5V_ALW
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+1.05V_M
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_M
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
+RTC_CELL
+1.05V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+3.3V_ALW2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
+1.05V_RUN
ALW_ENABLE<42>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (7/8)
20 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
CRB 0.7 RH208,RH213 trace width 20mil.
Note: Place VCCDIFFCLKN with a trace
specially for XCLK_RCOMP (RH100.2)
Note: If EMI concern, pop
with SHI00008S0L, 10UH +-20%
CH854.7U_0603_6.3V6K~D
CH854.7U_0603_6.3V6K~D
1
2
CH
66
0.1
U_
04
02
_1
0V
7K
~D
CH
66
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH711U_0603_10V7K~DCH711U_0603_10V7K~D
1
2
CH
92
1U
_0
40
2_
6.3
V6
K~
DC
H9
21
U_
04
02
_6
.3V
6K
~D
1
2
RH
27
82
0K
_0
40
2_
5%
~D
RH
27
82
0K
_0
40
2_
5%
~D
12
+
CH
95
22
0U
_B
2_
2.5
VM
_R
35
M~
D
+
CH
95
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
CH
89
0.1
U_
04
02
_1
0V
7K
~D
CH
89
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH550.1U_0402_10V7K~DCH550.1U_0402_10V7K~D
1
2
CH8010U_0603_6.3V6M~D@CH8010U_0603_6.3V6M~D@
1
2
DH2
RB751S40T1_SOD523-2~D
DH2
RB751S40T1_SOD523-2~D
21
CH811U_0402_6.3V6K~DCH811U_0402_6.3V6K~D
1 2
CH
69
1U
_0
40
2_
6.3
V6
K~
DC
H6
91
U_
04
02
_6
.3V
6K
~D
1
2
CH
68
1U
_0
40
2_
6.3
V6
K~
DC
H6
81
U_
04
02
_6
.3V
6K
~D
1
2
CH840.1U_0402_10V7K~D
CH840.1U_0402_10V7K~D
1
2
CH
73
10
U_
06
03
_6
.3V
6M
~D
@
CH
73
10
U_
06
03
_6
.3V
6M
~D
@
1
2
CH961U_0402_6.3V6K~DCH961U_0402_6.3V6K~D
1
2
CH
64
22
U_
08
05
_6
.3V
6M
~D
CH
64
22
U_
08
05
_6
.3V
6M
~D
1
2
+
CH
94
22
0U
_B
2_
2.5
VM
_R
35
M~
D
+
CH
94
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
LH310UH_LBR2012T100M_20%~D
@ LH310UH_LBR2012T100M_20%~D
@
1 2
CH
59
0.1
U_
04
02
_1
0V
7K
~D
CH
59
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
60
0.1
U_
04
02
_1
0V
7K
~D
CH
60
0.1
U_
04
02
_1
0V
7K
~D
1
2
LH510UH_LBR2012T100M_20%~D
@LH510UH_LBR2012T100M_20%~D
@
1 2
CH720.1U_0402_10V7K~DCH720.1U_0402_10V7K~D
1
2
CH
93
1U
_0
40
2_
6.3
V6
K~
DC
H9
31
U_
04
02
_6
.3V
6K
~D
1
2
CH821U_0402_6.3V6K~DCH821U_0402_6.3V6K~D
1
2
RH20810_0402_1%~D
RH20810_0402_1%~D
12
CH771U_0402_6.3V6K~DCH771U_0402_6.3V6K~D
1
2
CH760.1U_0402_10V7K~DCH760.1U_0402_10V7K~D
1
2
RH201 0_0402_5%~DRH201 0_0402_5%~D1 2
RH215 0.022_0805_1%RH215 0.022_0805_1%1 2
CH
98
0.1
U_
04
02
_1
0V
7K
~D
CH
98
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
74
1U
_0
40
2_
6.3
V6
K~
DC
H7
41
U_
04
02
_6
.3V
6K
~D
1
2
CH701U_0603_10V7K~DCH701U_0603_10V7K~D
1
2
CH750.1U_0402_10V7K~DCH750.1U_0402_10V7K~D
1
2
CH791U_0402_6.3V6K~DCH791U_0402_6.3V6K~D
1
2
LH710UH_LBR2012T100M_20%~D
LH710UH_LBR2012T100M_20%~D
1 2
CH
67
1U
_0
40
2_
6.3
V6
K~
DC
H6
71
U_
04
02
_6
.3V
6K
~D
1
2
CH
65
22
U_
08
05
_6
.3V
6M
~D
CH
65
22
U_
08
05
_6
.3V
6M
~D
1
2
CH910.1U_0402_10V7K~DCH910.1U_0402_10V7K~D
1
2
CH
58
10
U_
06
03
_6
.3V
6M
~D
@
CH
58
10
U_
06
03
_6
.3V
6M
~D
@
1
2
CH780.1U_0402_10V7K~DCH780.1U_0402_10V7K~D
1
2
RH253 0_0402_5%~D@RH253 0_0402_5%~D@1 2
G
D S
QH4SSM3K7002FU_SC70-3~D G
D S
QH4SSM3K7002FU_SC70-3~D 2
1 3
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
DCPSUSBYPV12
VCCASW[1]AA19
VCCASW[2]AA21
VCCASW[3]AA24
VCCASW[5]AA27
VCCASW[6]AA29
VCCSUSHDAP32
VCCSUS3_3[6]P24
VCCIO[34]T26
VCCIO[4]AD17
VCCASW[7]AA31
VCCASW[8]AC26
VCCASW[9]AC27
VCCASW[10]AC29
VCCASW[11]AC31
VCCASW[12]AD29
V5REFP34
VCC3_3[4]T34
VCCRTCA22
VCCSUS3_3[10]V24
VCCSUS3_3[9]V23
VCCSUS3_3[8]T24
VCCSUS3_3[7]T23
VCCIO[2]AC16
VCCADPLLBBF47
VCCDIFFCLKN[1]AF33
V5REF_SUSM26
VCCIO[3]AC17
DCPSUS[1]T17
VCCSSCAG33
VCCADPLLABD47
VCCVRM[4]Y49
VCCACLKAD49
DCPRTCN16
VCCASW[4]AA26
VCCDIFFCLKN[2]AF34
VCCIO[7]AF17
DCPSSTV16
VCCIO[5]AF13
VCCASW[22]T21
VCCASW[23]V21
VCCASW[21]T19
VCC3_3[1]AA16
VCC3_3[8]W16
VCCSUS3_3[2]N20
VCCSUS3_3[3]N22
VCCSUS3_3[4]P20
VCCSUS3_3[5]P22
VCCIO[29]N26
VCCIO[30]P26
VCCIO[31]P28
VCCIO[32]T27
V_PROC_IOBJ8
VCCIO[33]T29
VCCDIFFCLKN[3]AG34
VCCASW[13]AD31
VCCASW[14]W21
VCCASW[15]W23
VCCASW[16]W24
VCCASW[17]W26
VCCASW[18]W29
VCCASW[19]W31
VCCASW[20]W33
VCCIO[6]AF14
VCCVRM[1]AF11
VCCIO[12]AH13
VCCIO[13]AH14
VCC3_3[2]AJ2
VCCAPLLSATAAK1
DCPSUS[3]AL24
VCCIO[14]AL29
DCPSUS[4]AN23
VCCSUS3_3[1]AN24
VCCAPLLDMI2BH23
DCPSUS[2]V19
VCCDSW3_3T16
VCC3_3[5]T38
CH
87
0.1
U_
04
02
_1
0V
7K
~D
CH
87
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH630.1U_0402_10V7K~DCH630.1U_0402_10V7K~D
1
2
DH3
RB751S40T1_SOD523-2~D
DH3
RB751S40T1_SOD523-2~D
21
CH
88
0.1
U_
04
02
_1
0V
7K
~D
CH
88
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH21310_0402_1%~D
RH21310_0402_1%~D
12
LH610UH_LBR2012T100M_20%~D
LH610UH_LBR2012T100M_20%~D
1 2
CH901U_0402_6.3V6K~DCH901U_0402_6.3V6K~D
1
2
CH
86
0.1
U_
04
02
_1
0V
7K
~D
CH
86
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH561U_0402_6.3V6K~DCH561U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCH (8/8)
21 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
UH4I
BD82PPSM-QNHN-A0_BGA989~D
UH4I
BD82PPSM-QNHN-A0_BGA989~D
VSS[159]AY4
VSS[160]AY42
VSS[161]AY46
VSS[162]AY8
VSS[163]B11
VSS[164]B15
VSS[165]B19
VSS[166]B23
VSS[167]B27
VSS[168]B31
VSS[169]B35
VSS[170]B39
VSS[171]B7
VSS[173]BB12
VSS[174]BB16
VSS[175]BB20
VSS[176]BB22
VSS[177]BB24
VSS[178]BB28
VSS[179]BB30
VSS[180]BB38
VSS[181]BB4
VSS[182]BB46
VSS[183]BC14
VSS[184]BC18
VSS[185]BC2
VSS[186]BC22
VSS[187]BC26
VSS[188]BC32
VSS[189]BC34
VSS[190]BC36
VSS[191]BC40
VSS[192]BC42
VSS[193]BC48
VSS[194]BD46
VSS[195]BD5
VSS[196]BE22
VSS[197]BE26
VSS[198]BE40
VSS[199]BF10
VSS[200]BF12
VSS[201]BF16
VSS[202]BF20
VSS[203]BF22
VSS[204]BF24
VSS[205]BF26
VSS[206]BF28
VSS[207]BD3
VSS[208]BF30
VSS[209]BF38
VSS[210]BF40
VSS[211]BF8
VSS[212]BG17
VSS[213]BG21
VSS[214]BG33
VSS[215]BG44
VSS[216]BG8
VSS[217]BH11
VSS[218]BH15
VSS[219]BH17
VSS[220]BH19
VSS[222]BH27
VSS[223]BH31
VSS[224]BH33
VSS[225]BH35
VSS[226]BH39
VSS[227]BH43
VSS[228]BH7
VSS[229]D3
VSS[230]D12
VSS[231]D16
VSS[232]D18
VSS[233]D22
VSS[234]D24
VSS[235]D26
VSS[236]D30
VSS[237]D32
VSS[264]K7
VSS[265]L18
VSS[266]L2
VSS[267]L20
VSS[268]L26
VSS[269]L28
VSS[270]L36
VSS[271]L48
VSS[272]M12
VSS[273]P16
VSS[274]M18
VSS[275]M22
VSS[276]M24
VSS[277]M30
VSS[278]M32
VSS[279]M34
VSS[280]M38
VSS[281]M4
VSS[282]M42
VSS[283]M46
VSS[284]M8
VSS[285]N18
VSS[286]P30
VSS[288]P11
VSS[289]P18
VSS[290]T33
VSS[291]P40
VSS[292]P43
VSS[293]P47
VSS[294]P7
VSS[295]R2
VSS[296]R48
VSS[297]T12
VSS[298]T31
VSS[299]T37
VSS[300]T4
VSS[301]W34
VSS[302]T46
VSS[303]T47
VSS[304]T8
VSS[305]V11
VSS[306]V17
VSS[307]V26
VSS[308]V27
VSS[309]V29
VSS[310]V31
VSS[311]V36
VSS[312]V39
VSS[313]V43
VSS[314]V7
VSS[315]W17
VSS[316]W19
VSS[238]D34
VSS[239]D38
VSS[240]D42
VSS[241]D8
VSS[242]E18
VSS[243]E26
VSS[244]G18
VSS[245]G20
VSS[246]G26
VSS[247]G28
VSS[248]G36
VSS[249]G48
VSS[250]H12
VSS[251]H18
VSS[317]W2
VSS[318]W27
VSS[319]W48
VSS[320]Y12
VSS[321]Y38
VSS[322]Y4
VSS[323]Y42
VSS[324]Y46
VSS[325]Y8
VSS[328]BG29
VSS[329]N24
VSS[330]AJ3
VSS[287]N47
VSS[252]H22
VSS[253]H24
VSS[254]H26
VSS[255]H30
VSS[256]H32
VSS[257]H34
VSS[258]F3
VSS[262]K39
VSS[263]K46
VSS[259]H46
VSS[260]K18
VSS[261]K26
VSS[331]AD47
VSS[333]B43
VSS[334]BE10
VSS[335]BG41
VSS[337]G14
VSS[338]H16
VSS[340]T36
VSS[342]BG22
VSS[343]BG24
VSS[344]C22
VSS[345]AP13
VSS[172]F45
VSS[221]H10
VSS[346]M14
VSS[347]AP3
VSS[348]AP1
VSS[349]BE16
VSS[350]BC16
VSS[351]BG28
VSS[352]BJ28
UH4H
BD82PPSM-QNHN-A0_BGA989~D
UH4H
BD82PPSM-QNHN-A0_BGA989~D
VSS[1]AA17
VSS[2]AA2
VSS[3]AA3
VSS[5]AA34
VSS[6]AB11
VSS[7]AB14
VSS[8]AB39
VSS[9]AB4
VSS[10]AB43
VSS[11]AB5
VSS[12]AB7
VSS[13]AC19
VSS[14]AC2
VSS[15]AC21
VSS[16]AC24
VSS[17]AC33
VSS[18]AC34
VSS[19]AC48
VSS[20]AD10
VSS[21]AD11
VSS[22]AD12
VSS[23]AD13
VSS[24]AD19
VSS[25]AD24
VSS[26]AD26
VSS[27]AD27
VSS[28]AD33
VSS[29]AD34
VSS[30]AD36
VSS[31]AD37
VSS[33]AD39
VSS[34]AD4
VSS[35]AD40
VSS[36]AD42
VSS[37]AD43
VSS[38]AD45
VSS[39]AD46
VSS[43]AF10
VSS[44]AF12
VSS[46]AD16
VSS[47]AF16
VSS[48]AF19
VSS[49]AF24
VSS[50]AF26
VSS[51]AF27
VSS[52]AF29
VSS[53]AF31
VSS[54]AF38
VSS[55]AF4
VSS[56]AF42
VSS[57]AF46
VSS[59]AF7
VSS[60]AF8
VSS[61]AG19
VSS[62]AG2
VSS[63]AG31
VSS[64]AG48
VSS[65]AH11
VSS[66]AH3
VSS[67]AH36
VSS[68]AH39
VSS[69]AH40
VSS[70]AH42
VSS[71]AH46
VSS[72]AH7
VSS[73]AJ19
VSS[76]AJ33
VSS[77]AJ34
VSS[78]AK12
VSS[79]AK3
VSS[80]AK38
VSS[81]AK4
VSS[82]AK42
VSS[83]AK46
VSS[84]AK8
VSS[85]AL16
VSS[86]AL17
VSS[87]AL19
VSS[88]AL2
VSS[89]AL21
VSS[90]AL23
VSS[91]AL26
VSS[92]AL27
VSS[93]AL31
VSS[96]AL48
VSS[97]AM11
VSS[98]AM14
VSS[99]AM36
VSS[100]AM39
VSS[102]AM45
VSS[103]AM46
VSS[104]AM7
VSS[105]AN2
VSS[106]AN29
VSS[107]AN3
VSS[108]AN31
VSS[109]AP12
VSS[110]AP19
VSS[111]AP28
VSS[112]AP30
VSS[113]AP32
VSS[114]AP38
VSS[116]AP42
VSS[117]AP46
VSS[118]AP8
VSS[119]AR2
VSS[120]AR48
VSS[121]AT11
VSS[122]AT13
VSS[123]AT18
VSS[124]AT22
VSS[125]AT26
VSS[126]AT28
VSS[127]AT30
VSS[128]AT32
VSS[131]AT42
VSS[132]AT46
VSS[133]AT7
VSS[134]AU24
VSS[135]AU30
VSS[136]AV16
VSS[137]AV20
VSS[138]AV24
VSS[139]AV30
VSS[140]AV38
VSS[141]AV4
VSS[142]AV43
VSS[143]AV8
VSS[144]AW14
VSS[145]AW18
VSS[146]AW2
VSS[147]AW22
VSS[148]AW26
VSS[149]AW28
VSS[150]AW32
VSS[151]AW34
VSS[152]AW36
VSS[153]AW40
VSS[154]AW48
VSS[155]AV11
VSS[156]AY12
VSS[157]AY22
VSS[158]AY28
VSS[40]AD8
VSS[42]AE3
VSS[45]AD14
VSS[115]AP4
VSS[0]H5
VSS[58]AF5
VSS[32]AD38
VSS[4]AA33
VSS[74]AJ21
VSS[75]AJ24
VSS[41]AE2
VSS[129]AT34
VSS[130]AT39
VSS[101]AM43
VSS[95]AL34
VSS[94]AL33
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_N_4022
BC_INT#_EMC4022
POWER_SW#
FAN1_TACH_FB
VSET_4022
REM_DIODE1_P_4022REM_DIODE1_N_4022
+VCC_4022
3V_PWROK#
VDD_PWRGDTHERMATRIP2#
VSET_4022
+ADDR_XEN
FAN1_TACH_FB
BC_INT#_EMC4022
POWER_SW#
FAN1_DET#
REM_DIODE2_P_4022
VCP2
THERMATRIP2#
+FAN1_VOUTFAN1_TACH_FB
FAN1_DET#
THERMATRIP3#
THERMATRIP3#
REM_DIODE2_P_4022REM_DIODE2_N_4022
FAN1_DET#
+3.3V_M
+RTC_CELL
+3.3V_M
+RTC_CELL
+3.3V_M
+5V_RUN
+3.3V_RUN
+RTC_CELL
+FAN1_VOUT
+FAN1_VOUT
+VCC_4022
+1.05V_RUN_VTT
+3.3V_M
+3.3V_M
DOCK_PWR_SW# <40>
POWER_SW_IN# <40>
BC_CLK_EMC4022 <40>BC_DAT_EMC4022 <40>
PCH_PWRGD#<40>
BC_INT#_EMC4022 <40>
ACAV_IN <40,53,55>
THERM_STP# <46>
H_THERMTRIP#<7>
MAX8731_IINP<53>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
FAN & Thermal Sensor
22 56Thursday, June 23, 2011
Compal Electronics, Inc.
Place under CPU
Place C266 close to the Q12 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Rest=1400 Tp=94degree
DELL CONFIDENTIAL/PROPRIETARY
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
SMSC request
Change to EMC4021 for cost saving
Link Done
SMSC request
E
B
C
Q14MMBT3904WT1G_SC70-3~D
E
B
C
Q14MMBT3904WT1G_SC70-3~D
2
31
R3874.7K_0402_5%~D R3874.7K_0402_5%~D12
C2
19
22
U_
08
05
_6
.3V
6M
~D
C2
19
22
U_
08
05
_6
.3V
6M
~D
1
2
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K~D12
C2
73
0.1
U_
04
02
_2
5V
6K
~D
C2
73
0.1
U_
04
02
_2
5V
6K
~D
1
2
R390 47K_0402_1%~D@R390 47K_0402_1%~D@1 2
R388
22_0402_5%~D
R388
22_0402_5%~D
12
R391 1K_0402_1%~DR391 1K_0402_1%~D1 2
E
B
C
Q16PMST3904_SOT323-3~D
E
B
C
Q16PMST3904_SOT323-3~D
2
31
10
U_
08
05
_1
0V
6K
~D
C2
76
10
U_
08
05
_1
0V
6K
~D
C2
76
1
2
R3992.2K_0402_5%~DR3992.2K_0402_5%~D
1 2
D2
RB
75
1S
40
T1
_S
OD
52
3-2
~D
D2
RB
75
1S
40
T1
_S
OD
52
3-2
~D
21
R3958.2K_0402_5%~DR3958.2K_0402_5%~D
12
C2
77
10
0P
_0
40
2_
50
V8
J~
D
@
C2
77
10
0P
_0
40
2_
50
V8
J~
D
@1
2
C2
75
0.1
U_
04
02
_2
5V
6K
~D
C2
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
U10TC7SH08FU_SSOP5~D
U10TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D1 2
C1
17
91
U_
04
02
_6
.3V
6K
~D
C1
17
91
U_
04
02
_6
.3V
6K
~D
1
2
C2
82
0.1
U_
04
02
_2
5V
6K
~D
C2
82
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
05
10
U_
06
03
_6
.3V
6M
~D
C3
05
10
U_
06
03
_6
.3V
6M
~D
1
2
C2
74
1U
_0
40
2_
6.3
V6
K~
DC
27
41
U_
04
02
_6
.3V
6K
~D
1
2
R385 10K_0402_5%~DR385 10K_0402_5%~D12
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D1 2
JFAN1
TYCO_2-1775293-4~D
CONN@JFAN1
TYCO_2-1775293-4~D
CONN@
11
22
33
GND5
GND6
44
E
B
C
Q12MMBT3904WT1G_SC70-3~D
E
B
C
Q12MMBT3904WT1G_SC70-3~D
2
31
E
B
C
Q13MMBT3904WT1G_SC70-3~D
E
B
C
Q13MMBT3904WT1G_SC70-3~D
2
31
C272100P_0402_50V8J~D
@C272100P_0402_50V8J~D
@
1
2
R40410K_0402_5%~D
R40410K_0402_5%~D
12
R426 10K_0402_5%~DR426 10K_0402_5%~D12
C2800.1U_0402_25V6K~DC2800.1U_0402_25V6K~D
1
2
C7
38
0.1
U_
04
02
_2
5V
6K
~D
C7
38
0.1
U_
04
02
_2
5V
6K
~D
1
2
R389 10K_0402_5%~DR389 10K_0402_5%~D1 2
U6
EMC4022-1-EZK-TR_QFN32_5X5~D
U6
EMC4022-1-EZK-TR_QFN32_5X5~D
VDDH2
VDDH3
DP1/VREF_T24
DN2/DP426
FAN_OUT4
FAN_OUT5
THERMTRIP2#17
VDDL6
SMDATA/BC_DATA7
SMCLK/BC_CLK8
POWER_SW#20
ACAVAIL_CLR21
DP2/DN427
VSET28
DN1/THERM23
SYS_SHDN#19
THERMTRIP3#18
GPIO211
ATF_INT#/BC_IRQ#9
TACH/GPIO110
3V_PWROK#12
RTC_PWR3V16
DN3/DP529
DP3/DN530
VCP31
ADDR_MODE/XEN32
VDD1
VSS33
VDD_PWRGD13
GPIO3/PWM/THERMTRIP_SIO15
VIN25
TEST114
TEST222
R402 10K_0402_5%~DR402 10K_0402_5%~D12
R3934.7K_0402_5%~D R3934.7K_0402_5%~D1 2
R40310K_0402_5%~D
R40310K_0402_5%~D
12
C266100P_0402_50V8J~D
@C266
100P_0402_50V8J~D
@
1
2
R4058.2K_0402_5%~DR4058.2K_0402_5%~D
12
C2
78
0.1
U_
04
02
_2
5V
6K
~D
C2
78
0.1
U_
04
02
_2
5V
6K
~D
1
2
R4061.4K_0402_1%~DR4061.4K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_SRC_ON
EN_LCDPWR
CCD_OFF
EN_INVPWR
USBP12- USBP12_D-
USBP12_D+USBP12+
LDDC_CLK_PCH
LDDC_DATA_PCH
BIA_PWM_LVDS DISP_ON
BATT_YELLOW_LEDBATT_WHITE_LED
BIA_PWM_LVDS_LDISP_ON
BIA_PWM_LVDS
USBP12_D+USBP12_D-
LCD_A2+_PCH
LCD_A1+_PCHLCD_A1-_PCH
LCD_ACLK+_PCHLCD_ACLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCHLCD_A0+_PCH
CAM_MIC_CBL_DET#
DMIC0
DMIC_CLK
LDDC_CLK_PCH
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LDDC_DATA_PCHLDDC_CLK_PCH
BREATH_WHITE_LED
+3.3V_ALW
+PWR_SRC_S +3.3V_ALW
+LCDVDD
+LCDVDD
+PWR_SRC
+BL_PWR_SRC
+CAMERA_VDD
+3.3V_RUN
+3.3V_RUN
+LCDVDD +3.3V_RUN
+BL_PWR_SRC
+CAMERA_VDD
+BL_PWR_SRC
+5V_ALW
+LCDVDD+3.3V_RUN
+5V_ALW
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
CCD_OFF<39>
EN_INVPWR<40>
USBP12-<17>
USBP12+<17>
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
BREATH_WHITE_LED <43>BATT_YELLOW_LED <43>BATT_WHITE_LED <43>
LCD_CBL_DET# <17>
DMIC0 <29>
DMIC_CLK <29>
LCD_A1+_PCH <16>LCD_A1-_PCH <16>
LCD_ACLK+_PCH <16>LCD_ACLK-_PCH <16>
LCD_A2+_PCH <16>LCD_A2-_PCH <16>
LCD_A0+_PCH <16>LCD_A0-_PCH <16>
CAM_MIC_CBL_DET# <17>
LDDC_CLK_PCH <16>LDDC_DATA_PCH <16>
LCD_TST <39>
PANEL_HDD_LED <43>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
LVDS
23 56Thursday, June 23, 2011
Compal Electronics, Inc.
Panel backlight power control by EC
LCD Power
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FDC654P: P CHANNAL
40mil40mil
For Webcam
Close to JLVDS1.7,8
Place near to JLVDS1
Close to JLVD1.9
Close to JLVDS1.6
RF TEAM request
Q1
9B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
19
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
D8
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
D8
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
R4
13
13
0_
04
02
_1
%~
DR
41
31
30
_0
40
2_
1%
~D
12
G
D S
Q22
SSM3K7002FU_SC70-3~D
G
D S
Q22
SSM3K7002FU_SC70-3~D
2
1 3
R1
63
21
M_
04
02
_5
%~
DR
16
32
1M
_0
40
2_
5%
~D
12
Q1
9A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
19
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
C2
98
0.1
U_
04
02
_2
5V
6K
~D
C2
98
0.1
U_
04
02
_2
5V
6K
~D
1
2
D6
BAT54CW_SOT323-3~D
D6
BAT54CW_SOT323-3~D
12
3
R412100K_0402_5%~D
R412100K_0402_5%~D
12
C1
20
2
12
P_
04
02
_5
0V
8J~
D
@
C1
20
2
12
P_
04
02
_5
0V
8J~
D
@
1
2 C1
20
3
12
P_
04
02
_5
0V
8J~
D
@
C1
20
3
12
P_
04
02
_5
0V
8J~
D
@
1
2
D68RB751V-40GTE-17_SOD323-2~D
D68RB751V-40GTE-17_SOD323-2~D
21
S
G
D
Q18SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q18SI3456DDV-T1-GE3_TSOP6~D
3
6
24 5
1
C1
20
1
12
P_
04
02
_5
0V
8J~
D
@
C1
20
1
12
P_
04
02
_5
0V
8J~
D
@
1
2
C3
01
0.1
U_
04
02
_2
5V
6K
~D
C3
01
0.1
U_
04
02
_2
5V
6K
~D
1
2
C2
43
0.1
U_
04
02
_2
5V
6K
~D
C2
43
0.1
U_
04
02
_2
5V
6K
~D
1
2
L10 DLW21SN121SQ2L_4P~D@L10 DLW21SN121SQ2L_4P~D@
11
44
33
22
D66RB751V-40GTE-17_SOD323-2~D
D66RB751V-40GTE-17_SOD323-2~D
21
D69RB751V-40GTE-17_SOD323-2~D
D69RB751V-40GTE-17_SOD323-2~D
21
R427 0_0402_5%~DR427 0_0402_5%~D1 2
R422100K_0402_5%~DR422100K_0402_5%~D
12
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D1 2
C296
0.1U_0603_50V7K~D
C296
0.1U_0603_50V7K~D
1
2
C3
02
0.1
U_
04
02
_2
5V
6K
~D
C3
02
0.1
U_
04
02
_2
5V
6K
~D
1
2
R1138100K_0402_5%~DR1138100K_0402_5%~D
12
R428 0_0402_5%~DR428 0_0402_5%~D1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D1 2
S
G
D
Q21FDC654P-G_SSOT-6~D
S
G
D
Q21FDC654P-G_SSOT-6~D
3
6
24 5
1
C2
97
10
00
P_
04
02
_5
0V
7K
~D
C2
97
10
00
P_
04
02
_5
0V
7K
~D
1
2
D67RB751V-40GTE-17_SOD323-2~D
D67RB751V-40GTE-17_SOD323-2~D
21
C2
99
0.1
U_
04
02
_2
5V
6K
~D
C2
99
0.1
U_
04
02
_2
5V
6K
~D
1
21
0U
_0
80
5_
10
V6
K~
DC
30
01
0U
_0
80
5_
10
V6
K~
DC
30
0
1
2
JLVDS1
AMPHE_G47D4022101EU~D
CONN@
JLVDS1
AMPHE_G47D4022101EU~D
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
G141
G242
G343
G444
G545
C2
93
0.1
U_
04
02
_2
5V
6K
~D
C2
93
0.1
U_
04
02
_2
5V
6K
~D
1
2
Q20PDTC124EU_SC70-3~D
Q20PDTC124EU_SC70-3~D
2
13
G
D S
Q23
PMV65XP_SOT23-3~D
G
D S
Q23
PMV65XP_SOT23-3~D
2
1 3
C246
0.1U_0603_50V7K~D
C246
0.1U_0603_50V7K~D
1
2
R113710K_0402_5%~D
R113710K_0402_5%~D
12
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D1 2
C2
92
0.1
U_
04
02
_2
5V
6K
~D
C2
92
0.1
U_
04
02
_2
5V
6K
~D
1
2
R4
14
10
K_
04
02
_5
%~
DR
41
41
0K
_0
40
2_
5%
~D
12
R423 47K_0402_5%~DR423 47K_0402_5%~D1 2
2
2
1
1
B B
A A
CLK_DDC2_CRTDAT_DDC2_CRTVSYNC_BUFHSYNC_BUF
GREEN_CRTRED_CRT
BLUE_CRT
GREEN_DOCKBLUE_DOCK
RED_DOCK
HSYNC_DOCKVSYNC_DOCK
CLK_DDC2_DOCKDAT_DDC2_DOCK
PCH_CRT_DDC_CLK
PCH_CRT_BLUPCH_CRT_GRN
CRT_SWITCH
PCH_CRT_DDC_DATPCH_CRT_VSYNC
PCH_CRT_RED
PCH_CRT_HSYNC
+3.3V_RUN
+5V_RUN +3.3V_RUN
+5V_RUN
+3.3V_RUN
GREEN_DOCK <38>RED_DOCK <38>
CLK_DDC2_DOCK <38>DAT_DDC2_DOCK <38>
BLUE_DOCK <38>
VSYNC_BUF <30>
VSYNC_DOCK <38>HSYNC_DOCK <38>
GREEN_CRT <30>RED_CRT <30>
HSYNC_BUF <30>
CLK_DDC2_CRT <30>DAT_DDC2_CRT <30>
BLUE_CRT <30>
PCH_CRT_DDC_DAT<16>
CRT_SWITCH<39>
PCH_CRT_DDC_CLK<16>
PCH_CRT_HSYNC<16>PCH_CRT_VSYNC<16>
PCH_CRT_BLU<16>PCH_CRT_GRN<16>PCH_CRT_RED<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
CRT/Video switch
24 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Source
APR/SPR
MBA=B1
A=B2
ChanelSEL1/SEL2
0
1
SW for MB/DOCK
R5564.7K_0402_5%~DR5564.7K_0402_5%~D
12
C3
39
0.1
U_
04
02
_2
5V
6K
~D
C3
39
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
32
0.0
1U
_0
40
2_
16
V7
K~
D
@
C3
32
0.0
1U
_0
40
2_
16
V7
K~
D
@
1
2
C3
34
0.1
U_
04
02
_2
5V
6K
~D
C3
34
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
35
0.1
U_
04
02
_2
5V
6K
~D
C3
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
C3
36
0.1
U_
04
02
_2
5V
6K
~D
C3
36
0.1
U_
04
02
_2
5V
6K
~D
1
2
U18
PI3V713-AZLEX_TQFN32_6X3~D
U18
PI3V713-AZLEX_TQFN32_6X3~D
R1
G2
GND3
VDD4
B5
H_SOURCE6
V_HOURCE7
V2_OUT17
V1_OUT18
H1_OUT20
H2_OUT19
R226
R127
G125
G224
GND31
VDD32
SDA_SOURCE9
Reserved8
SCL_SOURCE10
GND11
SDA112
SDA213
SCL114
B221
B122
VDD23
TEST29
GND28
SEL30
SCL215
5V VDD16
GPAD33
C3
33
0.0
1U
_0
40
2_
16
V7
K~
D
@
C3
33
0.0
1U
_0
40
2_
16
V7
K~
D
@
1
2
2
2
1
1
B B
A A
TMDSB_CON_CLK#
TMDSB_CON_P0
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_N0
TMDSB_CON_CLK#
TMDSB_CON_N1
TMDSB_CON_N2
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
TMDSB_CON_N1
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_RPCH_SDVO_CTRLCLK_R
+5
V_
RU
N_
HD
MI
HDMI_CEC
TMDSB_CON_CLK
TMDSB_CON_P0
TMDSB_CON_P1
TMDSB_CON_P2
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC_CLK
+5V_HDMI_DDC_DAT
HDMI_HPD_SINK
TMDSB_PCH_N2_CTMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N1_CTMDSB_PCH_P1_C
TMDSB_PCH_N0_CTMDSB_PCH_P0_C
TMDSB_PCH_CLK#_CTMDSB_PCH_CLK_C
HDMI_CEC
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
TMDSB_PCH_N0_C
TMDSB_PCH_P0_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_PCH_N2_C
+VDISPLAY_VCC
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN+5V_RUN
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
HDMIB_PCH_HPD<16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P1<16>
TMDSB_PCH_CLK<16>
TMDSB_PCH_CLK#<16>
TMDSB_PCH_N2<16>
TMDSB_PCH_P2<16>
TMDSB_PCH_P0<16>
TMDSB_PCH_N0<16>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
HDMI port
25 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
fuse P/N ok only, symbol not ready
R452 680_0402_5%~DR452 680_0402_5%~D1 2
R451 0_0402_5%~D@R451 0_0402_5%~D@1 2
R1
16
81
M_
04
02
_5
%~
DR
11
68
1M
_0
40
2_
5%
~D1
2
R11640_0402_5%~DR11640_0402_5%~D
12
JHDMI1
BELLW_80079-1021
CONN@JHDMI1
BELLW_80079-1021
CONN@
D2_shield1
D2+2
D2-3
D1_shield4
D1+5
D1-6
D0_shield7
D0+8
D0-9
CK_shield10
CK+11
CK-12
DDC/CEC_GND13
CEC14
SCL15
SDA16
Reserved17
+5V18
HP_DET19
GND120
GND221
GND322
GND423
R449 680_0402_5%~DR449 680_0402_5%~D1 2
L21
DLW21SN900HQ2L_0805_4P~D
L21
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R453 680_0402_5%~DR453 680_0402_5%~D1 2
F2
0.5
A_
15
V_
SM
D1
81
2P
05
0T
F
F2
0.5
A_
15
V_
SM
D1
81
2P
05
0T
F
21
L19
DLW21SN900HQ2L_0805_4P~D
L19
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R466 0_0402_5%~D@R466 0_0402_5%~D@1 2
D65RB751V-40GTE-17_SOD323-2~D
@D65RB751V-40GTE-17_SOD323-2~D
@
21
L22
DLW21SN900HQ2L_0805_4P~D
L22
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D12
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D1 2
R456 680_0402_5%~DR456 680_0402_5%~D1 2
R468 0_0402_5%~D@R468 0_0402_5%~D@1 2
R471 0_0402_5%~D@R471 0_0402_5%~D@1 2
L20
DLW21SN900HQ2L_0805_4P~D
L20
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D12
R470 0_0402_5%~D@R470 0_0402_5%~D@1 2
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D12
R462 0_0402_5%~D@R462 0_0402_5%~D@1 2
R1128 20K_0402_5%~DR1128 20K_0402_5%~D1 2
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D12
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D12
R469 0_0402_5%~D@R469 0_0402_5%~D@1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D1 2
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D12
C3
37
0.1
U_
04
02
_1
0V
7K
~D
C3
37
0.1
U_
04
02
_1
0V
7K
~D
1
2
D70
RB
75
1V
-40
GT
E-1
7_
SO
D3
23
-2~
D
@D70
RB
75
1V
-40
GT
E-1
7_
SO
D3
23
-2~
D
@
21
R450 680_0402_5%~DR450 680_0402_5%~D1 2
Q120ADMN66D0LDW-7_SOT363-6~DQ120ADMN66D0LDW-7_SOT363-6~D
61
21
0U
_0
80
5_
10
V6
K~
DC
33
81
0U
_0
80
5_
10
V6
K~
DC
33
8
1
2
Q120BDMN66D0LDW-7_SOT363-6~D
Q120BDMN66D0LDW-7_SOT363-6~D
3
5
4
G
D
SQ26SSM3K7002FU_SC70-3~D
G
D
SQ26SSM3K7002FU_SC70-3~D
2
13
R448 680_0402_5%~DR448 680_0402_5%~D1 2
R1
16
3
0_
04
02
_5
%~
D
R1
16
3
0_
04
02
_5
%~
D 12
G
DS
Q121
SSM3K7002FU_SC70-3~D
G
DS
Q121
SSM3K7002FU_SC70-3~D
2
13
R459 0_0402_5%~D@R459 0_0402_5%~D@1 2
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D12
R1165 10K_0402_5%~DR1165 10K_0402_5%~D12
R454 680_0402_5%~DR454 680_0402_5%~D1 2
NC
D4
BA
T1
00
0-7
-F_
SO
T2
3-3
~D
NC
D4
BA
T1
00
0-7
-F_
SO
T2
3-3
~D
21
3
R455 680_0402_5%~DR455 680_0402_5%~D1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D1 2
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_AUX_C
DPC_AUX#_C
DPC_DOCK_AUX
DPC_CA_DET#DPC_CA_DET
DPC_DOCK_AUX#
DPD_AUX_C
DPD_AUX#_C
DPD_DOCK_AUX
DPD_CA_DET#DPD_CA_DET
DPD_DOCK_AUX#
DPD_CA_DET
DPC_CA_DET
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
DPC_CA_DET<38>
DPC_PCH_DOCK_AUX#<16>
DPC_PCH_DOCK_AUX<16>
PCH_DDPC_CTRLDATA <16>
PCH_DDPC_CTRLCLK <16>
DPC_DOCK_AUX#<38>
DPC_DOCK_AUX<38>
DPD_CA_DET<38>
DPD_PCH_DOCK_AUX#<16>
DPD_PCH_DOCK_AUX<16>
PCH_DDPD_CTRLDATA <16>
PCH_DDPD_CTRLCLK <16>
DPD_DOCK_AUX#<38>
DPD_DOCK_AUX<38>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DP125
26 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AUX/DDC SW for DPC to E-DOCK
AUX/DDC SW for DPD to E-DOCK
Intel WW18 Strapping option
Intel WW18 Strapping option
There is a new die for PI3C3125. Sample availabe on May.
C3670.1U_0402_10V7K~D
C3670.1U_0402_10V7K~D
12
U21
NC7SZ04P5X-G_SC70-5~D
U21
NC7SZ04P5X-G_SC70-5~D
A2
Y4
P5
NC
1
G3
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D12
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D1 2
C3560.1U_0402_25V6K~DC3560.1U_0402_25V6K~D
1 2
U24
NC7SZ04P5X-G_SC70-5~D
U24
NC7SZ04P5X-G_SC70-5~D
A2
Y4
P5
NC
1
G3
C3650.1U_0402_25V6K~D
C3650.1U_0402_25V6K~D
12
C3570.1U_0402_10V7K~D
C3570.1U_0402_10V7K~D
12
C3660.1U_0402_25V6K~DC3660.1U_0402_25V6K~D
1 2
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D12
C3690.1U_0402_25V6K~D
C3690.1U_0402_25V6K~D
12
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D1 2
R491 1M_0402_5%~DR491 1M_0402_5%~D1 2
R492 1M_0402_5%~DR492 1M_0402_5%~D1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D1 2
U23
PI3C3125LEX_TSSOP14~D
U23
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
U20
PI3C3125LEX_TSSOP14~D
U20
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PRX_DTX_N0SATA_PRX_DTX_P0
SATA_PTX_DRX_P0SATA_PTX_DRX_N0
HDD_DET#
HDD_EN_5V
FFS_INT2HDD_FALL_INT
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
FFS_INT2_Q
HDD_FALL_INT
+3.3V_RUN_HDD
FFS_INT2_Q
FFS_INT2
+5V_HDD
+5V_HDD
+5V_HDD
+5V_ALW
+5V_RUN
+3.3V_ALW2
+3.3V_RUN
+3.3V_RUN_HDD
+3.3V_RUN
+PWR_SRC_S
+3.3V_RUN
+5V_HDD
+3.3V_RUN
HDD_DET#<14>
HDD_FALL_INT<17>
DDR_XDP_WAN_SMBCLK<12,13,15,34>DDR_XDP_WAN_SMBDAT<12,13,15,34>
PSATA_PTX_DRX_P0_C<14>PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>PSATA_PRX_DTX_N0_C<14>
SIO_SLP_S3#<11,16,35,39,42,48>
RUN_ON<35,39,42,48>
FFS_INT2<18>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
HDD CONNECTOR
27 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pleace near HDD CONN
Main SATA +5V Default
SHORT DEFAULT
+5V_HDD Source
HDD PWR
DELL CONFIDENTIAL/PROPRIETARY
Free Fall Sensor
For HDD Temp.
Pleace near HDD CONN
R504100K_0402_5%~DR504100K_0402_5%~D
12
10
U_
08
05
_1
0V
6K
~D
C3
94
10
U_
08
05
_1
0V
6K
~D
C3
94
1
2
C3
96
0.1
U_
04
02
_2
5V
6K
~D
C3
96
0.1
U_
04
02
_2
5V
6K
~D
1
2
Q2
8A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
28
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
R500100K_0402_5%~D
R500100K_0402_5%~D
12
C391 0.01U_0402_16V7K~DC391 0.01U_0402_16V7K~D12
R508100K_0402_5%~DR508100K_0402_5%~D
12
C3
95
10
00
P_
04
02
_5
0V
7K
~D
C3
95
10
00
P_
04
02
_5
0V
7K
~D
1
2
PJP64
PAD-OPEN1x1m
PJP64
PAD-OPEN1x1m
1 2
Q2
8B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
28
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
R506100K_0402_5%~D
@R506100K_0402_5%~D
@
12
R502 10K_0402_5%~DR502 10K_0402_5%~D1 2
Q2
9A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
29
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
C392 0.01U_0402_16V7K~DC392 0.01U_0402_16V7K~D12
C3
87
10
U_
06
03
_6
.3V
6M
~D
C3
87
10
U_
06
03
_6
.3V
6M
~D
1
2
C3
88
0.1
U_
04
02
_2
5V
6K
~D
C3
88
0.1
U_
04
02
_2
5V
6K
~D
1
2
R503 100K_0402_5%~DR503 100K_0402_5%~D1 2
C3
93
0.1
U_
06
03
_5
0V
7K
~D
C3
93
0.1
U_
06
03
_5
0V
7K
~D
1
2
C389 0.01U_0402_16V7K~DC389 0.01U_0402_16V7K~D12
C4
02
0.1
U_
04
02
_2
5V
6K
~D
C4
02
0.1
U_
04
02
_2
5V
6K
~D
1
2
LNG3DMU88
LNG3DMTR_LGA16_3X3~D
LNG3DMU88
LNG3DMTR_LGA16_3X3~D
VDD_IO1
NC2
NC3
SCL/SPC4
GND5
VDD14
CS8
INT 111
INT 29
RES10
GND12
SDO/SA07
SDA / SDI / SDO6
RES13
RES16
RES15
R501 10K_0402_5%~DR501 10K_0402_5%~D1 2
C390 0.01U_0402_16V7K~DC390 0.01U_0402_16V7K~D12
R505100K_0402_5%~D
R505100K_0402_5%~D
12
R1624 0_0402_5%~DR1624 0_0402_5%~D1 2
PJP3
JUMP_43X79
PJP3
JUMP_43X79
11
22
Q2
9B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
29
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
C3
99
0.1
U_
04
02
_2
5V
6K
~D
C3
99
0.1
U_
04
02
_2
5V
6K
~D
1
2
R499100K_0402_5%~D
R499100K_0402_5%~D
12
S
G
D Q27
SI3456DDV-T1-GE3_TSOP6~D
@
S
G
D Q27
SI3456DDV-T1-GE3_TSOP6~D
@
3
624
51
R1621 0_0402_5%~D@R1621 0_0402_5%~D@1 2
JSATA1
TYCO_1775770-3~D
CONN@JSATA1
TYCO_1775770-3~D
CONN@
GND123
GND224
GND1
RX+2
RX-3
GND4
TX-5
TX+6
GND7
3.3V8
3.3V9
3.3V10
GND11
GND12
GND13
5V14
5V15
5V16
GND17
Reserved18
GND19
12V20
12V21
12V22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MODC_EN#
SATA_ODD_PRX_DTX_P1_RPSATA_ODD_PRX_DTX_N1_RP
SATA_ODD_PTX_DRX_P1_RPSATA_ODD_PTX_DRX_N1_RP
PCIE_WAKE#EMBCLK_REQ#
BAY_SMBDATBAY_SMBCLK
PLTRST_EMB#
MOD_MD
ZODD_WAKE#
MOD_MD
MODC_EN#
ZODD_WAKE#
USB30_SMI#
MOD_MD
USB30_EN
MOD_SATA_PCIE#_DET
USB30_EN
USB30_SMI#
PCIE_PTX_EMBRX_P4_CPCIE_PTX_EMBRX_N4_C
MOD_EN
+ODD_EQ1
+ODD_EQ2
+ODD_DEW2
+ODD_PE1+ODD_PE2
+ODD_DEW1+ODD_EQ2
SATA_ODD_PTX_DRX_N1_RPSATA_ODD_PTX_DRX_P1_RP
SATA_ODD_PRX_DTX_N1_RPSATA_ODD_PRX_DTX_P1_RP
SATA_PRX_DTX_N1SATA_PRX_DTX_P1
SATA_PTX_DRX_P1SATA_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PTX_DRX_P1
SATA_ODD_PRX_DTX_P1
+ODD_EQ1
+5V_ALW
+3.3V_ALW2
+5V_MOD+5V_MOD
+3.3V_ALW
+3.3V_ALW
+5V_MOD
+5V_MOD
+3.3V_ALW
+3.3V_ALW_PCH
+PWR_SRC_S
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
MODC_EN<39>PCIE_PRX_EMBTX_P4<15>
EMBCLK_REQ#<15>
PLTRST_EMB#<17>
MOD_SATA_PCIE#_DET<39>
PCIE_WAKE#<34,35,40>
BAY_SMBDAT<40,45>BAY_SMBCLK<40,45>
CLK_PCIE_EMB<15>CLK_PCIE_EMB#<15>
PCIE_PRX_EMBTX_N4<15>
DEVICE_DET#<40>
ZODD_WAKE# <39>
USB30_SMI# <14>
PCIE_PTX_EMBRX_P4<15>PCIE_PTX_EMBRX_N4<15>
SATA_ODD_PRX_DTX_P1_C<14>
SATA_ODD_PRX_DTX_N1_C<14>
SATA_ODD_PTX_DRX_P1_C<14>
SATA_ODD_PTX_DRX_N1_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
ODD CONNECTOR
28 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2
+5VMOD Source
For ODD
Pleace near ODD CONNC4080.1U_0402_10V7K~D C4080.1U_0402_10V7K~D 12
R511100K_0402_5%~DR511100K_0402_5%~D
12
Q3
1A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
31
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
10
U_
08
05
_1
0V
6K
~D
C4
01
10
U_
08
05
_1
0V
6K
~D
C4
01
1
2
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D12
C3
82
0.1
U_
04
02
_2
5V
6K
~D
C3
82
0.1
U_
04
02
_2
5V
6K
~D
1
2
R1
18
10
_0
40
2_
5%
~D
R1
18
10
_0
40
2_
5%
~D
12
R4
93
0_
04
02
_5
%~
D@
R4
93
0_
04
02
_5
%~
D@
12
G
DS
Q76
SSM3K7002FU_SC70-3~D
G
DS
Q76
SSM3K7002FU_SC70-3~D
2
13
R1
17
21
0K
_0
40
2_
5%
~D
@R
11
72
10
K_
04
02
_5
%~
D@1
2
R1
17
31
0K
_0
40
2_
5%
~D
@R
11
73
10
K_
04
02
_5
%~
D@1
2
R1
17
70
_0
40
2_
5%
~D
R1
17
70
_0
40
2_
5%
~D
12
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D12
R1
17
60
_0
40
2_
5%
~D
R1
17
60
_0
40
2_
5%
~D
12
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D12
R514 100K_0402_5%~DR514 100K_0402_5%~D1 2
S
G
D Q30
SI3456DDV-T1-GE3_TSOP6~DS
G
D Q30
SI3456DDV-T1-GE3_TSOP6~D3
624
51
C3
97
10
00
P_
04
02
_5
0V
7K
~D
C3
97
10
00
P_
04
02
_5
0V
7K
~D
1
2
R512100K_0402_5%~D
R512100K_0402_5%~D
12
JSATA2
TYCO_2-2129116-1
CONN@JSATA2
TYCO_2-2129116-1
CONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
DP8
+5V9
+5V10
MD11
GND12
GND13
GND14
PERX+22
PERX-23
GND24
+5V25
CLKREQ#26
WAKE#27
PERST#28
SMB_DATA29
REFCLK+15
REFCLK-16
GND17
PETX+18
PETX-19
GND20
GND21
SMB_CLK30
HPD31
GND132
GND233
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D12
R515100K_0402_5%~DR515100K_0402_5%~D
12
Q3
1B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
31
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
U25
MAX4951CCTPLFT_TQFN20_4X4~D
U25
MAX4951CCTPLFT_TQFN20_4X4~D
HAP1
HAM2
VCC20
OL19
HBP5
VCC6
EN7
PB8
PA9
VCC10
DD18
GND13
DBP11
DBM12
GND17
DAM14
DAP15
VCC16
GND3
HBM4
EP21
R510 10K_0402_5%~DR510 10K_0402_5%~D1 2
C3
98
0.1
U_
04
02
_2
5V
6K
~D
C3
98
0.1
U_
04
02
_2
5V
6K
~D
1
2
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D12
R4
95
0_
04
02
_5
%~
DR
49
50
_0
40
2_
5%
~D
12
R507100K_0402_5%~DR507100K_0402_5%~D
12
R1
17
81
0K
_0
40
2_
5%
~D
@R
11
78
10
K_
04
02
_5
%~
D@1
2
R4
94
0_
04
02
_5
%~
D@
R4
94
0_
04
02
_5
%~
D@
12
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D12
C4
00
0.1
U_
06
03
_5
0V
7K
~D
C4
00
0.1
U_
06
03
_5
0V
7K
~D
1
2
R1
17
51
0K
_0
40
2_
5%
~D
@R
11
75
10
K_
04
02
_5
%~
D@1
2
R1
17
40
_0
40
2_
5%
~D
R1
17
40
_0
40
2_
5%
~D
12
C3
81
0.0
1U
_0
40
2_
16
V7
K~
DC
38
10
.01
U_
04
02
_1
6V
7K
~D
1
2
R4
96
0_
04
02
_5
%~
DR
49
60
_0
40
2_
5%
~D
12
R509100K_0402_5%~DR509100K_0402_5%~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D12
R513 10K_0402_5%~DR513 10K_0402_5%~D1 2
Q123ADMN66D0LDW-7_SOT363-6~DQ123ADMN66D0LDW-7_SOT363-6~D
61
2
Q123B
DMN66D0LDW-7_SOT363-6~D
Q123B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C4090.1U_0402_10V7K~D C4090.1U_0402_10V7K~D 12
R1183 10K_0402_5%~DR1183 10K_0402_5%~D1 2
2
2
1
1
B B
A A
I2S_DI#
I2S_LRCLK
AUD_SENSE_AAUD_SENSE_B
I2S_DODMIC_CLK_L
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
AUD_SENSE_B
AUD_HP_OUT_LAUD_HP_OUT_R
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
+VDDA_AVDD
I2S_LRCLK
I2S_BCLK DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_DI
I2S_DO
I2S_DI#
EN_I2S_NB_CODEC#
DAI_12MHZ#I2S_MCLK
AUD_PC_BEEP
+VDDA_PVDD
MIC_IN_LMIC_IN_R+VREFOUT
INT_SPKL_L-
I2S_MCLK I2S_MCLK_R
I2S_BCLK I2S_BCLK_R
INT_SPK_R-INT_SPK_R+
INT_SPK_L-INT_SPK_L+
AUD_SENSE_A
INT_SPKL_L+
+VREFOUT
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
DAI_DI
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
INT_SPK_L+
INT_SPKR_R+
INT_SPKR_R-
+3.3V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN+3.3V_RUN
+5V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+5V_RUN
+VREFOUT
PCH_AZ_CODEC_SDIN0<14>
AUD_NB_MUTE#<39>
DMIC_CLK <23>DMIC0 <23>
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_RST#<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDOUT<14>
DOCK_MIC_DET <39>DOCK_HP_DET<39>
AUD_HP_OUT_L <30>AUD_HP_OUT_R <30>
DAI_DO# <38>
EN_I2S_NB_CODEC#<39>
DAI_DI <38>
DAI_12MHZ# <38>
DAI_LRCK# <38>
DAI_BCLK# <38>
AUD_HP_NB_SENSE <30,39>
MIC_IN_R <30>
BEEP <40>
SPKR <14>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Azalia (HD) Codec
29 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place C994, C952~C957 close to Codec
Place R1096 close to codec
Place C962 close to Codec
Place C963~C966 close to Codec
Place R1097 close to codecPlace LE3 close to codec
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely to Pin 14
Close to U72 pin5 Close to U72 pin6
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output
Place closely to Pin 13.
place at Codec bottom side
place at AGND and DGND plane
DVDD_IO should match
with HDA Bus level
15 mils trace
Internal Speakers Headerplace close to pin27 place close to pin38
NA
SPDIFOUT0
Pull-up to AVDD
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
HeadPhone Out
Dock Audio
Internal SPK
External MICPORT A
PORT B
PORT C
PORT D
R162, R163, R164, R165,R166 CO-lay with U73
R162 22_0402_5%~D@ R162 22_0402_5%~D@1 2
C9
75
68
0P
_0
40
2_
50
V7
K~
D@
C9
75
68
0P
_0
40
2_
50
V7
K~
D@
1
2
R164 0_0402_5%~D@ R164 0_0402_5%~D@1 2
JSPK1
TYCO_2-1775765-4~D
CONN@JSPK1
TYCO_2-1775765-4~D
CONN@
11
22
33
GND5
GND6
44
10
U_
08
05
_1
0V
6K
~D
C9
54
10
U_
08
05
_1
0V
6K
~D
C9
54
1
2
R1141 10K_0402_5%~D@ R1141 10K_0402_5%~D@1 2
R107747_0402_5%~D
@ R107747_0402_5%~D
@
12
[email protected]_0402_10V7K~D@
1
2
R10782.49K_0402_1%~DR10782.49K_0402_1%~D
12
T90 PAD~D@ T90 PAD~D@
R15401K_0402_1%~DR15401K_0402_1%~D
12
Q107ADMN66D0LDW-7_SOT363-6~D@
Q107ADMN66D0LDW-7_SOT363-6~D@
61
2
R1
09
50
_0
80
5_
5%
~D
R1
09
50
_0
80
5_
5%
~D1
2
C9
65
1U
_0
60
3_
10
V7
K~
DC
96
51
U_
06
03
_1
0V
7K
~D
1
2
DE
1P
ES
D5
V0
U2
BT
_S
OT
23
-3~
D@
DE
1P
ES
D5
V0
U2
BT
_S
OT
23
-3~
D@
231
C9
74
68
0P
_0
40
2_
50
V7
K~
D@
C9
74
68
0P
_0
40
2_
50
V7
K~
D@
1
2
R107939.2K_0402_1%~D
R107939.2K_0402_1%~D
12
R10832.49K_0402_1%~DR10832.49K_0402_1%~D
12
C983100P_0402_50V8J~D
@
C983100P_0402_50V8J~D
@
1 2
Q106BDMN66D0LDW-7_SOT363-6~DQ106BDMN66D0LDW-7_SOT363-6~D
3
5
4
PJP62
PAD-OPEN1x1m
PJP62
PAD-OPEN1x1m
1 2
10
U_
08
05
_1
0V
6K
~D
C9
66
10
U_
08
05
_1
0V
6K
~D
C9
66
1
2
L91 BLM18BD121SN1D_2P~DL91 BLM18BD121SN1D_2P~D1 2
C9
52
1U
_0
60
3_
10
V7
K~
DC
95
21
U_
06
03
_1
0V
7K
~D
1
2
10K_0402_5%~DR1099 10K_0402_5%~DR10991 2
C9624.7U_0603_6.3V6K~DC9624.7U_0603_6.3V6K~D
1
2
C982100P_0402_50V8J~D
@
C982100P_0402_50V8J~D
@
1 2
10
U_
08
05
_1
0V
6K
~D
C9
60
10
U_
08
05
_1
0V
6K
~D
C9
60
1
2
R108620K_0402_1%~DR108620K_0402_1%~D
12
C9
79
10
00
P_
04
02
_5
0V
7K
~D
C9
79
10
00
P_
04
02
_5
0V
7K
~D
1
2
10
U_
08
05
_1
0V
6K
~D
C9
58
10
U_
08
05
_1
0V
6K
~D
C9
58
1
2
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D1 2
R1082100K_0402_5%~DR1082100K_0402_5%~D
12
U73
CD74HC366M96_SO16~D
U73
CD74HC366M96_SO16~D
1A2
OE1#1
VCC16
2A4
3A6
6A14
4A10
5A12
GND8
OE2#15
6Y#13
5Y#11
4Y#9
3Y#7
2Y#5
1Y#3
L92 BLM18BD121SN1D_2P~DL92 BLM18BD121SN1D_2P~D1 2
R166 0_0402_5%~D@ R166 0_0402_5%~D@1 2
RE10 0_0402_5%~DRE10 0_0402_5%~D1 2
C9
59
0.1
U_
04
02
_2
5V
6K
~D
C9
59
0.1
U_
04
02
_2
5V
6K
~D
1
2
C1105 0.1U_0402_25V6K~DC1105 0.1U_0402_25V6K~D12
C994
0.1U_0402_25V6K~D
C994
0.1U_0402_25V6K~D
12
C9
53
0.1
U_
04
02
_2
5V
6K
~D
C9
53
0.1
U_
04
02
_2
5V
6K
~D
1
2
C9
80
0.1
U_
04
02
_1
0V
7K
~D
C9
80
0.1
U_
04
02
_1
0V
7K
~D
1
2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D1 2
DE
2P
ES
D5
V0
U2
BT
_S
OT
23
-3~
D@
DE
2P
ES
D5
V0
U2
BT
_S
OT
23
-3~
D@
231
R1120 100K_0402_5%~DR1120 100K_0402_5%~D1 2
R165 22_0402_5%~D@ R165 22_0402_5%~D@1 2
R1142 10K_0402_5%~D@ R1142 10K_0402_5%~D@1 2
33_0402_5%~DR1096
33_0402_5%~DR1096
1 2
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
DVDD_CORE1
DMIC_CLK/GPIO 12
DVDD_IO3
DMIC_0/GPIO 24
SDATA_OUT5
BITCLK6
DVSS7
SDATA_IN8
DVDD9
SYNC10
RESET#11
PC_BEEP12
SENSE_A13
SENSE_B14
I2S_MCLK15
I2S_SCLK16
I2S_DOUT17
I2S_LRCLK18
No Connect19
No Connect20
VREFFILT21
CAP222
VrefOut_A23
I2S_DIN24
MONO_OUT25
AVSS126
AVDD127
PORTA_L28
PORTA_R29
AVSS30
PORTB_L31
PORTB_R32
AVSS33
V-34
CAP-35
CAP+36
Vreg37
AVDD238
PVDD39
PORTD_+L40
PORTD_-L41
PVSS42
PORTD_-R43
PORTD_+R44
PVDD45
DMIC1/GPIO0/SPDIFOUT146
EAPD47
SPDIFOUT0//GPIO3/Aux_Out48
GND49
L77BLM21PG600SN1D_0805~D
L77BLM21PG600SN1D_0805~D
1 2
C9
73
68
0P
_0
40
2_
50
V7
K~
D@
C9
73
68
0P
_0
40
2_
50
V7
K~
D@
1
2
RE9 0_0402_5%~DRE9 0_0402_5%~D1 2
C9
57
0.1
U_
04
02
_2
5V
6K
~D
C9
57
0.1
U_
04
02
_2
5V
6K
~D
1
2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3V6K~DC11631 2
C9
64
4.7
U_
06
03
_6
.3V
6K
~D
C9
64
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R1119 100K_0402_5%~DR1119 100K_0402_5%~D1 2
C9
61
0.1
U_
04
02
_2
5V
6K
~D
C9
61
0.1
U_
04
02
_2
5V
6K
~D
1
2
C9
63
4.7
U_
06
03
_6
.3V
6K
~D
C9
63
4.7
U_
06
03
_6
.3V
6K
~D
1
2
Q106ADMN66D0LDW-7_SOT363-6~D
Q106ADMN66D0LDW-7_SOT363-6~D
61
2
R107610_0402_1%~D@R107610_0402_1%~D@
12
R1087100K_0402_5%~DR1087100K_0402_5%~D
12
C9
56
1U
_0
60
3_
10
V7
K~
DC
95
61
U_
06
03
_1
0V
7K
~D
1
2
C9
76
68
0P
_0
40
2_
50
V7
K~
D@
C9
76
68
0P
_0
40
2_
50
V7
K~
D@
1
2
R163 0_0402_5%~D@ R163 0_0402_5%~D@1 2
L93 BLM18BD121SN1D_2P~DL93 BLM18BD121SN1D_2P~D1 2
Q107BDMN66D0LDW-7_SOT363-6~DQ107BDMN66D0LDW-7_SOT363-6~D
3
5
4
10
U_
08
05
_1
0V
6K
~D
C9
55
10
U_
08
05
_1
0V
6K
~D
C9
55
1
2
C1
18
01
U_
06
03
_1
0V
7K
~D
C1
18
01
U_
06
03
_1
0V
7K
~D
1
2
33_0402_5%~DR1097 33_0402_5%~DR10971 2
C981100P_0402_50V8J~D
@
C981100P_0402_50V8J~D
@
1 2
C1
10
30
.1U
_0
40
2_
10
V7
K~
DC
11
03
0.1
U_
04
02
_1
0V
7K
~D1
2
R1081100K_0402_5%~DR1081100K_0402_5%~D
12
R169 0_0402_5%~D@R169 0_0402_5%~D@1 2
L94 BLM18BD121SN1D_2P~DL94 BLM18BD121SN1D_2P~D1 2
R108020K_0402_1%~DR108020K_0402_1%~D
12
C1106 0.1U_0402_25V6K~DC1106 0.1U_0402_25V6K~D12
C97710P_0402_50V8J~D@C97710P_0402_50V8J~D@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2_CRTCLK_DDC2_CRT
VSYNC_BUFHSYNC_BUF
BLUE_CRT
RED_CRTGREEN_CRT
MEDIA_DET#
LID_CL#
BATT_WHITE
VOL_UP
BATT_YELLOW
WIRELESS_ON#/OFF
VOL_DOWN
WLAN_LED
SATA_LED
VOL_MUTE
POWER_SW#_MB
+5V_RUN+5V_RUN
+3.3V_ALW
+5V_ALW
POWER_SW#_MB<40,41>
AUD_HP_OUT_R <29>RED_CRT<24>
GREEN_CRT<24>
HSYNC_BUF<24>
BLUE_CRT<24>
DAT_DDC2_CRT<24>CLK_DDC2_CRT<24>
VSYNC_BUF<24>
AUD_HP_NB_SENSE <29,39>MIC_IN_R <29>
IO_LOOP# <18>
MEDIA_DET#<18>
BATT_WHITE<43>
VOL_UP<40>
BATT_YELLOW<43>
WIRELESS_ON#/OFF<39>
VOL_DOWN<40>
LID_CL#<39,43>
WLAN_LED<43>
SATA_LED<43>
VOL_MUTE<40>
AUD_HP_OUT_L <29>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PWR SW/Sub-board Connector
30 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
POWER & INSTANT ON SWITCH
I/O board CONN.
Link Done
Place close
to JIO1.3,5
DETECT_GND
Link Done
LS-6612P
LS-6613P
LinK Done
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFFMedia Board
LED Board with Lid
C4570.1U_0402_10V7K~D
C4570.1U_0402_10V7K~D
1
2
C1002
0.1
U_
04
02
_2
5V
6K
~D
C1002
0.1
U_
04
02
_2
5V
6K
~D
1
2
D23
PESD24VS2UT_SOT23-3~D
@D23
PESD24VS2UT_SOT23-3~D
@
2
31
SW1
NTC033-XJ1J-X260CM_4P
SW1
NTC033-XJ1J-X260CM_4P
1
2
3
4
JIO1
TYCO_2041300-1~D
CONN@JIO1
TYCO_2041300-1~D
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1313
1212
1414
1515
1717
1919
2121
G123
1616
1818
2020
2222
G224
G325
G527
G426
G628
JMEDIA1
TYCO_1-2041070-0~D
CONN@JMEDIA1
TYCO_1-2041070-0~D
CONN@
11
22
33
44
55
66
77
88
G111
G212
99
1010
C1
00
00
.1U
_0
40
2_
16
V4
Z~
DC
10
00
0.1
U_
04
02
_1
6V
4Z
~D
1
2
JLED1
TYCO_2041322-8~D
CONN@JLED1
TYCO_2041322-8~D
CONN@
11
22
33
44
55
66
77
88
G19
G210
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_TX1-LAN_TX1+
LAN_TX3-
LAN_TX0-LAN_TX0+
+3.3V_LAN_OUT
REGCTL_PNP10
LANCLK_REQ#_R
LAN_TX2+
LAN_TX3+
LAN_TX2-
CLK_PCIE_LANCLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
LOM_ACTLED_YEL#
TP_LAN_JTAG_TDITP_LAN_JTAG_TDOTP_LAN_JTAG_TMSTP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
XTALI
LAN_DISABLE#_R
LOM_SPD100LED_ORG#LOM_SPD10LED_GRN#
+RSVD_VCC3P3_2+RSVD_VCC3P3_1
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#DOCK_LOM_SPD100LED_ORG#
LED_10_GRN#LED_100_ORG#
LAN_TX1-R
LAN_TX1+R
LAN_TX1-
LAN_TX1+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX2-
LAN_TX3-R
LAN_TX3+RLAN_TX3+
LAN_TX3-
SW_LAN_TX0-SW_LAN_TX0+
SW_LAN_TX1-SW_LAN_TX1+
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX3-SW_LAN_TX3+
DOCK_LOM_TRD0-DOCK_LOM_TRD0+
DOCK_LOM_TRD1+DOCK_LOM_TRD1-
DOCK_LOM_TRD2-DOCK_LOM_TRD2+
DOCK_LOM_TRD3-DOCK_LOM_TRD3+
DOCK_LOM_ACTLED_YEL#
LAN_ACTLED_YEL#
DOCKED
LAN_TX0-RLAN_TX0-
LAN_TX0+RLAN_TX0+
REGCTL_PNP10
LAN_SMBCLK_RLAN_SMBDATA_R
PCIE_PTX_GLANRX_N7_C
PCIE_PTX_GLANRX_P7_C
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
ENAB_3VLAN
+3.3V_LAN
+1.0V_LAN
+1.0V_LAN
+1.0V_LAN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN+3.3V_ALW
+3.3V_LAN
+3.3V_ALW2
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+PWR_SRC_S
LANCLK_REQ#<15>PLTRST_LAN#<17>
CLK_PCIE_LAN#<15>CLK_PCIE_LAN<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PM_LANPHY_ENABLE<18>
SIO_SLP_LAN#<16,39>
SW_LAN_TX0- <44>SW_LAN_TX0+ <44>
SW_LAN_TX1- <44>SW_LAN_TX1+ <44>
SW_LAN_TX2+ <44>SW_LAN_TX2- <44>
SW_LAN_TX3- <44>SW_LAN_TX3+ <44>
DOCK_LOM_TRD0- <38>DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD1+ <38>DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2- <38>DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD3- <38>DOCK_LOM_TRD3+ <38>
DOCKED<39>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD10LED_GRN# <38>DOCK_LOM_SPD100LED_ORG# <38>
LAN_ACTLED_YEL# <44>
LED_10_GRN# <44>LED_100_ORG# <44>
LAN_SMBDATA<15>LAN_SMBCLK<15>
PCIE_PTX_GLANRX_N7<15>
PCIE_PTX_GLANRX_P7<15>
WLAN_LAN_DISB# <39>
LAN_DISABLE#_R<39>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Intel 82579 (Hanksville) / LAN SW
31 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
SMBus Device Address 0xC8
FROM NIC DOCKED1: TO DOCK
0: TO RJ45
LAN ANALOG
SWITCH
TODOCK
Layout Notice : Place bead asclose PI3L500 as possible
Place C462, C463 and L29 close to U31
Note:
+1.0V_LAN will work at 0.95V to 1.15V
Idc max=330mA
Place C1178 close to pin5
R11440_0402_5%~D
R11440_0402_5%~D
1 2Q
35
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
Q3
5A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
D
61
2
R5
61
1K
_0
40
2_
1%
~D
R5
61
1K
_0
40
2_
1%
~D
12
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D1 2
U32
PI3L720ZHEX_TQFN42_9X3P5~D
U32
PI3L720ZHEX_TQFN42_9X3P5~D
SEL13
A0+2
A0-3
A1+6
A1-7
A2+9
A2-10
A3+11
B0+38
C0+36
B0-37
C0-35
B1+34
C1+32
B1-33
C1-31
B2+29
C2+27
B2-28
C2-26
B3+25
C3+23
B3-24
C3-22
A3-12
LEDA015
LEDA116
LEDA242
LEDB017
LEDC019
LEDB118
LEDC120
LEDB241
LEDC240
PAD_GND43
VD
D1
VD
D4
VD
D8
VD
D1
4V
DD
21
VD
D3
0V
DD
39
PD5
C4
71
33
P_
04
02
_5
0V
8J~
DC
47
13
3P
_0
40
2_
50
V8
J~
D
1
2
C4
69
0.1
U_
04
02
_1
0V
7K
~D
C4
69
0.1
U_
04
02
_1
0V
7K
~D
1
2
R551 0_0402_5%~DR551 0_0402_5%~D
1 2
C4
77
22
00
P_
04
02
_5
0V
7K
~D
C4
77
22
00
P_
04
02
_5
0V
7K
~D
1
2
R55710K_0402_5%~D
@R55710K_0402_5%~D
@
12
C4780.1U_0402_10V7K~D
C4780.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D1 2
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D12
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
C4
62
10
U_
06
03
_6
.3V
6M
~D
C4
62
10
U_
06
03
_6
.3V
6M
~D
1
2
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D12
R546 10K_0402_5%~D@R546 10K_0402_5%~D@1 2
C4
76
0.1
U_
04
02
_1
0V
7K
~D
C4
76
0.1
U_
04
02
_1
0V
7K
~D
1
2
C4
66
0.1
U_
04
02
_1
0V
7K
~D
C4
66
0.1
U_
04
02
_1
0V
7K
~D
1
2
PCIE
MDI
SMBUS
JTAG
LED
U31
82579_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG
LED
U31
82579_QFN48_6X6~D
RSVD_VCC3P3_11
RSVD_VCC3P3_22
LAN_DISABLE_N3
VDD3P3_OUT4
VDD3P3_IN5
RSVD_NC6
CTRL_1P07
VDD1P0_88
XTAL_OUT9
XTAL_IN10
VDD1P0_1111
RBIAS12
MDI_PLUS013
MDI_MINUS014
VDD3P3_1515
VDD1P0_1616
MDI_PLUS117
MDI_MINUS118
VDD3P3_1919
MDI_PLUS220
MDI_MINUS221
VDD1P0_2222
MDI_PLUS323
MDI_MINUS324
LED225
LED026
LED127
SMB_CLK28
VDD3P3_2929
TEST_EN30
SMB_DATA31
JTAG_TDI32
JTAG_TMS33
JTAG_TDO34
JTAG_TCK35
PE_RST_N36
VDD1P0_3737
PETp38
PETn39
VDD1P0_4040
PERp41
PERn42
VDD1P0_4343
PE_CLKP44
PE_CLKN45
VDD1P0_4646
VDD1P0_4747
CLK_REQ_N48
VSS_EPAD49
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D1 2
C4641U_0603_10V7K~DC4641U_0603_10V7K~D
1
2
R564100K_0402_5%~DR564100K_0402_5%~D
12
R1187 0_0402_5%~DR1187 0_0402_5%~D1 2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D1 2
R555 0_0402_5%~DR555 0_0402_5%~D1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D1 2
C4
67
0.1
U_
04
02
_1
0V
7K
~D
C4
67
0.1
U_
04
02
_1
0V
7K
~D
1
2
R552 0_0402_5%~DR552 0_0402_5%~D1 2
C4
63
0.1
U_
04
02
_1
0V
7K
~D
C4
63
0.1
U_
04
02
_1
0V
7K
~D
1
2
R5
62
3.0
1K
_0
40
2_
1%
~D
R5
62
3.0
1K
_0
40
2_
1%
~D
12
C1
17
82
2U
_0
80
5_
6.3
V6
M~
DC
11
78
22
U_
08
05
_6
.3V
6M
~D
1
2
C4
68
0.1
U_
04
02
_1
0V
7K
~D
C4
68
0.1
U_
04
02
_1
0V
7K
~D
1
2
U15TC7SH08FU_SSOP5~D
U15TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
C4
73
0.1
U_
04
02
_2
5V
6K
~D
C4
73
0.1
U_
04
02
_2
5V
6K
~D
1
2
C4
75
10
U_
06
03
_6
.3V
6M
~D
C4
75
10
U_
06
03
_6
.3V
6M
~D
1
2
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D12
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D12
Q3
5B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
35
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D1 2
C1
17
72
2U
_0
80
5_
6.3
V6
M~
DC
11
77
22
U_
08
05
_6
.3V
6M
~D
1
2
C4
74
0.1
U_
04
02
_2
5V
6K
~D
C4
74
0.1
U_
04
02
_2
5V
6K
~D
1
2
L29
4.7UH_CBC2012T4R7M_20%~D
L29
4.7UH_CBC2012T4R7M_20%~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D1 2
R565100K_0402_5%~DR565100K_0402_5%~D
12
T142 PAD~DT142 PAD~D
C4
72
0.1
U_
04
02
_2
5V
6K
~D
C4
72
0.1
U_
04
02
_2
5V
6K
~D
1
2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D1 2
R1
63
84
70
K_
04
02
_5
%~
DR
16
38
47
0K
_0
40
2_
5%
~D
12
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D1 2
R54910K_0402_5%~D
R54910K_0402_5%~D
12
C4
70
33
P_
04
02
_5
0V
8J~
DC
47
03
3P
_0
40
2_
50
V8
J~
D
1
2
R54710K_0402_5%~DR54710K_0402_5%~D
12
Y325MHZ_18PF_X3G025000DI1H-H~D
Y325MHZ_18PF_X3G025000DI1H-H~D
IN1
GND2
OUT3
GND4
R545 10K_0402_5%~D@R545 10K_0402_5%~D@1 2
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D1 2
T143 PAD~DT143 PAD~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_TPM_TCM
JETWAY_CLK14M
JETWAY_CLK14M
TCM_BA0
TCM_BA0TCM_BA1
CLKRUN#IRQ_SERIRQ
LPC_LFRAME#PCH_PLTRST#_EC
SP_TPM_LPC_EN
LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
NC_P
TCM_BA1TCM_BA0
JETWAY_CLK14MCLK_PCI_TPM_TCM
NC_P
CLK_PCI_TPM_TCM
CLKRUN#
PCH_PLTRST#_ECIRQ_SERIRQ
LPC_LFRAME#
SP_TPM_LPC_EN
LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
PP
PP
TCM_BA1
USH_SMBDAT
USH_SMBCLK
+3.3V_SB3V
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_SB3V+3.3V_RUN
+3.3V_SB3V
+3.3V_SUS
+5V_RUN
+3.3V_SUS
+3.3V_RUN
JETWAY_CLK14M <15>SP_TPM_LPC_EN<39>
LPC_LAD0<14,34,39,40>
LPC_LAD2<14,34,39,40>LPC_LAD1<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM<15>LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
USBP7-<17>USBP7+<17>
USH_SMBDAT<40>
BT_COEX_STATUS2<41>BT_PRI_STATUS<41>
USH_DET#<18>
BCM5882_ALERT#<39>
USH_SMBCLK<40>
PLTRST_USH#<17>USH_PWR_STATE#<39>CONTACTLESS_DET#<18>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
TPM/TCM
32 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USH board conn
LPC layout: Place TCM first and then end LPC with TPM.
Co-lay U37 and U39
LOW:Power Down Mode
High:Working Mode
ATMEL TPM for E4
China TCM: NationZ & Jetway co-lay
R65810K_0402_5%~D
@R65810K_0402_5%~D
@
12
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@1 2
C5
52
22
00
P_
04
02
_5
0V
7K
~D
C5
52
22
00
P_
04
02
_5
0V
7K
~D
1
2
R65910K_0402_5%~D
R65910K_0402_5%~D
12
C5
30
.1U
_0
40
2_
25
V6
K~
DC
53
0.1
U_
04
02
_2
5V
6K
~D
1
2
C5
50
22
00
P_
04
02
_5
0V
7K
~D
C5
50
22
00
P_
04
02
_5
0V
7K
~D
1
2
CE427P_0402_50V8J~D
@CE427P_0402_50V8J~D
@1
2
U37
SSX44-B-D-T1_TSSOP28~D
4@ U37
SSX44-B-D-T1_TSSOP28~D
4@
LAD317
LAD220
LAD123
LAD026
LCLK21
LFRAME#22
LRESET#16
SERIRQ27
CLKRUN#15
PP7
NC_11
NC_22
NC_66
NC_88
BA_09
VDD_010
VDD_119
VDD_224
GND_44
GND_1111
GND_1818
GND_2525
BA_13
NC_55
NC_1212
NC_1313
NC_P14
LPCPD#28
RE533_0402_5%~D
@ RE533_0402_5%~D
@
12
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D1 2
C554 1U_0402_6.3V6K~DC554 1U_0402_6.3V6K~D1 2
R65710K_0402_5%~D
@R65710K_0402_5%~D
@
12
C4
40
.1U
_0
40
2_
25
V6
K~
D
1@
C4
40
.1U
_0
40
2_
25
V6
K~
D
1@
1
2
JUSH1
TYCO_2-2041070-0
CONN@JUSH1
TYCO_2-2041070-0
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
GND121
GND222
C4
54
70
0P
_0
40
2_
25
V7
K~
D
1@
C4
54
70
0P
_0
40
2_
25
V7
K~
D
1@1
2
RE633_0402_5%~D
@RE633_0402_5%~D
@
12
CE327P_0402_50V8J~D
@CE327P_0402_50V8J~D
@1
2
C5
51
22
00
P_
04
02
_5
0V
7K
~D
C5
51
22
00
P_
04
02
_5
0V
7K
~D
1
2
C5
10
.1U
_0
40
2_
25
V6
K~
DC
51
0.1
U_
04
02
_2
5V
6K
~D
1
2
C5
20
.1U
_0
40
2_
25
V6
K~
DC
52
0.1
U_
04
02
_2
5V
6K
~D
1
2
U39
AT97SC3204-X2A14-AB_TSSOP28
1@U39
AT97SC3204-X2A14-AB_TSSOP28
1@
LAD317
LAD220
LAD123
LAD026
LCLK21
LFRAME#22
LRESET#16
SERIRQ27
CLKRUN#15
NC_77
ATEST_11
ATEST_22
GPIO66
TESTI8
TESTBI9
VCC_010
VCC_119
VCC_224
GND_44
GND_1111
GND_1818
GND_2525
ATEST_33
SB3V5
V_BAT12
NBO_1313
NBO_1414
LPCPD#28
R66010K_0402_5%~DR66010K_0402_5%~D
12
C5
53
0.1
U_
04
02
_2
5V
6K
~D
C5
53
0.1
U_
04
02
_2
5V
6K
~D
1
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SD/MMCCD#
SD/MMCCD#SDWP
SDWP
SD/MMCCMDSD/MMCDAT3
SD/MMCDAT0SD/MMCDAT1SD/MMCDAT2
SD/MMCDAT4
SD/MMCDAT7SD/MMCDAT6SD/MMCDAT5
SD/MMCCLK
+PE_VDDH
+3.3VDDH+VDDH_SD
+PE_VDDH
PCIE_PRX_MMITX_N6_CPCIE_PRX_MMITX_P6_C
PCIE_PTX_MMIRX_N6_CPCIE_PTX_MMIRX_P6_C
+OZ_AVDD+OZ_DVDD
+SKT_VCC
SD/MMCCLK
SD/MMCDAT1SD/MMCDAT2SD/MMCDAT0SD/MMCDAT0_R
SD/MMCDAT1_RSD/MMCDAT2_R
SD/MMCDAT3SD/MMCDAT4SD/MMCDAT5SD/MMCDAT6SD/MMCDAT7SD/MMCDAT7_R
SD/MMCDAT5_RSD/MMCDAT6_R
SD/MMCDAT4_RSD/MMCDAT3_R
SD/MMCCMDSD/MMCCLKSD/MMCCLK_R
SD/MMCCMD_R
SDWPSD/MMCCD#
+3.3V_RUN_CARD
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN_CARD
MMICLK_REQ#<15>
PLTRST_MMI#<17>
CLK_PCIE_MMI<15>CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_N6<15>PCIE_PTX_MMIRX_P6<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Card Reader
33 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Link Done
place close to pin U38.32
EMI request
C573 0.1U_0402_10V7K~DC573 0.1U_0402_10V7K~D1 2
R673 33_0402_5%~DR673 33_0402_5%~D1 2
C5
75
0.1
U_
04
02
_2
5V
6K
~D
C5
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D1 2
R664 33_0402_5%~DR664 33_0402_5%~D1 2
JSD1
T-SOL_156-4000000901_NR~D
CONN@JSD1
T-SOL_156-4000000901_NR~D
CONN@
GND_SW16
DAT3/SD114
CMD/SD212
VSS1/SD310
VCC/SD49
CLK/SD58
GND/VSSS2/SD66
DAT0/SD74
DAT1/SD83
DAT2/SD915
DAT4/MMC1013
DAT5/MMC1111
DAT6/MMC127
DAT7/MMC135
CD_WP_SW/GND19
CD_WP_SW/GND20
CD_SW_TAISOL/SD2
WP/SW_TAISOL/SD1
CD_SW/SD17
WP_SW/SD18
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D1 2
R676 33_0402_5%~DR676 33_0402_5%~D1 2
C5
61
4.7
U_
06
03
_6
.3V
6K
~D
C5
61
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
64
4.7
U_
06
03
_6
.3V
6K
~D
C5
64
4.7
U_
06
03
_6
.3V
6K
~D
1
2
L44 BLM18BD601SN1D_0603~DL44 BLM18BD601SN1D_0603~D1 2
C579
4.7U_0603_6.3V6K~D
C579
4.7U_0603_6.3V6K~D
1
2
U38
OZ600FJ0LN_QFN32_5X5~D
U38
OZ600FJ0LN_QFN32_5X5~D
AVDD8
PE_TXP6
PE_TXM7
PE_RST#13
MMI_D324
MMI_D423
PE_REXT3
DVDD10
MS_CD#11
MULTI-IO114
MULTI-IO231
MMI_D621
MMI_D720
MMI_D522
MS_D127
PE_RXP5
VDDH9
SD_D226
MS_D225
SKT_VCC17
PE_RXM4
MMI_CLK18
SD_WPI30
SD_CD#12
3.3VDDH16
SD_CMD/MS_BS19
PE_REFCLKM1
PE_REFCLKP2
MMI_VCC_OUT15
SD_D128
MMI_D029
PE_VDDH32
GPAD33
C5
78
0.1
U_
04
02
_2
5V
6K
~D
C5
78
0.1
U_
04
02
_2
5V
6K
~D
1
2
C5
77
4.7
U_
06
03
_6
.3V
6K
~D
C5
77
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
74
0.0
1U
_0
40
2_
16
V7
K~
DC
57
40
.01
U_
04
02
_1
6V
7K
~D
1
2
C5
60
4.7
U_
06
03
_6
.3V
6K
~D
C5
60
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C5
66
4.7
U_
06
03
_6
.3V
6K
~D
C5
66
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R672 33_0402_5%~DR672 33_0402_5%~D1 2
C5
63
0.1
U_
04
02
_2
5V
6K
~D
C5
63
0.1
U_
04
02
_2
5V
6K
~D
1
2
C5
71
0.1
U_
04
02
_2
5V
6K
~D
C5
71
0.1
U_
04
02
_2
5V
6K
~D
1
2
R674 33_0402_5%~DR674 33_0402_5%~D1 2C
57
24
.7U
_0
60
3_
6.3
V6
K~
DC
57
24
.7U
_0
60
3_
6.3
V6
K~
D
1
2
CE757
10P_0402_50V8J~D
@CE757
10P_0402_50V8J~D
@1
2
C5
65
0.1
U_
04
02
_2
5V
6K
~D
C5
65
0.1
U_
04
02
_2
5V
6K
~D
1
2
R670 33_0402_5%~DR670 33_0402_5%~D1 2
L45BLM18PG471SN1D_2P~D
L45BLM18PG471SN1D_2P~D
1 2
L47
BLM18BD601SN1D_0603~D
L47
BLM18BD601SN1D_0603~D1 2
RE678
33_0402_5%~D
@RE678
33_0402_5%~D
@
12
R665 33_0402_5%~DR665 33_0402_5%~D1 2
C5
59
0.1
U_
04
02
_2
5V
6K
~D
C5
59
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
26
10
K_
04
02
_5
%~
DR
82
61
0K
_0
40
2_
5%
~D
12
R669 33_0402_5%~DR669 33_0402_5%~D1 2
C5
62
0.1
U_
04
02
_2
5V
6K
~D
C5
62
0.1
U_
04
02
_2
5V
6K
~D
1
2
R677 191_0402_1%~DR677 191_0402_1%~D1 2
R668 33_0402_5%~DR668 33_0402_5%~D1 2C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D1 2
R663 33_0402_5%~DR663 33_0402_5%~D1 2
C5
76
0.1
U_
04
02
_2
5V
6K
~D
C5
76
0.1
U_
04
02
_2
5V
6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP5-USBP5+
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_PRX_WANTX_N1PCIE_PRX_WANTX_P1
USBP4-USBP4+PCIE_MCARD1_DET#
WLAN_LED#
PCIE_PRX_WLANTX_P2PCIE_PRX_WLANTX_N2
WLAN_RADIO_DIS#_RPCH_PLTRST#_EC
PCIE_WAKE#COEX2_WLAN_ACTIVE
PCIE_MCARD2_DET#_R
WLAN_RADIO_DIS#_R
COEX2_WLAN_ACTIVE
UIM_DATAUIM_CLKUIM_RESETUIM_VPP
WIMAX_LED#
UIM_RESETUIM_CLK
UIM_VPP
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
COEX1_BT_ACTIVE
LED_WWAN_OUT#LED_WWAN_OUT#
USBP6-USBP6+
PCH_PLTRST#_EC
PCIE_MCARD3_DET#
CLK_PCIE_MINI3#CLK_PCIE_MINI3
MINI3CLK_REQ#
PCIE_PRX_WPANTX_N5PCIE_PRX_WPANTX_P5
COEX2_WLAN_ACTIVEPCIE_WAKE#
UIM_DATA
PCIE_MCARD2_DET#USB_MCARD2_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD2_DET#
WWAN_SMBCLK
WWAN_SMBDAT
WWAN_SMBCLKWWAN_SMBDAT
MSDATA
MSDATA
USB_MCARD3_DET# PCIE_MCARD3_DET#
USB_MCARD3_DET#
USB_MCARD3_DET#
LED_WWAN_OUT#
WIMAX_LED#
WLAN_LED#
WIRELESS_LED#WIRELESS_LED#
PCIE_PTX_WANRX_N1_CPCIE_PTX_WANRX_P1_C
PCIE_PTX_WLANRX_N2_CPCIE_PTX_WLANRX_P2_C
PCIE_PTX_WPANRX_N5_CPCIE_PTX_WPANRX_P5_C
PCIE_MCARD2_DET#_R
PCIE_WAKE#
LPC_LAD1
LPC_LFRAME#
LPC_LAD0
LPC_LAD3LPC_LAD2
PCLK_80HPCH_PLTRST#_EC
+1.5V_RUN
+3.3V_PCIE_WWAN
+1.5V_RUN
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+3.3V_PCIE_WWAN
+3.3V_WLAN+1.5V_RUN
+SIM_PWR
+SIM_PWR
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
+1.5V_RUN
+3.3V_PCIE_FLASH+1.5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_PCIE_WWAN
+3.3V_ALW_PCH
+3.3V_PCIE_WWAN
+3.3V_WLAN
PCIE_PRX_WANTX_N1<15>PCIE_PRX_WANTX_P1<15>
CLK_PCIE_MINI1<15>CLK_PCIE_MINI1#<15>
MINI1CLK_REQ#<15>
WWAN_RADIO_DIS# <39>
PCIE_MCARD2_DET#<17>
PCH_PLTRST#_EC <17,32,35,39,40>
PCIE_MCARD1_DET#<18>
PCIE_PRX_WLANTX_P2<15>PCIE_PRX_WLANTX_N2<15>
MINI2CLK_REQ#<15>
WLAN_RADIO_DIS#<39>
PCH_CL_RST1#<15>PCH_CL_DATA1<15>
HOST_DEBUG_TX <40>
HOST_DEBUG_RX<40>MSCLK<40>
MSDATA <40>
PCIE_MCARD3_DET#<18>
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>CLK_PCIE_MINI3<15>
COEX2_WLAN_ACTIVE<41>COEX1_BT_ACTIVE<41>
USB_MCARD2_DET# <18>
USB_MCARD1_DET# <18>USBP4+ <17>USBP4- <17>
USBP6- <17>USBP6+ <17>
PCIE_PRX_WPANTX_P5<15>PCIE_PRX_WPANTX_N5<15>
PCIE_WAKE#<28,35,40>
USBP5- <17>USBP5+ <17>
CLK_PCIE_MINI2#<15>CLK_PCIE_MINI2<15>
PCH_CL_CLK1<15>
DDR_XDP_WAN_SMBDAT<12,13,15,27>
DDR_XDP_WAN_SMBCLK<12,13,15,27>
WIRELESS_LED# <39,43>
PCIE_PTX_WANRX_N1<15>PCIE_PTX_WANRX_P1<15>
PCIE_PTX_WLANRX_P2<15>PCIE_PTX_WLANRX_N2<15>
PCIE_PTX_WPANRX_N5<15>PCIE_PTX_WPANRX_P5<15>
PCIE_WAKE#<28,35,40>
HW_GPS_DISABLE2#<39>
LPC_LAD1 <14,32,39,40>
LPC_LFRAME# <14,32,39,40>
LPC_LAD0 <14,32,39,40>
LPC_LAD3 <14,32,39,40>LPC_LAD2 <14,32,39,40>
PCLK_80H<15>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
Mini Card
34 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+1.5V
+-9%
+-5%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)5 (Not wake enable)
NA
1/2 Minicard Flash Card H=4
Mini WLAN/WIMAX H=6.7
Mini WWAN/GPS/LTE/UWB H=5.2
SIM Card Push-Push
WIMAX_LED# STUDY FOR DEBUG
check
WPAN Noise
just reserve
R7
05
10
0K
_0
40
2_
5%
~D
R7
05
10
0K
_0
40
2_
5%
~D
12
C595 4700P_0402_25V7K~DC595 4700P_0402_25V7K~D
1 2
D31RB751S40T1_SOD523-2~DD31RB751S40T1_SOD523-2~D
21
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2
JSIM1
SUYIN_254070FB008S205ZL
CONN@JSIM1
SUYIN_254070FB008S205ZL
CONN@
VCC1
RST2
CLK3
GND5
VPP6
I/O7
NC8
NC4
GND9
GND10
Q124B
DMN66D0LDW-7_SOT363-6~D
Q124B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C5
93
33
P_
04
02
_5
0V
8J~
DC
59
33
3P
_0
40
2_
50
V8
J~
D
1
2
R1157 0_0402_5%~DR1157 0_0402_5%~D12
R1
16
02
.2K
_0
40
2_
5%
~D
@R
11
60
2.2
K_
04
02
_5
%~
D@1
2
R693 0_0402_5%~D@R693 0_0402_5%~D@1 2
C6
07
0.1
U_
04
02
_2
5V
6K
~D
C6
07
0.1
U_
04
02
_2
5V
6K
~D
1
2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D1 2
R1158 0_0402_5%~DR1158 0_0402_5%~D12
R699 100K_0402_5%~D@R699 100K_0402_5%~D@1 2
R709 0_0402_5%~DR709 0_0402_5%~D1 2
R700 0_0402_5%~DR700 0_0402_5%~D1 2
C6
06
0.1
U_
04
02
_2
5V
6K
~D
C6
06
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
23
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
23
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R7
19
10
0K
_0
40
2_
5%
~D
R7
19
10
0K
_0
40
2_
5%
~D
12
R707 0_0402_5%~DR707 0_0402_5%~D1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D1 2
R698 0_0402_5%~D@R698 0_0402_5%~D@1 2
C6
05
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
05
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
C60033P_0402_50V8J~D
@C60033P_0402_50V8J~D
@
1
2
R7040_0402_5%~DR7040_0402_5%~D
1 2
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
1 2
C6
03
0.1
U_
04
02
_2
5V
6K
~D
@C
60
30
.1U
_0
40
2_
25
V6
K~
D@
1
2
C6
19
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
19
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R7
18
10
0K
_0
40
2_
5%
~D
R7
18
10
0K
_0
40
2_
5%
~D
12
C6
02
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
02
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
C6
08
4.7
U_
06
03
_6
.3V
6K
~D
C6
08
4.7
U_
06
03
_6
.3V
6K
~D
1
2
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D1 2
C6
12
33
P_
04
02
_5
0V
8J~
DC
61
23
3P
_0
40
2_
50
V8
J~
D
1
2
R695 100K_0402_5%~DR695 100K_0402_5%~D1 2
R725 0_0402_5%~DR725 0_0402_5%~D1 2
R694 100K_0402_5%~DR694 100K_0402_5%~D12
+ C6
15
33
0U
_D
2E
_6
.3V
M_
R2
5~
D
+ C6
15
33
0U
_D
2E
_6
.3V
M_
R2
5~
D
1
2
R703 0_0402_5%~DR703 0_0402_5%~D12
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D1 2
G
DS
Q77SSM3K7002FU_SC70-3~D
G
DS
Q77SSM3K7002FU_SC70-3~D
2
13
C6
21
0.1
U_
04
02
_2
5V
6K
~D
@C
62
10
.1U
_0
40
2_
25
V6
K~
D@
1
2
C6274700P_0402_25V7K~D@C6274700P_0402_25V7K~D@
1
2
C6
14
33
P_
04
02
_5
0V
8J~
DC
61
43
3P
_0
40
2_
50
V8
J~
D
1
2
C6
01
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
01
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
C6161U_0402_6.3V6K~DC6161U_0402_6.3V6K~D
1
2
C6
13
22
U_
08
05
_6
.3V
6M
~D
C6
13
22
U_
08
05
_6
.3V
6M
~D
1
2
C6
11
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
11
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
C6
26
4.7
U_
06
03
_6
.3V
6K
~D
C6
26
4.7
U_
06
03
_6
.3V
6K
~D
1
2
R702 0_0402_5%~DR702 0_0402_5%~D1 2
JMINI1
MOLEX_48338-1088~D
CONN@JMINI1
MOLEX_48338-1088~D
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
+ C1
17
63
30
U_
D2
E_
6.3
VM
_R
25
~D
@
+ C1
17
63
30
U_
D2
E_
6.3
VM
_R
25
~D
@
1
2
C6
22
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
22
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R692 100K_0402_5%~DR692 100K_0402_5%~D1 2
C5
94
0.0
47
U_
04
02
_1
6V
4Z
~D
C5
94
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
C6
10
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
10
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R1
15
92
.2K
_0
40
2_
5%
~D
@R
11
59
2.2
K_
04
02
_5
%~
D@1
2
Q124A
DMN66D0LDW-7_SOT363-6~D
Q124A
DMN66D0LDW-7_SOT363-6~D
61
2
R712 100K_0402_5%~D@R712 100K_0402_5%~D@12
R706 0_0402_5%~D@R706 0_0402_5%~D@1 2
R710 0_0402_5%~DR710 0_0402_5%~D12
C6
24
0.1
U_
04
02
_2
5V
6K
~D
C6
24
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
04
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
04
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R701 100K_0402_5%~DR701 100K_0402_5%~D1 2
C6
20
0.0
47
U_
04
02
_1
6V
4Z
~D
C6
20
0.0
47
U_
04
02
_1
6V
4Z
~D
1
2
R708 0_0402_5%~D@R708 0_0402_5%~D@1 2
R697 0_0402_5%~D@R697 0_0402_5%~D@1 2
JMINI3
LOTES_AAA-PCI-073-P02-A
CONN@JMINI3
LOTES_AAA-PCI-073-P02-A
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
JMINI2
MOLEX_48338-1088~D
CONN@JMINI2
MOLEX_48338-1088~D
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
1 2
C6
25
0.1
U_
04
02
_2
5V
6K
~D
C6
25
0.1
U_
04
02
_2
5V
6K
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCARD_WWAN_PWREN#
MCARD_WWAN_PWREN#
USBP10_D+USBP10_D-
CARD_SMBCLKCARD_SMBDAT
CARD_RESET#
CPUSB#
EXPRCRD_CPPE#
EXPRCRD_CPPE#CARD_RESET#
CPUSB#EXPRCRD_STBY_R#
PCIE_PTX_EXPRX_N3_CPCIE_PTX_EXPRX_P3_C
+3.3V_ALW +3.3V_PCIE_FLASH
+3.3V_PCIE_WWAN
+3.3V_ALW
+3.3V_WLAN+3.3V_ALW
+3.3V_SUS +1.5V_CARD
+3.3V_CARDAUX
+3.3V_CARD
+1.5V_RUN +1.5V_CARD+3.3V_SUS+3.3V_RUN +3.3V_CARD+3.3V_CARDAUX
+3.3V_RUN
+1.5V_RUN+1.5V_CARD+3.3V_CARD
+PWR_SRC_S+3.3V_ALW
+3.3V_ALW
+PWR_SRC_S
+PWR_SRC_S
+3.3V_ALW
MCARD_MISC_PWREN<39>
MCARD_WWAN_PWREN<39>
AUX_EN_WOWL<39>
USBP10+<17>
USBP10-<17>
CARD_SMBCLK<40>CARD_SMBDAT<40>
PCIE_WAKE#<28,34,40>
EXPCLK_REQ#<15>
CLK_PCIE_EXP#<15>CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15>PCIE_PRX_EXPTX_P3<15>
PCH_PLTRST#_EC<17,32,34,39,40>RUN_ON<27,39,42,48>
PCIE_PTX_EXPRX_N3<15>PCIE_PTX_EXPRX_P3<15>
SIO_SLP_S3#<11,16,27,39,42,48>
EXPRCRD_DET#<18>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
PCIE-SATA SW / PCIE PWR
35 56Thursday, June 23, 2011
Compal Electronics, Inc.
Power Control for Mini card3
Express Card Conn.
Express Card PWR S/W
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Power Control for Mini card1
Power Control for Mini card2
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
Q4
1B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
41
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4Q41ADMN66D0LDW-7_SOT363-6~D
Q41ADMN66D0LDW-7_SOT363-6~D
61
2
Q39ADMN66D0LDW-7_SOT363-6~D
Q39ADMN66D0LDW-7_SOT363-6~D
61
2
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
R1
62
8
1M
_0
40
2_
5%
~D
R1
62
8
1M
_0
40
2_
5%
~D
12
R7
32
2.2
K_
04
02
_5
%~
DR
73
22
.2K
_0
40
2_
5%
~D
12
C6
43
10
U_
06
03
_6
.3V
6M
~D
C6
43
10
U_
06
03
_6
.3V
6M
~D
1
2
C6
50
47
00
P_
04
02
_2
5V
7K
~D
C6
50
47
00
P_
04
02
_2
5V
7K
~D
1
2
C6
33
0.1
U_
04
02
_2
5V
6K
~D
C6
33
0.1
U_
04
02
_2
5V
6K
~D
1
2
R7
29
10
0K
_0
40
2_
5%
~D
R7
29
10
0K
_0
40
2_
5%
~D
12
S
G
D
Q38SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q38SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R7
13
10
0K
_0
40
2_
5%
~D
R7
13
10
0K
_0
40
2_
5%
~D
12
R7
21
10
0K
_0
40
2_
5%
~D
R7
21
10
0K
_0
40
2_
5%
~D
12
C6
45
0.1
U_
04
02
_2
5V
6K
~D
C6
45
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
34
0.1
U_
04
02
_2
5V
6K
~D
C6
34
0.1
U_
04
02
_2
5V
6K
~D
1
2
R717 0_0402_5%~D@R717 0_0402_5%~D@1 2
R7
31
2.2
K_
04
02
_5
%~
DR
73
12
.2K
_0
40
2_
5%
~D
12
R71520K_0402_5%~D
R71520K_0402_5%~D
12
C6
44
47
00
P_
04
02
_2
5V
7K
~D
C6
44
47
00
P_
04
02
_2
5V
7K
~D
1
2
C6
35
0.1
U_
04
02
_2
5V
6K
~D
C6
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
49
0.1
U_
04
02
_2
5V
6K
~D
C6
49
0.1
U_
04
02
_2
5V
6K
~D
1
2
R716100K_0402_5%~D
R716100K_0402_5%~D
12
R734 0_0402_5%~DR734 0_0402_5%~D1 2
R73020K_0402_5%~D
R73020K_0402_5%~D
12
L49 DLW21SN900SQ2L_0805_4P~DL49 DLW21SN900SQ2L_0805_4P~D
11
22
33
44
R726100K_0402_5%~D
R726100K_0402_5%~D
12
R733100K_0402_5%~D
R733100K_0402_5%~D
12
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D1 2
R7
28
10
0K
_0
40
2_
5%
~D
R7
28
10
0K
_0
40
2_
5%
~D
12
C6
42
0.1
U_
04
02
_2
5V
6K
~D
C6
42
0.1
U_
04
02
_2
5V
6K
~D
1
2
R7
14
10
0K
_0
40
2_
5%
~D
R7
14
10
0K
_0
40
2_
5%
~D
12
Q4
3B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
43
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
C6
32
47
00
P_
04
02
_2
5V
7K
~D
C6
32
47
00
P_
04
02
_2
5V
7K
~D
1
2
C6
41
10
U_
06
03
_6
.3V
6M
~D
C6
41
10
U_
06
03
_6
.3V
6M
~D
1
2
R724 0_0402_5%~D@R724 0_0402_5%~D@1 2
C6
37
0.1
U_
04
02
_2
5V
6K
~D
C6
37
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
38
10
U_
06
03
_6
.3V
6M
~D
C6
38
10
U_
06
03
_6
.3V
6M
~D
1
2
S
G
D
Q42SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q42SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
C6
40
0.1
U_
04
02
_2
5V
6K
~D
C6
40
0.1
U_
04
02
_2
5V
6K
~D
1
2
G
D
S
Q7
3S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q7
3S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
R1
62
0
1M
_0
40
2_
5%
~D
R1
62
0
1M
_0
40
2_
5%
~D
12
R7
22
10
0K
_0
40
2_
5%
~D
R7
22
10
0K
_0
40
2_
5%
~D
12
Q43ADMN66D0LDW-7_SOT363-6~D
Q43ADMN66D0LDW-7_SOT363-6~D
61
2
R1
62
5
1M
_0
40
2_
5%
~D
R1
62
5
1M
_0
40
2_
5%
~D
12
S
G
D
Q40SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q40SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R727 0_0402_5%~D@R727 0_0402_5%~D@1 2
R7231K_0402_1%~DR7231K_0402_1%~D
12
JEXP1
TYCO_2-2041070-6~D
CONN@JEXP1
TYCO_2-2041070-6~D
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
GND27
GND28
Q3
9B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
39
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
C6
46
0.1
U_
04
02
_2
5V
6K
~D
C6
46
0.1
U_
04
02
_2
5V
6K
~D
1
2
U41
TPS2231MRGPR-2_QFN20_4X4~D
U41
TPS2231MRGPR-2_QFN20_4X4~D
STBY#1
3.3VIN2
3.3VOUT3
NC4
NC5
SYSRST#6
GND7
PERST#8
CPUSB#9
CPPE#10
1.5VOUT11
1.5VIN12
NC13
NC14
AUXOUT15
NC16
AUXIN17
RCLKEN18
OC#19
SHDN#20
PAD21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP1_D-
USBP1_D+
USBP0_D-
USBP0_D+ USBP0_R_D+
USBP0_R_D-
USBP0_R_D+USBP0_R_D-
USB3RP1_D+
USB3TN1_D-USB3TP1_D+
USB3RN1_D-
USB3RN1_RP
USB3RP1_RP USB3RP1_D+
USB3TP1_RP_C USB3TP1_D+
USB3TN1_D-USB3TN1_RP_C
USB3TP1_D+
USB3RP1_D+
USB3TP1_D+
USB3RN1_D-
USB3TN1_D-
USB3RP1_D+
USB3TN1_D-
USB3RN1_D-
USB3RN1_D-
USB3RN2
USB3RP2 USB3RP2_D+
USB3TP2_C USB3TP2_D+
USB3TN2_D-USB3TN2_C
USB3TP2_D+
USB3RP2_D+
USB3TP2_D+
USB3RN2_D-
USB3TN2_D-
USB3RP2_D+
USB3TN2_D-
USB3RN2_D- USB3RN2_D-
USBP1_D+USBP1_D-
USB3RP2_D+
USB3TN2_D-USB3TP2_D+
USB3RN2_D-
USB3TN1_RP
USB3TP1_RP
PWRSHARE_EN#
SB#
USBP0_D+USBP0_D-PWRSHARE_EN
SEL
USB3TP1_C
USB3TN1_C
USB3RP1_C
USB3RN1_C
USB3TP1_RPUSB3TN1_RPUSB3RP1_RPUSB3RN1_RP
+A_DE1+B_DE1+A_EQ0+B_EQ0
+B_DE0
+A_EQ1
+A_DE0
+B_EQ1
PWRSHARE_EN#
+5V_USB_CHG_PWR
+5V_ALW +5V_ALW
+5V_ALW
+5V_USB_PWR
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
+5V_ALW
+5V_USB_CHG_PWR
+SATA_SIDE_PWR
+5V_ALW
+5V_USB_PWR
USBP1+<17>
USBP1-<17>
USB3RN2<17>
USB3RP2<17>
USB_PWR_SHR_EN#<39>
USBP0+<17>USBP0-<17>
USB_PWR_SHR_VBUS_EN<39>
USB3TN1<17>
USB3TP1<17>
USB3RN1<17>
USB3RP1<17>
USB3TP2<17>
USB3TN2<17>
USB_OC0# <17>
ESATA_USB_PWR_EN#<39>
USB_OC4# <17>
USB_OC0# <17>
USB_SIDE_EN#<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
USB 3.0 x2
36 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
new conn
new conn
L98
DLW21SN900HQ2L_0805_4P~D
L98
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R783 4.7K_0402_5%~D@R783 4.7K_0402_5%~D@1 2
10
U_
08
05
_1
0V
6K
~D
C6
78
10
U_
08
05
_1
0V
6K
~D
C6
78
1
2
R740 0_0402_5%~D@R740 0_0402_5%~D@1 2
D7
2P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
72
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
R1606 0_0402_5%~D@R1606 0_0402_5%~D@1 2
8
D78
IP4292CZ10-TB_XSON10U10~D
8
D78
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1626 0_0402_5%~DR1626 0_0402_5%~D12
C6
75
0.1
U_
04
02
_2
5V
6K
~D
C6
75
0.1
U_
04
02
_2
5V
6K
~D
1
2
U2
PI5USB1457AZAEX_TDFN8_2X2~D
U2
PI5USB1457AZAEX_TDFN8_2X2~D
INT1
D+3
SEL4
D-2
VDD5
Y+6
SB8
Y-7
GND9
L52
DLW21SN900SQ2L_0805_4P~D
L52
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
R7513.3K_0402_1%~DR7513.3K_0402_1%~D
12
R784 0_0402_5%~DR784 0_0402_5%~D1 2
R1607 0_0402_5%~D@R1607 0_0402_5%~D@1 2
C6
69
0.0
1U
_0
40
2_
16
V7
K~
DC
66
90
.01
U_
04
02
_1
6V
7K
~D
1
2
R737 0_0402_5%~D@R737 0_0402_5%~D@1 2
C7
15
0.1
U_
04
02
_2
5V
6K
~D
C7
15
0.1
U_
04
02
_2
5V
6K
~D
1
2
R7
53
4.7
K_
04
02
_5
%~
D
@
R7
53
4.7
K_
04
02
_5
%~
D
@
12
U49
TPS2560DRCR-PG1.1_SON10_3X3~D
U49
TPS2560DRCR-PG1.1_SON10_3X3~D
GND1
IN2
ILIM7
OUT28
FAULT1#10
IN3
EN1#4
OUT19
T-PAD11
EN2#5
FAULT#26
+ C6
51
15
0U
_B
2_
6.3
V-M
~D
+ C6
51
15
0U
_B
2_
6.3
V-M
~D
1
2
R75024.9K_0402_1%~DR75024.9K_0402_1%~D
12
L95
DLW21SN900HQ2L_0805_4P~D
L95
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R1609 0_0402_5%~D@R1609 0_0402_5%~D@1 2
C6
70
0.1
U_
04
02
_2
5V
6K
~D
C6
70
0.1
U_
04
02
_2
5V
6K
~D
1
2
C6
54
0.1
U_
04
02
_2
5V
6K
~D
C6
54
0.1
U_
04
02
_2
5V
6K
~D
1
2
+ C6
52
15
0U
_B
2_
6.3
V-M
~D
+ C6
52
15
0U
_B
2_
6.3
V-M
~D
1
2
8
D79
IP4292CZ10-TB_XSON10U10~D
8
D79
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1612 0_0402_5%~D@R1612 0_0402_5%~D@1 2
R7
54
4.7
K_
04
02
_5
%~
D
@
R7
54
4.7
K_
04
02
_5
%~
D
@
12
D7
3P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
73
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
JUSB1
SANTA_373280-1
JUSB1
SANTA_373280-1
VBUS1
D-2
D+3
GND4
StdA-SSRX-5
StdA-SSRX+6
GND-DRAIN7
StdA-SSTX-8
StdA-SSTX+9
GND10
GND11
GND12
GND13
L97
DLW21SN900HQ2L_0805_4P~D
L97
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
C413 0.01U_0402_16V7K~DC413 0.01U_0402_16V7K~D12
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
GND1
IN2
ILIM7
OUT28
FAULT1#10
IN3
EN1#4
OUT19
T-PAD11
EN2#5
FAULT#26
R1608 0_0402_5%~D@R1608 0_0402_5%~D@1 2
C414 0.01U_0402_16V7K~DC414 0.01U_0402_16V7K~D12
C6
55
0.1
U_
04
02
_2
5V
6K
~D
C6
55
0.1
U_
04
02
_2
5V
6K
~D
1
2
C412 0.01U_0402_16V7K~DC412 0.01U_0402_16V7K~D12
U90
PS8710BTQFN24GTR-A0_TQFN24_4X4
U90
PS8710BTQFN24GTR-A0_TQFN24_4X4
VDD1
B_EQ02
I2C_R03
I2C_R14
PD#5
B_DE16
REXT7
B_INn8
B_INp9
SCL_CTL16
A_DE118
A_EQ017
SDA_CTL15
TEST14
VDD13
A_OUTp12
A_OUTn11
GND10
A_INp19
A_INn20
GND21
B_OUTp22
B_OUTn23
12C_EN24
EPAD25
10
U_
08
05
_1
0V
6K
~D
C6
76
10
U_
08
05
_1
0V
6K
~D
C6
76
1
2
R161310K_0402_5%~D@ R161310K_0402_5%~D@
12
R7
71
4.7
K_
04
02
_5
%~
D
@
R7
71
4.7
K_
04
02
_5
%~
D
@
12
C415 0.01U_0402_16V7K~DC415 0.01U_0402_16V7K~D12
R1603 0_0402_5%~D@R1603 0_0402_5%~D@1 2
C6
77
0.1
U_
04
02
_2
5V
6K
~D
C6
77
0.1
U_
04
02
_2
5V
6K
~D
1
2
JUSB2
SANTA_373130-1
JUSB2
SANTA_373130-1
VBUS1
D-2
D+3
GND4
StdA-SSRX-5
StdA-SSRX+6
GND-DRAIN7
StdA-SSTX-8
StdA-SSTX+9
GND10
GND11
GND12
GND13
R74824.9K_0402_1%~DR74824.9K_0402_1%~D
12
R773 4.7K_0402_5%~D@R773 4.7K_0402_5%~D@1 2
C411 0.01U_0402_16V7K~DC411 0.01U_0402_16V7K~D12
R1605 0_0402_5%~D@R1605 0_0402_5%~D@1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@1 2
R736 0_0402_5%~D@R736 0_0402_5%~D@1 2
C416 0.01U_0402_16V7K~DC416 0.01U_0402_16V7K~D12
R816
100K_0402_5%~D
R816
100K_0402_5%~D
12
R779 4.7K_0402_5%~D@R779 4.7K_0402_5%~D@1 2
C410 0.01U_0402_16V7K~DC410 0.01U_0402_16V7K~D12
R7
52
4.7
K_
04
02
_5
%~
D
@
R7
52
4.7
K_
04
02
_5
%~
D
@
12
L96
DLW21SN900HQ2L_0805_4P~D
L96
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
R781 4.7K_0402_5%~D@R781 4.7K_0402_5%~D@1 2
C417 0.01U_0402_16V7K~DC417 0.01U_0402_16V7K~D12
L51
DLW21SN900SQ2L_0805_4P~D
L51
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
R739 0_0402_5%~D@R739 0_0402_5%~D@1 2
G
D
S
Q48SSM3K7002FU_SC70-3~DG
D
S
Q48SSM3K7002FU_SC70-3~D
2
13
R161410K_0402_5%~DR161410K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP9_D+USBP9_D-
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_DTX_P4
SATA_PRX_DTX_N4
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RPUSBP9_D+
USBP9_D-
ESATA_PTX_DRX_N4_C
REXT
ESATA_PE1
ESATA_PTX_DRX_P4_RP
ESATA_PRX_DTX_N4_RPESATA_PRX_DTX_P4_RP
ESATA_PE2
ESATA_PTX_DRX_N4_RP
ESATA_PTX_DRX_P4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4
ESATA_PRX_DTX_N4
+SATA_SIDE_PWR
+3.3V_RUN
+3.3V_RUN
USBP9-<17>
USBP9+<17>
ESATA_PRX_DTX_P4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
USB/ESATA/IO/MDC
37 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place D74 close to JESATA1
ESATA Repeater
R1
59
50
_0
40
2_
5%
~D
R1
59
50
_0
40
2_
5%
~D
12
D74
PESD5V0U2BT_SOT23-3~D
D74
PESD5V0U2BT_SOT23-3~D
231
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D1 2
C666 0.01U_0402_16V7K~DC666 0.01U_0402_16V7K~D12
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D1 2
R741 0_0402_5%~DR741 0_0402_5%~D1 2
C663 0.01U_0402_16V7K~DC663 0.01U_0402_16V7K~D12
C665 0.01U_0402_16V7K~DC665 0.01U_0402_16V7K~D12
+
C6
67
15
0U
_B
2_
6.3
V-M
~D
+
C6
67
15
0U
_B
2_
6.3
V-M
~D
1
2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D1 2
R7
42
0_
04
02
_5
%~
D@
R7
42
0_
04
02
_5
%~
D@1
2
C664 0.01U_0402_16V7K~DC664 0.01U_0402_16V7K~D12
L90
DLW21SN900SQ2L_0805_4P~D
L90
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
R1151 0_0402_5%~D@R1151 0_0402_5%~D@1 2
C6
62
0.1
U_
04
02
_2
5V
6K
~D
C6
62
0.1
U_
04
02
_2
5V
6K
~D
1
2
R1
59
40
_0
40
2_
5%
~D
R1
59
40
_0
40
2_
5%
~D
12
C6
61
0.0
1U
_0
40
2_
16
V7
K~
DC
66
10
.01
U_
04
02
_1
6V
7K
~D
1
2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D1 2
R1150 0_0402_5%~D@R1150 0_0402_5%~D@1 2
R7
43
0_
04
02
_5
%~
DR
74
30
_0
40
2_
5%
~D
12
USB
ESATA
JESA1
TYCO_2129160-2~D
CONN@
USB
ESATA
JESA1
TYCO_2129160-2~D
CONN@
VBUS1
D-2
D+3
GND4
GND5
A+6
A-7
GND8
B-9
B+10
GND11
GND12
GND13
GND14
GND15
C6
68
0.1
U_
04
02
_2
5V
6K
~D
C6
68
0.1
U_
04
02
_2
5V
6K
~D
1
2
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
A_INp1
A_INn2
PREXT/NC/VDD20
NC_GND_VDD19
B_OUTp5
VCC6
EN7
B_PRE8
A_PRE9
NC/GND/VDD10
NC_GND_VDD18
GND13
B_INp11
B_INn12
NC_GND_VDD17
A_OUTn14
A_OUTp15
VCC16
GND3
B_OUTn4
GND21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SLICE_BAT_PRES#
DPC_DOCK_LANE_P3DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P2DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P1DPC_DOCK_LANE_N1
DPC_DOCK_LANE_N0DPC_DOCK_LANE_P0
DPC_PCH_DOCK_HPD
DPD_PCH_DOCK_HPD
CLK_PCI_DOCK
DOCK_DET_R#
DOCK_AC_OFF
DOCK_DET#
DPD_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5SATA_PRX_DKTX_N5
DAI_12MHZ# DAI_BCLK#
DPC_CA_DET
DPC_DOCK_AUXDPC_DOCK_AUX#
SATA_PTX_DKRX_P5SATA_PTX_DKRX_N5
DPD_CA_DET
DPD_DOCK_AUXDPD_DOCK_AUX#
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DPD_DOCK_LANE_P3DPD_DOCK_LANE_N3
DPD_DOCK_LANE_P2DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P1DPD_DOCK_LANE_N1
DPD_DOCK_LANE_N0DPD_DOCK_LANE_P0
+DOCK_PWR_BAR+DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW+LOM_VCT
DOCK_AC_OFF <39,55>
RED_DOCK<24>
BLUE_DOCK<24>
GREEN_DOCK<24>
VSYNC_DOCK<24>
DAT_MSE<40>CLK_MSE<40>
DAI_BCLK#<29>DAI_LRCK#<29>
DAI_DI<29>DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD1<39>D_LAD0<39>
D_LAD2<39>D_LAD3<39>
D_LFRAME#<39>D_CLKRUN#<39>
D_SERIRQ<39>D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,55>DOCK_PSID<45>
DOCK_PWR_BTN#<40>
DOCK_LOM_SPD10LED_GRN#<31>
HSYNC_DOCK<24>
DOCK_LOM_SPD100LED_ORG# <31>
DAT_KBD <40>CLK_KBD <40>
DOCK_LOM_TRD0+ <31>DOCK_LOM_TRD0- <31>
DOCK_LOM_TRD2- <31>DOCK_LOM_TRD2+ <31>
ACAV_DOCK_SRC# <55>
CLK_DDC2_DOCK <24>DAT_DDC2_DOCK <24>
SATA_PTX_DKRX_P5_C <14>SATA_PTX_DKRX_N5_C <14>
SATA_PRX_DKTX_P5_C <14>
BREATH_LED# <39,43>DOCK_LOM_ACTLED_YEL# <31>
DOCK_LOM_TRD1- <31>DOCK_LOM_TRD1+ <31>
DOCK_LOM_TRD3- <31>DOCK_LOM_TRD3+ <31>
DOCK_DCIN_IS+ <53>DOCK_DCIN_IS- <53>
DOCK_POR_RST# <40>
SATA_PRX_DKTX_N5_C <14>
USBP8- <17>USBP8+ <17>
USBP3+ <17>USBP3- <17>
SLICE_BAT_PRES#<39,55> DOCK_DET# <39>
DPC_DOCK_AUX <26>DPC_DOCK_AUX# <26>
DPC_CA_DET <26>DPD_CA_DET<26>
DPD_PCH_LANE_P0<16>DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>DPD_PCH_LANE_N3<16>
DPD_DOCK_AUX#<26>DPD_DOCK_AUX<26>
DPD_PCH_DOCK_HPD<16>
DPC_PCH_LANE_P2 <16>DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P0 <16>DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P3 <16>DPC_PCH_LANE_N3 <16>
DPC_PCH_LANE_P1 <16>DPC_PCH_LANE_N1 <16>
DPC_PCH_DOCK_HPD <16>
USB3RN4 <17>USB3RP4 <17>
USB3TN4 <17>USB3TP4 <17>
Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-77410.1
DOCKING CONN
38 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCK_DET_1
Close to DOCKIts for Enhance ESD on dock issue.
Close to DOCKIts for Enhance ESD on dock issue.
CE
64
.7U
_0
80
5_
25
V6
K~
D
@
CE
64
.7U
_0
80
5_
25
V6
K~
D
@1
2
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D12
[email protected]_0402_50V8C~D@
1
2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D1 2
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D12
C70412P_0402_50V8J~DC70412P_0402_50V8J~D
1
2
JDOCK1
JAE_WD2F144WB3R300~D
CONN@JDOCK1
JAE_WD2F144WB3R300~D
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
5353
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
8181
8383
8585
8787
8989
9191
9393
9595
9797
9999
101101
103103
105105
107107
109109
111111
113113
115115
117117
119119
121121
123123
125125
127127
129129
131131
133133
135135
137137
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
5454
5656
5858
6060
6262
6464
6666
6868
7070
7272
7474
7676
7878
8080
8282
8484
8686
8888
9090
9292
9494
9696
9898
100100
102102
104104
106106
108108
110110
112112
114114
116116
118118
120120
122122
124124
126126
128128
130130
132132
134134
136136
138138
GND1145
PWR1146
PWR2149
GND2152
Shield_G159
Shield_G160
Shield_G161
Shield_G162
Shield_G163
Shield_G164
Shield_G153
Shield_G154
Shield_G155
Shield_G156
Shield_G157
Shield_G158
139139
140140
141141
142142
143143
144144
PWR1147
PWR1148
PWR2150
PWR2151
C6
95
0.0
33
U_
04
02
_1
6V
7K
~D
C6
95
0.0
33
U_
04
02
_1
6V
7K
~D
1
2
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D12
C7011U_0402_6.3V6K~D
@C7011U_0402_6.3V6K~D
@1
2
R757100K_0402_5%~DR757100K_0402_5%~D
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D12
RE1110_0402_1%~D@RE1110_0402_1%~D@
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D12
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D12
R758100K_0402_5%~DR758100K_0402_5%~D
12
RE1210_0402_1%~D@RE1210_0402_1%~D@
12
R75633_0402_5%~DR75633_0402_5%~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D12
[email protected]_0402_50V8C~D@
1
2
C6
96
0.0
33
U_
04
02
_1
6V
7K
~D
C6
96
0.0
33
U_
04
02
_1
6V
7K
~D
1
2
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D12
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D12 C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D12
R755 100K_0402_5%~DR755 100K_0402_5%~D1 2
C7
02
0.1
U_
06
03
_5
0V
7K
~D
C7
02
0.1
U_
06
03
_5
0V
7K
~D
1
2
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D12
D32RB751S40T1_SOD523-2~D
D32RB751S40T1_SOD523-2~D
21
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D12
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D1 2
D3
3
SM
24
.TC
T_
SO
T2
3-3
~D
@
D3
3
SM
24
.TC
T_
SO
T2
3-3
~D
@
231
C7
03
0.1
U_
06
03
_5
0V
7K
~D
C7
03
0.1
U_
06
03
_5
0V
7K
~D
1
2
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_5048CLK_SIO_14M
RUN_ON
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
0.75V_DDR_VTT_ON
CPU_VTT_ON
LCD_TST
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
SYS_LED_MASK#
SYS_LED_MASK#
LPC_LAD3
IRQ_SERIRQ
PCH_PLTRST#_EC
LPC_LDRQ1#
CLKRUN#
LPC_LAD1LPC_LAD2
D_LAD3
D_LAD1
D_DLDRQ1#
CLK_PCI_5048
LPC_LFRAME#
LAN_DISABLE#_R
D_CLKRUN#D_LFRAME#
LID_CL_SIO#
ME_FWP
WLAN_RADIO_DIS#
D_LAD0
D_LAD2
LPC_LAD0
D_SERIRQ
0.75V_DDR_VTT_ON
CLK_SIO_14M
WWAN_RADIO_DIS#
LPC_LDRQ0#
ESATA_USB_PWR_EN#
SIO_SLP_A#
VGA_ID
VGA_IDWIRELESS_ON#/OFFBT_RADIO_DIS#
BC_INT#_ECE5048BC_DAT_ECE5048BC_CLK_ECE5048
BCM5882_ALERT#
EN_DOCK_PWR_BAR
PSID_DISABLE#
ENVDD_PCHPANEL_BKEN_EC
USH_PWR_STATE#EN_I2S_NB_CODEC#
LCD_TST
AUD_NB_MUTE#DOCK_DET#
LCD_VCC_TEST_ENCCD_OFF
DOCKED
MCARD_WWAN_PWREN
AUD_HP_NB_SENSEESATA_USB_PWR_EN#
DOCK_AC_OFF_EC
SIO_SLP_LAN#
DOCK_HP_DETDOCK_MIC_DET
+CAP_LDO
SP_TPM_LPC_EN
ME_FWP
RUN_ON
MODULE_BATT_PRES#
CPU_DETECT#
MOD_SATA_PCIE#_DET
PBAT_PRES#
SLICE_BAT_PRES#
ZODD_WAKE#
MCARD_MISC_PWREN
LID_CL_SIO#
MODULE_ON
CHARGE_MODULE_BATTCHARGE_PBATTDEFAULT_OVRDE
CPU_DETECT#
SLP_ME_CSW_DEV#
SYS_PWROK
CPU_VTT_ON
SIO_SLP_SUS#
VGA_ID
SLICE_BAT_ON
CHARGE_EN
SLICE_BAT_ON
WIRELESS_LED#
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
MODC_EN
RUNPWROK
CRT_SWITCH
DYN_TURB_PWR_ALRT#
SLICE_BAT_PRES#
DYN_TURB_PWR_ALRT#
TEMP_ALERT#_R TEMP_ALERT#
SUS_ON
SUS_ON
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#
USH_PWR_ON
BREATH_LED#
BAT1_LED#
BAT2_LED#
USB_PWR_SHR_EN#
USB_PWR_SHR_EN#
WWAN_RADIO_DIS#
PROCHOT_GATE
PROCHOT_GATE
USB_SIDE_EN#
USB_SIDE_EN#
USB_PWR_SHR_VBUS_EN
USB_PWR_SHR_VBUS_EN
MCARD_PCIE_SATA#
MCARD_PCIE_SATA#
CHARGE_EN
DOCK_SMB_ALERT#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME# <14,32,34,40>
SYS_LED_MASK#<43>
WLAN_RADIO_DIS#<34>
WWAN_RADIO_DIS#<34>
LID_CL# <30,43>
0.75V_DDR_VTT_ON <47>
IMVP_VR_ON <51>
SIO_EXT_WAKE#<18>
LPC_LDRQ0# <14>
D_SERIRQ <38>D_DLDRQ1# <38>
CLK_PCI_5048 <17>
D_LAD3 <38>
D_CLKRUN# <38>
D_LAD1 <38>
LPC_LDRQ1# <14>
PCH_PLTRST#_EC <17,32,34,35,40>
D_LAD2 <38>
D_LFRAME# <38>
IRQ_SERIRQ <14,32,40>CLK_SIO_14M <15>
D_LAD0 <38>
CLKRUN# <16,32,40>
SIO_SLP_A# <16,42,49>
AUX_EN_WOWL <35>
SIO_SLP_S4# <16>SIO_SLP_S3# <11,16,27,35,42,48>
WIRELESS_ON#/OFF<30>BT_RADIO_DIS#<41>
BC_CLK_ECE5048 <40>
BC_INT#_ECE5048 <40>BC_DAT_ECE5048 <40>
BCM5882_ALERT#<32>
EN_DOCK_PWR_BAR<55>
PSID_DISABLE#<45>
LCD_TST<23>
EN_I2S_NB_CODEC#<29>
ENVDD_PCH<16,23>
USH_PWR_STATE#<32>
PANEL_BKEN_EC<23>
DOCKED<31>DOCK_DET#<38>
AUD_NB_MUTE#<29>
LCD_VCC_TEST_EN<23>
AUD_HP_NB_SENSE<29,30>ESATA_USB_PWR_EN#<36>
CCD_OFF<23>
MCARD_WWAN_PWREN<35>
ACAV_IN_NB <40,53,55>
DOCK_AC_OFF <38,55>
DOCK_AC_OFF_EC <55>WLAN_LAN_DISB# <31>SIO_SLP_LAN# <16,31>
GPIO_PSID_SELECT <45>
DOCK_HP_DET <29>DOCK_MIC_DET <29>
SP_TPM_LPC_EN <32>
ME_FWP <14>
RUN_ON <27,35,42,48>
1.8V_RUN_PWRGD <48>
SPI_WP#_SEL <14>
IMVP_PWRGD <51>
EC_32KHZ_ECE5048 <40>
MODULE_BATT_PRES#<45,55>
PCH_DPWROK<16>
PBAT_PRES#<45,55>
SLICE_BAT_PRES#<38,55>
ZODD_WAKE#<28>
MCARD_MISC_PWREN<35>
MODULE_ON<55>
CHARGE_MODULE_BATT<55>CHARGE_PBATT<55>DEFAULT_OVRDE<55>
CPU_DETECT#<7>
MOD_SATA_PCIE#_DET<28>
SLP_ME_CSW_DEV#<18>
SYS_PWROK<7,16>
CPU_VTT_ON<50>
SIO_SLP_SUS# <16>
SLICE_BAT_ON<55>
WIRELESS_LED#<34,43>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
MODC_EN <28>
RUNPWROK <7,40>
CRT_SWITCH<24>
SUSACK#<16>
TEMP_ALERT# <18>
LAN_DISABLE#_R<31>
LPC_LAD0 <14,32,34,40>
SUS_ON <42>
HW_GPS_DISABLE2# <34>BREATH_LED# <38,43>
BAT1_LED# <43>
BAT2_LED# <43>
USB_PWR_SHR_EN#<36>
LPC_LAD1 <14,32,34,40>LPC_LAD2 <14,32,34,40>LPC_LAD3 <14,32,34,40>
PROCHOT_GATE<53>
USB_PWR_SHR_VBUS_EN<36>
USB_SIDE_EN#<36>
DOCK_SMB_ALERT#<38,55>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
ECE5048
39 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+CAP_LDO trace width 20 mils
ME_FWP PCH has internal 20K PD.
(suspend power rail)
VGA_ID0
Discrete
UMA 1
0
trace width 20 mils
trace width 20 mils
C7090.1U_0402_25V6K~DC7090.1U_0402_25V6K~D
1
2
R780 100K_0402_5%~DR780 100K_0402_5%~D12
R761 100K_0402_5%~DR761 100K_0402_5%~D1 2
R791 100K_0402_5%~DR791 100K_0402_5%~D12
R807 10_0402_1%~DR807 10_0402_1%~D12
R77033K_0402_5%~D
@R77033K_0402_5%~D
@
12
U46
ECE5048-LZY_DQFN132_11X11~DDB Version 0.4
U46
ECE5048-LZY_DQFN132_11X11~DDB Version 0.4
GPIOA0B52
GPIOA1A49
GPIOA2B53
GPIOA3A50
GPIOA4B54
GPIOA5A51
GPIOA6B55
GPIOA7A52
GPIOD1B32
GPIOD2A31
GPIOD3B33
GPIOD4B15
GPIOD5A15
GPIOD6B16
GPIOD7A16
GPIOF7B58
GPIOF6A55
GPIOF5B59
GPIOF4/TACH7A56
GPIOL0/PWM7B60
GPIOL1/PWM8A57
GPIOF3/TACH8B61
GPIOF2A58
GPIOF1B62
GPIOF0A59
VC
C1
B5
CAP_LDOB46
TEST_PINB19
LAD0A27
LAD1A26
LAD2B26
LAD3B25
LFRAME#A21
LRESET#B22
PCICLKA28
CLKRUN#B20
LDRQ0#A23
LDRQ1#A22
SER_IRQB21
14.318MHZ/GPIOM0A32
GPIOM4/PWM6B51
DLAD0B29
DLAD1B28
DLAD2A25
DLAD3A24
DLFRAME#B23
DCLKRUN#A19
DLDRQ1#B24
DSER_IRQA20
PWRGDA4
OUT65B56
VSSB27
GPIOM3/PWM4B39
GPIOL2/PWM0B64
VC
C1
A1
7
VC
C1
B3
0
VC
C1
A4
3
VC
C1
A5
4
BC_INT#A29
BC_DATB31
BC_CLKA30
GPIOB0A33
GPIOB1B36
GPOC2A34
GPOC3B37
GPOC4A35
GPOC5B38
GPOC6/TACH4A36
GPIOC7A37
GPIOD0B40
GPIOC1A38
GPIOC0B41
GPIOB7A39
GPIOB6B42
GPIOB5A40
GPIOB4B43
GPIOB3A41
GPIOB2B44
GPIOH0B13
GPIOH1A13
SYSOPT1/GPIOH2A53
SYSOPT0/GPIOH3B57
GPIOH4B14
GPIOH5A14
GPIOH6B17
GPIOH7B18
GPIOE0/RXDA1
GPIOE1/TXDB2
GPIOE2/RTS#A2
GPIOE3/DSR#B3
GPIOE4/CTS#A3
GPIOE5/DTR#B45
GPIOE6/RI#A42
GPIOE7/DCD#B4
GPIOG0/TACH5B47
GPIOG1A45
GPIOG2B48
GPIOG3A46
GPIOG4B49
GPIOG5A47
GPIOG6B50
GPIOG7/TACH6A48
GPIOK0A8
GPIOK1/TACH3B9
GPIOK2B10
GPIOK3A10
GPIOK4B11
GPIOK5A11
GPIOK6B12
GPIOK7A12
GPIOI1B63
GPIOI2/TACH0A60
GPIOI3A61
GPIOI4B65
GPIOI5A62
GPIOI6B66
GPIOI7A63
GPIOJ0B67
GPIOJ1/TACH1A64
GPIOJ2/TACH2A5
GPIOJ3B6
GPIOJ4A6
GPIOJ5B7
GPIOJ6A7
GPIOJ7B8
GPIOM1B34
CLK32/GPIOM2B35
EPC1
GPIOL3/PWM1B68
GPIOL4/PWM3A9
GPIOL5/PWM2B1
GPIOL6A18
GPIOL7/PWM5A44
R765 0_0402_5%~DR765 0_0402_5%~D1 2
R768 10K_0402_5%~DR768 10K_0402_5%~D1 2
R760 100K_0402_5%~DR760 100K_0402_5%~D1 2
R790 100K_0402_5%~DR790 100K_0402_5%~D12
R786 100K_0402_5%~DR786 100K_0402_5%~D12
R3 100K_0402_5%~DR3 100K_0402_5%~D1 2
U47TC7SH08FU_SSOP5~D
@U47TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
R778 100K_0402_5%~DR778 100K_0402_5%~D1 2
R789 100K_0402_5%~DR789 100K_0402_5%~D12
R79410_0402_1%~D
@R79410_0402_1%~D
@
12
R805100K_0402_5%~DR805100K_0402_5%~D
12
R785 10K_0402_5%~DR785 10K_0402_5%~D1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@1 2
C711 0.1U_0402_25V6K~D@C711 0.1U_0402_25V6K~D@
1 2
R766 100K_0402_5%~DR766 100K_0402_5%~D1 2
R79510_0402_1%~D
@R79510_0402_1%~D
@
12
R797 0_0402_5%~DR797 0_0402_5%~D1 2
R774 100K_0402_5%~DR774 100K_0402_5%~D1 2
C7070.1U_0402_25V6K~DC7070.1U_0402_25V6K~D
1
2
R769 100K_0402_5%~DR769 100K_0402_5%~D1 2
R738 0_0402_5%~DR738 0_0402_5%~D1 2
R777 100K_0402_5%~DR777 100K_0402_5%~D12
R767 100K_0402_5%~DR767 100K_0402_5%~D1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D1 2
C7144.7U_0603_6.3V6K~DC7144.7U_0603_6.3V6K~D
1
2
R775 10K_0402_5%~DR775 10K_0402_5%~D1 2
R457 100K_0402_5%~DR457 100K_0402_5%~D1 2
T117PAD~D @T117PAD~D @
C7080.1U_0402_10V7K~DC7080.1U_0402_10V7K~D
1
2
C7100.1U_0402_25V6K~DC7100.1U_0402_25V6K~D
1
2
C7134.7P_0402_50V8C~D
@C7134.7P_0402_50V8C~D
@
1
2
R878 100K_0402_5%~DR878 100K_0402_5%~D12
C70510U_0603_6.3V6M~DC70510U_0603_6.3V6M~D
1
2
R802 0_0402_5%~D@R802 0_0402_5%~D@1 2
R763 100K_0402_5%~DR763 100K_0402_5%~D1 2 C706
0.1U_0402_25V6K~DC7060.1U_0402_25V6K~D
1
2
R7931K_0402_1%~D@ R7931K_0402_1%~D@
12
D34RB751S40T1_SOD523-2~D
@D34RB751S40T1_SOD523-2~D
@2 1
R798 100K_0402_5%~DR798 100K_0402_5%~D1 2
R772 10K_0402_5%~D@R772 10K_0402_5%~D@1 2
C7160.047U_0402_16V4Z~DC7160.047U_0402_16V4Z~D
1
2
R804 1K_0402_1%~DR804 1K_0402_1%~D1 2
C7124.7P_0402_50V8C~D
@C7124.7P_0402_50V8C~D
@
1
2
R782 100K_0402_5%~DR782 100K_0402_5%~D12
R796 10K_0402_5%~DR796 10K_0402_5%~D1 2
R776 100K_0402_5%~DR776 100K_0402_5%~D1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BC_DAT_ECE5048
JTAG_TDI
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
CHARGER_SMBDAT
CHARGER_SMBCLK
SYSTEM_IDCLK_PCI_MEC
JTAG_TDOJTAG_CLK
FWP#
JTAG_TMS
DOCK_SMB_CLK
DOCK_SMB_DAT
AC_PRESENT
BOARD_ID
1.05V_0.8V_PWROK1.05V_VTTPWRGD
VCCSAPWROK
JTAG_RST#
LCD_SMBCLK
LCD_SMBDAT
RUNPWROK
MSDATA
DOCK_POR_RST#
DDR_ON
1.05V_0.8V_PWROK
EN_INVPWR
VCI_IN1#
RESET_OUT#
CPU1.5V_S3_GATE
BAY_SMBDAT
BAY_SMBCLK
DYN_TUR_CURRNT_SET#
PCIE_WAKE#
LAT_ON_SW#
PROCHOT#_EC
VOL_UP
VOL_DOWN
VOL_MUTE
HOST_DEBUG_RXHOST_DEBUG_TXHOST_DEB_TX
MSCLKMSDATA
HOST_DEB_RXPCH_ALW_ON
MEC_XTAL2
MEC_XTAL1
DEVICE_DET#
RESET_OUT#
POWER_SW_IN#
DOCK_PWR_SW#
BC_DAT_ECE5048BC_INT#_ECE5048
BC_CLK_ECE5048
CPU1.5V_S3_GATEDYN_TUR_CURRNT_SET#
MSDATAMSCLKSIO_A20GATE
IRQ_SERIRQ
CLK_PCI_MECPCH_PLTRST#_EC
SIO_PWRBTN#AC_PRESENTPCH_RSMRST#
ME_SUS_PWR_ACK
ALWONLAT_ON_SW#
PS_ID
PROCHOT#_EC
SML1_SMBCLKSML1_SMBDATA
CLK_KBDDAT_TP_SIO
CLK_MSEDAT_KBD
DAT_MSE
CLK_TP_SIO
PBAT_SMBCLKPBAT_SMBDAT
HOST_DEBUG_TXHOST_DEBUG_RX
FWP#
BC_DAT_ECE1117BC_CLK_ECE1117
BC_INT#_ECE1117
+V
R_
CA
P
LPC_LAD0LPC_LAD1LPC_LAD2
SIO_EXT_SCI#
LPC_LAD3
RESET_OUT#
CLKRUN#
LPC_LFRAME#
SYSTEM_IDBOARD_ID
POWER_SW_IN#
+PECI_VREF
BIA_PWM_EC
JTAG_RST#
JTAG_TDIJTAG_TDOJTAG_CLKJTAG_TMS
PCH_ALW_ON
DDR_HVREF_RST_GATE
RUNPWROK
DOCK_SMB_CLKDOCK_SMB_DAT
BAY_SMBCLKBAY_SMBDAT
LCD_SMBDAT
CARD_SMBDATCARD_SMBCLK
USH_SMBCLKUSH_SMBDAT
CHARGER_SMBCLKCHARGER_SMBDAT
LCD_SMBCLK
SIO_EXT_SMI#SIO_RCIN#
1.5V_SUS_PWRGDPM_APWROK
MEC_XTAL2 MEC_XTAL2_RMEC_XTAL1
ACAV_IN
VCI_IN1#
PECI_EC_R
DDR_ON
ALW_PWRGD_3V_5V1.05V_A_PWRGD
PCH_RSMRST#
BC_CLK_EMC4022
BC_INT#_EMC4022BC_DAT_EMC4022
GPU_SMBDATGPU_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
+RTC_CELL_VBAT
LPC_LDRQ#_MEC
DOCK_PWR_SW#
LPC_LDRQ#_MEC
BEEP
DOCK_POR_RST#
PCIE_WAKE#PCH_PCIE_WAKE#
SIO_SLP_S5#ACAV_IN_NB
EN_INVPWR
DEVICE_DET#
BC_DAT_EMC4022
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW_PCH
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+RTC_CELL
+RTC_CELL
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW
+3.3V_M
+1.05V_RUN_VTT
+3.3V_ALW+RTC_CELL
POWER_SW#_MB <30,41>
DOCK_PWR_BTN# <38>
1.05V_VTTPWRGD<50,54>
VCCSAPWROK<54>1.05V_0.8V_PWROK <14,51>
RUN_ON_ENABLE#<42>
H_PROCHOT# <7,51,53>
PCH_PWRGD# <22>
POWER_SW_IN#<22>
DOCK_PWR_SW#<22>
BC_INT#_ECE5048<39>BC_DAT_ECE5048<39>
BC_CLK_ECE5048<39>
MSCLK <34>MSDATA <34>
CPU1.5V_S3_GATE <11>DYN_TUR_CURRNT_SET# <53>
SIO_A20GATE <18>
AC_PRESENT <16>
PCH_PLTRST#_EC<17,32,34,35,39>CLK_PCI_MEC<17>
IRQ_SERIRQ<14,32,39>
SIO_PWRBTN# <16>
PCH_RSMRST# <41>
ME_SUS_PWR_ACK <16>
ALWON <46>
PS_ID <45>
DAT_TP_SIO<41>CLK_KBD<38>DAT_KBD<38>
DAT_MSE<38>CLK_MSE<38>
PBAT_SMBDAT<45>
SML1_SMBDATA<15>SML1_SMBCLK<15>
PBAT_SMBCLK<45>
CLK_TP_SIO<41>HOST_DEBUG_TX <34>HOST_DEBUG_RX <34>
BC_CLK_ECE1117<41>BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
RESET_OUT# <16>
LPC_LFRAME#<14,32,34,39>
LPC_LAD1<14,32,34,39>LPC_LAD2<14,32,34,39>LPC_LAD3<14,32,34,39>
LPC_LAD0<14,32,34,39>
SIO_EXT_SCI#<18>CLKRUN#<16,32,39>
VOL_MUTE <30>
BIA_PWM_EC<23>PCH_ALW_ON<42>
RUNPWROK <7,39>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DOCK_SMB_DAT <38>DOCK_SMB_CLK <38>
BAY_SMBDAT <28,45>BAY_SMBCLK <28,45>
CHARGER_SMBCLK <53>CARD_SMBDAT <35>
CHARGER_SMBDAT <53>
CARD_SMBCLK <35>USH_SMBDAT <32>
USH_SMBCLK <32>
SIO_EXT_SMI#<17>
SIO_RCIN#<18>
PM_APWROK <16>1.5V_SUS_PWRGD <47>
EC_32KHZ_ECE5048<39>
ACAV_IN <22,53,55>
PECI_EC <7>
DDR_ON <47>
ALW_PWRGD_3V_5V <46>1.05V_A_PWRGD <49>
BC_CLK_EMC4022<22>BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
EN_INVPWR <23>
BEEP<29>
DOCK_POR_RST#<38>
VOL_DOWN <30>
PCIE_WAKE#<28,34,35>PCH_PCIE_WAKE#<16>
SIO_SLP_S5#<16>ACAV_IN_NB<39,53,55>
DEVICE_DET# <28>
VOL_UP <30>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
MEC5055
40 55Thursday, June 23, 2011
Compal Electronics, Inc.
Place closely pin A29
Bat2 = Amber LEDBat1 = Blue LED
20mA drive pins
1K4700p4700p
4700p4700p4700p4700p
X02X01X00
62K33K8.2K4.3K
R875 C744
130K 4700p
REV
240K 4700p
2K
*
JTAG_RST# citcuit close to U51.B57
CHIPSET_ID for BIDfunction
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.BOARD_ID rise time is measured from 5%~68%.
A00
Modify name net
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1)
32 KHz Clock
least 15mil
15mil
R863 close to
U51& least 250mils
C740 close to U51.B12
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D1 2
R823 100K_0402_5%~D@ R823 100K_0402_5%~D@12
G
D
S
Q4
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q4
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D1 2
R1068 0_0402_5%~DR1068 0_0402_5%~D12
R759 10K_0402_5%~DR759 10K_0402_5%~D1 2
R812 100K_0402_5%~D@R812 100K_0402_5%~D@1 2
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D12
R882 100K_0402_5%~DR882 100K_0402_5%~D1 2
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D1 2
JT
AG
1@
SH
OR
T P
AD
S~
DC
ON
N@
JT
AG
1@
SH
OR
T P
AD
S~
DC
ON
N@
11
22
R880 100K_0402_5%~DR880 100K_0402_5%~D1 2
R1156 100K_0402_5%~DR1156 100K_0402_5%~D12
R881 100K_0402_5%~DR881 100K_0402_5%~D1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D1 2
R88510_0402_1%~D
@ R88510_0402_1%~D
@
12
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D1 2
C7331U_0402_6.3V6K~D@ C7331U_0402_6.3V6K~D@
1 2
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@1 2
R1197 100K_0402_5%~DR1197 100K_0402_5%~D12
R1118 100K_0402_5%~DR1118 100K_0402_5%~D12
R867 0_0402_5%~DR867 0_0402_5%~D1 2
R814 100K_0402_5%~DR814 100K_0402_5%~D1 2
C7
42
47
00
P_
04
02
_2
5V
7K
~D
C7
42
47
00
P_
04
02
_2
5V
7K
~D
1
2
R8
64
49
.9_
04
02
_1
%~
DR
86
44
9.9
_0
40
2_
1%
~D
12
R862 0_0402_5%~DR862 0_0402_5%~D1 2
R8
24
10
K_
04
02
_5
%~
DR
82
41
0K
_0
40
2_
5%
~D
12
C741
22P_0402_50V8J~D
C741
22P_0402_50V8J~D
1 2
C7211U_0402_6.3V6K~D@ C7211U_0402_6.3V6K~D@
1 2
R79910K_0402_5%~DR79910K_0402_5%~D
12
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D12
C7
35
0.1
U_
04
02
_2
5V
6K
~D
C7
35
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
31
0.1
U_
04
02
_2
5V
6K
~D
C7
31
0.1
U_
04
02
_2
5V
6K
~D
1
2
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D12
R87910K_0402_5%~D
@ R87910K_0402_5%~D
@1
2
R1169 100K_0402_5%~DR1169 100K_0402_5%~D12
R8
48
10
K_
04
02
_5
%~
DR
84
81
0K
_0
40
2_
5%
~D
12
R817 100K_0402_5%~DR817 100K_0402_5%~D12
R889 100K_0402_5%~DR889 100K_0402_5%~D1 2
R8
36
10
0_
04
02
_1
%~
D
@
R8
36
10
0_
04
02
_1
%~
D
@
12
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D12
R810100K_0402_5%~DR810100K_0402_5%~D
12
C7
27
0.1
U_
04
02
_2
5V
6K
~D
C7
27
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
28
0.1
U_
04
02
_2
5V
6K
~D
C7
28
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
29
0.1
U_
04
02
_2
5V
6K
~D
C7
29
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
47
10
K_
04
02
_5
%~
DR
84
71
0K
_0
40
2_
5%
~D
12
R8
58
10
K_
04
02
_5
%~
DR
85
81
0K
_0
40
2_
5%
~D
12
U50
TC7SH08FU_SSOP5~D
U50
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D12
R886 1K_0402_1%~DR886 1K_0402_1%~D1 2
C7341U_0402_6.3V6K~DC7341U_0402_6.3V6K~D
1
2
C7
30
10
U_
06
03
_6
.3V
6M
~D
C7
30
10
U_
06
03
_6
.3V
6M
~D
1
2
C7200.1U_0402_25V6K~DC7200.1U_0402_25V6K~D
1 2
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D12
R8150_0402_5%~DR8150_0402_5%~D
1 2
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D1 2
R8
50
10
0K
_0
40
2_
5%
~D
@R
85
01
00
K_
04
02
_5
%~
D@1
2
C7221U_0402_6.3V6K~DC7221U_0402_6.3V6K~D
1
2
C7
26
0.1
U_
04
02
_2
5V
6K
~D
C7
26
0.1
U_
04
02
_2
5V
6K
~D
1
2
R8
61
10
K_
04
02
_5
%~
DR
86
11
0K
_0
40
2_
5%
~D1
2
R8
59
10
K_
04
02
_5
%~
DR
85
91
0K
_0
40
2_
5%
~D
12
C7
39
0.1
U_
04
02
_2
5V
6K
~D
C7
39
0.1
U_
04
02
_2
5V
6K
~D
1
2
R1180 0_0402_5%~DR1180 0_0402_5%~D1 2
JDEG2
ACES_87153-10411
CONN@JDEG2
ACES_87153-10411
CONN@
11
2 22
33
4 44
55
6 66
77
8 88
G111
G212
99
10 1010
G414
G313
R871
1K_0402_1%~D
R871
1K_0402_1%~D
12
R884 1K_0402_1%~DR884 1K_0402_1%~D1 2
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
GPIO012/I2C1H_DATA/I2C2D_DATAB7
GPIO013/I2C1H_CLK/I2C2D_CLKA7
GPIO021/RC_ID1A10
VS
S[1
]B
11
GPIO025/UART_CLKB14
GPIO127/A20MA45
GPIO060/KBRSTA25
GPIO110/PS2_CLK2/GPTP-IN6A37
GPIO111/PS2_DAT2/GPTP-OUT6B40
GPIO112/PS2_CLK1AA38
GPIO113/PS2_DAT1AB41
GPIO114/PS2_CLK0AA39
GPIO115/PS2_DAT0AB42
GPIO116/MSDATAA40
GPIO117/MSCLKB43
GPIO145/I2C1K_DATA/JTAG_TDIA51
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLKB56
JTAG_RST#B57
GPIO146/I2C1K_CLK/JTAG_TDOB55
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMSA53
GPIO153/LED3A55
GPIO123/BCM_A_CLKA43
GPIO122/BCM_A_DATB45
GPIO121/BCM_A_INT#A42
XTAL1A61
XTAL2A62
nFWPB65
VB
AT
B64
VT
R[1
]A
11
VT
R[2
]A
22
VT
R[3
]B
35
VT
R[4
]A
41
VT
R[5
]A
58
GPIO160/32KHZ_OUTB62
VCC_PRWGDB26
I2S_WSB28
GPIO106/HSPI_MOSIA36
AG
ND
B66
VR
_C
AP
B12
VS
S_R
OB
54
VT
R[6
]A
52
GPIO006/I2C1B_CLKB5
GPIO005/I2C1B_DATAA4
GPIO004/I2C1A_CLKB4
GPIO003/I2C1A_DATAA3
GPIO130/I2C2A_DATAB48
GPIO131/I2C2A_CLKB49
GPIO132/I2C1G_DATAA47
GPIO140/I2C1G_CLKB50
GPIO154/I2C1C_DATA/PS2_CLK1BB59
GPIO155/I2C1C_CLK/PS2_DAT1BA56
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATAA5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLKB6
GPIO141/I2C1F_DATA/I2C2B_DATAB52
GPIO142/I2C1F_CLK/I2C2B_CLKA49
GPIO143/I2C1E_DATAB53
GPIO144/I2C1E_CLKA50
GPIO052/FAN_TACH3B23
GPIO051/FAN_TACH2A21
GPIO050/FAN_TACH1B22
GPIO056/PWM3A24
GPIO055/PWM2B25
GPIO054/PWM1A23
GPIO053/PWM0B24
GPIO103/ECGP_MISOB37
GPIO102/HSPI_SCLKA34
GPIO101/ECGP_SCLKB36
GPIO104/HSPI_MISOA35
GPIO105/ECGP_MOSIB38
VT
R[7
]B
3
VT
R[8
]A
26
GPIO157/LED2B61
GPIO156/LED1A57
I2S_CLKB27
VS
S[4
]B
60
GPIO022/BCM_B_CLKA12
GPIO023/BCM_B_DATB13
GPIO024/BCM_B_INT#A13
GPIO042/BCM_C_INT#B19
GPIO043/BCM_C_DATA18
GPIO044/BCM_C_CLKB20
GPIO045/LSBCM_D_INT#A19
GPIO046/LSBCM_D_DATB21
GPIO047/LSBCM_D_CLKA20
BGPO0A59
VCI_IN2#B63
VCI_OUTA60
VCI_IN1#A63
VCI_IN0#B67
VCI_OVRD_INB1
VCI_IN3#A1
GPIO001/ECSPI_CS1B2
GPIO002/ECSPI_CS2A2
GPIO014/GPTP-IN7/HSPI_CS1B8
GPIO015/GPTP-OUT7A8
GPIO016/GPTP-IN8B9
GPIO017/GPTP-OUT8A9
GPIO020/RC_ID2B10
GPIO026/GPTP-IN1A14
GPIO027/GPTP-OUT1B15
GPIO30/GPTP-IN2/BCM_E_INT#A15
GPIO31/GPTP-OUT2/BCM_E_DATB16
GPIO032/GPTP-IN3/BCM_E_CLKA16
GPIO040/GPTP-OUT3/HSPI_CS2B18
GPIO041A17
GPIO107/nRESET_OUTB39
GPIO120/UART_TXB44
GPIO124/GPTP-OUT5/UART_RXB46
GPIO125/GPTP-IN5A44
GPIO126B47
GPIO151/GPTP-IN4A54
GPIO152/GPTP-OUT4B58
GPIO011/nSMIA6
GPIO061/LPCPD#A27
LDRQ#B29
SER_IRQA28
LRESET#B30
PCI_CLKA29
LFRAME#B31
LAD0A30
LAD1B32
LAD2A31
LAD3B33
CLKRUN#A32
GPIO100/nEC_SCIA33
EP
C1
I2S_DATB17
NC1B34
PROCHOT#/PWM4A46
PECIA48
PECI_VREFB51
NC2A64
NC3B68
R8
60
10
K_
04
02
_5
%~
DR
86
01
0K
_0
40
2_
5%
~D
12
R825 10K_0402_5%~DR825 10K_0402_5%~D1 2
C747
4.7P_0402_50V8C~D
@ C747
4.7P_0402_50V8C~D
@
1
2
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D12
R853 0_0402_5%~DR853 0_0402_5%~D1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D12
G
D
S
Q50SSM3K7002FU_SC70-3~DG
D
S
Q50SSM3K7002FU_SC70-3~D
2
13
R1171 100K_0402_5%~DR1171 100K_0402_5%~D12
R87210K_0402_5%~DR87210K_0402_5%~D
12
R835 10K_0402_5%~DR835 10K_0402_5%~D1 2
R863 43_0402_5%~DR863 43_0402_5%~D1 2
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D12
C7444700P_0402_25V7K~DC7444700P_0402_25V7K~D
1
2
R819100K_0402_5%~DR819100K_0402_5%~D
12
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
12
R855 0_0402_5%~DR855 0_0402_5%~D1 2
R8
49
10
K_
04
02
_5
%~
DR
84
91
0K
_0
40
2_
5%
~D
12
R821 100K_0402_5%~DR821 100K_0402_5%~D12
R870100K_0402_5%~DR870100K_0402_5%~D
12
G
D
S
Q47SSM3K7002FU_SC70-3~D
@
G
D
S
Q47SSM3K7002FU_SC70-3~D
@2
13
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D12
R875240K_0402_5%~DR875240K_0402_5%~D
12
C7
25
0.1
U_
04
02
_2
5V
6K
~D
C7
25
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7404.7U_0603_6.3V6K~D
C7404.7U_0603_6.3V6K~D
1
2
C736 0.1U_0402_25V6K~DC736 0.1U_0402_25V6K~D12
R869 10K_0402_5%~DR869 10K_0402_5%~D12
C7
23
0.1
U_
04
02
_2
5V
6K
~D
C7
23
0.1
U_
04
02
_2
5V
6K
~D
1
2
C7
32
0.1
U_
04
02
_2
5V
6K
~D
C7
32
0.1
U_
04
02
_2
5V
6K
~D
1
2
R893100K_0402_5%~DR893100K_0402_5%~D
12
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D1 2
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D1 2
C743
22P_0402_50V8J~D
C743
22P_0402_50V8J~D
1 2 C737
0.1U_0402_25V6K~D
C737
0.1U_0402_25V6K~D
1
2
R883 10K_0402_5%~DR883 10K_0402_5%~D1 2
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D12
R1125 100K_0402_5%~DR1125 100K_0402_5%~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_DATA
TP_CLKTP_DATA
TP_CLK
TP_DATA
PS2_CLK_TSPS2_DAT_TS
TP_CLK
PS2_CLK_TSPS2_DAT_TS
KB_DET#
BT_PRI_STATUS
BT_COEX_STATUS2
RSMRST#
PCH_RSMRST#_Q
PCH_RSMRST#
+5V_RUN+3.3V_ALW
+3.3V_TP
+3.3V_TP
+3.3V_ALW +3.3V_RUN +3.3V_TP+3.3V_TP
+3.3V_ALW+5V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_ALW
+3.3V_ALW+3.3V_ALW
CLK_TP_SIO<40>
DAT_TP_SIO<40>
POWER_SW#_MB<30,40>
BC_DAT_ECE1117<40>BC_INT#_ECE1117<40>
KB_DET#<18>
BC_CLK_ECE1117<40>
BT_DET#<17>COEX1_BT_ACTIVE<34>
BT_RADIO_DIS#<39>COEX2_WLAN_ACTIVE<34>
USBP11+<17>USBP11-<17>
BT_ACTIVE<43>
BT_COEX_STATUS2<32>BT_PRI_STATUS<32>
PCH_RSMRST#_Q <14,16>PCH_RSMRST#<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Touch PAD/Int KB/BT
41 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place on Bottom
Power Switch for debug
Touch Pad
Place close to JKB1
Place close to JTP1
Link Done
Link Done
KB Conn. Pitch=1.0mm
BlueTooth
Link Done
EC SIDE
C7
49
10
P_
04
02
_5
0V
8J~
DC
74
91
0P
_0
40
2_
50
V8
J~
D
1
2
C758
0.1U_0402_25V6K~D
C758
0.1U_0402_25V6K~D
1
2
PWRSW1@SHORT PADS~D
@PWRSW1@SHORT PADS~D
@
11
22
R11331K_0402_5%~D
R11331K_0402_5%~D
1 2
R11341K_0402_5%~D
R11341K_0402_5%~D
1 2
R9
03
4.7
K_
04
02
_5
%~
DR
90
34
.7K
_0
40
2_
5%
~D
12
R9
02
4.7
K_
04
02
_5
%~
DR
90
24
.7K
_0
40
2_
5%
~D
12
D3
7P
ES
D5
V0
U2
BT
_S
OT
23
-3~
DD
37
PE
SD
5V
0U
2B
T_
SO
T2
3-3
~D
231
R1
62
21
0K
_0
40
2_
5%
~D
R1
62
21
0K
_0
40
2_
5%
~D
12
C7
53
33
P_
04
02
_5
0V
8J~
DC
75
33
3P
_0
40
2_
50
V8
J~
D
1
2
U9
RT9818A-46GU3_SC70-3~D
U9
RT9818A-46GU3_SC70-3~D
VCC1
GND2
RESET#3
C7
50
10
P_
04
02
_5
0V
8J~
DC
75
01
0P
_0
40
2_
50
V8
J~
D
1
2
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D12
R11620_0603_5%~D
@R11620_0603_5%~D
@
1 2
R11610_0603_5%~DR11610_0603_5%~D
1 2
R1623 0_0402_5%~D@R1623 0_0402_5%~D@1 2
U7
TC7SH08FU_SSOP5~D
U7
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
C7
51
10
P_
04
02
_5
0V
8J~
DC
75
11
0P
_0
40
2_
50
V8
J~
D
1
2
JTP1
TYCO_2041070-8~D
CONN@JTP1
TYCO_2041070-8~D
CONN@
11
22
33
44
55
66
77
88
G19
G210
JKB1
TYCO_1-2041084-0~D
CONN@JKB1
TYCO_1-2041084-0~D
CONN@
11
22
33
44
55
66
77
88
99
1010
GND11
GND12
JBT1
ACES_50228-0127N-001
CONN@JBT1
ACES_50228-0127N-001
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
GND13
GND14
C7
54
10
0P
_0
40
2_
50
V8
J~
D@
C7
54
10
0P
_0
40
2_
50
V8
J~
D@
1
2
C7480.1U_0402_16V4Z~D
C7480.1U_0402_16V4Z~D
1 2
C2
89
0.0
1U
_0
40
2_
16
V7
K~
DC
28
90
.01
U_
04
02
_1
6V
7K
~D
1
2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~D1 2
C7
52
10
P_
04
02
_5
0V
8J~
DC
75
21
0P
_0
40
2_
50
V8
J~
D
1
2
C755
0.1U_0402_25V6K~D
C755
0.1U_0402_25V6K~D
1
2
R9
04
10
K_
04
02
_5
%~
DR
90
41
0K
_0
40
2_
5%
~D
12
C756
0.1U_0402_25V6K~D
C756
0.1U_0402_25V6K~D
1
2
C759100P_0402_50V8J~D
@C759100P_0402_50V8J~D
@
1
2
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUS_ON_3.3V#
+1
.5V
_R
UN
_C
HG
+5
V_
RU
N_
CH
G
+3
.3V
_R
UN
_C
HG
RUN_ON_ENABLE#SUS_ON_3.3V#
+3
.3V
_S
US
_C
HG
ALW_ON_3.3V#
+3
.3V
_A
LW
PC
H_
CH
G
+3
.3V
_M
_C
HG
ALW_ON_3.3V#
A_ON_3.3V#
A_ON_3.3V#
+1
.05
V_
RU
N_
CH
G
+D
DR
_C
HG
+1
.5V
_C
PU
_V
DD
Q_
CH
G
1.5V_RUN_ENABLE
1.05V_RUN_ENABLE
A_ENABLE
SUS_ENABLE
ALW_ENABLE
RUN_ON_ENABLE#
+3.3V_ALW2+3.3V_ALW2
+3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW+3.3V_SUS
+3.3V_ALW2
+3.3V_ALW+3.3V_M
+3.3V_ALW2
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
+3.3V_M
+1.5V_RUN+1.5V_MEM
+1.05V_M+1.05V_RUN
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
+5V_ALW
+3.3V_ALW
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S+PWR_SRC_S
+PWR_SRC_S
+5V_RUN
+3.3V_RUN
RUN_ON<27,35,39,48>
PCH_ALW_ON<40>
SUS_ON<39>
SIO_SLP_A#<16,39,49>
ALW_ENABLE<20>
RUN_ON_CPU1.5VS3#<7,11>
RUN_ON_ENABLE#<40>
SIO_SLP_S3#<11,16,27,35,39,48>
RUN_ON<27,35,39,48>
SIO_SLP_S3#<11,16,27,35,39,48>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
POWER CONTROL
42 56Thursday, June 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DC/DC Interface+3.3V_ALW_PCH Source
+3.3V_SUS Source
+3.3V_M Source
Discharg Circuit
+1.5V_RUN Source
+1.05V_RUN Source
+5V_RUN Source
+3.3V_RUN Source
C7704700P_0402_25V7K~DC7704700P_0402_25V7K~D
1
2
R1
61
81
M_
04
02
_5
%~
DR
16
18
1M
_0
40
2_
5%
~D
12
C7
60
10
U_
06
03
_6
.3V
6M
~D
C7
60
10
U_
06
03
_6
.3V
6M
~D
1
2
C7
73
22
00
P_
04
02
_5
0V
7K
~D
C7
73
22
00
P_
04
02
_5
0V
7K
~D
1
2
S
G
D
Q54SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q54SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
C7
68
10
U_
06
03
_6
.3V
6M
~D
C7
68
10
U_
06
03
_6
.3V
6M
~D
1
2
C1196
270P_0402_50V7K~D
@C1196
270P_0402_50V7K~D
@
1 2
R911100K_0402_5%~DR911100K_0402_5%~D
12
G
D
S
Q6
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q6
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
R744 0_0402_5%~D@R744 0_0402_5%~D@1 2
R92939_0603_5%~D@ R92939_0603_5%~D@
12
R9281K_0402_1%~D@R9281K_0402_1%~D@
12
R93120K_0402_5%~DR93120K_0402_5%~D
12
R930100K_0402_5%~DR930100K_0402_5%~D
12
S
G
D
Q58SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q58SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
G
D
S
Q7
2S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q7
2S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
Q5
3B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
53
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
R91320K_0402_5%~D
R91320K_0402_5%~D
12
Q53ADMN66D0LDW-7_SOT363-6~D
Q53ADMN66D0LDW-7_SOT363-6~D
61
2
R9231K_0402_1%~D@R9231K_0402_1%~D@
12
Q5
2A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
52
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
61
2
R907100K_0402_5%~DR907100K_0402_5%~D
12
R735 0_0402_5%~DR735 0_0402_5%~D1 2
R918100K_0402_5%~DR918100K_0402_5%~D
12
R917100K_0402_5%~DR917100K_0402_5%~D
12
G
D
S
Q7
1S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q7
1S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
R91020K_0402_5%~D
R91020K_0402_5%~D
12
C1197
270P_0402_50V7K~D
C1197
270P_0402_50V7K~D
1 2
R9241K_0402_1%~D@R9241K_0402_1%~D@
12
G
D
S
Q6
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
G
D
S
Q6
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
C11981U_0603_10V7K~D
C11981U_0603_10V7K~D
1
2
G
D
S
Q6
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q6
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
R91920K_0402_5%~D
@R91920K_0402_5%~D
@1
2
R9221K_0402_1%~D@R9221K_0402_1%~D@
12
R1
61
71
M_
04
02
_5
%~
DR
16
17
1M
_0
40
2_
5%
~D
12
C7
69
10
U_
06
03
_6
.3V
6M
~D
C7
69
10
U_
06
03
_6
.3V
6M
~D
1
2
Q5
1B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
51
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
R905100K_0402_5%~D
R905100K_0402_5%~D
12
Q5
7B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
57
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
R915100K_0402_5%~DR915100K_0402_5%~D
12
R91639_0603_5%~DR91639_0603_5%~D
12
S
G
D
Q49SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q49SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
Q5
2B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6~
DQ
52
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
~D
3
5
4
R909100K_0402_5%~D
R909100K_0402_5%~D
12
R92539_0402_5%~D
@R92539_0402_5%~D
@
12
Q51ADMN66D0LDW-7_SOT363-6~D
Q51ADMN66D0LDW-7_SOT363-6~D
61
2
C11991U_0603_10V7K~D
C11991U_0603_10V7K~D
12
R91420K_0402_5%~DR91420K_0402_5%~D
12
G
D
S
Q6
4
SS
M3
K7
00
2F
U_
SC
70
-3~
D
G
D
S
Q6
4
SS
M3
K7
00
2F
U_
SC
70
-3~
D
2
13
G
D
SQ
69
SS
M3
K7
00
2F
U_
SC
70
-3~
D
@
G
D
SQ
69
SS
M3
K7
00
2F
U_
SC
70
-3~
D
@
2
13
R926220_0402_5%~DR926220_0402_5%~D
12
R90820K_0402_5%~DR90820K_0402_5%~D
12
U78
TPS22966DPUR_SON14_2X3~D
U78
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
S
G
D
Q59NTGS4141NT1G_TSOP6~D
S
G
D
Q59NTGS4141NT1G_TSOP6~D
3
6
245
1
C7
65
10
U_
06
03
_6
.3V
6M
~D
C7
65
10
U_
06
03
_6
.3V
6M
~D
1
2
C7
72
10
U_
06
03
_6
.3V
6M
~D
C7
72
10
U_
06
03
_6
.3V
6M
~D
1
2
G
D
S
Q6
7S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q6
7S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
R920100K_0402_5%~D
R920100K_0402_5%~D
12
C7674700P_0402_25V7K~DC7674700P_0402_25V7K~D
1
2
Q63SI4164DY-T1-GE3_SO8~D
Q63SI4164DY-T1-GE3_SO8~D
365
78
2
4
1
C7
61
0.1
U_
04
02
_2
5V
6K
~D
C7
61
0.1
U_
04
02
_2
5V
6K
~D
1
2
R1
61
1
47
0K
_0
40
2_
5%
~D
R1
61
1
47
0K
_0
40
2_
5%
~D
12
R747 0_0402_5%~D@R747 0_0402_5%~D@1 2
C7623300P_0402_50V7K~DC7623300P_0402_50V7K~D
1
2
R1
61
91
M_
04
02
_5
%~
DR
16
19
1M
_0
40
2_
5%
~D
12
R92120K_0402_5%~D
R92120K_0402_5%~D
12
G
D
S
Q6
8S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q6
8S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
R749 0_0402_5%~DR749 0_0402_5%~D1 2
C7
64
0.1
U_
04
02
_2
5V
6K
~D
C7
64
0.1
U_
04
02
_2
5V
6K
~D
1
2
R92722_0603_5%~DR92722_0603_5%~D
12
R1
61
0
47
0K
_0
40
2_
5%
~D
R1
61
0
47
0K
_0
40
2_
5%
~D
12
C7714700P_0402_25V7K~D
C7714700P_0402_25V7K~D
1
2
G
D
S
Q7
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
G
D
S
Q7
0S
SM
3K
70
02
FU
_S
C7
0-3
~D
@
2
13
Q57ADMN66D0LDW-7_SOT363-6~D
Q57ADMN66D0LDW-7_SOT363-6~D
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#LID_CL#
SYS_LED_MASK#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
SYS_LED_MASK#
BAT1_LED#_Q
BAT2_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
BREATH_LED#<38,39>
BREATH_WHITE_LED <23>
SYS_LED_MASK#<39>
LID_CL#<30,39>
WLAN_LED <30>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
SATA_ACT#<14>
SATA_LED <30>LED_SATA_DIAG_OUT#<39>
MASK_SATA_LED#<39>
BAT2_LED#<39>
BAT1_LED#<39>
BATT_WHITE <30>
BATT_YELLOW <30>
BATT_WHITE_LED <23>
BATT_YELLOW_LED <23>
PANEL_HDD_LED <23>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PAD and Standoff
43 56Thursday, June 23, 2011
Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
WLAN LED solution for White LED
Place LED1 close to SW1
EMI CLIP
Fiducial Mark
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened) 11
HDD LED solution for White LED Battery LED
Breath LED
LVDS standoff
H21H_2P8@ H21H_2P8@
1
Q83A
DMN66D0LDW-7_SOT363-6~D
Q83A
DMN66D0LDW-7_SOT363-6~D
61
2
H26H_2P8@ H26H_2P8@
1
R959330_0402_5%~DR959330_0402_5%~D
1 2
H7CLIP_C5@ H7CLIP_C5@
1
R951330_0402_5%~DR951330_0402_5%~D
1 2
H24H_2P8@ H24H_2P8@
1
H4H_2P0@ H4H_2P0@
1
H11H_2P8@ H11H_2P8@
1
H17H_2P3@ H17H_2P3@
1
Q74BDMN66D0LDW-7_SOT363-6~D
Q74BDMN66D0LDW-7_SOT363-6~D
3
5
4
D59
RB751S40T1_SOD523-2~D
D59
RB751S40T1_SOD523-2~D
21
H15H_2P8@ H15H_2P8@
1
Q79PDTA114EU_SC70-3~D
Q79PDTA114EU_SC70-3~D
2
13
H20H_2P8@ H20H_2P8@
1
R937100K_0402_5%~DR937100K_0402_5%~D
12
R93210K_0402_5%~DR93210K_0402_5%~D
12
FD4
FIDUCIAL MARK~D
@ FD4
FIDUCIAL MARK~D
@
1
H12H_2P6@ H12H_2P6@
1
R957 1K_0402_1%~DR957 1K_0402_1%~D1 2
Q80ADMN66D0LDW-7_SOT363-6~D
Q80ADMN66D0LDW-7_SOT363-6~D
61
2
R9494.7K_0402_5%~DR9494.7K_0402_5%~D
1 2
C778 0.1U_0402_25V6K~DC778 0.1U_0402_25V6K~D
1 2
H25H_2P8@ H25H_2P8@
1
CLIP1EMI_CLIPCLIP1EMI_CLIP
GND1
Q81PDTA114EU_SC70-3~DQ81PDTA114EU_SC70-3~D
2
13
R950100K_0402_5%~DR950100K_0402_5%~D
12
H27H_2P8@ H27H_2P8@
1
H6CLIP_C5@ H6CLIP_C5@
1
FD2
FIDUCIAL MARK~D
@ FD2
FIDUCIAL MARK~D
@
1
H10H_2P8@ H10H_2P8@
1
H18H_3P4@ H18H_3P4@
1
R9584.7K_0402_5%~DR9584.7K_0402_5%~D
1 2
H3H_2P8@ H3H_2P8@
1
D62
RB751S40T1_SOD523-2~D
D62
RB751S40T1_SOD523-2~D
21
H22H_2P0X2P5@ H22H_2P0X2P5@
1
R9554.7K_0402_5%~DR9554.7K_0402_5%~D
1 2
Q83B
DMN66D0LDW-7_SOT363-6~D
Q83B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q74ADMN66D0LDW-7_SOT363-6~D
Q74ADMN66D0LDW-7_SOT363-6~D
61
2
H13H_2P6@ H13H_2P6@
1
Q75PDTA114EU_SC70-3~DQ75PDTA114EU_SC70-3~D
2
13
R938 4.7K_0402_5%~DR938 4.7K_0402_5%~D1 2
FD3
FIDUCIAL MARK~D
@ FD3
FIDUCIAL MARK~D
@
1
H5H_2P8@ H5H_2P8@
1
H16H_3P4@ H16H_3P4@
1
H9H_2P8@ H9H_2P8@
1
R939 4.7K_0402_5%~DR939 4.7K_0402_5%~D1 2
R934 4.7K_0402_5%~DR934 4.7K_0402_5%~D1 2
H19H_2P3@ H19H_2P3@
1
FD1
FIDUCIAL MARK~D
@ FD1
FIDUCIAL MARK~D
@
1
Q78BDMN66D0LDW-7_SOT363-6~DQ78BDMN66D0LDW-7_SOT363-6~D
3
5
4
LED1
LTW-193ZDS5_WHITE~D
LED1
LTW-193ZDS5_WHITE~D
21
Q84ADMN66D0LDW-7_SOT363-6~D
Q84ADMN66D0LDW-7_SOT363-6~D
61
2
U58
TC7SH08FU_SSOP5~D
U58
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
Q78ADMN66D0LDW-7_SOT363-6~D
Q78ADMN66D0LDW-7_SOT363-6~D
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+TRM_CT3
+TRM_CT4
+TRM_CT1
+TRM_CT2
NB_LAN_TX0+
NB_LAN_TX0-
NB_LAN_TX1-
NB_LAN_TX1+
NB_LAN_TX2-
NB_LAN_TX2+
NB_LAN_TX3-
NB_LAN_TX3+
Z2805
Z2807
Z2806
Z2808
GND_CHASSIS
LAN_ACTLED_YEL#_R
NB_LAN_TX3-
NB_LAN_TX3+
NB_LAN_TX2-
NB_LAN_TX2+
NB_LAN_TX1-
NB_LAN_TX1+
NB_LAN_TX0-
NB_LAN_TX0+
+3.3V_LAN
LED_100_ORG#<31>
LED_10_GRN#<31>
LAN_ACTLED_YEL#<31>
SW_LAN_TX1+<31>
SW_LAN_TX0+<31>
SW_LAN_TX0-<31>
SW_LAN_TX1-<31>
SW_LAN_TX3+<31>
SW_LAN_TX3-<31>
SW_LAN_TX2+<31>
SW_LAN_TX2-<31>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.3
RJ45
44 56Thursday, June 23, 2011
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DELL CONFIDENTIAL/PROPRIETARY
GNDCHASSIS
Link Done
1:1
T1/A
T1/B
1:1T1/B
T1/A
1:1
1:1
T1/B
T1/A
T1/B
T1/A
TR1
350UH_H5120DNL~D
1:1
T1/A
T1/B
1:1T1/B
T1/A
1:1
1:1
T1/B
T1/A
T1/B
T1/A
TR1
350UH_H5120DNL~D
TD1-2
TDCT13
TDCT24
TD2+5
TD2-6
TD3+7
TD3-8
TDCT39
TDCT410
TD4+11
TD4-12
TX4- 13
TXCT3 16
TX3+ 18
TX2- 19
TX2+ 20
TXCT2 21
TXCT1 22
TX1- 23
TX4+ 14
TXCT4 15
TX3- 17
TD1+1
TX1+ 24
JLOM1
TYCO_2041341-1~D
CONN@JLOM1
TYCO_2041341-1~D
CONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Orange LED-13
Green LED-11
Yellow LED-10
Yellow LED+9
GND 15
GND 14
Green-Orange LED+12
R1112
75_0402_1%
~D
R1112
75_0402_1%
~D
12
C1104 1000P_1808_3KV7K~DC1104 1000P_1808_3KV7K~D1 2
C39
0.4
7U
_0603_10V
7K
~D
C39
0.4
7U
_0603_10V
7K
~D
1
2
C1168
0.1
U_0402_10V
7K
~D
C1168
0.1
U_0402_10V
7K
~D
1
2
C38
0.4
7U
_0603_10V
7K
~D
C38
0.4
7U
_0603_10V
7K
~D
1
2
C37
0.4
7U
_0603_10V
7K
~D
C37
0.4
7U
_0603_10V
7K
~D
1
2
C1167
470P
_0402_50V
7K
~D
C1167
470P
_0402_50V
7K
~D
1
2
R1091 150_0402_5%~DR1091 150_0402_5%~D1 2
R1111
75_0402_1%
~D
R1111
75_0402_1%
~D
12
R1114
75_0402_1%
~D
R1114
75_0402_1%
~D
12
R1090 150_0402_5%~DR1090 150_0402_5%~D1 2
C36
0.4
7U
_0603_10V
7K
~D
C36
0.4
7U
_0603_10V
7K
~D
1
2
R1089 150_0402_5%~DR1089 150_0402_5%~D1 2
R1113
75_0402_1%
~D
R1113
75_0402_1%
~D
12
C1169
1U
_0603_10V
4Z
~D
C1169
1U
_0603_10V
4Z
~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_PSID_TS5A63157
+DC_IN
PBATT+_C
Z4012
NB_PSID
MBATT+_C
VS
B_N
_003
VSB_N_002
VSB_N_001
Z5306Z5305Z5304
Z4306Z4305Z4304
+DCIN_JACK
-DCIN_JACK
+3.3V_ALW
+5V_ALW
+DC_IN_SS
PBATT+
GND
+3.3V_ALW
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
+COINCELL
GND
+3.3V_ALW
MPBATT+
+3.3V_ALW
+PWR_SRC +PWR_SRC_S
PSID_DISABLE# <39>
PBAT_PRES# <39,55>PBAT_SMBDAT <40>PBAT_SMBCLK <40>
DOCK_PSID<38> GPIO_PSID_SELECT <39>
PS_ID <40>
SOFT_START_GC<55>
BAY_SMBCLK <28,40>
MODULE_BATT_PRES# <39,55>BAY_SMBDAT <28,40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+DCIN
45 56Thursday, June 23, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
DC_IN+ Source
COIN RTC Battery
Move to power schematic
ESD Diodes
Link Done
Link Done2nd Battery Connector
Primary Battery Connector
ESD Diodes
PQ902TP0610K-T1-E3_SOT23-3
PQ902TP0610K-T1-E3_SOT23-3
2
13
PC
141
2200P
_0402_50V
7K
~D
PC
141
2200P
_0402_50V
7K
~D
12
PU1
TS5A63157DCKR_SC70-6~D
<BOM Structure>
PU1
TS5A63157DCKR_SC70-6~D
<BOM Structure>
V+5
NC3
COM4
GND2
IN6
NO1
PR933_0402_5%~D
PR933_0402_5%~D
1 2
PC
90.1
U_0603_25V
7K
~D
PC
90.1
U_0603_25V
7K
~D 1
2
PR106100_0402_5%~D
PR106100_0402_5%~D
1 2
PR108
100K_0402_5%~D
PR108
100K_0402_5%~D
12
PR18
10K_0402_5%~D
PR18
10K_0402_5%~D
1 2
PC
901
0.1
U_0402_16V
7K
PC
901
0.1
U_0402_16V
7K1
2
PR9010_0402_5%
PR9010_0402_5%
1 2
PC
903
0.1
U_0603_25V
7K
PC
903
0.1
U_0603_25V
7K
12
PD
10
VZ
0603M
260A
PT
_0603
@
PD
10
VZ
0603M
260A
PT
_0603
@
1
2
PR8
2.2K_0402_5%~D
PR8
2.2K_0402_5%~D
12
PC
10
0.1
U_0603_25V
7K
~D
PC
10
0.1
U_0603_25V
7K
~D 1
2
PR90222K_0402_1%
PR90222K_0402_1%
1 2
PR4100_0402_5%~D
PR4100_0402_5%~D
1 2
PL2
BLM18BD102SN1D_0603~D
PL2
BLM18BD102SN1D_0603~D
12
PL1FBMJ4516HS720NT_2P~D
PL1FBMJ4516HS720NT_2P~D
1 2
PR
12
15K
_0402_1%
~D
PR
12
15K
_0402_1%
~D
12
PD7
PESD24VS2UT_SOT23-3~D
@ PD7
PESD24VS2UT_SOT23-3~D
@
2 31
PR3100_0402_5%~D
PR3100_0402_5%~D
1 2
PL20FBMJ4516HS720NT_2P~D
PL20FBMJ4516HS720NT_2P~D
1 2
PR77100_0402_5%~D
PR77100_0402_5%~D
1 2
PL4FBMJ4516HS720NT_2P~D
PL4FBMJ4516HS720NT_2P~D
1 2
1M
_0402_5%
~D
PR
19
1M
_0402_5%
~D
PR
19
12
G
D
S
PQ901SSM3K7002FU_SC70-3G
D
S
PQ901SSM3K7002FU_SC70-3
2
13
PD2
PESD24VS2UT_SOT23-3~D
@ PD2
PESD24VS2UT_SOT23-3~D
@
2 31
PL3FBMJ4516HS720NT_2P~D
PL3FBMJ4516HS720NT_2P~D
1 2
PR
903
100K
_0402_1%
PR
903
100K
_0402_1%
12
PJP51
PAD-OPEN 2x2m~D
PJP51
PAD-OPEN 2x2m~D
2 1
PR11K_0402_5%~DPR11K_0402_5%~D
12
PR105100_0402_5%~D
PR105100_0402_5%~D
1 2
PR7
0_0402_5%~D
@ PR7
0_0402_5%~D
@
1 2
PD3
PESD24VS2UT_SOT23-3~D
@ PD3
PESD24VS2UT_SOT23-3~D
@
2 31
PC13
0.1U_0603_25V7K~D
PC13
0.1U_0603_25V7K~D
12
PC1
1U_0603_10V4Z~D
PC1
1U_0603_10V4Z~D
1
2
PR
10
100K
_0402_1%
~D
PR
10
100K
_0402_1%
~D
12
PBATT2
SUYIN_150010GR006M500ZR
PBATT2
SUYIN_150010GR006M500ZR
11
33
44
55
66
22
GND7
GND8
PR
11
10K
_0402_1%
~D
PR
11
10K
_0402_1%
~D1
2
PC
902
0.2
2U
_0603_25V
7K
PC
902
0.2
2U
_0603_25V
7K
12PR
15
1M
_0402_5%
~D
PR
15
1M
_0402_5%
~D
12
PJP43
PAD-OPEN 4x4m
PJP43
PAD-OPEN 4x4m
1 2
PR
16
100K
_0402_5%
~D
PR
16
100K
_0402_5%
~D 1
2
PJPDC1
MOLEX_87438-0743~D
PJPDC1
MOLEX_87438-0743~D
11
33
44
55
22
66
77
PC
11
10U
_1206_25V
6M
~D
PC
11
10U
_1206_25V
6M
~D
12
PD1
RB715FGT106_UMD3
PD1
RB715FGT106_UMD3
231
JRTC1
TYCO_2-1775293-2~D
JRTC1
TYCO_2-1775293-2~D
11
22
G4
G3
PL19FBMJ4516HS720NT_2P~D
PL19FBMJ4516HS720NT_2P~D
1 2
G
D S
PQ2FDV301N_NL_SOT23-3~DG
D S
PQ2FDV301N_NL_SOT23-3~D2
1 3
E
B
C
PQ3MMST3904-7-F_SOT323~D
E
B
C
PQ3MMST3904-7-F_SOT323~D
2
31
PR2
100K_0402_5%~D
PR2
100K_0402_5%~D
12
PC
7
0.1
U_0603_25V
7K
~D
PC
7
0.1
U_0603_25V
7K
~D 1
2
PR5100_0402_5%~D
PR5100_0402_5%~D
1 2
PR13
10K_0402_5%~D@
PR13
10K_0402_5%~D@
1 2
PC
32200P
_0402_50V
7K
~D
PC
32200P
_0402_50V
7K
~D
12
PC136
0.1U_0603_25V7K~D
PC136
0.1U_0603_25V7K~D
12
PC2
0.1U_0603_25V7K~D
PC2
0.1U_0603_25V7K~D
12
PD6
PESD24VS2UT_SOT23-3~D
@ PD6
PESD24VS2UT_SOT23-3~D
@
2 31
PBATT1
SUYIN_200277MR009F515ZR~D
PBATT1
SUYIN_200277MR009F515ZR~D
11
33
44
55
66
GND8
GND9
22
77
PC
12
0.1
U_0603_25V
7K
~D
@
PC
12
0.1
U_0603_25V
7K
~D
@
12
PC
60.0
22U
_0805_50V
7K
~D
PC
60.0
22U
_0805_50V
7K
~D
12
PQ4FDS6679AZ_SO8~D
PQ4FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PR
17
4.7
K_0805_5%
~D
@P
R17
4.7
K_0805_5%
~D
@
12
PC
80.1
U_0603_25V
7K
~D
PC
80.1
U_0603_25V
7K
~D 1
2
DM_Chen
高亮
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
ENTRIP2
LX_5V
BST1_5VBST1_3V
UG_5V
BST_3V
ENTRIP1
FB_3V
LG_5V
SN
UB
_3
V
SN
UB
_5
V
LG_3V
UG_3V
LX_3V
FB_5V
EN
TR
IP1
EN
TR
IP2
+DC1_PWR_SRC
+5V_ALWP
+5V_ALW2
+3.3V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
2VREF_6182
+PWR_SRC
+3.3V_ALW2
2VREF_6182
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_RTC_LDO
+3.3V_ALW
+PWR_SRC
+5V_ALW2
ALW_PWRGD_3V_5V <40>
ALWON<40>
THERM_STP#<22>
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-7741 0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-7741 0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-7741 0.1
+5V/+3.3V
Custom
46 56Thursday, June 23, 2011
2007/08/02 <Deciphered_Date>Compal Electronics, Inc.
(5A,180mils ,Via NO.= 9)
(4A,120mils ,Via NO.= 6)
3.3VALWP +/- 5%TDC=5.45APeak Current=7.786AOCP min=10.122AL/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)FSW=375KHzDelta_Iin=1.246ADelta_Io=3.3231A
5VALWP +/- 5%TDC=8.41APeak Current=12.012AOCP min=15.62AL/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)FSW=300KHzDelta_Iin=1.64ADelta_Io=3.756A
SKIPSEL Connect to REF : DEM Mode
@DEM VFBx=2.0V
Charlie_note :
Typ: 175mA
Typ: 175mA
TONSEL
Frequency Selectable Input for VOUT1(+5v)/VOUT2(+3.3v)
respectively.
300kHz/375kHz : Connect to REF
+5V_ALWP/ +3.3V_ALWP
Max: 100uA
PQ6
AON7408L_DFN8-5
PQ6
AON7408L_DFN8-5
35
2
4
1
PC
20
10
U_
08
05
_2
5V
6K
@
PC
20
10
U_
08
05
_2
5V
6K
@
12
PR150
100K_0402_1%
PR150
100K_0402_1%
1 2
PR4220K_0402_1%PR4220K_0402_1%
1 2
PC
34
68
0P
_0
60
3_
50
V7
K
@
PC
34
68
0P
_0
60
3_
50
V7
K
@
12PJP9
PAD-OPEN 4x4m
PJP9
PAD-OPEN 4x4m
1 2
PR1472K_0402_1%~D
PR1472K_0402_1%~D
1 2
PQ70A
2N7002DW-T/R7_SOT363-6~D
PQ70A
2N7002DW-T/R7_SOT363-6~D
61
2
PR20
100K_0402_1%
PR20
100K_0402_1%
12
PQ7FDMS7692 1N POWER56-8
PQ7FDMS7692 1N POWER56-8
G2
D3
S1
PR4320K_0402_1%
PR4320K_0402_1%
1 2
PQ8
IRF8707GTRPBF_SO8
PQ8
IRF8707GTRPBF_SO8
4
78 6 5
1 2 3
PD37
MMSZ5229BS_SOD323-2
PD37
MMSZ5229BS_SOD323-2
1 2
PQ70B
2N7002DW-T/R7_SOT363-6~D
PQ70B
2N7002DW-T/R7_SOT363-6~D
3
5
4PR27
0_0402_5%PR27
0_0402_5%
1 2
PC370.22U_0603_25V7K~D
PC370.22U_0603_25V7K~D
1 2
PR
39
4.7
_1
20
6_
5%
@
PR
39
4.7
_1
20
6_
5%
@
12
PC
11
91
U_
06
03
_1
0V
6K
@
PC
11
91
U_
06
03
_1
0V
6K
@
12
PC380.22U_0603_25V7K~D
PC380.22U_0603_25V7K~D
1 2
PC2810U_0805_6.3V6M
PC2810U_0805_6.3V6M
12
PR
40
4.7
_1
20
6_
5%
@
PR
40
4.7
_1
20
6_
5%
@
12
PR1510_0402_5%
PR1510_0402_5%
1 2
+
PC
35
22
0U
_D
_6
.3V
M_
R2
5M
+
PC
35
22
0U
_D
_6
.3V
M_
R2
5M
1
2
PU2
RT8205LZQW(2) WQFN 24P PWM
PU2
RT8205LZQW(2) WQFN 24P PWM
FB
12
RE
F3
VO124
EN
TR
IP1
1
TO
NS
EL
4
FB
25
SK
IPS
EL
14
NC
18
VR
EG
51
7
VO27
VREG38
VIN
16
GN
D1
5
UGATE121
BOOT122
EN
TR
IP2
6
PGOOD23
PHASE120
LGATE119
EN
13
BOOT29
UGATE210
PHASE211
LGATE212
P PAD25
PR41
2.2_0603_5%
PR41
2.2_0603_5%
1 2
PC264.7U_0805_10V6KPC264.7U_0805_10V6K
12
PC
23
10
U_
08
05
_2
5V
6K
PC
23
10
U_
08
05
_2
5V
6K
12
PR34232K_0402_1%~DPR34232K_0402_1%~D
1 2
PR46
499K_0402_1%~D
PR46
499K_0402_1%~D
12PJP10
PAD-OPEN 4x4m
PJP10
PAD-OPEN 4x4m
1 2
PJP74
PAD-OPEN 4x4m
PJP74
PAD-OPEN 4x4m
1 2
PC361U_0603_16V6K
PC361U_0603_16V6K
12
PR38
2.2_0603_5%
PR38
2.2_0603_5%
1 2
+
PC
40
22
0U
_D
_6
.3V
M_
R2
5M
+
PC
40
22
0U
_D
_6
.3V
M_
R2
5M
1
2
PR
47
30
0K
_0
40
2_
1%
PR
47
30
0K
_0
40
2_
1%1
2
PC
19
1U
_0
60
3_
10
V6
K
@
PC
19
1U
_0
60
3_
10
V6
K
@ 12
PJP6
PAD-OPEN 4x4m
PJP6
PAD-OPEN 4x4m
1 2
PR33140K_0402_1%
PR33140K_0402_1%
1 2
PL24
HCB2012KF-121T50_0805
@ PL24
HCB2012KF-121T50_0805
@
1 2
PJP5
PAD-OPEN 4x4m
PJP5
PAD-OPEN 4x4m
1 2
PC
18
10
U_
08
05
_2
5V
6K
PC
18
10
U_
08
05
_2
5V
6K
12
PC
17
0.1
U_
04
02
_2
5V
6
PC
17
0.1
U_
04
02
_2
5V
6
12
PR3713.7K_0402_1%
PR3713.7K_0402_1%
1 2
PC
33
68
0P
_0
60
3_
50
V7
K
@
PC
33
68
0P
_0
60
3_
50
V7
K
@
12
PL8
2.2UH_ETQP3W2R2WFN_8.5A_20%
PL8
2.2UH_ETQP3W2R2WFN_8.5A_20%
1 2
PC
24
10
U_
08
05
_2
5V
6K
@
PC
24
10
U_
08
05
_2
5V
6K
@
12
PC
21
22
00
P_
04
02
_5
0V
7K
PC
21
22
00
P_
04
02
_5
0V
7K
12
PQ105
PDTC115EU_SOT323-3
PQ105
PDTC115EU_SOT323-3
2
13
PL7
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL7
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1 2
PC
16
22
00
P_
04
02
_5
0V
7K
PC
16
22
00
P_
04
02
_5
0V
7K
12
PR3630.9K_0402_1%PR3630.9K_0402_1%
1 2
PC27
0.1U_0603_25V7K
PC27
0.1U_0603_25V7K
12
PQ5
FDS8878_G 1N SO8
PQ5
FDS8878_G 1N SO8
G2
D3
S1
PC
22
0.1
U_
04
02
_2
5V
6
PC
22
0.1
U_
04
02
_2
5V
6
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.5V_B+
VDD_1.5V VDDQ_1.5V
S5_1.5V
1.5V_SUS_PWRGD
S3_1.5V
BOOT_1.5V
DH_1.5V
SW_1.5V
DL_1.5V
1.5V_B+
VLDOIN_1.5V
CS_1.5V
+1.5V_MEN_P_FB
SN
UB
_1.5
V
+1.5V_MEN_P +1.5V_MEM +0.75V_DDR_VTT+0.75V_P
+PWR_SRC
+1.5V_MEN_P
+5V_ALW
+5V_ALW
+1.5V_MEN_P
+1.5V_MEN_P
+V_DDR_REF
+0.75V_P
+3.3V_ALW
+1.5V_MEN_P1.5V_SUS_PWRGD<40>
DDR_ON<40>
0.75V_DDR_VTT_ON<39>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.5V_MEN/+0.75V_DDR_VTT
47 56Thursday, June 23, 2011
Compal Electronics, Inc.
1.5Volt +/- 5%TDC=7.18APeak Current=10.25AOCP min=13.33AL/S RDS(on) 3.8m ohm(typ),4.8m ohm(max)FSW=253KHz for RTON=1M ohm, spec. On-Time =303.947nsDelta_Iin=1.458ADelta_Io=5.4728A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC=0.525A
Peak Current=0.75A
OCP min=0.975A
(2A,80mils ,Via NO.= 4)
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
+1.5V_MEN_P/ +0.75V_P
20110602 modify item1. delete PU16.4 another net name VTTREF_1.5V, only left +V_DDR_REF
PR485100K_0402_1%~D
PR485100K_0402_1%~D
12
+
PC
423
330U
_S
X_2V
Y~
R9M
+
PC
423
330U
_S
X_2V
Y~
R9M
1
2
PC
415
2200P
_0402_50V
7K
~D
PC
415
2200P
_0402_50V
7K
~D
12
PR486
1M_0402_1%~D
PR486
1M_0402_1%~D
1 2
PC4250.033U_0402_16V7~DPC4250.033U_0402_16V7~D
PJP404
PAD-OPEN 4x4m
PJP404
PAD-OPEN 4x4m
1 2PJP204
PAD-OPEN1x1m
PJP204
PAD-OPEN1x1m
12
PR905
0_0402_5%~D
PR905
0_0402_5%~D
12
PU16
RT8207MZQW_WQFN20_3X3
PU16
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PG
OO
D10
VDDP12
PH
AS
E16
BO
OT
18
VTTREF 4
PGND14
VTTGND 1
GND 3
VDDQ 5
S3
7
TO
N9
VDD11
CS13
LGATE15 UG
AT
E17
VT
T20
VLD
OIN
19
PAD 21
PQ68
SIR466DP-T1-GE3_POWERPAK8-5
PQ68
SIR466DP-T1-GE3_POWERPAK8-5
4
5
1 2 3
PQ67
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ67
SIR472DP-T1-GE3_POWERPAK8-5~D4
5
1 2 3
PC
416
0.2
2U
_0603_16V
7K
~D
PC
416
0.2
2U
_0603_16V
7K
~D
12
PC904
0.1U_0603_25V7K
@ PC904
0.1U_0603_25V7K
@
12
PR4890_0402_5%~D
PR4890_0402_5%~D
1 2
PC2310.1U_0603_25V7K~D
@ PC2310.1U_0603_25V7K~D
@
12
PC
414
0.1
U_0402_25V
6K
~D
PC
414
0.1
U_0402_25V
6K
~D
12
PL27
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
PL27
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D1 2
PJP405
JUMP_43X118
PJP405
JUMP_43X118
1 122
PC4191U_0603_10V6K~D
PC4191U_0603_10V6K~D
PR220
4.7_1206_5%
@ PR220
4.7_1206_5%
@
12
PC
418
10U
_0805_6.3
V6M
~D
PC
418
10U
_0805_6.3
V6M
~D
12
PR484
5.1_0603_5%~D
PR484
5.1_0603_5%~D
1 2
PC424
1U_0603_10V6K~D
PC424
1U_0603_10V6K~D
PR4835.1K_0402_1%~DPR4835.1K_0402_1%~D
1 2
PR482
2.2_0603_5%~D
PR482
2.2_0603_5%~D
1 2
+
PC
422
330U
_S
X_2V
Y~
R9M
@
+
PC
422
330U
_S
X_2V
Y~
R9M
@
1
2
PR904
0_0402_5%~D
@ PR904
0_0402_5%~D
@12
PR487
0_0402_5%~D
PR487
0_0402_5%~D
1 2
PC426
0.1U_0402_16V7K~D
@ PC426
0.1U_0402_16V7K~D
@
12
PC
413
4.7
U_0805_25V
6K
~D
PC
413
4.7
U_0805_25V
6K
~D
12P
C412
4.7
U_0805_25V
6K
~D
PC
412
4.7
U_0805_25V
6K
~D
12
PJP407
PAD-OPEN 3x3m
PJP407
PAD-OPEN 3x3m
1 2
PC
417
10U
_0805_6.3
V6M
~D
PC
417
10U
_0805_6.3
V6M
~D
12
PJP406
JUMP_43X118
PJP406
JUMP_43X118
1 122
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
1.8VSP_FB
1.8VSP_VIN 1.8VSP_LX
SN
UB
_1
.8V
SPEN_1.8VSP
+1.8V_RUNP
+1.8V_RUNP +1.8V_RUN
+3.3V_ALW
+3.3V_RUN
RUN_ON<27,35,39,42>
1.8V_RUN_PWRGD <39>
SIO_SLP_S3#<11,16,27,35,39,42>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.8V_RUN
48 56Thursday, June 23, 2011
Compal Electronics, Inc.
<Vo=1.8V> VFB=0.6VVo=VFB*(1+PR477/PR480)=0.6*(1+20K/10K)=1.8V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
1.8Volt +/-5%
TDC=0.81A
Peak Current=1.157A
OCP min=1.5A
FSW=1MHz
Delta_Iin=0.407A
Delta_Io=0.8182A
+1.8V_RUNP
PC
40
82
2U
_0
80
5_
6.3
VA
MP
C4
08
22
U_
08
05
_6
.3V
AM1
2
PC
40
92
2U
_0
80
5_
6.3
VA
MP
C4
09
22
U_
08
05
_6
.3V
AM1
2
PC410
0.1U_0402_10V7K
@ PC410
0.1U_0402_10V7K
@12
PC
40
7
22
P_
04
02
_5
0V
8J
PC
40
7
22
P_
04
02
_5
0V
8J
12
PR475
10K_0402_5%~D
PR475
10K_0402_5%~D
12
PR477
20K_0402_1%
PR477
20K_0402_1%
12
PC
30
64
7P
_0
40
2_
50
V8
J~
DP
C3
06
47
P_
04
02
_5
0V
8J~
D12
PR481
0_0402_5%
PR481
0_0402_5%
1 2
PU15
SYN470DBC_DFN10_3X3
PU15
SYN470DBC_DFN10_3X3
EN5
PG
4
LX3
FB6
SVIN8
TP
11
LX2
PVIN10
NC
7
PVIN9
NC
1
PR480
10K_0402_1%
PR480
10K_0402_1%
12
PR478
0_0402_5%
@ PR478
0_0402_5%
@1 2
PL25
HCB1608KF-121T30_0603
PL25
HCB1608KF-121T30_0603
1 2
PJP403
PAD-OPEN 3x3m
PJP403
PAD-OPEN 3x3m
1 2
PC40622U_0805_6.3VAMPC40622U_0805_6.3VAM
12
PL261UH_PH041H-1R0MS_3.8A_20%
PL261UH_PH041H-1R0MS_3.8A_20%
1 2
PR479
47K_0402_5%
@ PR479
47K_0402_5%
@
12
PC
41
1
68
0P
_0
60
3_
50
V7
K
@
PC
41
1
68
0P
_0
60
3_
50
V7
K
@
12
PR
47
6
4.7
_1
20
6_
5%
@
PR
47
6
4.7
_1
20
6_
5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05SP
SW_+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
V5IN_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B++PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
SIO_SLP_A#<16,39,42>
1.05V_A_PWRGD<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
+1.05V_M
49 56Thursday, June 23, 2011
Compal Electronics, Inc.
+1.05Volt +/- 5%
TDC=2.38A
Peak Current=3.396A
OCP min=4.42A
L/S RDS(on) 11.7m ohm(typ),14.12m ohm(max)
FSW=290KHz
Delta_Iin=0.234A
Delta_Io=1.038A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
S0 mode be high level
+1.05V_MP
PR403
0_0402_5%
PR403
0_0402_5%
1 2
PR406
4.99K_0402_1%
PR406
4.99K_0402_1%
12
PJP402
JUMP_43X118
PJP402
JUMP_43X118
1 122
PC4051U_0603_6.3V6MPC4051U_0603_6.3V6M
12
PR4012.2_0603_5%
PR4012.2_0603_5%
1 2
PC4330.1U_0603_25V7K
@
PC4330.1U_0603_25V7K
@12
+
PC
430
220U
_D
2_4V
M
+
PC
430
220U
_D
2_4V
M 1
2
PC432
1000P_0603_50V7K
@ PC432
1000P_0603_50V7K
@
12
PC
402
2200P
_0402_50V
7K
PC
402
2200P
_0402_50V
7K
12
PJP400
JUMP_43X118
PJP400
JUMP_43X118
1 122
PC
401
0.1
U_0402_25V
6
PC
401
0.1
U_0402_25V
6
12 P
C403
4.7
U_0805_25V
6K
PC
403
4.7
U_0805_25V
6K
12 P
C400
4.7
U_0805_25V
6K
PC
400
4.7
U_0805_25V
6K
12
PC4040.1U_0603_25V7K
PC4040.1U_0603_25V7K
1 2
PJP401
JUMP_43X118
PJP401
JUMP_43X118
1 122PR407
10K_0402_1%
PR407
10K_0402_1%
12
PL4003.3UH_PCMB064T-3R3MS_7A_20%
PL4003.3UH_PCMB064T-3R3MS_7A_20%
1 2
PR405
470K_0402_1%
PR405
470K_0402_1%
12
PC431
0.1U_0402_16V7K
@ PC431
0.1U_0402_16V7K
@
12
PR404
4.7_1206_5%
@ PR404
4.7_1206_5%
@
12
PR400
100K_0402_1%~D
PR400
100K_0402_1%~D
12
PU17
TPS51212DSCR_SON10_3X3
PU17
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF5
VFB4
PGOOD1
TP 11
PR40266.5K_0402_1%~D
PR40266.5K_0402_1%~D
1 2
PQ401AO4710_SO8
PQ401AO4710_SO8
4
7 865
123
PQ400
AO4466_SO8
PQ400
AO4466_SO8
365 7 8
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VTT_VX
+1.0
5V
TT
_V
X
+1.0
5V
TT
_S
EN
SE
+1.05VTT_SS
+1.05VTT_FSET
+1.05VTT_PWRGD
+1.05VTT_VFB
+1.05VTT_SENSE
+1.05VTT_BST
+1.05VTT_COMP
+1.05VTT_MODE
+1.05VTT_EN
+1.05VTT_SENSE
+1.05VTT_PWRGD
+1.05VTT_PWR_SRC
+1.05VTT_VX
SNUB_1.05VTT
+1.05VTTP
+1.05VTTP
+1.05V_RUN_VTTGNDA_1.05VTT
+5V_RUN
GNDA_1.05VTT
GNDA_1.05VTT
GNDA_1.05VTT
+3.3V_ALW
+5V_ALW
GNDA_1.05VTT
GNDA_1.05VTT
GNDA_1.05VTT
+3.3V_RUN
GNDA_1.05VTT
VTT_SENSE <10>
1.05V_VTTPWRGD <40,54>
CPU_VTT_ON <39>
VTT_GND <10>
VCCP_PWRCTRL <10>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
50 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
1.05Volt +/-5%
TDC=4.49A
Peak Current=6.411A
OCP min=8.334A
FSW=1MHz
Delta_Iin=0.804A
Delta_Io=1.975A
+1.05VTTP
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
Vth =1~x~2.5v
VFB=0.6V
PC
112
0.1
U_0603_25V
7K
~D
PC
112
0.1
U_0603_25V
7K
~D
12
PR118
0_0402_5%~D
PR118
0_0402_5%~D
1 2
PC116
680P_0402_50V7K~D
PC116
680P_0402_50V7K~D
12
PJP23
PAD-OPEN 4x4m
PJP23
PAD-OPEN 4x4m
1 2
PJP26
PAD-OPEN 43X118
PJP26
PAD-OPEN 43X118
1 2
PR94
0_0402_5%~D
PR94
0_0402_5%~D
12
PC
130
22U
_0805_6.3
V6M
PC
130
22U
_0805_6.3
V6M 1
2
PR
100
10_0402_5%
~D
PR
100
10_0402_5%
~D1
2
PC
131
6800P
_0402_25V
7K
~D
PC
131
6800P
_0402_25V
7K
~D 1
2
PR102
0_0402_5%~D
PR102
0_0402_5%~D
1 2
PC
128
0.1
U_0603_25V
7K
~D
PC
128
0.1
U_0603_25V
7K
~D 1
2
PC
121
47U
_0805_4V
6M
~D
PC
121
47U
_0805_4V
6M
~D 1
2
PC
301
10U
_0805_25V
6K
PC
301
10U
_0805_25V
6K
12
PC
125
22U
_0805_6.3
V6M
PC
125
22U
_0805_6.3
V6M 1
2
PC
113
0.1
U_0603_25V
7K
~D
PC
113
0.1
U_0603_25V
7K
~D
12
PR101
9.31K_0402_1%~D
PR101
9.31K_0402_1%~D
12
PC
183
0.0
1U
_0402_16V
7K
~D
@
PC
183
0.0
1U
_0402_16V
7K
~D
@
12
PC
111
10U
_0805_25V
6K
PC
111
10U
_0805_25V
6K
12
PC
126
22U
_0805_6.3
V6M
PC
126
22U
_0805_6.3
V6M 1
2
PC115
100P_0402_50V8J~D
PC115
100P_0402_50V8J~D
12
PJP24
PAD-OPEN 43X118
PJP24
PAD-OPEN 43X118
1 2
PR
130
20K
_0402_0.5
%~
D
PR
130
20K
_0402_0.5
%~
D12
PR90
5.6K_0402_5%~D
PR90
5.6K_0402_5%~D
12
PR93 2K_0402_0.5%~DPR93 2K_0402_0.5%~D12
PC108
1U_0402_6.3V6K~D
PC108
1U_0402_6.3V6K~D
12
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
12
PC
127
22U
_0805_6.3
V6M
PC
127
22U
_0805_6.3
V6M 1
2
PC
123
22U
_0805_6.3
V6M
PC
123
22U
_0805_6.3
V6M 1
2
G
D
S
PQ17
SSM3K7002FU_SC70-3G
D
S
PQ17
SSM3K7002FU_SC70-3
2
13
PR116
100K_0402_5%
@ PR116
100K_0402_5%
@
12
PR
95
0_0402_5%
~D
PR
95
0_0402_5%
~D
12
PC
120
22U
_0805_6.3
V6M
PC
120
22U
_0805_6.3
V6M 1
2
PR128
10K_0402_5%
PR128
10K_0402_5%
12
PC117
1800P_0402_50V7K~D
PC117
1800P_0402_50V7K~D
1 2
PC5130.1U_0603_25V7K~D
@PC513
0.1U_0603_25V7K~D
@
12
PR92
22.1K_0402_1%~D
@ PR92
22.1K_0402_1%~D
@12
PC
110
10U
_0805_25V
6K
PC
110
10U
_0805_25V
6K
12
PR89
3.3_0603_1%~D
PR89
3.3_0603_1%~D
1 2
PC
109
10U
_0805_25V
6K
PC
109
10U
_0805_25V
6K
12 P
C300
10U
_0805_25V
6K
PC
300
10U
_0805_25V
6K
12
PR
96
3.0
1K
_0402_1%
PR
96
3.0
1K
_0402_1%1
2
PR91
0_0402_5%~D
@ PR91
0_0402_5%~D
@1 2
PC
124
47U
_0805_4V
6M
~D
PC
124
47U
_0805_4V
6M
~D 1
2
PR104
13.3K_0402_1%~D
PR104
13.3K_0402_1%~D
12
PJP25
PAD-OPEN1x1m
PJP25
PAD-OPEN1x1m
12P
C129
22U
_0805_6.3
V6M
PC
129
22U
_0805_6.3
V6M 1
2
PU7
SN1003055RUWR_QFN17_3P5X3P5~D
PU7
SN1003055RUWR_QFN17_3P5X3P5~D
SS6
VCCA1
GND2
PG
ND
9
SW
8
VIN
17
VBST15
FSET12
MODE11
VIN
16
IMON10
PG
ND
7
COMP3
VFB4
VOUT5
PGOOD14
EN13
PC1140.1U_0603_25V7KPC1140.1U_0603_25V7K
12
PR103
0_0402_5%~D
@ PR103
0_0402_5%~D
@1 2
PC
122
22U
_0805_6.3
V6M
PC
122
22U
_0805_6.3
V6M 1
2
PC118
0.01U_0402_25V7K~D
PC118
0.01U_0402_25V7K~D
12
PR5117.68K_0805_1%~D@ PR5117.68K_0805_1%~D@
12
PR119
0_0402_5%~D
PR119
0_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VGFX_TONB
+Vcore_GNDSA
+Vcore_FBA
+Vcore_VRHOT#
+VGFX_FBB
+VGFX_GNDSB
+VGFX_GNDSB
+VGFX_FBB
+GFX_POKB
+V
core
_V
DIO
+V
core
_A
LE
RT
#
+V
core
_C
LK
+V
core
_P
OK
A
+Vcore_POKA
BOST1
P1_SW
BT1_1
P1_SW
UGATE1
+Vcore_CSPA1
LGATE1
+V
core
_C
SP
A1
+Vcore_CSPA2
BT2_1
P2_SW
+Vcore_CSNA
+Vcore_CSNA
+Vcore_CSPA3
BT3_1
P3_SW
UGATE3
LGATE3
+Vcore_CSNA
LGAT2
P2_SW
BOST2
UGATE2+
Vcore
_C
SP
A3
+V
core
_C
SP
A2
+V
core
_C
SN
A
BOST3
P3_SW
+V
core
_P
WM
A
P1_SW
P2_SW
P3_SW
+V
core
_C
SP
AA
VE
+V
GF
X_T
HE
RM
B
+V
core
_T
HE
RM
A
+V
core
_S
R
+GFX_IMAXB
+Vcore_IMAXA
+Vcore_IMAXA
+GFX_IMAXB
+Vcore_VDD
+Vcore_VDD+
Vcore
_V
DD
+V
core
_V
CC
+V
core
_E
N
GNDA_VCC
GNDA_VCC
GNDA_VCC
GNDA_VCC
+VCC_GFXCORE
+3.3V_RUN+1.05V_RUN_VTT
+VCC_PWR_SRC
+VCC_CORE
GNDA_VCC
+VCC_CORE
GNDA_VCC
GNDA_VCC
+VCC_PWR_SRC
+VCC_CORE
GNDA_VCC
+5V_ALW
GNDA_VCC
+5V_ALW
+PWR_SRC
GNDA_VCC
+Vcore_VCC
+VCC_PWR_SRC
GNDA_VCC
GNDA_VCC
+1.05V_RUN_VTT
GNDA_VCC
+VCC_CORE
+VCC_PWR_SRC
VCCSENSE<10>
VSSSENSE<10>
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
+GFX_CSNB<52>
H_PROCHOT#<7,40,53>
IMVP_PWRGD<39>
+GFX_BSTB<52>
+GFX_LXB<52>
+GFX_DHB<52>
+GFX_DLB<52>
VIDSCLK<10>
VIDALERT_N<10>
VIDSOUT<10>
IMVP_VR_ON<39>
1.05V_0.8V_PWROK<14,40>
+GFX_CSPB1<52>
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
Vcore
51 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Layout Note:
PC142 close to PIN15
AON6414AL
MDU2657RH
PQ9,PQ11,PQ13 PQ10,PQ14,PQ15
AON6704L
MDU2653RH
Main
2nd
X7629631L88
X7629631L89
Charlie_note :
20110509 Maxim FAE-Allen reply:There are total 3 pcs
2.2uF capacitor for VCC(PC143), VDDA(PC160)
and VDDB(PC142) pin.
+VCC_CORE
+VCC_CORE
TDC=37.1A
Peak Current=53A
OCP min=69A
Fsw=270KHZ
Choke DCR=1.55± 7% mΩ
PQ10
SIR818DP-T1-GE3_POWERPAK8-5
PQ10
SIR818DP-T1-GE3_POWERPAK8-5
4
5
123
PH
3100K
_0402_1%
_T
SM
0B
104F
4251R
Z~
DP
H3
100K
_0402_1%
_T
SM
0B
104F
4251R
Z~
D
12
PC281
0.01U_0402_25V7K~D
PC281
0.01U_0402_25V7K~D
1 2
PC1612200P_0402_50V7K~D
PC1612200P_0402_50V7K~D
12
PC158
1000P_0402_50V7K~D
PC158
1000P_0402_50V7K~D
12
PR165
10K_0402_1%~D
PR165
10K_0402_1%~D
12
PR330
0_0402_5%~D
PR330
0_0402_5%~D
1 2
PR167 0_0402_5%~DPR167 0_0402_5%~D1 2
PC160
2.2U_0603_10V7K~D
PC160
2.2U_0603_10V7K~D
12
PC144
1000P_0402_50V7K~D
@ PC144
1000P_0402_50V7K~D
@
1 2
PQ15SIR818DP-T1-GE3_POWERPAK8-5
PQ15SIR818DP-T1-GE3_POWERPAK8-5
4
5
123
PR143
75_0402_5%~D
@ PR143
75_0402_5%~D
@
1 2
PR161
2.2_0603_5%~D
PR161
2.2_0603_5%~D12
PR148
1_1206_5%
@ PR148
1_1206_5%
@
12
PC1762200P_0402_50V7K~D
PC1762200P_0402_50V7K~D
12
PR144
2K_0402_0.5%~D
PR144
2K_0402_0.5%~D
12
PC163
1000P_0402_50V7K~D
PC163
1000P_0402_50V7K~D
12
PR153
10_0402_5%~D
PR153
10_0402_5%~D
1 2
PU9
MAX17511GTL+T_TQFN40_5X5~D
PU9
MAX17511GTL+T_TQFN40_5X5~D
FBB6
GNDSA3
GNDSB7
CSPB18
TON2
FBA4
VRHOT#5
CSNB9
POKB10
BS
TB
11
LX
B12
DH
B13
DLB
14
VD
DB
15
ALE
RT
#17
CLK
18
PO
KA
19
VD
IO16
IMAXB30
IMAXA29
BSTA228
LXA227
DHA226
DLA225
VDDA24
DLA123
DHA122
LXA121
BSTA120
EN
1
VC
C40
CS
PA
339
CS
PA
238
CS
NA
37
CS
PA
136
CS
PA
AV
E35
TH
ER
MB
34
TH
ER
MA
33
SR
32
DR
VP
WM
A31
TP
AD
41
PQ9SIR472DP-T1-GE3_POWERPAK8-5~D
PQ9SIR472DP-T1-GE3_POWERPAK8-5~D
35
2
4
1
PC
192
4.7
U_0805_25V
AK
PC
192
4.7
U_0805_25V
AK
12
PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PC138
1U_0603_10V6K~D
PC138
1U_0603_10V6K~D
12
PC162
1000P_0402_50V7K~D
@ PC162
1000P_0402_50V7K~D
@
1 2
PC179
0.22U_0402_16V7K~D
PC179
0.22U_0402_16V7K~D
12
PC150
1000P_0402_50V7K~D
@PC150
1000P_0402_50V7K~D
@ 12
PC
147
4.7
U_0805_25V
AK
PC
147
4.7
U_0805_25V
AK
12
PC278
0.1U_0402_16V7K~D
PC278
0.1U_0402_16V7K~D
1 2
PL130.42UH_ETQP4LR42AFM_17A_20%~D
PL130.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PH
2100K
_0402_1%
_T
SM
0B
104F
4251R
Z~
DP
H2
100K
_0402_1%
_T
SM
0B
104F
4251R
Z~
D
12
PQ14
SIR818DP-T1-GE3_POWERPAK8-5
PQ14
SIR818DP-T1-GE3_POWERPAK8-5
4
5
123
PR1451_0402_5%~DPR1451_0402_5%~D
12
PR137
10_0402_5%~D
@ PR137
10_0402_5%~D
@1 2
PR162 54.9_0402_1%~DPR162 54.9_0402_1%~D12
PC1460.22U_0402_16V7K~D
PC1460.22U_0402_16V7K~D
12
PR
135
105K
_0402_1%
~D
PR
135
105K
_0402_1%
~D
12
PR132
100K_0402_5%~D
PR132
100K_0402_5%~D1 2
PR158
10_0402_5%~D
PR158
10_0402_5%~D
1 2
PR176
3.24K_0402_1%~D
PR176
3.24K_0402_1%~D
12
PR171
0_0402_5%~D
@ PR171
0_0402_5%~D
@
12
PQ13
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ13
SIR472DP-T1-GE3_POWERPAK8-5~D
35
2
4
1
PC
134
4.7
U_0805_25V
AK
PC
134
4.7
U_0805_25V
AK
12
PR170
1_0402_5%~D
PR170
1_0402_5%~D
12
PR107
2.2_0603_5%~D
PR107
2.2_0603_5%~D
12
PC178
1000P_0402_50V7K~D
@ PC178
1000P_0402_50V7K~D
@
1 2
PC175
1500P_0603_50V7K~D
@ PC175
1500P_0603_50V7K~D
@
12
PJP28
PAD-OPEN1x1m
PJP28
PAD-OPEN1x1m
1 2
PC166
0.22U_0402_16V7K~D
PC166
0.22U_0402_16V7K~D
12
PR138
10_0402_5%~D
PR138
10_0402_5%~D
1 2
PR112
12.7K_0402_1%~D
PR112
12.7K_0402_1%~D
12
PC
135
4.7
U_0805_25V
AK
PC
135
4.7
U_0805_25V
AK
12
PC137
0.22U_0603_10V7K~D
PC137
0.22U_0603_10V7K~D
1 2
PR160 130_0402_1%~D@ PR160 130_0402_1%~D@12
PC269
43P_0402_50V8J
PC269
43P_0402_50V8J
1 2
PR164 0_0402_5%~DPR164 0_0402_5%~D1 2
+
PC
154
100U
_25V
_M
_R
0.7
~D
+
PC
154
100U
_25V
_M
_R
0.7
~D
1
2
PR168 0_0402_5%~DPR168 0_0402_5%~D1 2
PR
125
1K
_0402_5%
~D
PR
125
1K
_0402_5%
~D
12
PC1402200P_0402_50V7K~DPC1402200P_0402_50V7K~D
12
PR117
1_1206_5%
@ PR117
1_1206_5%
@
12
PR
124
5.6
2K
_0402_1%
~D
PR
124
5.6
2K
_0402_1%
~D
12
PC1570.22U_0603_10V7K~D
PC1570.22U_0603_10V7K~D
1 2
PC
170
2200P
_0402_50V
7K
~D
PC
170
2200P
_0402_50V
7K
~D
12
PR1412.2_0603_5%~DPR1412.2_0603_5%~D
12
PQ11
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ11
SIR472DP-T1-GE3_POWERPAK8-5~D
35
2
4
1
PR156
10_0402_5%~D
PR156
10_0402_5%~D
1 2
PR1210_0402_5%~D@ PR1210_0402_5%~D@
1 2
PC149
1000P_0402_50V7K~D
PC149
1000P_0402_50V7K~D
12
PR109
6.49K_0402_1%~D
PR109
6.49K_0402_1%~D
12
PR129
0_0402_5%~D
@ PR129
0_0402_5%~D
@1 2
PR157
8.45K_0402_1%~D
PR157
8.45K_0402_1%~D
12
PR166
0_0402_5%~D
@ PR166
0_0402_5%~D
@
12
PR122
10_0402_5%~D
PR122
10_0402_5%~D
1 2
PU8
MAX17491GTA+T_TQFN8_3X3~D
PU8
MAX17491GTA+T_TQFN8_3X3~D
BST1
SKIP6
VDD5
PWM2
DL4
GND3
LX7
DH8
EP9
PR
123
5.6
2K
_0402_1%
~D
PR
123
5.6
2K
_0402_1%
~D
12
+
PC
156
100U
_25V
_M
_R
0.7
~D
+
PC
156
100U
_25V
_M
_R
0.7
~D
1
2
PC
169
0.1
U_0603_25V
7K
~D
PC
169
0.1
U_0603_25V
7K
~D
12
PC139
1500P_0603_50V7K~D
@ PC139
1500P_0603_50V7K~D
@
12
PR159 130_0402_1%~DPR159 130_0402_1%~D12
PR
133
10K
_0402_1%
~D
@
PR
133
10K
_0402_1%
~D
@ 12
PC
277
1U
_0603_10V
6K
~D
@
PC
277
1U
_0603_10V
6K
~D
@
12
PR139
10_0402_5%~D
PR139
10_0402_5%~D
1 2PR140
9.76K_0402_1%~D
PR140
9.76K_0402_1%~D12
PR149
10_0402_5%~D
PR149
10_0402_5%~D
1 2
PC
132
0.1
U_0603_25V
7K
~D
PC
132
0.1
U_0603_25V
7K
~D
12
PR110
12.7K_0402_1%~D
PR110
12.7K_0402_1%~D
12
PR152
3.24K_0402_1%~D
PR152
3.24K_0402_1%~D
12
PC
148
0.1
U_0603_25V
7K
~D
PC
148
0.1
U_0603_25V
7K
~D
12
PC
214
4.7
U_0805_25V
AK
PC
214
4.7
U_0805_25V
AK
12
PC205
1000P_0402_50V7K~D
PC205
1000P_0402_50V7K~D
1 2
PJP27
PAD-OPEN 4x4m
PJP27
PAD-OPEN 4x4m
1 2
PR142
10_0402_5%~D
@ PR142
10_0402_5%~D
@1 2
PC180
1000P_0402_50V7K~D
@ PC180
1000P_0402_50V7K~D
@
1 2
PR114
1_0402_5%~D
PR114
1_0402_5%~D
12
PR173
1_1206_5%
@ PR173
1_1206_5%
@
12
PC
168
4.7
U_0805_25V
AK
PC
168
4.7
U_0805_25V
AK
12
PC174
0.22U_0603_10V7K~D
PC174
0.22U_0603_10V7K~D
1 2
PC
151
2200P
_0402_50V
7K
~D
PC
151
2200P
_0402_50V
7K
~D
12
PR115
12.7K_0402_1%~D
PR115
12.7K_0402_1%~D
12
PC165
1000P_0402_50V7K~D
@ PC165
1000P_0402_50V7K~D
@ 12
PR
126
107K
_0402_1%
~D
PR
126
107K
_0402_1%
~D
12
PR
127
165K
_0402_1%
PR
127
165K
_0402_1%
12
PC145
1000P_0402_50V7K~D
@ PC145
1000P_0402_50V7K~D
@
1 2
PR169
2K_0402_0.5%~D
PR169
2K_0402_0.5%~D
12
PC
171
4.7
U_0805_25V
AK
PC
171
4.7
U_0805_25V
AK
12
PR120
3.24K_0402_1%~D
PR120
3.24K_0402_1%~D
12
PR131
0_0402_5%~D
@ PR131
0_0402_5%~D
@1 2
PR113
2K_0402_0.5%~D
PR113
2K_0402_0.5%~D
12
PC167
1000P_0402_50V7K~D
PC167
1000P_0402_50V7K~D
12
PC
172
4.7
U_0805_25V
AK
PC
172
4.7
U_0805_25V
AK
12
PC
152
4.7
U_0805_25V
AK
PC
152
4.7
U_0805_25V
AK
12
PC
133
2200P
_0402_50V
7K
~D
PC
133
2200P
_0402_50V
7K
~D
12
PC177
1000P_0402_50V7K~D
@ PC177
1000P_0402_50V7K~D
@
1 2
PC143
2.2U_0603_10V7K~D
PC143
2.2U_0603_10V7K~D
1 2
PR111
3.09K_0402_1%~D
PR111
3.09K_0402_1%~D
12
PC173 0.1U_0402_25V6K~DPC173 0.1U_0402_25V6K~D
1 2
PC
142
2.2
U_0603_10V
7K
~D
PC
142
2.2
U_0603_10V
7K
~D1
2
+
PC
155
100U
_25V
_M
_R
0.7
~D
+
PC
155
100U
_25V
_M
_R
0.7
~D
1
2
PL120.42UH_ETQP4LR42AFM_17A_20%~D
PL120.42UH_ETQP4LR42AFM_17A_20%~D
1 2
PC164
1000P_0402_50V7K~D
@ PC164
1000P_0402_50V7K~D
@
1 2
PR146
0_0402_5%~D
@ PR146
0_0402_5%~D
@
1 2
PR
134
154K
_0402_1%
~D
PR
134
154K
_0402_1%
~D
12
PC159
1500P_0603_50V7K~D
@ PC159
1500P_0603_50V7K~D
@
12
PH1
10K_0402_1%_ERTJ0EG103FA~D
PH1
10K_0402_1%_ERTJ0EG103FA~D
1 2
PC
276
4.7
U_0805_25V
AK
PC
276
4.7
U_0805_25V
AK
12 P
C226
4.7
U_0805_25V
AK
PC
226
4.7
U_0805_25V
AK
12
PC
153
4.7
U_0805_25V
AK
PC
153
4.7
U_0805_25V
AK
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GBT1_1
GP1_SW GP1_Vo
+VGFX_PWR_SRC
+PWR_SRC
+VCC_GFXCORE
GNDA_VCC
+GFX_DHB<51>
+GFX_BSTB<51>
+GFX_LXB<51>
+GFX_DLB<51>
+GFX_CSNB<51>
+GFX_CSPB1<51>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A +1.05V_RUN_VTT
52 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DELL CONFIDENTIAL/PROPRIETARY
AON6414AL
MDU2657RH
PQ21,PQ24 PQ25,PQ26
AON6704L
MDU2653RH
Main
2nd
X7629631L88
X7629631L89
+VCC_GFXCORE
+VCC_GFXCORE
TDC=23.1A
Peak Current=33A
OCP min=43A
Fsw=330KHZ
Choke DCR=0.82± 5% mΩ
PL150.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
PL150.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
1
3
4
2
PQ21SIR472DP-T1-GE3_POWERPAK8-5~DPQ21SIR472DP-T1-GE3_POWERPAK8-5~D
35
2
4
1PQ26SIR818DP-T1-GE3_POWERPAK8-5PQ26SIR818DP-T1-GE3_POWERPAK8-5
4
5
123
PC197
0.22U_0603_10V7K~D
PC197
0.22U_0603_10V7K~D
1 2
+
PC
201
470U
_D
2_2V
M_R
4.5
M~
D
+
PC
201
470U
_D
2_2V
M_R
4.5
M~
D
1
2PC
200
0.1
U_0402_10V
7K
~D
PC
200
0.1
U_0402_10V
7K
~D
12
PC208
0.33U_0402_10V6K
PC208
0.33U_0402_10V6K
1 2PR192
0_0402_5%~D
PR192
0_0402_5%~D
12
PR203
2.21K_0402_1%~D
PR203
2.21K_0402_1%~D
12
PC2034700P_0402_25V7K~D
PC2034700P_0402_25V7K~D
12
PR191
0_0402_5%~D
PR191
0_0402_5%~D
12
PH4
10K_0402_1%_ERTJ0EG103FA~D
PH4
10K_0402_1%_ERTJ0EG103FA~D
1 2
PC282
0.068U_0402_16V7K~D
PC282
0.068U_0402_16V7K~D
1 2
PC
204
10U
_1206_25V
AK
~D
PC
204
10U
_1206_25V
AK
~D
12
PC
195
10U
_1206_25V
AK
~D
PC
195
10U
_1206_25V
AK
~D
12
PR189
2.2_0603_5%~D
PR189
2.2_0603_5%~D
12
PJP29
PAD-OPEN 4x4m
PJP29
PAD-OPEN 4x4m
1 2
PC
196
10U
_1206_25V
AK
~D
PC
196
10U
_1206_25V
AK
~D
12
PC
199
2200P
_0402_50V
7K
~D
PC
199
2200P
_0402_50V
7K
~D
12
+
PC
202
470U
_D
2_2V
M_R
4.5
M~
D
+
PC
202
470U
_D
2_2V
M_R
4.5
M~
D
1
2
PC
193
0.1
U_0603_25V
7K
~D
PC
193
0.1
U_0603_25V
7K
~D
12
PQ25SIR818DP-T1-GE3_POWERPAK8-5
PQ25SIR818DP-T1-GE3_POWERPAK8-5
4
5
123
PR190
1.37K_0402_1%~D
PR190
1.37K_0402_1%~D
12
PR201
40.2K_0402_1%~D
@ PR201
40.2K_0402_1%~D
@12
PQ24
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ24
SIR472DP-T1-GE3_POWERPAK8-5~D
35
2
4
1
PR193
2.2_1206_1%~D
@ PR193
2.2_1206_1%~D
@
12
PC198
470P_0603_50V8J~D
@ PC198
470P_0603_50V8J~D
@
12
PC
194
2200P
_0402_50V
7K
~D
PC
194
2200P
_0402_50V
7K
~D
12
PC207
1000P_0402_50V7K~D
PC207
1000P_0402_50V7K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8731_REF
MAX8731_REF
MAX8731_IINP
MAX8731_REF
ICOUT
CHG_LGATE
BOOT_D
CHG_UGATE
+VCHGR_B
CS
SN
_1
MAX8731_IINP
+VCHGR_L
MAX8731_REF
VFB
MAX8731A_LDO
+DCIN
CS
SP
_1
BOOT
MAX8731A_LDO
+DC_IN
+5V_ALW
CHAGER_SRC+PWR_SRC
GNDA_CHG
+SDC_IN
+DC_IN_SS
+5V_ALW +5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
GNDA_CHG
+5V_ALW
+SDC_IN
+VCHGR
+VCHGR
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+DOCK_PWR_BAR
+DC_IN_SS
ACAV_IN_NB <39,40,55>
CSS_GC<55>
DC_BLOCK_GC<55>
DYN_TUR_CURRNT_SET#<40>
H_PROCHOT# <7,40,51>
PROCHOT_GATE <39> ACAV_IN <22,40,55>
CHARGER_SMBDAT<40>
ACAV_IN<22,40,55>
DOCK_DCIN_IS- <38>
CHARGER_SMBCLK<40>
DOCK_DCIN_IS+ <38>
+CHGR_DC_IN<55>
DK_CSS_GC <55>
MAX8731_IINP<22>
Title
Size Document Number Rev
Date: Sheet of
LA-7741P 0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741P 0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741P 0.1
Charger
53 56Thursday, June 23, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
90W
High
Low
DYN_TUR_CURRENT_SET#
65W
To preset system to throtlle
switching from AC to DC
Adapter Protection Circuit fot Turbo Mode
Maximum charging current is 7.2A
Adapter Protection Event
PR510
0 Ohm@
100k0 Ohm @
@
PR521
HW
SW
PR522
E2 AC_OK=17.7 Volt
PR813
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
PR
828
0_0402_5%
~D
PR
828
0_0402_5%
~D 1
2
PR239
10K_0402_1%~D
PR239
10K_0402_1%~D
12
PR850
10_0402_5%
~D
PR850
10_0402_5%
~D
12
PR84720K_0402_1%~D
PR84720K_0402_1%~D
1 2
PR
827
10_0402_1%
~D
PR
827
10_0402_1%
~D 1
2
G
D
SPQ38
RHU002N06_SOT323-3~D
G
D
SPQ38
RHU002N06_SOT323-3~D
2
13
PR846
1.8M_0402_1%
PR846
1.8M_0402_1%
1 2
PR2400_0402_5%~D
@ PR2400_0402_5%~D
@
1 2
G
DS
PQ803ANTGD4161PT1G_TSOP6~D
G
DS
PQ803ANTGD4161PT1G_TSOP6~D
1
65
PQ804
AON7408L_DFN8-5
PQ804
AON7408L_DFN8-5
4
5
123
G
S
D
PQ802NTR4502PT1G_SOT23-3~D
G
S
D
PQ802NTR4502PT1G_SOT23-3~D
2
13
PC244100P_0402_50V8J~D
@ PC244100P_0402_50V8J~D
@
12
PR819
0_0603_5%~D
PR819
0_0603_5%~D
12
PC842
220P_0402_50V8J~D
PC842
220P_0402_50V8J~D
12
PR803
0_0402_5%~D
PR803
0_0402_5%~D
1 2
PC807
1U_0603_10V6K~D
PC807
1U_0603_10V6K~D
12
PC8030.1U_0603_25V7K~D
PC8030.1U_0603_25V7K~D
1 2
PC808
0.01U_0402_25V7K~D
PC808
0.01U_0402_25V7K~D
12
PR336
0_0402_5%~D
@ PR336
0_0402_5%~D
@
12
PC
829
10U
_1206_25V
6M
~D
PC
829
10U
_1206_25V
6M
~D
12
PR
242
42.2
K_0402_1%
~D
PR
242
42.2
K_0402_1%
~D
12
PR829
4.7_1206_5%~D
PR829
4.7_1206_5%~D
12
PC
243
100P
_0402_50V
8J~
DP
C243
100P
_0402_50V
8J~
D
12
PC
814
10U
_1206_25V
6M
~D
PC
814
10U
_1206_25V
6M
~D
12
PR83310_0402_5%~D
PR83310_0402_5%~D
12
PR825
8.45K_0402_1%~D
@ PR825
8.45K_0402_1%~D
@
12
PR818
0_0402_5%~D
PR818
0_0402_5%~D
1 2
PC8040.047U_0603_25V7M~D
PC8040.047U_0603_25V7M~D
1 2
PC
813
0.1
U_0603_25V
7K
~D
PC
813
0.1
U_0603_25V
7K
~D
12
G
S
DPQ801NTR4502PT1G_SOT23-3~DG
S
DPQ801NTR4502PT1G_SOT23-3~D
2
13
PR
474
221K
_0402_1%
~D
PR
474
221K
_0402_1%
~D
12
PJP801
PAD-OPEN1x1m
PJP801
PAD-OPEN1x1m
1 2
PC245
0.01U_0402_25V7K~D
@ PC245
0.01U_0402_25V7K~D
@
12
PU12A
LM393DR_SO8~D
PU12A
LM393DR_SO8~D
+3
-2
O1
P8
G4
PR
260
66.5
K_0402_1%
~D
PR
260
66.5
K_0402_1%
~D
12
G
D
SPQ808RHU002N06_SOT323-3~D
G
D
SPQ808RHU002N06_SOT323-3~D
2
13
PC809
0.1U_0603_25V7K~D
PC809
0.1U_0603_25V7K~D
12
PC825
0.01U_0402_25V7K~D
PC825
0.01U_0402_25V7K~D
12
PR813
226K_0402_1%~D
PR813
226K_0402_1%~D
12
PD801
BAT54CW_SOT323~D
PD801
BAT54CW_SOT323~D
3
2
1
PC834
0.1U_0603_25V7K~D
@ PC834
0.1U_0603_25V7K~D
@
1 2
PQ806A
2N7002DW-T/R7_SOT363-6~D
PQ806A
2N7002DW-T/R7_SOT363-6~D
61
2
PR815
49.9K_0402_1%~D
PR815
49.9K_0402_1%~D12
PR
807
100K
_0402_1%
~D
PR
807
100K
_0402_1%
~D
12
PR2361M_0402_1%~D
PR2361M_0402_1%~D
1 2
PR812
0_0402_5%~D
PR812
0_0402_5%~D
1 2
PUH800
TC7SH08FU_SSOP5~D
PUH800
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PQ806B
2N7002DW-T/R7_SOT363-6~D
PQ806B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR809
1_0805_5%~D
@ PR809
1_0805_5%~D
@
1 2
PR
808
100K
_0402_1%
~D
PR
808
100K
_0402_1%
~D
12
PR8174.7_0603_5%~D
PR8174.7_0603_5%~D
12
PR
241
22.6
K_0402_1%
~D
PR
241
22.6
K_0402_1%
~D
12
G
DS
PQ803BNTGD4161PT1G_TSOP6~D
G
DS
PQ803BNTGD4161PT1G_TSOP6~D
3
42
PC8150.1U_0402_10V7K~D
PC8150.1U_0402_10V7K~D
12
PR
237
47K
_0402_1%
~D
PR
237
47K
_0402_1%
~D 1
2
PR
243
41.2
K_0402_1%
~D
@
PR
243
41.2
K_0402_1%
~D
@
12
PR826
100_0402_5%~D
PR826
100_0402_5%~D
1 2
PC
830
10U
_1206_25V
6M
~D
PC
830
10U
_1206_25V
6M
~D
12
PC
279
100P
_0402_50V
8J~
D
PC
279
100P
_0402_50V
8J~
D 12
PC
242
100P
_0402_50V
8J~
DP
C242
100P
_0402_50V
8J~
D
12
PC823
0.01U_0402_25V7K~D
PC823
0.01U_0402_25V7K~D
12
PC
828
0.1
U_0603_25V
7K
~D
PC
828
0.1
U_0603_25V
7K
~D
12
PC
831
10U
_1206_25V
6M
~D
PC
831
10U
_1206_25V
6M
~D
12
PU801
ISL88731CHRTZ-T T_QFN28P__5X5
PU801
ISL88731CHRTZ-T T_QFN28P__5X5
UGATE24
CSOP18
PHASE23
VFB15
SDA9
VICM8
ICR
EF
1
DCIN22
ACIN2
VDDSMB11
SCL10
ACOK13
NC14
BOOT25
NC16
EAO4
VDDP21
ICOUT26
CS
SP
28
CSON17
PGND19
LGATE20
FBO6
EAI5
CS
SN
27
VREF3
CE7
GND12
TP29
PJP800
PAD-OPEN 4x4m
PJP800
PAD-OPEN 4x4m
1 2
PR
261
150K
_0402_1%
~D
PR
261
150K
_0402_1%
~D
12
PC
812
2200P
_0402_50V
7K
~D
PC
812
2200P
_0402_50V
7K
~D
12
PC833
0.22U_0603_25V7K~D
PC833
0.22U_0603_25V7K~D
1 2
PC800
0.1U_0603_25V7K~D
@ PC800
0.1U_0603_25V7K~D
@
12
PR8230.01_1206_1%~D
PR8230.01_1206_1%~D
1
3
4
2
PL8001UH_PCMB053T-1R0MS_7A_20%
@ PL8001UH_PCMB053T-1R0MS_7A_20%
@
12
PQ805
SI7
716A
DN
-T1-G
E3_P
OW
ER
PA
K8-5
PQ805
SI7
716A
DN
-T1-G
E3_P
OW
ER
PA
K8-5
4
5
123
PR811
10K_0402_5%~D
@ PR811
10K_0402_5%~D
@
12 PC806
0.1U_0805_50V7M~DPC806
0.1U_0805_50V7M~D
12
PC
810
10U
_1206_25V
6M
~D
PC
810
10U
_1206_25V
6M
~D
12
PR814
15.8K_0402_1%~D
PR814
15.8K_0402_1%~D
12
PC8320.1U_0603_25V7K~D
@ PC8320.1U_0603_25V7K~D
@
1 2
PC841
0.1U_0402_25V4Z~D
PC841
0.1U_0402_25V4Z~D
12
PR206
0_0402_5%~D
@ PR206
0_0402_5%~D
@
12
PR
810
10K
_0402_1%
~D
PR
810
10K
_0402_1%
~D 1
2
PC
801
47P
_0402_50V
8J~
DP
C801
47P
_0402_50V
8J~
D 12 P
C802
0.1
U_0603_25V
7K
~D
@
PC
802
0.1
U_0603_25V
7K
~D
@
12
PR
235
232K
_0402_1%
~D
PR
235
232K
_0402_1%
~D 1
2
PL801
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PL801
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PR259150K_0402_1%~DPR259150K_0402_1%~D
12
PR80410K_0402_5%~D
PR80410K_0402_5%~D
12
PC805
0.1U_0603_25V7K~D
PC805
0.1U_0603_25V7K~D
1 2
PR8162.2_0603_1%~D
PR8162.2_0603_1%~D
1 2
PC8211000P_0603_50V7K~D
PC8211000P_0603_50V7K~D
12
PC811 1U_0603_10V6K~DPC811 1U_0603_10V6K~D
1 2
ES2AA-13-F
PD14@
ES2AA-13-F
PD14@
2 1
PR822
2.2K_0402_1%~D
PR822
2.2K_0402_1%~D
12
PR801
0.01_1206_1%~D
PR801
0.01_1206_1%~D
1
3
4
2
PR852
100K_0402_5%~D
PR852
100K_0402_5%~D
12
PU12BLM393DR_SO8~DPU12BLM393DR_SO8~D
+5
-6
O7
P8
G4
PQ27SI4835DDY-T1-E3_SO8~D
PQ27SI4835DDY-T1-E3_SO8~D
365
78
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_BT_1+VCCSA_BT
+VCCSA_PWR_SRC +VCCSA_PWR_SRC
+VCCSA_EN
+V
CC
SA
_V
ID0
+V
CC
SA
_P
WR
GD
+V
CC
SA
_P
WR
GD
+VCCSA_PHASE
+VCCSA_P
+3.3V_ALW
+VCCSA_P
+VCC_SA
GNDA_VCCSA
GNDA_VCCSA
+5V_ALW
+3.3V_RUN
+VCCSA_SENSE <11>
1.05V_VTTPWRGD <40,50>
VCCSAPWROK<40>
VCCSA_VID_0 <11>
VCCSA_VID_1 <11>
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741
Title
Size Document Number Rev
Date: Sheet of
0.1
ISL95870A 0.8V_VCC_SA
54 56Thursday, June 23, 2011
Compal Electronics, Inc.
LA-7741AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+VCCSA_PVCCSA_VID_0 VCCSA_VID_1 VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable network
VCCSATDC=3.15APeak Current=4.5AOCP min=5.85AFSW=1MHz
The 1k PD on the VCCSA VIDs are empty.These should be stuffed to ensure thatVCCSA VID is 00 prior to VCCIO stability.
Vo=2v
PC383
3300P_0402_50V7K~D
PC383
3300P_0402_50V7K~D
12
PR258
0_0402_5%~D
@ PR258
0_0402_5%~D
@12
PC
249
2200P
_0402_50V
7K
~D
PC
249
2200P
_0402_50V
7K
~D
1
2
PC
258
0.1
U_0402_10V
7K
~D
PC
258
0.1
U_0402_10V
7K
~D
12
PC
247
10U
_0805_25V
6K
PC
247
10U
_0805_25V
6K
1
2 PC
256
2200P
_0402_50V
7K
~D
PC
256
2200P
_0402_50V
7K
~D
12
PR3001K_0402_5%~DPR3001K_0402_5%~D
12
PR266
1K_0402_5%~D
PR266
1K_0402_5%~D
12
PR245
2.2_0603_1%~D
PR245
2.2_0603_1%~D
1 2
PR253
0_0402_5%~D
PR253
0_0402_5%~D
12
PR248
2.2_1206_1%~D
@ PR248
2.2_1206_1%~D
@
12
PC250
2.2U_0603_10V7K~D
PC250
2.2U_0603_10V7K~D
1 2
PU13
TPS51461RGER_QFN24_4X4~D
PU13
TPS51461RGER_QFN24_4X4~D
V5D
RV
18
PGND20
SW11
EN
13
SW9
VIN24
VO
UT
5
PG
OO
D16
CO
MP
3
VID
014
MO
DE
6
SW10
SLE
W4
PGND21
PGND19
SW8
GN
D1
VIN23
VIN22
VR
EF
2
VID
115
V5F
ILT
17
SW7
BST12
TP25
PR
244
100K
_0402_5%
~D
PR
244
100K
_0402_5%
~D 1
2
PJP35
PAD-OPEN 43X118
PJP35
PAD-OPEN 43X118
12
PR247
5.1K_0402_1%~D
PR247
5.1K_0402_1%~D
12
PC
182
22U
_0805_6.3
V6M
@
PC
182
22U
_0805_6.3
V6M
@
12
PR264
0_0402_5%~D
@ PR264
0_0402_5%~D
@
1 2
PC
259
22U
_0805_6.3
V6M
PC
259
22U
_0805_6.3
V6M
12
PJP38
PAD-OPEN 4x4m
PJP38
PAD-OPEN 4x4m
1 2
PC
257
22U
_0805_6.3
V6M
PC
257
22U
_0805_6.3
V6M
12
PR265
0_0402_5%~D
@ PR265
0_0402_5%~D
@
12
PC262
0.01U_0402_25V7K~D
PC262
0.01U_0402_25V7K~D12
PR255
0_0402_5%~D
@ PR255
0_0402_5%~D
@
1 2
PC2530.1U_0603_25V7K
PC2530.1U_0603_25V7K
1 2
PC
252
1U
_0603_10V
6K
~D
PC
252
1U
_0603_10V
6K
~D
12
PR303
10_0402_1%~D
PR303
10_0402_1%~D
12
PR335
33K_0402_5%~D
@ PR335
33K_0402_5%~D
@12
PJP37
PAD-OPEN1x1m
PJP37
PAD-OPEN1x1m
12
PL18
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL18
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
12
PC251
0.22U_0402_10V6K~D
PC251
0.22U_0402_10V6K~D
12
PC
255
22U
_0805_6.3
V6M
PC
255
22U
_0805_6.3
V6M
12
PC254
1000P_0603_50V7K~D
@ PC254
1000P_0603_50V7K~D
@
12
PC
260
22U
_0805_6.3
V6M
PC
260
22U
_0805_6.3
V6M
12
PR267
100_0402_1%~D
PR267
100_0402_1%~D
12
PC
246
10U
_0805_25V
6K
PC
246
10U
_0805_25V
6K
1
2
PC
248
0.1
U_0603_25V
7K
~D
PC
248
0.1
U_0603_25V
7K
~D
12 P
C181
22U
_0805_6.3
V6M
@
PC
181
22U
_0805_6.3
V6M
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BLKNG_MOSFET_GC
PBATT_IN_SS
EN_DK_PWRBAR
ST
ST
AR
T_D
CB
LO
CK
_G
C
DK_AC_OFF
CH
GV
R_D
CIN
SL_BAT_PRES#
ER
C2
ERC1
P33ALW
ACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_ACAV_IN_NB
3301_PWRSRC
STSTART_DCBLOCK_GC
P50ALW
DK
_P
WR
BA
RD
C_IN
_S
S
CD_PBATT_OFF
ACAVIN
CD3301_DCIN
P33ALW2
MPBATT_IN_SS
PBATT+
+PWR_SRC
+VCHGR
+DOCK_PWR_BAR
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+NBDOCK_DC_IN_SS
+3.3V_ALW2
PBATT+
+VCHGR
MPBATT+
+DOCK_PWR_BAR
MPBATT+PBATT+
+3.3V_ALW2
+3.3V_ALW2
CSS_GC<53>
DK_CSS_GC<53>
+CHGR_DC_IN<53>
ACAV_IN_NB <39,40,53>
DOCK_AC_OFF_EC <39>
SLICE_BAT_PRES# <38,39>
SOFT_START_GC<45>
ACAV_DOCK_SRC#<38>
DC_BLOCK_GC<53>
ACAV_IN<22,40,53>
EN_DOCK_PWR_BAR <39>
DEFAULT_OVRDE<39>
SLICE_BAT_PRES#<38,39>
DOCK_SMB_ALERT# <38,39>
SLICE_BAT_ON<39>
MODULE_ON <39>
PBAT_PRES#<39,45>
SLICE_BAT_PRES#<38,39>
MODULE_BATT_PRES# <39,45>
PBAT_PRES#<39,45>
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
ACAV_IN<22,40,53>
CHARGE_MODULE_BATT<39>
MODULE_BATT_PRES#<39,45>
ACAV_IN <22,40,53>
DEFAULT_OVRDE<39>
CHARGE_PBATT
ACAV_IN<22,40,53>
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
Selector
55 56Thursday, June 23, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PR
270
100K
_0402_5%
~D
PR
270
100K
_0402_5%
~D
12
PR
281
390K
_0402_5%
~D
PR
281
390K
_0402_5%
~D1
2
PR283
330K_0402_5%~D
PR283
330K_0402_5%~D
1 2
G
D
S
PQ9112N7002W-7-F_SOT323-3~D
G
D
S
PQ9112N7002W-7-F_SOT323-3~D
2
13
PR274
820_0603_1%~D
PR274
820_0603_1%~D
1 2
PR324
0_0402_5%~D
@ PR324
0_0402_5%~D
@1 2
G
D
S
PQ910
2N7002W-7-F_SOT323-3~D
G
D
S
PQ910
2N7002W-7-F_SOT323-3~D
2
13
PC232
0.1U_0402_10V7K~D
PC232
0.1U_0402_10V7K~D
1 2
PR3060_0402_5%~D@ PR3060_0402_5%~D@
12
PC
266
0.1
U_0603_25V
7K
~D
@
PC
266
0.1
U_0603_25V
7K
~D
@
12
PR
273
10K
_0402_5%
~D
PR
273
10K
_0402_5%
~D1
2
PQ42A
2N7002DW-T/R7_SOT363-6~D
PQ42A
2N7002DW-T/R7_SOT363-6~D
61
2
PD
26
RB
751V
-40_S
OD
323~
D
PD
26
RB
751V
-40_S
OD
323~
D1
2
PR268
330K_0402_5%~D
PR268
330K_0402_5%~D
12
PR296
0_0402_5%~D
@ PR296
0_0402_5%~D
@
12
PR
290
200K
_0402_1%
~D
PR
290
200K
_0402_1%
~D
12
PR
292
499K
_0402_1%
~D
PR
292
499K
_0402_1%
~D1
2
PC233
0.1U_0402_10V7K~D
PC233
0.1U_0402_10V7K~D
1 2
PR473
100K_0402_5%~D
@ PR473
100K_0402_5%~D
@1 2
PD
28
RB
751V
-40_S
OD
323~
D
PD
28
RB
751V
-40_S
OD
323~
D
12
PR257
1K_0402_5%~D
PR257
1K_0402_5%~D
12
PQ
47A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
47A
2N
7002D
W-T
/R7_S
OT
363-6
~D
61
2
PC
265
0.0
1U
_0603_25V
7K
~D
PC
265
0.0
1U
_0603_25V
7K
~D
12
ES2AA-13-F_SMA2~D
PD16
ES2AA-13-F_SMA2~D
PD16
2 1
PC
273
0.1
U_0603_25V
7K
~D
PC
273
0.1
U_0603_25V
7K
~D
12
PQ37
FDS6679AZ_SO8~D
PQ37
FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PQ
50B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
50B
2N
7002D
W-T
/R7_S
OT
363-6
~D 3
5
4
PD21
RB751V-40_SOD323~D
PD21
RB751V-40_SOD323~D
12
PQ46
FDS6679AZ_SO8~D
PQ46
FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PD18RB751V-40_SOD323~D
PD18RB751V-40_SOD323~D
12
PR
271
390K
_0402_5%
~D
PR
271
390K
_0402_5%
~D1
2
PR
291
390K
_0402_5%
~D
PR
291
390K
_0402_5%
~D
12
PR278
330K_0402_5%~D
PR278
330K_0402_5%~D
1 2
PR302
0_0402_5%~D
@ PR302
0_0402_5%~D
@1 2
PR
288
499K
_0402_1%
~D
@
PR
288
499K
_0402_1%
~D
@
12
PR318
0_0402_5%~D
@ PR318
0_0402_5%~D
@1 2
PR
275
499K
_0402_1%
~D
PR
275
499K
_0402_1%
~D
12
PD
27
RB
751V
-40_S
OD
323~
D
PD
27
RB
751V
-40_S
OD
323~
D
12
PQ
48A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
48A
2N
7002D
W-T
/R7_S
OT
363-6
~D
61
2
PC
264
0.1
U_0603_25V
7K
~D
@
PC
264
0.1
U_0603_25V
7K
~D
@
12
PR325
0_0402_5%~D
@ PR325
0_0402_5%~D
@1 2
PR327
0_0402_5%~D
@ PR327
0_0402_5%~D
@
1 2
PR321
0_0402_5%~D
@ PR321
0_0402_5%~D
@1 2
PR312
0_0402_5%~D
@ PR312
0_0402_5%~D
@
1 2
PD
22
RB
751V
-40_S
OD
323~
D
PD
22
RB
751V
-40_S
OD
323~
D
12
PQ39SI4835DDY-T1-E3_SO8~D
PQ39SI4835DDY-T1-E3_SO8~D
3 65
78
2
4
1
2
1 3
PQ57
FDN338P_NL_SOT23-3~D
2
1 3
PQ57
FDN338P_NL_SOT23-3~D
2
1 3
PR317
0_0402_5%~D
@ PR317
0_0402_5%~D
@1 2
PR3050_0402_5%~D
@ PR3050_0402_5%~D
@
1 2
PC263
0.47U_0805_25V7K~D
PC263
0.47U_0805_25V7K~D
12
PR923
10K_0402_5%~D
PR923
10K_0402_5%~D
12
PQ44SI4835DDY-T1-E3_SO8~D
PQ44SI4835DDY-T1-E3_SO8~D
3 65
78
2
4
1
PC
267
2200P
_0402_50V
7K
~D
PC
267
2200P
_0402_50V
7K
~D
12
PR326
1M_0402_5%~D
@ PR326
1M_0402_5%~D
@1 2
PR314
0_0402_5%~D
@ PR314
0_0402_5%~D
@1 2
PC272
1500P_0402_7K~D
PC272
1500P_0402_7K~D
12
PR2850_0402_5%~D
@ PR2850_0402_5%~D
@
12
PR313
0_0402_5%~D
@ PR313
0_0402_5%~D
@1 2
PC
268
0.1
U_0603_25V
7K
~D
PC
268
0.1
U_0603_25V
7K
~D
12
PR322
0_0402_5%~D
@ PR322
0_0402_5%~D
@1 2
G
D
S
PQ909
2N7002W-7-F_SOT323-3~DG
D
S
PQ909
2N7002W-7-F_SOT323-3~D2
13
PC
274
0.0
47U
_0603_25V
7K
~D
PC
274
0.0
47U
_0603_25V
7K
~D
12
PR287
0_0402_5%~D
@ PR287
0_0402_5%~D
@
1 2
PQ41
FDS6679AZ_SO8~D
PQ41
FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PD17
PDS5100H-13_POWERDI5-3~D
PD17
PDS5100H-13_POWERDI5-3~D
2
31
PR
272
620K
_0402_5%
~D
PR
272
620K
_0402_5%
~D1
2
PR
279
100K
_0402_5%
~D
PR
279
100K
_0402_5%
~D
12
PR298
0_0402_5%~D
@ PR298
0_0402_5%~D
@
12
PD23
RB751V-40_SOD323~D
PD23
RB751V-40_SOD323~D
12
PR
276
390K
_0402_5%
~D
PR
276
390K
_0402_5%
~D
12
PR320
0_0402_5%~D
@ PR320
0_0402_5%~D
@1 2
PU14
CD3301ARHHR_QFN36_6X6~D
PU14
CD3301ARHHR_QFN36_6X6~D
DC_IN1
SS_GC2
ERC13
ACAVDK_SRC4
GND5
SDC_IN6
DC_BLK_GC7
ACAV_IN8
SS
_D
CB
LK
_G
C16
CS
S_G
C10
DK
_C
SS
_G
C11
ER
C3
12
ER
C2
13
GN
D14
PW
R_S
RC
15
BLKNG_MOSFET_GC20
SL_BAT_PRES#21
DK_AC_OFF_EN22
GND23
ACAV_IN_NB24
DK_AC_OFF_EN25
PBATT_OFF26
P50ALW27
PB
att+
28
DS
CH
RG
_M
OS
FE
T_G
C29
BLK
_M
OS
FE
T_G
C30
NC
31
DK
_P
WR
BA
R33
DC
_IN
_S
S34
CH
AR
GE
RV
R_D
CIN
35
P33ALW29
EN
_D
K_P
WR
BA
R17
P33A
LW
18
TP37
NBDK_DCINSS19
NC
36
GN
D32
PQ
42B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
42B
2N
7002D
W-T
/R7_S
OT
363-6
~D
3
5
4
PQ
51A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
51A
2N
7002D
W-T
/R7_S
OT
363-6
~D
61
2
PR
286
10K
_0402_5%
~D
PR
286
10K
_0402_5%
~D1
2
PUH3
TC7SH08FU_SSOP5~D
PUH3
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PD
24
RB
751V
-40_S
OD
323~
D
PD
24
RB
751V
-40_S
OD
323~
D
12
PC
275
0.1
U_0402_25V
4Z
~D
@
PC
275
0.1
U_0402_25V
4Z
~D
@
12
PQ
48B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
48B
2N
7002D
W-T
/R7_S
OT
363-6
~D
3
5
4
PR
471
510K
_0402_5%
~D
PR
471
510K
_0402_5%
~D1
2
PR
282
620K
_0402_5%
~D
PR
282
620K
_0402_5%
~D
12
PR315
1M_0402_5%~D
PR315
1M_0402_5%~D
1 2
PR
304
1K
_0402_5%
~D
PR
304
1K
_0402_5%
~D
12
PR297
20K_0402_1%~D
PR297
20K_0402_1%~D
12
PR472
0_0402_5%~D
@ PR472
0_0402_5%~D
@
1 2
PR299
0_0402_5%~D
@ PR299
0_0402_5%~D
@1 2
PC
270
0.0
1U
_0603_25V
7K
~D
PC
270
0.0
1U
_0603_25V
7K
~D
12
PR294
0_0402_5%~D
@ PR294
0_0402_5%~D
@
1 2
PD20
PDS5100H-13_POWERDI5-3~D
PD20
PDS5100H-13_POWERDI5-3~D
2
31
PR
289
499K
_0402_1%
~D
@
PR
289
499K
_0402_1%
~D
@
12
PR316
0_0402_5%~D
@ PR316
0_0402_5%~D
@1 2
PR311
0_0402_5%~D
@ PR311
0_0402_5%~D
@1 2
PUH5TC7SH08FU_SSOP5~DPUH5TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PQ
51B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
51B
2N
7002D
W-T
/R7_S
OT
363-6
~D3
5
4
PR301
0_0402_5%~D
@ PR301
0_0402_5%~D
@
12
PC271
0.1U_0603_50V4Z~D
PC271
0.1U_0603_50V4Z~D
12
PQ40FDS6679AZ_SO8~D
PQ40FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PQ49B
2N7002DW-T/R7_SOT363-6~D
PQ49B
2N7002DW-T/R7_SOT363-6~D
3
5
4
PR307
47_0805_5%~D
PR307
47_0805_5%~D
1 2
PR284
820_0603_1%~D
PR284
820_0603_1%~D
1 2
PR280
20K_0402_1%~D
PR280
20K_0402_1%~D
12
PR319
0_0402_5%~D
@ PR319
0_0402_5%~D
@1 2
PQ
49A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
49A
2N
7002D
W-T
/R7_S
OT
363-6
~D
61
2
PQ
47B
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
47B
2N
7002D
W-T
/R7_S
OT
363-6
~D
3
5
4
PR310
100K_0402_5%~D
PR310
100K_0402_5%~D
1 2
PD
25
RB
751V
-40_S
OD
323~
DP
D25
RB
751V
-40_S
OD
323~
D
12
PD
29
RB
751V
-40_S
OD
323~
D
PD
29
RB
751V
-40_S
OD
323~
D
12
PQ
50A
2N
7002D
W-T
/R7_S
OT
363-6
~D
PQ
50A
2N
7002D
W-T
/R7_S
OT
363-6
~D 6
1
2
PQ45FDS6679AZ_SO8~D
PQ45FDS6679AZ_SO8~D
S1
S2
S3
G4
D8
D7
D6
D5
PR309
0_0402_5%~D
@ PR309
0_0402_5%~D
@
1 2
PD19RB751V-40_SOD323~D
PD19RB751V-40_SOD323~D
12
PR269
0_0402_5%~D
@ PR269
0_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VTT
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_GFXCORE
+1.05V_RUN_VTT
Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-7741 0.1
PROCESSOR DECOUPLING
56 56Thursday, June 23, 2011
Compal Electronics, Inc.
+VCC_CORE +VCC_GFXCORE
Socket Bottom
Socket Top
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
Below is 458544_CRV_PDDG_0.5 Table 5-8.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
+VCC_CORE
Charlie note: Vcore_Cout11.2.2uF*35 (SE00000888L)2.22uF*25 (SE000008L80)Vcore_Cout21.470uF 4.5m *4 (SGA00004X80)
Charlie note: iGfx_Cout11.22uF*6 (SE000000I10)2.10uF*6 (SE000005T8L)3.1uF*11 (SE000000K8L)iGfx_Cout21.470uF 4.5m *2 (SGA00004200)
Charlie note: +1.05V_RUN_VTT_13.1uF*26 (SE000000K8L)4.10uF*10 (SE000005T8L)
+1.05V_RUN_VTT_25.330uF 6m *2 (SGA00001Q80)
PC
1230
1U
_0402_6.3
V6K
~D
PC
1230
1U
_0402_6.3
V6K
~D1
2
PC124722U_0805_6.3VAMPC124722U_0805_6.3VAM
1
2
+ PC1272
470U_D2_2VM_R4.5M
+ PC1272
470U_D2_2VM_R4.5M
1
2 3
PC122122U_0805_6.3VAMPC122122U_0805_6.3VAM
1
2
PC
1228
1U
_0402_6.3
V6K
~D
PC
1228
1U
_0402_6.3
V6K
~D
12
PC
1212
22U
_0805_6.3
V6M
PC
1212
22U
_0805_6.3
V6M1
2
PC129822U_0805_6.3VAMPC129822U_0805_6.3VAM
1
2
PC12062.2U_0402_6.3V6M~D
PC12062.2U_0402_6.3V6M~D
12
PC
1240
1U
_0402_6.3
V6K
~D
PC
1240
1U
_0402_6.3
V6K
~D
12
PC
1235
10U
_0603_6.3
V6M
~D
PC
1235
10U
_0603_6.3
V6M
~D
12
PC
1241
1U
_0402_6.3
V6K
~D
PC
1241
1U
_0402_6.3
V6K
~D
12
PC
1253
1U
_0402_6.3
V6K
~D
PC
1253
1U
_0402_6.3
V6K
~D1
2
PC
1213
22U
_0805_6.3
V6M
PC
1213
22U
_0805_6.3
V6M1
2
PC
1239
1U
_0402_6.3
V6K
~D
PC
1239
1U
_0402_6.3
V6K
~D
12
PC
1216
22U
_0805_6.3
V6M
PC
1216
22U
_0805_6.3
V6M1
2
PC124622U_0805_6.3VAMPC124622U_0805_6.3VAM
1
2
PC
1321
10U
_0603_6.3
V6M
~D
PC
1321
10U
_0603_6.3
V6M
~D1
2
PC
1325
10U
_0603_6.3
V6M
~D
PC
1325
10U
_0603_6.3
V6M
~D1
2
PC12862.2U_0402_6.3V6M~D
PC12862.2U_0402_6.3V6M~D
12
PC
1308
1U
_0402_6.3
V6K
~D
PC
1308
1U
_0402_6.3
V6K
~D
12
PC
1242
1U
_0402_6.3
V6K
~D
PC
1242
1U
_0402_6.3
V6K
~D
12
PC
1310
1U
_0402_6.3
V6K
~D
PC
1310
1U
_0402_6.3
V6K
~D
12
PC129922U_0805_6.3VAMPC129922U_0805_6.3VAM
1
2
PC
1254
1U
_0402_6.3
V6K
~D
PC
1254
1U
_0402_6.3
V6K
~D1
2
PC
1318
10U
_0603_6.3
V6M
~D
PC
1318
10U
_0603_6.3
V6M
~D1
2
PC12912.2U_0402_6.3V6M~D
PC12912.2U_0402_6.3V6M~D
12
PC
1255
1U
_0402_6.3
V6K
~D
PC
1255
1U
_0402_6.3
V6K
~D1
2
PC12972.2U_0402_6.3V6M~D
PC12972.2U_0402_6.3V6M~D
12
PC12032.2U_0402_6.3V6M~D
PC12032.2U_0402_6.3V6M~D
12
PC
1306
1U
_0402_6.3
V6K
~D
PC
1306
1U
_0402_6.3
V6K
~D
12
PC12812.2U_0402_6.3V6M~D
PC12812.2U_0402_6.3V6M~D
12
PC
1248
1U
_0402_6.3
V6K
~D
PC
1248
1U
_0402_6.3
V6K
~D1
2 PC
1250
1U
_0402_6.3
V6K
~D
PC
1250
1U
_0402_6.3
V6K
~D1
2
PC126022U_0805_6.3VAMPC126022U_0805_6.3VAM
1
2
PC
1233
1U
_0402_6.3
V6K
~D
PC
1233
1U
_0402_6.3
V6K
~D1
2
PC124522U_0805_6.3VAMPC124522U_0805_6.3VAM
1
2
PC
1227
1U
_0402_6.3
V6K
~D
PC
1227
1U
_0402_6.3
V6K
~D
12
PC
1313
1U
_0402_6.3
V6K
~D
PC
1313
1U
_0402_6.3
V6K
~D1
2
PC
1324
10U
_0603_6.3
V6M
~D
PC
1324
10U
_0603_6.3
V6M
~D1
2
PC
1215
22U
_0805_6.3
V6M
PC
1215
22U
_0805_6.3
V6M1
2
PC12842.2U_0402_6.3V6M~D
PC12842.2U_0402_6.3V6M~D
12
PC130122U_0805_6.3VAMPC130122U_0805_6.3VAM
1
2
PC
1232
1U
_0402_6.3
V6K
~D
PC
1232
1U
_0402_6.3
V6K
~D1
2
PC12932.2U_0402_6.3V6M~D
PC12932.2U_0402_6.3V6M~D
12
PC
1218
10U
_0603_6.3
V6M
~D
PC
1218
10U
_0603_6.3
V6M
~D
12
PC
1225
1U
_0402_6.3
V6K
~D
PC
1225
1U
_0402_6.3
V6K
~D
12
PC12922.2U_0402_6.3V6M~D
PC12922.2U_0402_6.3V6M~D
12
PC130022U_0805_6.3VAMPC130022U_0805_6.3VAM
1
2
+ PC1273
470U_D2_2VM_R4.5M
+ PC1273
470U_D2_2VM_R4.5M
1
2 3
PC12082.2U_0402_6.3V6M~D
PC12082.2U_0402_6.3V6M~D
12
+ PC1275
470U_D2_2VM_R4.5M
+ PC1275
470U_D2_2VM_R4.5M
1
2 3
PC
1236
10U
_0603_6.3
V6M
~D
PC
1236
10U
_0603_6.3
V6M
~D
12
+
PC
1265
330U
_X
_2V
M_R
6M
+
PC
1265
330U
_X
_2V
M_R
6M
1
2
PC126322U_0805_6.3VAMPC126322U_0805_6.3VAM
1
2
PC
1323
10U
_0603_6.3
V6M
~D
PC
1323
10U
_0603_6.3
V6M
~D1
2
+ PC1274
470U_D2_2VM_R4.5M
+ PC1274
470U_D2_2VM_R4.5M
1
2 3
PC
1311
1U
_0402_6.3
V6K
~D
PC
1311
1U
_0402_6.3
V6K
~D1
2
PC12892.2U_0402_6.3V6M~D
PC12892.2U_0402_6.3V6M~D
12
PC12962.2U_0402_6.3V6M~D
PC12962.2U_0402_6.3V6M~D
12
PC127022U_0805_6.3VAMPC127022U_0805_6.3VAM
1
2
PC
1322
10U
_0603_6.3
V6M
~D
PC
1322
10U
_0603_6.3
V6M
~D1
2
PC12762.2U_0402_6.3V6M~D
PC12762.2U_0402_6.3V6M~D
12
PC
1217
10U
_0603_6.3
V6M
~D
PC
1217
10U
_0603_6.3
V6M
~D
12
+
PC
1266
330U
_X
_2V
M_R
6M
+
PC
1266
330U
_X
_2V
M_R
6M
1
2
PC
1252
1U
_0402_6.3
V6K
~D
PC
1252
1U
_0402_6.3
V6K
~D1
2
+
PC
1257
470U
_D
2_2V
M_R
4.5
M
+
PC
1257
470U
_D
2_2V
M_R
4.5
M1
2
PC12072.2U_0402_6.3V6M~D
PC12072.2U_0402_6.3V6M~D
12
PC126422U_0805_6.3VAMPC126422U_0805_6.3VAM
1
2
PC12822.2U_0402_6.3V6M~D
PC12822.2U_0402_6.3V6M~D
12
PC
1251
1U
_0402_6.3
V6K
~D
PC
1251
1U
_0402_6.3
V6K
~D1
2
PC122322U_0805_6.3VAMPC122322U_0805_6.3VAM
1
2
PC
1307
1U
_0402_6.3
V6K
~D
PC
1307
1U
_0402_6.3
V6K
~D
12
PC12782.2U_0402_6.3V6M~D
PC12782.2U_0402_6.3V6M~D
12
PC
1214
22U
_0805_6.3
V6M
PC
1214
22U
_0805_6.3
V6M1
2
PC
1237
10U
_0603_6.3
V6M
~D
PC
1237
10U
_0603_6.3
V6M
~D
12 PC
1238
10U
_0603_6.3
V6M
~D
PC
1238
10U
_0603_6.3
V6M
~D
12
PC12772.2U_0402_6.3V6M~D
PC12772.2U_0402_6.3V6M~D
12
PC
1226
1U
_0402_6.3
V6K
~D
PC
1226
1U
_0402_6.3
V6K
~D
12PC
1224
1U
_0402_6.3
V6K
~D
PC
1224
1U
_0402_6.3
V6K
~D
12
PC124322U_0805_6.3VAMPC124322U_0805_6.3VAM
1
2
PC122022U_0805_6.3VAMPC122022U_0805_6.3VAM
1
2
PC
1316
1U
_0402_6.3
V6K
~D
PC
1316
1U
_0402_6.3
V6K
~D1
2
PC12002.2U_0402_6.3V6M~D
PC12002.2U_0402_6.3V6M~D
12
PC
1312
1U
_0402_6.3
V6K
~D
PC
1312
1U
_0402_6.3
V6K
~D1
2
PC126222U_0805_6.3VAMPC126222U_0805_6.3VAM
1
2
PC126922U_0805_6.3VAMPC126922U_0805_6.3VAM
1
2
PC12882.2U_0402_6.3V6M~D
PC12882.2U_0402_6.3V6M~D
12
PC122222U_0805_6.3VAMPC122222U_0805_6.3VAM
1
2
PC12042.2U_0402_6.3V6M~DPC1204
2.2U_0402_6.3V6M~D
12
PC12802.2U_0402_6.3V6M~D
PC12802.2U_0402_6.3V6M~D
12
PC130222U_0805_6.3VAMPC130222U_0805_6.3VAM
1
2
PC126822U_0805_6.3VAMPC126822U_0805_6.3VAM
1
2
PC121922U_0805_6.3VAMPC121922U_0805_6.3VAM
1
2
PC
1231
1U
_0402_6.3
V6K
~D
PC
1231
1U
_0402_6.3
V6K
~D1
2
PC
1309
1U
_0402_6.3
V6K
~D
PC
1309
1U
_0402_6.3
V6K
~D
12
PC12012.2U_0402_6.3V6M~D
PC12012.2U_0402_6.3V6M~D
12
PC12092.2U_0402_6.3V6M~D
PC12092.2U_0402_6.3V6M~D
12
PC12022.2U_0402_6.3V6M~D
PC12022.2U_0402_6.3V6M~D
12
PC
1211
22U
_0805_6.3
V6M
PC
1211
22U
_0805_6.3
V6M1
2
PC
1234
1U
_0402_6.3
V6K
~D
PC
1234
1U
_0402_6.3
V6K
~D1
2
PC12592.2U_0402_6.3V6M~D
PC12592.2U_0402_6.3V6M~D
12
PC
1305
1U
_0402_6.3
V6K
~D
PC
1305
1U
_0402_6.3
V6K
~D
12
PC127122U_0805_6.3VAMPC127122U_0805_6.3VAM
1
2
+
PC
1256
470U
_D
2_2V
M_R
4.5
M
+
PC
1256
470U
_D
2_2V
M_R
4.5
M1
2
PC
1317
10U
_0603_6.3
V6M
~D
PC
1317
10U
_0603_6.3
V6M
~D1
2
PC12052.2U_0402_6.3V6M~D
PC12052.2U_0402_6.3V6M~D
12
PC130322U_0805_6.3VAMPC130322U_0805_6.3VAM
1
2
PC12942.2U_0402_6.3V6M~D
PC12942.2U_0402_6.3V6M~D
12
PC12902.2U_0402_6.3V6M~D
PC12902.2U_0402_6.3V6M~D
12
PC
1319
10U
_0603_6.3
V6M
~D
PC
1319
10U
_0603_6.3
V6M
~D1
2
PC12582.2U_0402_6.3V6M~D
PC12582.2U_0402_6.3V6M~D
12
PC124422U_0805_6.3VAMPC124422U_0805_6.3VAM
1
2
PC126122U_0805_6.3VAMPC126122U_0805_6.3VAM
1
2
PC
1320
10U
_0603_6.3
V6M
~D
PC
1320
10U
_0603_6.3
V6M
~D1
2
PC
1249
1U
_0402_6.3
V6K
~D
PC
1249
1U
_0402_6.3
V6K
~D1
2PC
1267
1U
_0402_6.3
V6K
~D
PC
1267
1U
_0402_6.3
V6K
~D1
2
PC
1326
10U
_0603_6.3
V6M
~D
PC
1326
10U
_0603_6.3
V6M
~D1
2
PC12102.2U_0402_6.3V6M~D
PC12102.2U_0402_6.3V6M~D
12
PC
1315
1U
_0402_6.3
V6K
~D
PC
1315
1U
_0402_6.3
V6K
~D1
2 PC
1314
1U
_0402_6.3
V6K
~D
PC
1314
1U
_0402_6.3
V6K
~D1
2
PC12832.2U_0402_6.3V6M~D
PC12832.2U_0402_6.3V6M~D
12
PC
1304
1U
_0402_6.3
V6K
~D
PC
1304
1U
_0402_6.3
V6K
~D
12
PC
1229
1U
_0402_6.3
V6K
~D
PC
1229
1U
_0402_6.3
V6K
~D
12
PC12852.2U_0402_6.3V6M~D
PC12852.2U_0402_6.3V6M~D
12
PC12792.2U_0402_6.3V6M~D
PC12792.2U_0402_6.3V6M~D
12
PC12952.2U_0402_6.3V6M~D
PC12952.2U_0402_6.3V6M~D
12
PC12872.2U_0402_6.3V6M~D
PC12872.2U_0402_6.3V6M~D
12
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