D D t 02 0 - HISAHTECH LIMITED...2012/04/02 · A A B B C C D D E E 4 4 3 3 2 2 1 1 e r v: t of n...

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Size Document Number Rev

Date: Sheet of

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.

BMW Z4 DIS A00Cover Page

A3

1 105Monday, April 02, 2012

<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Title


Date: Sheet of



A3


<Core Design>

Panther Point

2012-04-02REV : A00

BMW Z4 14" Schematics DocumentIvy/Sandy Bridge

DY : None InstalledUMA: UMA only installedSG: PX solution installed.

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BMW Z4 DIS A00

Block Diagram

2 105Friday, March 30, 2012

DMB40

A2

Title


Date: Sheet of


BMW Z4 DIS A00

Block Diagram


DMB40

A2

Title


Date: Sheet of


BMW Z4 DIS A00

Block Diagram


DMB40

A2

INPUTS OUTPUTS

26

VT358

VGA_CORE

0D75V_S0

3D3V_AUX_S5

INPUTSVCC_COREOUTPUTS

SYSTEM DC/DCVT385(DIS)/RT9026VT386(UMA)/RT9026

DDR_VREF_S3

OUTPUTS

CPU DC/DC

5V_S5

1D5V_S3INPUTS

TPS51125RGER

DCBATOUT 5V_S5

OUTPUTS

3D3V_S5

SYSTEM DC/DC

INPUTS

5V_S5

1D5V_S0

OUTPUTS

OUTPUTS

GFX DC/DC

INPUTS

BQ24727INPUTS

CHARGER

AD+

5V_AUX_S5

INPUTS

SYSTEM DC/DC

5V_S0

OUTPUTS

26

5V_S5

RT8068A

3D3V_S5

3D3V_S03D3V_S5

1D8V_S0

DCBATOUT

VCC_GFXCORE

1D5V_S3

VGA DC/DC

Switches

INPUTS OUTPUTS

15V_S5

42,43

41

46

44

92

47

93

40

APL5930

INPUTS OUTPUTS

1D5V_S3 1V_VGA_S0

APL5916INPUTS

0D85_S0OUTPUTS

SYSTEM DC/DC48

INPUTS1D05V_PCHOUTPUTS

SYSTEM DC/DC

45

TouchPAD

DDRIII1600MHz

Ivy / Sandy Bridge

USB3.0 / PowerShare

62USB2.0 x 1

608MBFlash ROM

49

51

BGA1023

14

15

BGA989

62

USB PowerShare

Thames Pro

USB3.0 x 1

DDRIII 1600MHz Channel BPCIe x 8

DMIx4FDIx4x2

HM77

10/100 Lan

49Camera USB2.0 x 1

AMD

TMDS

LVDS

TITPS2541A

28

28 27

71

17W

LPC debug port

NUVOTONNCT7718W

RJ45

HDMI

83.84,85,86,8788,89

KBC

Thermal

6969

Int. KB

DDRIII1600MHz

SPI

Intel CPU

LPC BUS

Slot B

4,5,6,7,8,9,10

Slot A

Block Diagram(Discrete / UMA)

DDRIII 1600MHz Channel A

GMTG991P11U

Intel

LCD

High Definition Audio

14 USB 2.0/1.1 ports

ACPI 4.0a

6 SATA ports

LPC I/F

4 USB 3.0 ports

PCIE x 1

PCH Panther Point

Internal Digital MIC

NPCE885PNUVOTON

8 PCIE ports

128M x 16b x 4(1GB)

Fan Control

VRAM(GDDR5)

17,18,19,20,21,22,23,24,25

L5:VCCL6:SignalL7:GNDL8:Bottom

L1:TopL2:GNDL3:SignalL4:Signal

UMA/Discrete PCB LAYER

VT1318+VT1326

VT1318+VT1323

VT386

3D3V_S5 3D3V_WLAN_AOAC3D3V_S5 3D3V_VGA_S0

1D5V_S3 1D5V_VGA_S0

GDDR5

BT+

VCCP_CPU

VGA DC/DC

5V_S5

VCCP_CPU

3159

SMBUS

Left side

ATHEROS AR8162

PS2

5V_S5

1D8V_VGA_S01D8V_S0

Project Code: 91.4UV01.001PCB P/N : 48.4SB02.011Revision : 11289-1

65

66

( 2W, 4ohm /channel )2CH Speaker

HDD

Combo Jack

CardReader RealtekRTS5179

ConnectorSD/SDHC/SDXC/SD UHS-IMMC/MMC+, MS/MS Pro

mSATA

802.11a/b/g/n BT V4.0 combo

USB2.0 x 1WWAN

USB3.0 Redriver TISN65LVPE502RGER

USB3.0 x 1Right side

ODD 56

USB2.0 x 1

Daughter Board

USB2.0 x 1

Debug Port

USB2.0 x 1

USB 3.0

56

PCIE x 1

66

IDT92HD94

HDA

Mini-Card

Codec

SATA GenII x 1

SATA GenIII x 1

SIMMini-Card

SATA GENIII x 1

*1

*1: Transition minimized differential signaling

I C2

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Title


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BMW Z4 DIS A00

Table of Content


DMB40

A3

Title


Date: Sheet of


BMW Z4 DIS A00

Table of Content


DMB40

A3

Title


Date: Sheet of


BMW Z4 DIS A00

Table of Content


DMB40

A3

CFG[6:5]

CFG[2]

Disabled - No Physical Display Port attached toEmbedded DisplayPort.CFG[4]

Pin Name Strap DescriptionConfiguration (Default value for each bit is 1 unless specified otherwise)

1:

Chief River Schematic Checklist Rev.0_72

0:PCI-Express StaticLane Reversal

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

DefaultValue

PCI-ExpressPort BifurcationStraps

1x16 PCI Express

1

11:

0:Enabled - An external Display Port device isconnectd to the EMBEDDED display Port

11

SPKR

Name Schematics Notes

HAD_DOCK_EN#/GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

HDA_SYNC

Chief River Schematic Checklist Rev.0_72

INIT3_3V# Weak internal pull-up. Leave as "No Connect".

GNT3#/GPIO55GNT2#/GPIO53GNT1#/GPIO51

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

DF_TVS

GPIO15

DF_TVS needs to be pulled up to VccDFTERM power rail through 2.2 kOhms ±5% resistor.

This signal controls the external Intel HD Audio docking isolation logic. This is an active-low-signal. When deasserted the external docking switch is in isolate mode. When asserted the external docking switch electrically connects the Intel HD Audiodock signals to the corresponding Panther Point signals. This signal can insteadbe used as GPIO33.

Voltage DescriptionActice StatusPower Plane

CPU Core RailGraphics Core Rail

AC Brick Mode only

Legacy WOL

Powered by Li Coin Cellin G3 and +V3ALW in Sx

3D3V_AUX_KBC DSW, Sx ON for supporting Deep Sleep states

S0

S3

All S states

WOL_EN

G3, Sx

5V_S03D3V_S01D8V_S01D5V_S01D05V_VTT1V_S00D85V_S00D75V_S0VCC_COREVCC_GFXCORE1D8V_VGA_S03D3V_VGA_S01V_VGA_S0

5V3.3V1.8V1.5V1.05V1V0.85V0.75V0.3V to 1.3V0 to 1.25V1.8V3.3V1V

5V1.5V0.75V

5V_USBX_S31D5V_S3DDR_VREF_S3

BT+DCBATOUT5V_S55V_AUX_S53D3V_S53D3V_AUX_S5

6V-14.1V6V-14.1V5V5V3.3V3.3V

3D3V_LAN_S5 3.3V

3D3V_AUX_S5

GNT[3:0]# functionality is not available on Mobile.Mobile: Used as GPIO onlyPull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail.

Low (0)Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentialityHigh (1)Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality

INTVRMEN

The signal has a weak internal pull-down.If the signal is sampled high, this indicates that the system is strapped to the "No Reboot" mode (Panther Point will disable the TCO Timer system reboot feature).

Integrated 1 V VRMs is enabled when high, External when low.

PCIE Table SATA TableUSB Table

PCH Strapping

Processor Strapping

VCCIO_SEL

DDR3 VREF

DDR3 VREF, M1 and M3 function are required.

PROC_SELECT# & DF_TVS

Pin Name Configuration Schematic Notes

Chief River Schematic Checklist Rev.0_xx

Sandy Bridge + Ivy Bridge

The POR for Ivy Bridge mobile parts is now 1.05 V. There is no longer a need for a separate VR for the processor at 1.0 V and the PCH at 1.05 V. A single VR may be shared for both.

Ivy Bridge

VCCSA[0:1] are the select pin of VCCSA's power control.

Connect DF_TVS signal of the PCH to PROC_SELECT# of the processor through a 1K±5% series resistor. PROC_SELECT# also needs a 2.2K±5%pull up resistor to PCH VccDFTERM rail.

Sandy & Ivy Bridge Compatibility

No change.


Ivy Bridge No change.



VCCSA_VID[0:1]



11:

10: 2 x8 - PCI Express

Reserved

1x8, 2x4 PCI Express

01:

00:

3.3V

3.3V

Power Plane

NC

NC

NC

1312

NC

WLAN

NC

10

0

11

Pair

45

23

1

Device

6789

Card reader

CAMERA

USB3.0 port2, debug port

WWAN

USB3.0 port1, with Power Share Pair

SATA

Device

0

54321

NC

NC

HDD1

ODD

mSATA

NC

NC

NC

Lane

PCIE

Device

54321

WLAN

NC

6 Onboard LAN

78

NC

NC

Touch Panel

NC

NC

NC

1

0

10

POPValue

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2

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1

D D

C C

B B

A A

DMI_TXN2DMI_TXN1DMI_TXN0

DMI_TXP3DMI_TXP2DMI_TXP1DMI_TXP0

DMI_TXN3

DMI_RXP1DMI_RXP0

DMI_RXN3DMI_RXN2DMI_RXN1DMI_RXN0

DMI_RXP3DMI_RXP2

FDI_FSYNC0FDI_FSYNC1

FDI_INT

FDI_LSYNC0FDI_LSYNC1

FDI_TXP4FDI_TXP5FDI_TXP6FDI_TXP7

FDI_TXN0FDI_TXN1

FDI_TXN3FDI_TXN4FDI_TXN5FDI_TXN6FDI_TXN7

FDI_TXN2

FDI_TXP0FDI_TXP1FDI_TXP2FDI_TXP3

PEG_IRCOMP_R

DP_COMP

PEG_RXP7

PEG_RXN7PEG_RXN6

PEG_RXP6PEG_RXP5PEG_RXP4

PEG_RXN5PEG_RXN4

PEG_RXP3

PEG_RXN3

PEG_RXP2

PEG_RXN2

PEG_RXP1

PEG_RXN1

PEG_RXP0

PEG_RXN0

PEG_TXP1

PEG_TXN0

PEG_TXN5

PEG_C_TXN7

PEG_C_TXN2

PEG_C_TXN4

PEG_C_TXN6

PEG_C_TXN1

PEG_C_TXN3

PEG_C_TXN5

PEG_C_TXN0

PEG_TXP4

PEG_TXN3

PEG_TXP7

PEG_TXP0

PEG_TXN6

PEG_TXP3

PEG_TXP6

PEG_TXN1

PEG_TXN7

PEG_TXP2

PEG_TXN4

PEG_TXP5

PEG_TXN2

PEG_C_TXP7

PEG_C_TXP2

PEG_C_TXP4

PEG_C_TXP6

PEG_C_TXP1

PEG_C_TXP3

PEG_C_TXP5

PEG_C_TXP0

VCCP_CPU

VCCP_CPU

DMI_RXP[3:0][19]

DMI_RXN[3:0][19]

DMI_TXN[3:0][19]

DMI_TXP[3:0][19]

FDI_TXN[7:0][19]

FDI_TXP[7:0][19]

FDI_FSYNC0[19]FDI_FSYNC1[19]

FDI_INT[19]

FDI_LSYNC0[19]FDI_LSYNC1[19]

PEG_TXP[7..0] [83]

PEG_TXN[7..0] [83]

PEG_RXP[7..0] [83]

PEG_RXN[7..0] [83]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU(PCIE/DMI/FDI)


<Core Design>

A3

Title


Date: Sheet of


BMW Z4 DIS A00

CPU(PCIE/DMI/FDI)


<Core Design>

A3

Title


Date: Sheet of


BMW Z4 DIS A00

CPU(PCIE/DMI/FDI)


<Core Design>

A3

SSID = CPU

Signal Routing Guideline:EDP_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.EDP_COMPIO keep W/S=4/15 mils and routing length less than 500 mils.

Layout Note:FDI trace length 2000~6500mil

Layout Note:

DMI trace length 2000~8000milLayout Note:

Signal Routing Guideline:PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

Layout Note:PEG trace length 1500~9000mil

Layout Note:

1 2 C424 SCD1U10V2KX-5GPSG C424 SCD1U10V2KX-5GPSG






1 2R401 24D9R2F-L-GPR401 24D9R2F-L-GP







DMI_RX#0M2DMI_RX#1P6DMI_RX#2P1DMI_RX#3P10

DMI_RX0N3DMI_RX1P7DMI_RX2P3DMI_RX3P11

DMI_TX#0K1DMI_TX#1M8DMI_TX#2N4DMI_TX#3R2

DMI_TX0K3DMI_TX1M7

DMI_TX3T3 DMI_TX2P4

FDI0_TX#0U7FDI0_TX#1W11FDI0_TX#2W1FDI0_TX#3AA6FDI1_TX#0W6FDI1_TX#1V4FDI1_TX#2Y2FDI1_TX#3AC9

FDI0_TX0U6FDI0_TX1W10FDI0_TX2W3FDI0_TX3AA7FDI1_TX0W7FDI1_TX1T4FDI1_TX2AA3FDI1_TX3AC8

FDI0_FSYNCAA11FDI1_FSYNCAC12

FDI_INTU11

FDI0_LSYNCAA10FDI1_LSYNCAG8

PEG_ICOMPI G3PEG_ICOMPO G1

PEG_RCOMPO G4

PEG_RX#0 H22PEG_RX#1 J21PEG_RX#2 B22PEG_RX#3 D21PEG_RX#4 A19PEG_RX#5 D17PEG_RX#6 B14PEG_RX#7 D13PEG_RX#8 A11PEG_RX#9 B10

PEG_RX#10 G8PEG_RX#11 A8PEG_RX#12 B6PEG_RX#13 H8PEG_RX#14 E5PEG_RX#15 K7

PEG_RX0 K22PEG_RX1 K19PEG_RX2 C21PEG_RX3 D19PEG_RX4 C19PEG_RX5 D16PEG_RX6 C13PEG_RX7 D12PEG_RX8 C11PEG_RX9 C9

PEG_RX10 F8PEG_RX11 C8PEG_RX12 C5PEG_RX13 H6PEG_RX14 F6PEG_RX15 K6

PEG_TX#0 G22PEG_TX#1 C23PEG_TX#2 D23PEG_TX#3 F21PEG_TX#4 H19PEG_TX#5 C17PEG_TX#6 K15PEG_TX#7 F17PEG_TX#8 F14PEG_TX#9 A15

PEG_TX#10 J14PEG_TX#11 H13PEG_TX#12 M10PEG_TX#13 F10PEG_TX#14 D9PEG_TX#15 J4

PEG_TX0 F22PEG_TX1 A23PEG_TX2 D24PEG_TX3 E21PEG_TX4 G19PEG_TX5 B18PEG_TX6 K17PEG_TX7 G17PEG_TX8 E14PEG_TX9 C15

PEG_TX10 K13PEG_TX11 G13PEG_TX12 K10PEG_TX13 G10PEG_TX14 D8PEG_TX15 K4

EDP_AUXAF4 EDP_AUX#AG4

EDP_TX0AC1EDP_TX1AA4EDP_TX2AE10EDP_TX3AE6

EDP_COMPIOAF3

EDP_HPD#AG11 EDP_ICOMPOAD2

EDP_TX#0AC3EDP_TX#1AC4EDP_TX#2AE11EDP_TX#3AE7

PCI

EXPR

ESS

-- G

RAPH

ICS

DMIIntel(R) FDI

eDP

1 OF 9CPU1A

IVY-BRIDGE-GP-NF71.00IVY.A0U

PCI

EXPR

ESS

-- G

RAPH

ICS

DMIIntel(R) FDI

eDP

1 OF 9CPU1A



1 2R402 24D9R2F-L-GPR402 24D9R2F-L-GP

1 2 C401 SCD1U10V2KX-5GPSG C401 SCD1U10V2KX-5GPSG1 2 C402 SCD1U10V2KX-5GPSG C402 SCD1U10V2KX-5GPSG


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D D

C C

B B

A A

H_SNB_IVB#

SKTOCC#_R

H_CATERR#

H_PECI

H_PROCHOT#_R

H_PROCHOT#

H_PM_SYNC

VDDPWRGOOD

H_CPUPWRGD_R

BUF_CPU_RST#

CLK_EXP_PCLK_EXP_N

CLK_DP_P_RCLK_DP_N_R

SM_RCOMP_0SM_RCOMP_1SM_RCOMP_2

SM_DRAMRST#

H_THERMTRIP#

XDP_TDO

XDP_TMS

XDP_TRST#XDP_TCLK

XDP_PREQ#XDP_PRDY#

XDP_TDI

XDP_DBRESET#

XDP_TCLK

XDP_TDO

XDP_BPM1XDP_BPM2XDP_BPM3

XDP_BPM0

XDP_BPM4XDP_BPM5XDP_BPM6XDP_BPM7

XDP_TRST#

XDP_TDIXDP_TMS

VCCP_CPU

VCCP_CPU

VCCP_CPU

H_SNB_IVB#[22]

H_PECI[22,27]

H_PROCHOT#[27,40]

H_THERMTRIP#[22]

H_PM_SYNC[19]

H_CPUPWRGD[22]

VDDPWRGOOD[37]

PLT_RST#[18,27,31,65,66,71]

CLK_EXP_P [20]CLK_EXP_N [20]

SM_DRAMRST# [37]

XDP_DBRESET# [19]

XDP_BPM0 [71]XDP_BPM1 [71]

XDP_PREQ# [71]

XDP_BPM2 [71]XDP_BPM3 [71]XDP_BPM4 [71]XDP_BPM5 [71]XDP_BPM6 [71]XDP_BPM7 [71]

XDP_PRDY# [71]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU(THERMAL/CLOCK/PM)


<Core Design>

A3

Title


Date: Sheet of


BMW Z4 DIS A00



<Core Design>

A3

Title


Date: Sheet of


BMW Z4 DIS A00



<Core Design>

A3

SSID = CPU

C501 place near to CPU

Layout Note:R501, R513 place near to CPU

Layout Note:

Checking the connector pin's LAYOUTLayout Note:

Signal Routing Guideline:SM_RCOMP keep routing length less than 500 mils.Trace width = 15mil

Layout Note:

X03 2/6

12

C501SC220P50V2KX-3GPDY C501SC220P50V2KX-3GPDY

1 2R508 25D5R2F-GPR508 25D5R2F-GP1 2R511 200R2F-L-GPR511 200R2F-L-GP

1 2R513

56R2J-4-GP

R513

56R2J-4-GP

1 2R501

62R2J-GP

R501

62R2J-GP

1TP502TPAD14-OP-GP TP502TPAD14-OP-GP

12

R509698R2F-GP

R509698R2F-GP

1 2R506 140R2F-GPR506 140R2F-GP

1 2

R5040R0402-PAD-2-GP

R5040R0402-PAD-2-GP

1 2

R5074K99R2F-L-GP

R5074K99R2F-L-GP


12 3

4RN502

SRN51J-GPXDP

RN502

SRN51J-GPXDP

SM_RCOMP1 BE43SM_RCOMP2 BG43

SM_DRAMRST# AT30

SM_RCOMP0 BF44

BCLK# H2BCLK J3

DPLL_REF_CLK# AG1DPLL_REF_CLK AG3

CATERR#C49

PECIA48

PROCHOT#C45

THERMTRIP#D45

SM_DRAMPWROKBE45

RESET#D44

PRDY# N53PREQ# N55

TCK L56TMS L55

TRST# J58

TDI M60TDO L59

DBR# K58

BPM#0 G58BPM#1 E55BPM#2 E59BPM#3 G55BPM#4 G59BPM#5 H60BPM#6 J59BPM#7 J61

PM_SYNCC48

PROC_DETECT#C57

PROC_SELECT#F49

UNCOREPWRGOODB46

CLOC

KS

MISCTHERMAL

PWR MANAGEMENT

DDR3

MI

SCJT

AG &

BPM

2 OF 9CPU1B


CLOC

KS

MISCTHERMAL

PWR MANAGEMENT

DDR3

MI

SCJT

AG &

BPM

2 OF 9CPU1B


12 3

4RN503

SRN1KJ-7-GP

RN503

SRN1KJ-7-GP

1234 5

678

RN501

SRN51J-1-GP

XDP

RN501

SRN51J-1-GP

XDP1 2R50310KR2J-3-GP

R50310KR2J-3-GP

1 2

R5101K5R2F-2-GP

R5101K5R2F-2-GP

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4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_A_DQ44

M_A_DQ36

M_A_DQ47

M_A_DQ40M_A_DQ39

M_A_DQ37

M_A_DQ35M_A_DQ34

M_A_DQ59

M_A_DQ54M_A_DQ53

M_A_DQ63

M_A_DQ60M_A_DQ61

M_A_DQ58

M_A_DQ51

M_A_DQ48

M_A_DQ57

M_A_DQ55

M_A_DQ49M_A_DQ50

M_A_DQ62

M_A_DQ52

M_A_DQ56

M_A_DQ[63:0]M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3

M_A_DQ7

M_A_DQ5M_A_DQ4

M_A_DQ6

M_A_DQ12

M_A_DQ10

M_A_DQ13

M_A_DQ9M_A_DQ8

M_A_DQ11

M_A_DQ15M_A_DQ14

M_A_DQ27

M_A_DQ25

M_A_DQ20M_A_DQ19

M_A_DQ30

M_A_DQ18

M_A_DQ16

M_A_DQ28

M_A_DQ17

M_A_DQ26

M_A_DQ31

M_A_DQ29

M_A_DQ22M_A_DQ23M_A_DQ24

M_A_DQ21

M_A_DQ46

M_A_DQ42

M_A_DQ38

M_A_DQ32

M_A_DQ45

M_A_DQ33

M_A_DQ43

M_A_DQ41

M_A_DQS#4M_A_DQS#5M_A_DQS#6M_A_DQS#7

M_A_DQS#3M_A_DQS#2M_A_DQS#1M_A_DQS#0

M_A_DQS4M_A_DQS3

M_A_DQS5M_A_DQS6M_A_DQS7

M_A_DQS2M_A_DQS1M_A_DQS0

M_A_A7

M_A_A12

M_A_A14M_A_A13

M_A_A9

M_A_A15

M_A_A10

M_A_A0

M_A_A6

M_A_A8

M_A_A1M_A_A2M_A_A3M_A_A4M_A_A5

M_A_A11

M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11

M_B_DQ15

M_B_DQ13M_B_DQ12

M_B_DQ14

M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19

M_B_DQ23

M_B_DQ21M_B_DQ20

M_B_DQ22

M_B_DQ28

M_B_DQ26

M_B_DQ29

M_B_DQ25

M_B_DQ31

M_B_DQ24

M_B_DQ27

M_B_DQ30


M_B_DQ39

M_B_DQ37M_B_DQ36

M_B_DQ38

M_B_DQ44

M_B_DQ42

M_B_DQ45

M_B_DQ41

M_B_DQ47

M_B_DQ40

M_B_DQ43

M_B_DQ46


M_B_DQ55

M_B_DQ53M_B_DQ52

M_B_DQ54

M_B_DQ60

M_B_DQ58

M_B_DQ61

M_B_DQ57

M_B_DQ63

M_B_DQ56

M_B_DQ59

M_B_DQ62

M_B_DQ[63:0]

M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7

M_B_DQS#3M_B_DQS#2M_B_DQS#1M_B_DQS#0

M_B_DQS#7M_B_DQS#6M_B_DQS#5M_B_DQS#4

M_B_A5M_B_A6M_B_A7M_B_A8M_B_A9M_B_A10M_B_A11M_B_A12M_B_A13M_B_A14M_B_A15

M_B_A4M_B_A3M_B_A2M_B_A1M_B_A0

M_A_DQ[63:0][14]

M_A_BS0[14]M_A_BS1[14]M_A_BS2[14]

M_A_CAS#[14]M_A_RAS#[14]M_A_WE#[14]

M_A_DIMA_CKE0 [14]

M_A_DIMA_CKE1 [14]

M_A_DIMA_CLK_DDR0 [14]M_A_DIMA_CLK_DDR#0 [14]

M_A_DIMA_CLK_DDR#1 [14]M_A_DIMA_CLK_DDR1 [14]

M_A_DIMA_CS#0 [14]M_A_DIMA_CS#1 [14]

M_A_DIMA_ODT0 [14]M_A_DIMA_ODT1 [14]

M_A_DQS#[7:0] [14]

M_A_DQS[7:0] [14]

M_A_A[15:0] [14]

M_B_DQ[63:0][15]

M_B_BS0[15]M_B_BS1[15]M_B_BS2[15]

M_B_CAS#[15]M_B_RAS#[15]M_B_WE#[15]

M_B_DIMB_CKE0 [15]

M_B_DIMB_CKE1 [15]

M_B_DIMB_CLK_DDR0 [15]M_B_DIMB_CLK_DDR#0 [15]


M_B_DIMB_CS#0 [15]M_B_DIMB_CS#1 [15]

M_B_DIMB_ODT0 [15]M_B_DIMB_ODT1 [15]

M_B_A[15:0] [15]

M_B_DQS[7:0] [15]

M_B_DQS#[7:0] [15]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (DDR)A3


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (DDR)A3


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (DDR)A3


DMB40

SSID = CPU

SA_CK0 AU36

SA_CK1 AT40

SA_CK#0 AV36

SA_CK#1 AU40

SA_CKE0 AY26

SA_CKE1 BB26

SA_CS#0 BB40SA_CS#1 BC41

SA_ODT0 AY40SA_ODT1 BA41

SA_DQS0 AJ11

SA_DQS#0 AL11

SA_DQS1 AR10

SA_DQS#1 AR8

SA_DQS2 AY11

SA_DQS#2 AV11

SA_DQS3 AU17SA_DQS4 AW45

SA_DQS#4 AV45

SA_DQS5 AV51

SA_DQS#5 AY51

SA_DQS6 AT56

SA_DQS#6 AT55

SA_DQS7 AK54

SA_DQS#7 AK55

SA_MA0 BG35SA_MA1 BB34SA_MA2 BE35SA_MA3 BD35SA_MA4 AT34SA_MA5 AU34SA_MA6 BB32SA_MA7 AT32SA_MA8 AY32SA_MA9 AV32

SA_MA10 BE37SA_MA11 BA30SA_MA12 BC30SA_MA13 AW41SA_MA14 AY28SA_MA15 AU26

SA_DQ0AG6SA_DQ1AJ6SA_DQ2AP11SA_DQ3AL6SA_DQ4AJ10SA_DQ5AJ8SA_DQ6AL8SA_DQ7AL7SA_DQ8AR11SA_DQ9AP6SA_DQ10AU6SA_DQ11AV9SA_DQ12AR6SA_DQ13AP8SA_DQ14AT13SA_DQ15AU13SA_DQ16BC7SA_DQ17BB7SA_DQ18BA13SA_DQ19BB11SA_DQ20BA7SA_DQ21BA9SA_DQ22BB9SA_DQ23AY13SA_DQ24AV14SA_DQ25AR14SA_DQ26AY17SA_DQ27AR19SA_DQ28BA14SA_DQ29AU14SA_DQ30BB14SA_DQ31BB17SA_DQ32BA45SA_DQ33AR43SA_DQ34AW48SA_DQ35BC48SA_DQ36BC45SA_DQ37AR45SA_DQ38AT48SA_DQ39AY48SA_DQ40BA49SA_DQ41AV49SA_DQ42BB51SA_DQ43AY53SA_DQ44BB49SA_DQ45AU49SA_DQ46BA53SA_DQ47BB55SA_DQ48BA55SA_DQ49AV56SA_DQ50AP50SA_DQ51AP53SA_DQ52AV54SA_DQ53AT54SA_DQ54AP56SA_DQ55AP52SA_DQ56AN57SA_DQ57AN53SA_DQ58AG56SA_DQ59AG53SA_DQ60AN55SA_DQ61AN52SA_DQ62AG55SA_DQ63AK56

SA_CAS#BE39SA_RAS#BD39SA_WE#AT41

SA_BS0BD37SA_BS1BF36SA_BS2BA28

SA_DQS#3 AT17DD

R SY

STEM

MEM

ORY

A

3 OF 9CPU1C


DDR

SYST

EM M

EMOR

Y A

3 OF 9CPU1C


SB_CK0 BA34

SB_CK1 BA36

SB_CK#0 AY34

SB_CK#1 BB36

SB_CKE0 AR22

SB_CKE1 BF27

SB_ODT0 AT43SB_ODT1 BG47

SB_DQS4 BE51

SB_DQS#4 BG51

SB_DQS5 BA61

SB_DQS#5 BA59

SB_DQS6 AR59

SB_DQS#6 AT60

SB_DQS7 AK61

SB_DQS#7 AK59

SB_DQS0 AM2

SB_DQS#0 AL3

SB_DQS1 AV1

SB_DQS#1 AV3

SB_DQS2 BE11

SB_DQS#2 BG11

SB_DQS3 BD18

SB_DQS#3 BD17

SB_MA0 BF32SB_MA1 BE33SB_MA2 BD33SB_MA3 AU30SB_MA4 BD30SB_MA5 AV30SB_MA6 BG30SB_MA7 BD29SB_MA8 BE30SB_MA9 BE28

SB_MA10 BD43SB_MA11 AT28SB_MA12 AV28SB_MA13 BD46SB_MA14 AT26SB_MA15 AU22

SB_DQ0AL4SB_DQ1AL1SB_DQ2AN3SB_DQ3AR4SB_DQ4AK4SB_DQ5AK3SB_DQ6AN4SB_DQ7AR1SB_DQ8AU4SB_DQ9AT2SB_DQ10AV4SB_DQ11BA4SB_DQ12AU3SB_DQ13AR3SB_DQ14AY2SB_DQ15BA3SB_DQ16BE9SB_DQ17BD9SB_DQ18BD13SB_DQ19BF12SB_DQ20BF8SB_DQ21BD10SB_DQ22BD14SB_DQ23BE13SB_DQ24BF16SB_DQ25BE17SB_DQ26BE18SB_DQ27BE21SB_DQ28BE14SB_DQ29BG14SB_DQ30BG18SB_DQ31BF19SB_DQ32BD50SB_DQ33BF48SB_DQ34BD53SB_DQ35BF52SB_DQ36BD49SB_DQ37BE49SB_DQ38BD54SB_DQ39BE53SB_DQ40BF56SB_DQ41BE57SB_DQ42BC59SB_DQ43AY60SB_DQ44BE54SB_DQ45BG54SB_DQ46BA58SB_DQ47AW59SB_DQ48AW58SB_DQ49AU58SB_DQ50AN61SB_DQ51AN59SB_DQ52AU59SB_DQ53AU61SB_DQ54AN58SB_DQ55AR58SB_DQ56AK58SB_DQ57AL58SB_DQ58AG58SB_DQ59AG59SB_DQ60AM60SB_DQ61AL59SB_DQ62AF61SB_DQ63AH60

SB_CS#0 BE41SB_CS#1 BE47

SB_CAS#AV43SB_RAS#BF40SB_WE#BD45

SB_BS0BG39SB_BS1BD42SB_BS2AT22

DDR

SYST

EM M

EMOR

Y B

4 OF 9CPU1D


DDR

SYST

EM M

EMOR

Y B

4 OF 9CPU1D


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DC_TEST_C4_D3

TP_DC_TEST_A4

TP_DC_TEST_D1TP_DC_TEST_A58

TP_DC_TEST_A59_C59

TP_DC_TEST_A61_C61TP_DC_TEST_D61TP_DC_TEST_BD61

TP_DC_TEST_BE59_BE61

DC_TEST_BG59_BG61TP_DC_TEST_BG58TP_DC_TEST_BG4

DC_TEST_BE3_BG3

DC_TEST_BE1_BG1TP_DC_TEST_BD1

CFG11

CFG6

CFG15

CFG8CFG7

CFG12

CFG16

CFG9

CFG0

CFG13

CFG17

CFG1

CFG4

CFG2

CFG10

CFG14

CFG5

VSSAXG_VAL_SENSE

CFG3

VAXG_VAL_SENSE

VSS_VAL_SENSEVCC_VAL_SENSE

VCC_DIE_SENSE

BCLK_ITPBCLK_ITP#

CFG2

CFG6

CFG5

VSS_DIE_SENSE

CFG0[71]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (RESERVED)A3


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (RESERVED)A3


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (RESERVED)A3


DMB40

SSID = CPU

0:Lane Reversed

PEG Static Lane Reversal

1: Normal Operation; Lane # definition matches socket pin map definitionCFG[2]

CFG[6:5]

PCIE Port Bifurcation Straps

0: Enabled; An external Display Port device is connected to the Embedded Display Port

Display Port Presence Strap

1: Disabled; No Physical Display Port attached to Embedded Display PortCFG[4]

1x16 PCI Express

Reserved

2 x8 - PCI Express

1x8, 2x4 PCI Express

11:

10:

01:

00:

1 TP728 TPAD14-OP-GPTP728 TPAD14-OP-GP






CFG0B50CFG1C51CFG2B54CFG3D53CFG4A51CFG5C53CFG6C55CFG7H49CFG8A55CFG9H51CFG10K49CFG11K53CFG12F53CFG13G53CFG14L51CFG15F51CFG16D52CFG17L53

DC_TEST_A4 A4

DC_TEST_A58 A58DC_TEST_A59 A59

DC_TEST_A61 A61

DC_TEST_BD1 BD1

DC_TEST_BD61 BD61

DC_TEST_BE1 BE1DC_TEST_BE3 BE3

DC_TEST_BE59 BE59DC_TEST_BE61 BE61

DC_TEST_BG1 BG1DC_TEST_BG3 BG3DC_TEST_BG4 BG4DC_TEST_BG58 BG58DC_TEST_BG59 BG59DC_TEST_BG61 BG61

DC_TEST_C4 C4

DC_TEST_C59 C59

DC_TEST_C61 C61

DC_TEST_D1 D1DC_TEST_D3 D3

DC_TEST_D61 D61

VCC_VAL_SENSEH43VSS_VAL_SENSEK43

VAXG_VAL_SENSEH45VSSAXG_VAL_SENSEK45

VCC_DIE_SENSEF48

RSVD41 AH2RSVD42 AG13RSVD43 AM14RSVD44 AM15

RSVD8BA19RSVD9AV19RSVD10AT21RSVD11BB21RSVD12BB19RSVD13AY21RSVD14BA22RSVD15AY22RSVD16AU19RSVD17AU21RSVD18BD21RSVD19BD22RSVD20BD25RSVD21BD26RSVD22BG22RSVD23BE22RSVD24BG26RSVD25BE26RSVD26BF23RSVD27BE24

RSVD45 N50

RSVD30 N42RSVD31 L42RSVD32 L45RSVD33 L47

RSVD34 M13RSVD35 M14RSVD36 U14RSVD37 W14RSVD38 P13

RSVD39 AT49RSVD40 K24

RSVD6H48RSVD7K48

RSVD47G48

BCLK_ITP N59BCLK_ITP# N58

RESE

RVED

5 OF 9CPU1E


RESE

RVED

5 OF 9CPU1E








12

R7011KR2J-1-GPDYR7011KR2J-1-GPDY





12

R7041KR2J-1-GPSGR7041KR2J-1-GPSG

12
















www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_CPU_SVIDCLKH_CPU_SVIDALRT#

H_CPU_SVIDDAT

VCCSENSEVSSSENSE

H_SNB_IVB#_PWRCTRL

VCC_CORE

VCCP_CPU

VCCP_CPU

VCCP_CPUVCCP_CPU

VCC_CORE

VCCP_CPU

+V1.05S_VCCPQE_R

VCC_CORE

VR_SVID_ALERT# [42]

H_CPU_SVIDDAT [42]H_CPU_SVIDCLK [42]

VCCSENSE [42]VSSSENSE [42]

VSSIO_SENSE [45]VCCIO_SENSE [45]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_CORE)A2


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_CORE)A2


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_CORE)A2


<Core Design>

SSID = CPU

Need place Pull Hiat IMVP page

R803, R804, R805 need close to CPUAlert# signal must be routed between the Clock and Datalines to reduce the cross talk between them

1. PH/PL resisors place close CPU2. SENSE signal recommend differential routing


33A

8.5A

Layout Note:

Layout Note:

Layout Note:

Added, cause the1.05V far away CPU

5

4

8.5

1.2

0.3~1.52

0~1.52

Voltage Rail

VCC_CORE(ULV)

VAXG(ULV)

VCCIO

VCCSA

VCCPLL

VDDQ 1.5

0.9

Voltage(V)

1.8

1.05

Iccmax(A)

33

33

X01 12/09X01 12/15X01 12/16X01 12/21

X03 2/6

A00 3/30

12

C825

SC22

U6D3

V5M

X-2G

PC8

25SC

22U6

D3V5

MX-

2GP

12

C807

SC22

U6D3

V5M

X-2G

P

DY

C807

SC22

U6D3

V5M

X-2G

P

DY

12

C812

SC22

U6D3

V5M

X-2G

PC8

12SC

22U6

D3V5

MX-

2GP

12

C870SC1U6D3V2KX-GP

DY

C870SC1U6D3V2KX-GP

DY

12

C882SC10U6D3V3M

X-GP

DY

C882SC10U6D3V3M

X-GP

DY

12

C890SC1U6D3V2KX-GPC890SC1U6D3V2KX-GP

12

C828

SC22

U6D3

V5M

X-2G

PC8

28SC

22U6

D3V5

MX-

2GP

12

C831

SC22

U6D3

V5M

X-2G

PC8

31SC

22U6

D3V5

MX-

2GP


12

C814

SC10

U6D3

V5KX

-1GP

DY

C814

SC10

U6D3

V5KX

-1GP

DY

12

C869SC1U6D3V2KX-GP

DY

C869SC1U6D3V2KX-GP

DY

12

C803

SC10

U6D3

V5KX

-1GP

DY C803

SC10

U6D3

V5KX

-1GP

DY

12

C893SC10U6D3V3M

X-GPC893SC10U6D3V3M

X-GP

12

C868SC1U6D3V2KX-GP

DY

C868SC1U6D3V2KX-GP

DY

12

C808

SC22

U6D3

V5M

X-2G

PC8

08SC

22U6

D3V5

MX-

2GP

12

C811

SC22

U6D3

V5M

X-2G

PC8

11SC

22U6

D3V5

MX-

2GP

VCC_SENSE F43VSS_SENSE G43

VIDALERT# A44VIDSCLK B43VIDSOUT C44

VSS_SENSE_VCCIO AN17

VCC1A26VCC2A29VCC3A31VCC4A34VCC5A35VCC6A38VCC7A39VCC8A42VCC9C26VCC10C27VCC11C32VCC12C34VCC13C37VCC14C39VCC15C42VCC16D27VCC17D32VCC18D34VCC19D37VCC20D39VCC21D42VCC22E26VCC23E28VCC24E32VCC25E34VCC26E37VCC27E38VCC28F25VCC29F26VCC30F28VCC31F32VCC32F34VCC33F37VCC34F38VCC35F42VCC36G42VCC37H25VCC38H26VCC39H28VCC40H29VCC41H32VCC42H34VCC43H35VCC44H37VCC45H38VCC46H40VCC47J25VCC48J26VCC49J28VCC50J29VCC51J32VCC52J34VCC53J35VCC54J37VCC55J38VCC56J40VCC57J42VCC58K26VCC59K27VCC60K29VCC61K32VCC62K34VCC63K35VCC64K37VCC66K39VCC67K42VCC68L25VCC69L28VCC70L33VCC71L36VCC72L40VCC73N26VCC74N30VCC75N34VCC76N38

VCCIO1 AF46VCCIO3 AG48VCCIO4 AG50VCCIO5 AG51VCCIO6 AJ17VCCIO7 AJ21VCCIO8 AJ25VCCIO9 AJ43

VCCIO10 AJ47VCCIO11 AK50VCCIO12 AK51VCCIO13 AL14VCCIO14 AL15VCCIO15 AL16VCCIO16 AL20VCCIO17 AL22VCCIO18 AL26VCCIO19 AL45VCCIO20 AL48VCCIO21 AM16VCCIO22 AM17VCCIO23 AM21VCCIO24 AM43VCCIO25 AM47VCCIO26 AN20VCCIO27 AN42VCCIO28 AN45VCCIO29 AN48

VCCIO30 AA14VCCIO31 AA15VCCIO32 AB17VCCIO33 AB20VCCIO34 AC13VCCIO35 AD16VCCIO36 AD18VCCIO37 AD21VCCIO38 AE14VCCIO39 AE15VCCIO40 AF16VCCIO41 AF18VCCIO42 AF20VCCIO43 AG15VCCIO44 AG16VCCIO45 AG17VCCIO46 AG20VCCIO47 AG21VCCIO48 AJ14VCCIO49 AJ15

VCCIO50 W16VCCIO51 W17

VCCPQE1 AM25VCCPQE2 AN22

VCCIO_SENSE AN16

VCCIO_SEL BC22

POWER

CORE SUPPLY

PEG IO AND DDR IO

SENSE LINES

SVID

QUIET

RAILS

6 OF 9CPU1F


POWER

CORE SUPPLY

PEG IO AND DDR IO

SENSE LINES

SVID

QUIET

RAILS

6 OF 9CPU1F


12

C813

SC22

U6D3

V5M

X-2G

PC8

13SC

22U6

D3V5

MX-

2GP

12


12

C883SC1U6D3V2KX-GP

DY

C883SC1U6D3V2KX-GP

DY

12

C815

SC10

U6D3

V5KX

-1GP

C815

SC10

U6D3

V5KX

-1GP 1

2

C827

SC2D

2U6D

3V2M

X-GP

DY

C827

SC2D

2U6D

3V2M

X-GP

DY

12

C847

SC22

U6D3

V5M

X-2G

PC8

47SC

22U6

D3V5

MX-

2GP

12

C864SC1U6D3V2KX-GP

DY

C864SC1U6D3V2KX-GP

DY

12


12

C896SC10U6D3V3M

X-GP

DY

C896SC10U6D3V3M

X-GP

DY

12

C876SC1U6D3V2KX-GP

DY

C876SC1U6D3V2KX-GP

DY

12

R80610R2F-L-GPR80610R2F-L-GP

12

C801

SC22

U6D3

V5M

X-2G

PC8

01SC

22U6

D3V5

MX-

2GP

12

C873

SC22

U6D3

V5M

X-2G

PC8

73SC

22U6

D3V5

MX-

2GP

12

C809

SC22

U6D3

V5M

X-2G

PC8

09SC

22U6

D3V5

MX-

2GP

12

C817

SC10

U6D3

V5KX

-1GP

DY

C817

SC10

U6D3

V5KX

-1GP

DY

12

C840

SC2D

2U6D

3V2M

X-GP

DY

C840

SC2D

2U6D

3V2M

X-GP

DY

12

C871

SC22

U6D3

V5M

X-2G

PC8

71SC

22U6

D3V5

MX-

2GP

12

C867SC1U6D3V2KX-GP

DY

C867SC1U6D3V2KX-GP

DY

1 2

R8120R0402-PAD-2-GPR8120R0402-PAD-2-GP

12

C881SC10U6D3V3M

X-GP

DY

C881SC10U6D3V3M

X-GP

DY

12

R80575R2F-2-GP

R80575R2F-2-GP

12

C884SC1U6D3V2KX-GP

DY

C884SC1U6D3V2KX-GP

DY

12

C865SC1U6D3V2KX-GP

DY

C865SC1U6D3V2KX-GP

DY

12

C816

SC22

U6D3

V5M

X-2G

PC8

16SC

22U6

D3V5

MX-

2GP

12

C895SC10U6D3V3M

X-GP

DY

C895SC10U6D3V3M

X-GP

DY

12

C892SC1U6D3V2KX-GP

DYC892SC1U6D3V2KX-GP

DY

12

R801100R2F-L1-GP-UR801100R2F-L1-GP-U

12

C875SC1U6D3V2KX-GP

DY

C875SC1U6D3V2KX-GP

DY

12


12

C818

SC22

U6D3

V5M

X-2G

PC8

18SC

22U6

D3V5

MX-

2GP

12

R80710R2F-L-GPR80710R2F-L-GP

12

C810

SC22

U6D3

V5M

X-2G

PC8

10SC

22U6

D3V5

MX-

2GP

12

C897SC10U6D3V3M

X-GP

DY

C897SC10U6D3V3M

X-GP

DY

12

C830

SC22

U6D3

V5M

X-2G

PC8

30SC

22U6

D3V5

MX-

2GP

12

C894SC10U6D3V3M

X-GPDY

C894SC10U6D3V3M

X-GPDY

12

C880SC10U6D3V3M

X-GPC880SC10U6D3V3M

X-GP

12

C829

SC10

U6D3

V3M

X-GP

DY C829

SC10

U6D3

V3M

X-GP

DY

12

C821

SC22

U6D3

V5M

X-2G

PC8

21SC

22U6

D3V5

MX-

2GP

12

C863SC10U6D3V3M

X-GPC863SC10U6D3V3M

X-GP

12

C820

SC22

U6D3

V5M

X-2G

PC8

20SC

22U6

D3V5

MX-

2GP

12

C832

SC22

U6D3

V5M

X-2G

PC8

32SC

22U6

D3V5

MX-

2GP

12


12

C866SC1U6D3V2KX-GP

DY

C866SC1U6D3V2KX-GP

DY

12

C823

SC22

U6D3

V5M

X-2G

PC8

23SC

22U6

D3V5

MX-

2GP

12


12

R802100R2F-L1-GP-UR802100R2F-L1-GP-U

12

C874SC1U6D3V2KX-GP

DY

C874SC1U6D3V2KX-GP

DY

12


12

C804

SC22

U6D3

V5M

X-2G

PC8

04SC

22U6

D3V5

MX-

2GP

12

C872

SC22

U6D3

V5M

X-2G

P

DY

C872

SC22

U6D3

V5M

X-2G

P

DY

12


12

R804130R2F-1-GPR804130R2F-1-GP

1 2

R80343R2J-GPR80343R2J-GP

12

C891SC1U6D3V2KX-GP

DY

C891SC1U6D3V2KX-GP

DY

12

C805

SC22

U6D3

V5M

X-2G

PC8

05SC

22U6

D3V5

MX-

2GP

12

C824

SC22

U6D3

V5M

X-2G

P

DY

C824

SC22

U6D3

V5M

X-2G

P

DY

12


12

C877SC1U6D3V2KX-GP

DY

C877SC1U6D3V2KX-GP

DY

12

C806

SC22

U6D3

V5M

X-2G

PC8

06SC

22U6

D3V5

MX-

2GP

12

C822

SC22

U6D3

V5M

X-2G

PC8

22SC

22U6

D3V5

MX-

2GP

12

C843

SC10

U6D3

V3M

X-GP

DY C843

SC10

U6D3

V3M

X-GP

DY

12

C879SC10U6D3V3M

X-GPC879SC10U6D3V3M

X-GP

12

C802

SC10

U6D3

V5KX

-1GP

DY C802

SC10

U6D3

V5KX

-1GP

DY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC_AXG_SENSEVSS_AXG_SENSE

DDR_WR_VREFBDDR_WR_VREFA

TP_VDDQ_SENSETP_VDDQ_VSS

VCCSA_SEL0VCCSA_SEL1

VCC_GFXCORE

VCC_GFXCORE

1D8V_S0

0D85V_S0

+V_SM_VREF_CNT

1D5V_S0

1D5V_S0+V1.5S_VCCD_Q

VCC_AXG_SENSE[42]VSS_AXG_SENSE[42]

VCCSA_SENSE [48]

VCCSA_SEL1 [48]VCCSA_SEL0 [48]

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_GFXCORE)A2


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_GFXCORE)A2


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VCC_GFXCORE)A2


<Core Design>

SSID = CPU


+V_SM_VREF_CNT should have 10 mil trace width

0.9

VCCSA Power Select

0

VID[0] VID[1]

0

0.85

0.775

0.75

Voltage(V)

0 1

01

11

5

6

8.5

1.2

0.3~1.52

0~1.52

Voltage Rail

VCC_CORE(ULV)

VAXG(ULV)

VCCIO

VCCSA

VCCPLL

VDDQ 1.5

0.9

Voltage(V)

1.8

1.05

Iccmax(A)

33

3333A

5A

1.2A

6A

Layout Note:

Layout Note:

X01 12/09 X01 12/15

X03 2/6

12


12

C909

SC22

U6D3

V5M

X-2G

PC9

09SC

22U6

D3V5

MX-

2GP

12

C911

SC22

U6D3

V5M

X-2G

PC9

11SC

22U6

D3V5

MX-

2GP

12

C926SC10U6D3V3M

X-GP

DY

C926SC10U6D3V3M

X-GP

DY

12


12

C914

SC1U

6D3V

2KX-

GP

DY C914

SC1U

6D3V

2KX-

GP

DY

12

C919

SC22

U6D3

V5M

X-2G

PC9

19SC

22U6

D3V5

MX-

2GP

12

C902

SC22

U6D3

V5M

X-2G

PC9

02SC

22U6

D3V5

MX-

2GP

12

C939SC10U6D3V3M

X-GP

DY

C939SC10U6D3V3M

X-GP

DY

12

C927SC10U6D3V3M

X-GP

DY

C927SC10U6D3V3M

X-GP

DY

12

C905

SC22

U6D3

V5M

X-2G

PC9

05SC

22U6

D3V5

MX-

2GP

12

C940SC10U6D3V3M

X-GPC940SC10U6D3V3M

X-GP

12

C947SC1U6D3V2KX-GP

DY

C947SC1U6D3V2KX-GP

DY

12

C915

SC1U

6D3V

2KX-

GP

DY C915

SC1U

6D3V

2KX-

GP

DY

12

C920

SC22

U6D3

V5M

X-2G

PC9

20SC

22U6

D3V5

MX-

2GP

12

R904100R2F-L1-GP-UR904100R2F-L1-GP-U


12

C916

SC1U

6D3V

2KX-

GP

DY C916

SC1U

6D3V

2KX-

GP

DY

12


12

C921

SC22

U6D3

V5M

X-2G

PC9

21SC

22U6

D3V5

MX-

2GP

12

C923

SC22

U6D3

V5M

X-2G

PC9

23SC

22U6

D3V5

MX-

2GP

12

C936SC10U6D3V3M

X-GP

DY

C936SC10U6D3V3M

X-GP

DY

12

C950SC1U6D3V2KX-GP

DY

C950SC1U6D3V2KX-GP

DY

12

C941SC10U6D3V3M

X-GPC941SC10U6D3V3M

X-GP

12

C933SC1U6D3V2KX-GP

DY

C933SC1U6D3V2KX-GP

DY

12

C917

SC1U

6D3V

2KX-

GP

DY C917

SC1U

6D3V

2KX-

GP

DY

12

C922

SC22

U6D3

V5M

X-2G

PC9

22SC

22U6

D3V5

MX-

2GP

12

C955

SC22

U6D3

V5M

X-2G

PC9

55SC

22U6

D3V5

MX-

2GP

123 4

RN901SRN1KJ-7-GPRN901SRN1KJ-7-GP

12

C932SC1U6D3V2KX-GP

DY

C932SC1U6D3V2KX-GP

DY

12

C908

SC22

U6D3

V5M

X-2G

PC9

08SC

22U6

D3V5

MX-

2GP

12

C929SC10U6D3V3M

X-GP

DY

C929SC10U6D3V3M

X-GP

DY

12

C946SC1U6D3V2KX-GP

DY

C946SC1U6D3V2KX-GP

DY

12


12

C938SC10U6D3V3M

X-GP

DY

C938SC10U6D3V3M

X-GP

DY

12

C930SC10U6D3V3M

X-GP

DY

C930SC10U6D3V3M

X-GP

DY

12

C918

SC1U

6D3V

2KX-

GP

DY

C918

SC1U

6D3V

2KX-

GP

DY

12

C910

SC22

U6D3

V5M

X-2G

PC9

10SC

22U6

D3V5

MX-

2GP

12

C952SC1U6D3V2KX-GP

DY

C952SC1U6D3V2KX-GP

DY

1 2

R9090R0402-PAD-2-GPR9090R0402-PAD-2-GP

12

C901

SC22

U6D3

V5M

X-2G

PC9

01SC

22U6

D3V5

MX-

2GP

12

C903

SC22

U6D3

V5M

X-2G

PC9

03SC

22U6

D3V5

MX-

2GP

12

C944SC1U6D3V2KX-GP

DY

C944SC1U6D3V2KX-GP

DY

12

C943SC10U6D3V3M

X-GPDY

C943SC10U6D3V3M

X-GPDY

12

C949SC1U6D3V2KX-GP

DY

C949SC1U6D3V2KX-GP

DY


12

C948SC1U6D3V2KX-GP

DY

C948SC1U6D3V2KX-GP

DY

12

C906

SC22

U6D3

V5M

X-2G

PC9

06SC

22U6

D3V5

MX-

2GP

123

4

RN902

SRN1KJ-7-GP

DY

RN902

SRN1KJ-7-GP

DY

SM_VREF AY43VAXG1AA46VAXG2AB47VAXG3AB50VAXG4AB51VAXG5AB52VAXG6AB53VAXG7AB55VAXG8AB56VAXG9AB58VAXG10AB59VAXG11AC61VAXG12AD47VAXG13AD48VAXG14AD50VAXG15AD51VAXG16AD52VAXG17AD53VAXG18AD55VAXG19AD56VAXG20AD58VAXG21AD59VAXG22AE46VAXG23N45VAXG24P47VAXG25P48VAXG26P50VAXG27P51VAXG28P52VAXG29P53VAXG30P55VAXG31P56VAXG32P61VAXG33T48VAXG34T58VAXG35T59VAXG36T61VAXG37U46VAXG38V47VAXG39V48VAXG40V50VAXG41V51VAXG42V52VAXG43V53VAXG44V55VAXG45V56VAXG46V58VAXG47V59VAXG48W50VAXG49W51VAXG50W52VAXG51W53VAXG52W55VAXG53W56VAXG54W61

VDDQ11 AM40VDDQ12 AN30VDDQ13 AN34VDDQ14 AN38VDDQ15 AR26

VDDQ1 AJ28VDDQ2 AJ33VDDQ3 AJ36VDDQ4 AJ40VDDQ5 AL30VDDQ6 AL34VDDQ7 AL38VDDQ8 AL42VDDQ9 AM33

VDDQ10 AM36

VCCPLL1BB3VCCPLL2BC1

VCCSA_SENSE U10

VCCSA_VID1 D49

VAXG55Y48VAXG56Y61

VCCPLL3BC4

VAXG_SENSEF45VSSAXG_SENSEG45

VCCSA1L17

VCCSA10R21

VCCSA12V16VCCSA13V17VCCSA14V18

VCCSA4N20VCCSA5N22VCCSA6P17

VCCSA9R18

VDDQ16 AR28VDDQ17 AR30VDDQ18 AR32VDDQ19 AR34VDDQ20 AR36VDDQ21 AR40VDDQ22 AV41VDDQ23 AW26VDDQ24 BA40VDDQ25 BB28VDDQ26 BG33

VCCSA11U15

VCCSA15V21VCCSA16W20

VCCSA2L21VCCSA3N16

VCCDQ1 AM28VCCDQ2 AN26

VCCSA7P20VCCSA8R16

VDDQ_SENSE BC43VSS_SENSE_VDDQ BA43

VCCSA_VID0 D48

SA_DIMM_VREFDQ BE7SB_DIMM_VREFDQ BG7

POWER

GRAPHICS

DDR3 - 1.5V RAILS

1.8V RAIL

SENSE

LINES

SA RAIL

SENSE LINES

QUIET RAILS

VREF

VCCSA VID

lines

7 OF 9CPU1G


POWER

GRAPHICS

DDR3 - 1.5V RAILS

1.8V RAIL

SENSE

LINES

SA RAIL

SENSE LINES

QUIET RAILS

VREF

VCCSA VID

lines

7 OF 9CPU1G


12

R903100R2F-L1-GP-UR903100R2F-L1-GP-U

12

C928SC10U6D3V3M

X-GP

DY

C928SC10U6D3V3M

X-GP

DY

12


12

C907

SC22

U6D3

V5M

X-2G

PC9

07SC

22U6

D3V5

MX-

2GP

12


12

C931SC1U6D3V2KX-GP

DY

C931SC1U6D3V2KX-GP

DY

12

C951SC1U6D3V2KX-GP

DY

C951SC1U6D3V2KX-GP

DY

12

C904

SC22

U6D3

V5M

X-2G

PC9

04SC

22U6

D3V5

MX-

2GP

12

C912

SC1U

6D3V

2KX-

GPDY C9

12SC

1U6D

3V2K

X-GP

DY

12

C937SC10U6D3V3M

X-GPC937SC10U6D3V3M

X-GP

12

C924SC1U6D3V2KX-GP

DY

C924SC1U6D3V2KX-GP

DY

12

C942SC10U6D3V3M

X-GP

DY

C942SC10U6D3V3M

X-GP

DY

12

C913

SC1U

6D3V

2KX-

GP

DY C913

SC1U

6D3V

2KX-

GP

DY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VSS)A3

10 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VSS)A3

10 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CPU (VSS)A3

10 105Friday, March 30, 2012

DMB40

SSID = CPU

VSS1A13VSS2A17VSS3A21VSS4A25VSS5A28VSS6A33VSS7A37VSS8A40VSS9A45VSS10A49VSS11A53VSS12A9VSS13AA1VSS14AA13VSS15AA50VSS16AA51VSS17AA52VSS18AA53VSS19AA55VSS20AA56VSS21AA8VSS22AB16VSS23AB18VSS24AB21VSS25AB48VSS26AB61VSS27AC10VSS28AC14VSS29AC46VSS30AC6VSS31AD17VSS32AD20VSS33AD4VSS34AD61VSS35AE13VSS36AE8VSS37AF1VSS38AF17VSS39AF21VSS40AF47VSS41AF48VSS42AF50VSS43AF51VSS44AF52VSS45AF53VSS46AF55VSS47AF56VSS48AF58VSS49AF59VSS50AG10VSS51AG14VSS52AG18VSS53AG47VSS54AG52VSS55AG61VSS56AG7VSS57AH4VSS58AH58VSS59AJ13VSS60AJ16VSS61AJ20VSS62AJ22VSS63AJ26VSS64AJ30VSS65AJ34VSS66AJ38VSS67AJ42VSS68AJ45VSS69AJ48VSS70AJ7VSS71AK1VSS72AK52VSS73AL10VSS74AL13VSS75AL17VSS76AL21VSS77AL25VSS78AL28VSS79AL33VSS80AL36VSS81AL40VSS82AL43VSS83AL47VSS84AL61VSS85AM13VSS86AM20VSS87AM22VSS88AM26VSS89AM30VSS90AM34

VSS91 AM38VSS92 AM4VSS93 AM42VSS94 AM45VSS95 AM48VSS96 AM58VSS97 AN1VSS98 AN21VSS99 AN25

VSS100 AN28VSS101 AN33VSS102 AN36VSS103 AN40VSS104 AN43VSS105 AN47VSS106 AN50VSS107 AN54VSS108 AP10VSS109 AP51VSS110 AP55VSS111 AP7VSS112 AR13VSS113 AR17VSS114 AR21VSS115 AR41VSS116 AR48VSS117 AR61VSS118 AR7VSS119 AT14VSS120 AT19VSS121 AT36VSS122 AT4VSS123 AT45VSS124 AT52VSS125 AT58VSS126 AU1VSS127 AU11VSS128 AU28VSS129 AU32VSS130 AU51VSS131 AU7VSS132 AV17VSS133 AV21VSS134 AV22VSS135 AV34VSS136 AV40VSS137 AV48VSS138 AV55VSS139 AW13VSS140 AW43VSS141 AW61VSS142 AW7VSS143 AY14VSS144 AY19VSS145 AY30VSS146 AY36VSS147 AY4VSS148 AY41VSS149 AY45VSS150 AY49VSS151 AY55VSS152 AY58VSS153 AY9VSS154 BA1VSS155 BA11VSS156 BA17VSS157 BA21VSS158 BA26VSS159 BA32VSS160 BA48VSS161 BA51VSS162 BB53VSS163 BC13VSS164 BC5VSS165 BC57VSS166 BD12VSS167 BD16VSS168 BD19VSS169 BD23VSS170 BD27VSS171 BD32VSS172 BD36VSS173 BD40VSS174 BD44VSS175 BD48VSS176 BD52VSS177 BD56VSS178 BD8VSS179 BE5VSS180 BG13

VSS

8 OF 9CPU1H


VSS

8 OF 9CPU1H


VSS181BG17VSS182BG21VSS183BG24VSS184BG28VSS185BG37VSS186BG41VSS187BG45VSS188BG49VSS189BG53VSS190BG9VSS191C29VSS192C35VSS193C40VSS194D10VSS195D14VSS196D18VSS197D22VSS198D26VSS199D29VSS200D35VSS201D4VSS202D40VSS203D43VSS204D46VSS205D50VSS206D54VSS207D58VSS208D6VSS209E25VSS210E29VSS211E3VSS212E35VSS213E40VSS214F13VSS215F15VSS216F19VSS217F29VSS218F35VSS219F40VSS220F55VSS221G51VSS222G6VSS223G61VSS224H10VSS225H14VSS226H17VSS227H21VSS228H4VSS229H53VSS230H58VSS231J1VSS232J49VSS233J55VSS234K11VSS235K21VSS236K51VSS237K8VSS238L16VSS239L20VSS240L22VSS241L26VSS242L30VSS243L34VSS244L38VSS245L43VSS246L48

VSS268 P14VSS269 P16VSS270 P18VSS271 P21VSS272 P58VSS273 P59VSS274 P9VSS275 R17VSS276 R20VSS277 R4VSS278 R46VSS279 T1VSS280 T47VSS281 T50VSS282 T51VSS283 T52VSS284 T53VSS285 T55VSS286 T56VSS287 U13VSS288 U8VSS289 V20VSS290 V61

VSS_NCTF_1#A5 A5VSS_NCTF_2#A57 A57

VSS_NCTF_3#BC61 BC61VSS_NCTF_8#BG5 BG5

VSS_NCTF_9#BG57 BG57VSS_NCTF_10#C3 C3VSS_NCTF_13#E1 E1

VSS_NCTF_14#E61 E61

VSS250 M4VSS251 M58VSS252 M6VSS253 N1VSS254 N17VSS255 N21VSS256 N25VSS257 N28VSS258 N33VSS259 N36VSS260 N40VSS261 N43VSS262 N47VSS263 N48VSS264 N51VSS265 N52VSS266 N56VSS267 N61

VSS247L61VSS248M11

VSS291 W13VSS292 W15VSS293 W18VSS294 W21VSS295 W46VSS296 W8VSS297 Y4VSS298 Y47VSS299 Y58VSS300 Y59

VSS249M15VSS_NCTF_4 BD3VSS_NCTF_5 BD59VSS_NCTF_6 BE4VSS_NCTF_7 BE58

VSS_NCTF_11 C58VSS_NCTF_12 D59

VSS

9 OF 9

NCTF N

CTF TEST PIN：

A5,A57,BC61,BG5

BG57,C3,E1,E61

CPU1I


VSS

9 OF 9

NCTF N

CTF TEST PIN：

A5,A57,BC61,BG5

BG57,C3,E1,E61

CPU1I


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

XDPA3

11 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

XDPA3

11 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

XDPA3

11 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

12 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

12 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

12 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

13 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

13 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

13 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_A_DQS#0

M_A_DQS3

M_A_DQS#5

M_A_DQS4

M_A_DQS#6

M_A_DQS5

M_A_DQS#7

M_A_DQS#1

M_A_DQS6

M_A_DQS0

M_A_DQS#2

M_A_DQS7

M_A_DQS1

M_A_DQS#3

M_A_DQS2

M_A_DQS#4



M_A_A6

M_A_A13M_A_A14M_A_A15

M_A_A12

M_A_A0

M_A_DQ40M_A_DQ41M_A_DQ42M_A_DQ43


M_A_DQ0





M_A_DQ1


M_A_DQ24

M_A_DQ2



M_A_DQ28

M_A_DQ3



M_A_DQ32



M_A_DQ7



SA0_DIMASA1_DIMA

SA0_DIMASA1_DIMA

3D3V_S0

0D75V_S0

M_VREF_DQ_DIMMAM_VREF_CA_DIMMA

1D5V_S3

0D75V_S0

1D5V_S31D5V_S0

DDR_VREF_S3

M_VREF_CA_DIMMA

M_VREF_DQ_DIMMA

DDR_VREF_S3

1D5V_S3

M_A_A[15:0][6]

M_A_BS2[6]

M_A_BS0[6]M_A_BS1[6]

M_A_DQ[63:0][6]

DDR3_DRAMRST#[15,37]

M_A_DIMA_ODT0[6]M_A_DIMA_ODT1[6]

M_A_DQS#[7:0][6]

M_A_DQS[7:0][6]

PCH_SMBCLK [15,20,65,66,69]PCH_SMBDATA [15,20,65,66,69]

M_A_WE# [6]

M_A_DIMA_CS#0 [6]

M_A_CAS# [6]

M_A_DIMA_CKE0 [6]M_A_DIMA_CKE1 [6]

M_A_DIMA_CS#1 [6]



M_A_RAS# [6]

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM1A2

14 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM1A2

14 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM1A2

14 105Friday, March 30, 2012

<Core Design>

Layout Note:Place these capsclose to VREF_DQ

Note:SA0 DIM0 = 0, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA0SO-DIMMA TS Address is 0x30

Layout Note:

Layout Note:For S3 reduction circuit's 1D5V return pass.

SSID = MEMORY

Layout Note:Place these capsclose to VREF_CA

All VREF traces shouldhave width=20mil; spacing=20 mil

Layout Note:Place these Caps near SO-DIMMA.

Layout Note:Place these capsclose to VTT1 andVTT2.

X01 12/02X01 12/15

X01 12/20

X03 2/6

X03 2/6

X03 2/16

X03 2/21

1 2

C1424SCD1U10V2KX-5GP

DYC1424

SCD1U10V2KX-5GP

DY

12

EC14

08SC

D1U1

0V2K

X-5G

PEC

1408

SCD1

U10V

2KX-

5GP

A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279

BA0109BA1108

DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194

DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186

DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188

ODT0116ODT1120

VREF_DQ1

VSS 2

NP1 NP1NP2 NP2

RAS# 110WE# 113

CAS# 115

CS0# 114CS1# 121

CKE0 73CKE1 74

CK0 101CK0# 103

CK1 102CK1# 104

DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187

SDA 200SCL 202

VDDSPD 199

SA0 197SA1 201

VREF_CA126

VDD18 124

NC#1 77NC#2 122

NC#/TEST 125

VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99

VDD10 100

VDD13 111VDD14 112VDD15 117VDD16 118

VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61

VDD1 75

VSS 65VSS 66VSS 71VSS 72

VDD2 76

VDD11 105VDD12 106

VDD17 123

VSS 127VSS 128

VSS 134VSS 133


VSS 151VSS 150

VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168

VSS 173VSS 172

VSS 179VSS 178

VSS 185VSS 184


RESET#30

EVENT# 198

VSS 205VSS 206VTT1203

VTT2204

DM1

DDR3-204P-73-GP

62.10017.U81

3rd = 62.10017.K112nd = 62.10017.P31

4th = 62.10017.N91

DM1

DDR3-204P-73-GP

62.10017.U81

3rd = 62.10017.K112nd = 62.10017.P31

4th = 62.10017.N91

12

C142

0SC

1U6D

3V2K

X-GP

DY C142

0SC

1U6D

3V2K

X-GP

DY

12 C1

426

SCD1

U10V

2KX-

5GP

C142

6SC

D1U1

0V2K

X-5G

P

12 C1

403

SC10

U6D3

V5KX

-1GP

DY C140

3SC

10U6

D3V5

KX-1

GP

DY

12

C1401SCD1U10V2KX-5GP DY


12

EC14

28SC

D1U1

0V2K

X-5G

PEC

1428

SCD1

U10V

2KX-

5GP

12

EC14

06SC

D1U1

0V2K

X-5G

PEC

1406

SCD1

U10V

2KX-

5GP

12

TC14

01ST

330U

2VDM

-4-G

P

DY TC14

01ST

330U

2VDM

-4-G

P

DY

12 C1

411

SCD1

U10V

2KX-

5GP

C141

1SC

D1U1

0V2K

X-5G

P

12

C141

9SC

1U6D

3V2K

X-GP

C141

9SC

1U6D

3V2K

X-GP

12 C1

423

SC2D

2U10

V3KX

-1GPDY

C142

3SC

2D2U

10V3

KX-1

GPDY

12

C141

8SC

1U6D

3V2K

X-GP

C141

8SC

1U6D

3V2K

X-GP

12

R14020R0402-PAD-2-GPR14020R0402-PAD-2-GP

12

C141

7SC

1U6D

3V2K

X-GP

C141

7SC

1U6D

3V2K

X-GP

1 2


DYC1421

SCD1U10V2KX-5GP

DY

12

C141

4SC

D1U1

0V2K

X-5G

PC1

414

SCD1

U10V

2KX-

5GP

12

C141

5SC

D1U1

0V2K

X-5G

PC1

415

SCD1

U10V

2KX-

5GP

12 C1

429

SCD1

U10V

2KX-

5GP

C142

9SC

D1U1

0V2K

X-5G

P

12 C1

427

SCD1

U10V

2KX-

5GP

C142

7SC

D1U1

0V2K

X-5G

P

12

R14050R0402-PAD-2-GPR14050R0402-PAD-2-GP

12

C140

4SC

10U6

D3V5

KX-1

GPC1

404

SC10

U6D3

V5KX

-1GP

12

C141

6SC

1U6D

3V2K

X-GP

C141

6SC

1U6D

3V2K

X-GP

12 C1

405

SC10

U6D3

V5KX

-1GP

C140

5SC

10U6

D3V5

KX-1

GP

12

R14040R0402-PAD-2-GPR14040R0402-PAD-2-GP

12

EC14

07SC

D1U1

0V2K

X-5G

PEC

1407

SCD1

U10V

2KX-

5GP

12

R14010R0402-PAD-2-GP

R14010R0402-PAD-2-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SA1_DIMB

SA0_DIMB

M_B_DQ42M_B_DQ41M_B_DQ40

M_B_DQ43


M_B_DQ15

M_B_DQ0


M_B_DQ47




M_B_DQ1

M_B_DQ53M_B_DQ52

M_B_DQ24

M_B_DQ55M_B_DQ54


M_B_DQ2

M_B_DQ57M_B_DQ56

M_B_DQ59M_B_DQ58


M_B_DQ3


M_B_DQ33M_B_DQ32

M_B_DQ35M_B_DQ34

M_B_DQ5M_B_DQ4

M_B_DQ7M_B_DQ6


M_B_DQ8


M_B_DQS#0

M_B_DQS3

M_B_DQS#5

M_B_DQS4

M_B_DQS#6

M_B_DQS5

M_B_DQS#7

M_B_DQS#1

M_B_DQS6

M_B_DQS0

M_B_DQS#2

M_B_DQS7

M_B_DQS1

M_B_DQS#3

M_B_DQS2

M_B_DQS#4

M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5

M_B_A7M_B_A6

M_B_A11M_B_A10M_B_A9M_B_A8

M_B_A12

M_B_A15M_B_A14M_B_A13

M_B_A0

SA0_DIMBSA1_DIMB

3D3V_S0

3D3V_S0

M_VREF_CA_DIMMBM_VREF_DQ_DIMMB

0D75V_S0

1D5V_S3

1D5V_S3

0D75V_S0

DDR_VREF_S3

M_VREF_CA_DIMMB

M_VREF_DQ_DIMMB

DDR_VREF_S3

M_B_A[15:0][6]

M_B_BS0[6]

M_B_BS2[6]

M_B_BS1[6]M_B_DQ[63:0][6]

M_B_DQS[7:0][6]

M_B_DQS#[7:0][6]

M_B_DIMB_ODT0[6]M_B_DIMB_ODT1[6]

DDR3_DRAMRST#[14,37]


M_B_WE# [6]

M_B_DIMB_CS#0 [6]

M_B_CAS# [6]

M_B_DIMB_CKE0 [6]M_B_DIMB_CKE1 [6]

M_B_DIMB_CS#1 [6]



M_B_RAS# [6]

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM2A2

15 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM2A2

15 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

DDR3-SODIMM2A2

15 105Friday, March 30, 2012

<Core Design>

Layout Note:

Layout Note:Place these capsclose to VREF_DQ

Layout Note:Place these capsclose to VTT1 andVTT2.

Layout Note:

SSID = MEMORY

All VREF traces shouldhave width=20mil; spacing=20 mil

Place these capsclose to VREF_CA

Note:SO-DIMMB SPD Address is 0xA4SO-DIMMB TS Address is 0x34

Layout Note:Place these Caps near SO-DIMMA.

X01 12/13 X01 12/15

X01 12/20

X01 01/09

X03 2/6

X03 2/6

X03 02/16

X03 2/16

12

EC15

24SC

D1U1

0V2K

X-5G

PEC

1524

SCD1

U10V

2KX-

5GP

12

C151

8SC

1U6D

3V2K

X-GP

DY C151

8SC

1U6D

3V2K

X-GP

DY

12

C150

4SC

10U1

0V5Z

Y-1G

P

DY C150

4SC

10U1

0V5Z

Y-1G

P

DY

12

R15030R0402-PAD-2-GPR15030R0402-PAD-2-GP

12

C151

9SC

1U6D

3V2K

X-GP

C151

9SC

1U6D

3V2K

X-GP

12

C150

9SC

10U6

D3V5

KX-1

GPC1

509

SC10

U6D3

V5KX

-1GP

12 C1

516

SC2D

2U10

V3KX

-1GPDY

C151

6SC

2D2U

10V3

KX-1

GPDY

12


DYC1501SCD1U10V2KX-5GP

DY

12

C151

1SC

D1U1

0V2K

X-5G

PC1

511

SCD1

U10V

2KX-

5GP

12

C151

0SC

10U6

D3V5

KX-1

GPC1

510

SC10

U6D3

V5KX

-1GP

12 C1

517

SCD1

U10V

2KX-

5GP

C151

7SC

D1U1

0V2K

X-5G

P

12

C151

3

SCD1

U10V

2KX-

5GP

C151

3

SCD1

U10V

2KX-

5GP

12 C1

515

SCD1

U10V

2KX-

5GP

C151

5SC

D1U1

0V2K

X-5G

P

12

R15050R0402-PAD-2-GPR15050R0402-PAD-2-GP

12

C152

1SC

1U6D

3V2K

X-GP

C152

1SC

1U6D

3V2K

X-GP

12 C1

523

SCD1

U10V

2KX-

5GP

C152

3SC

D1U1

0V2K

X-5G

P

12 C1

522

SCD1

U10V

2KX-

5GP

C152

2SC

D1U1

0V2K

X-5G

P

12

EC15

14SC

D1U1

0V2K

X-5G

PEC

1514

SCD1

U10V

2KX-

5GP

12

C150

3SC

10U1

0V5Z

Y-1G

P

DY C150

3SC

10U1

0V5Z

Y-1G

P

DY

12

C151

2SC

D1U1

0V2K

X-5G

PC1

512

SCD1

U10V

2KX-

5GP

12

C150

7SC

10U6

D3V5

KX-1

GP

DY C150

7SC

10U6

D3V5

KX-1

GP

DY

12

R150110KR2J-3-GPR150110KR2J-3-GP

A098A197A296A395A492A591A690A786A889A985A10/AP107A1184A1283A13119A1480A1578A16/BA279

BA0109BA1108

DQ05DQ17DQ215DQ317DQ44DQ56DQ616DQ718DQ821DQ923DQ1033DQ1135DQ1222DQ1324DQ1434DQ1536DQ1639DQ1741DQ1851DQ1953DQ2040DQ2142DQ2250DQ2352DQ2457DQ2559DQ2667DQ2769DQ2856DQ2958DQ3068DQ3170DQ32129DQ33131DQ34141DQ35143DQ36130DQ37132DQ38140DQ39142DQ40147DQ41149DQ42157DQ43159DQ44146DQ45148DQ46158DQ47160DQ48163DQ49165DQ50175DQ51177DQ52164DQ53166DQ54174DQ55176DQ56181DQ57183DQ58191DQ59193DQ60180DQ61182DQ62192DQ63194

DQS0#10DQS1#27DQS2#45DQS3#62DQS4#135DQS5#152DQS6#169DQS7#186

DQS012DQS129DQS247DQS364DQS4137DQS5154DQS6171DQS7188

ODT0116ODT1120

VREF_DQ1

VSS 2

NP1 NP1NP2 NP2

RAS# 110WE# 113

CAS# 115

CS0# 114CS1# 121

CKE0 73CKE1 74

CK0 101CK0# 103

CK1 102CK1# 104

DM0 11DM1 28DM2 46DM3 63DM4 136DM5 153DM6 170DM7 187

SDA 200SCL 202

VDDSPD 199

SA0 197SA1 201

VREF_CA126

VDD18 124

NC#1 77NC#2 122

NC#/TEST 125

VDD3 81VDD4 82VDD5 87VDD6 88VDD7 93VDD8 94VDD9 99

VDD10 100

VDD13 111VDD14 112VDD15 117VDD16 118

VSS 3VSS 8VSS 9VSS 13VSS 14VSS 19VSS 20VSS 25VSS 26VSS 31VSS 32VSS 37VSS 38VSS 43VSS 44VSS 48VSS 49VSS 54VSS 55VSS 60VSS 61

VDD1 75


VDD2 76

VDD11 105VDD12 106

VDD17 123

VSS 127VSS 128

VSS 134VSS 133


VSS 151VSS 150

VSS 155VSS 156VSS 161VSS 162VSS 167VSS 168

VSS 173VSS 172

VSS 179VSS 178

VSS 185VSS 184


RESET#30

EVENT# 198

VSS 205VSS 206VTT1203

VTT2204

DM2

DDR3-204P-75-GP

62.10017.Z81

3rd = 62.10017.P612nd = 62.10017.N41

4th = 62.10017.P41

DM2

DDR3-204P-75-GP

62.10017.Z81

3rd = 62.10017.P612nd = 62.10017.N41

4th = 62.10017.P41

12

R15020R0402-PAD-2-GPR15020R0402-PAD-2-GP

12 C1

508

SC10

U6D3

V5KX

-1GP

DY C150

8SC

10U6

D3V5

KX-1

GP

DY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

16 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

16 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

16 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LVDS_VBGLVDS_IBG

DAC_IREF_R

LVDS_VDD_EN

L_CTRL_DATA

L_CTRL_DATAL_CTRL_CLK

LVDS_DDC_CLK_RLVDS_DDC_DATA_R

L_BKLT_EN

L_CTRL_CLK

CRT_DDCDATACRT_DDCCLK

3D3V_S0

3D3V_S0

3D3V_S0

LVDS_DDC_CLK_R[49]LVDS_DDC_DATA_R[49]

LVDSA_DATA0[49]LVDSA_DATA1[49]LVDSA_DATA2[49]

LVDSA_DATA0#[49]LVDSA_DATA1#[49]LVDSA_DATA2#[49]

LVDSA_CLK#[49]LVDSA_CLK[49]

L_BKLT_CTRL[49]

LVDS_VDD_EN[49]L_BKLT_EN[27]

HDMI_PCH_DET [51]

PCH_HDMI_CLK [51]PCH_HDMI_DATA [51]

HDMI_DATA0_R [51]HDMI_DATA0_R# [51]

HDMI_CLK_R [51]

HDMI_DATA1_R [51]

HDMI_CLK_R# [51]

HDMI_DATA1_R# [51]HDMI_DATA2_R [51]HDMI_DATA2_R# [51]

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (LVDS/CRT/DDI)A3

17 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


17 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


17 105Friday, March 30, 2012

<Core Design>

Layout Note:Place near PCH; trace to trace spacing=20mil

Layout Note:

SSID = PCH

LVDS signal tracelength max 4000mil

Layout Note: HDMI trace length to DC CAP. max 10000milLayout Note:

Close HDMI portLayout Note:

Place near PCH; trace to trace spacing=30mil

12 3

4

RN1702

SRN100KJ-6-GP

RN1702

SRN100KJ-6-GP

12 3

4RN1701

SRN2K2J-1-GP

RN1701

SRN2K2J-1-GP

12

R17021KR2J-1-GP

R17021KR2J-1-GP

12

R17012K37R2F-GPR17012K37R2F-GP


123 4

RN1707SRN2K2J-1-GP

RN1707SRN2K2J-1-GP

L_BKLTCTLP45

L_BKLTENJ47

L_CTRL_CLKT45L_CTRL_DATAP39

L_DDC_CLKT40L_DDC_DATAK47

L_VDD_ENM45

LVDSA_CLK#AK39LVDSA_CLKAK40

LVDSA_DATA#0AN48LVDSA_DATA#1AM47LVDSA_DATA#2AK47LVDSA_DATA#3AJ48

LVDSA_DATA0AN47LVDSA_DATA1AM49LVDSA_DATA2AK49LVDSA_DATA3AJ47

LVDSB_CLK#AF40LVDSB_CLKAF39

LVDSB_DATA#0AH45LVDSB_DATA#1AH47LVDSB_DATA#2AF49LVDSB_DATA#3AF45

LVDSB_DATA0AH43

DDPB_0N AV42

DDPB_1N AV45

LVD_VREFHAE48LVD_VREFLAE47

DDPD_2N BF42

DDPD_3N BJ42

DDPB_2N AU48

DDPB_3N AV47

DDPC_0N AY47

DDPC_1N AY43

DDPC_2N BA47

DDPC_3N BB47

DDPD_0N BB43

DDPD_1N BF44

DDPB_0P AV40

DDPB_1P AV46

DDPD_2P BE42

DDPD_3P BG42

DDPB_2P AU47

DDPB_3P AV49

LVDSB_DATA1AH49LVDSB_DATA2AF47LVDSB_DATA3AF43

LVD_IBGAF37LVD_VBGAF36

DDPC_1P AY45DDPC_0P AY49

DDPC_2P BA48

DDPC_3P BB49

DDPD_0P BB45

DDPD_1P BE44

CRT_BLUEN48

CRT_DDC_CLKT39CRT_DDC_DATAM40

CRT_GREENP49

CRT_HSYNCM47

CRT_IRTNT42

CRT_REDT49

CRT_VSYNCM49

DAC_IREFT43

SDVO_CTRLCLK P38SDVO_CTRLDATA M39

DDPC_CTRLCLK P46DDPC_CTRLDATA P42

DDPD_CTRLCLK M43DDPD_CTRLDATA M36

DDPB_AUXN AT49

DDPC_AUXN AP47

DDPD_AUXN AT45

DDPB_AUXP AT47

DDPC_AUXP AP49

DDPD_AUXP AT43

DDPB_HPD AT40

DDPC_HPD AT38

DDPD_HPD BH41

SDVO_TVCLKINP AP45SDVO_TVCLKINN AP43

SDVO_STALLP AM40SDVO_STALLN AM42

SDVO_INTP AP40SDVO_INTN AP39

LVDS

Digital Display Interface

CRT

4 OF 10PCH1D

PANTHER-GP-NF71.PANTH.00U

LVDS

Digital Display Interface

CRT

4 OF 10PCH1D


123 4

RN1706SRN2K2J-1-GP

RN1706SRN2K2J-1-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INT_PIRQB#

USB_OC#2_3

USB_OC#8_9

USB_OC#12_13

USB_OC#6_7

BBS_BIT1

CLK_PCI_FB_RCLK_PCI_KBC_R

BBS_BIT1

INT_PIRQB#INT_PIRQC#INT_PIRQD#

INT_PIRQA#

PCH_GPIO53

PCI_PLTRST#

PCI_GNT3#

PCI_PME#

PCH_GPIO54

USB_OC#8_9USB_OC#6_7USB_OC#12_13

BBS_BIT0

USB_OC#10_11USB_OC#0_1

PCI_PLTRST#

PCI_GNT3#

USB_RBIAS

USB_OC#4_5

USB_OC#4_5

USB_OC#2_3

BLUETOOTH_EN

PCH_GPIO05INT_PIRQC#INT_PIRQA#

INT_PIRQD#SATA_ODD_DA#

PCH_GPIO54

PCH_GPIO05

USB_OC#10_11

PCH_GPIO50PCH_GPIO52

USB_OC#0_1

USB3_TX1_N

USB3_TX1_P

PCH_GPIO02

CLK_PCI_LPC_R

USB3_TX2_N

USB3_TX2_P

USB3_RX1_NUSB3_RX2_N

USB3_RX1_PUSB3_RX2_P

PCH_GPIO52

PCH_GPIO50

PCH_GPIO14

PCH_GPIO02

PCH_GPIO14

3D3V_S5

3D3V_S5

3D3V_S0

3D3V_S0

3D3V_S0

CLK_PCI_FB[20]CLK_PCI_LPC[71]

CLK_PCI_KBC[27]

USB_PN12 [49]USB_PP12 [49]

PLT_RST#[5,27,31,65,66,71]

USB_PN11 [65]USB_PP11 [65]

USB_PN1 [82]USB_PP1 [82]



BBS_BIT0 [21]

SATA_ODD_DA#[56]

USB_PP10 [82]USB_PN10 [82]

USB_OC#0_1 [62,82]

BLUETOOTH_EN[65]

USB3_RX2_P[82]

USB3_TX2_P[82]

USB3_RX2_N[82]

USB3_TX2_N[82]USB3_TX1_N[62]

USB3_RX1_P[62]

USB3_TX1_P[62]

USB3_RX1_N[62]


Title


Date: Sheet of


BMW Z4 DIS A00

PCH (PCI/USB/NVRAM)A3

18 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


18 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


18 105Friday, March 30, 2012

<Core Design>

SSID = PCH

A16 Swap Override jumper

PCI_GNT#3 Low = A16 swap override/Top-BlockSwap Override enabledHigh = Default

1. USB Ext. port 9 (HS) External debug port use on Chief River platform.2. 2011 July; Microsoft will support USB3.0 debug--> Port1 useable.

USB 3.0 Port USB 2.0 port

Layout Note:1. USBRBIAS/# use 50ohm single-ended impedance spacing to other signal=15mil2. Length < 500mil

USB3.0/2.0 Mapping Table

USB2.0 Signal GroupPort 0

Port 1

Port 2

Port 3

Port 1

Port 2

Port 3

Port 4

USB Table

0

Boot BIOS LocationSATA1GP/GPIO19

Boot Bios Strap

0 0

GNT1#/GPIO51

10

1

1 1

LPC

Reserved

Reserved

SPI(Default)

1312

NC

WLAN

NC

10

0

11

Pair

45

23

1

Device

6789

Card reader

CAMERA

USB3.0 port2

WWAN

USB3.0 port1, with Power Share

NC

NC

Touch Panel

Layout Note:Trace Length :PCH ~~9000mil~~Cap~~1000mil~~CONN

NC

NC

NC

X01 12/13X01 12/20

X02 2/13

12

R1816100KR2J-1-GPDY

R1816100KR2J-1-GPDY

12

EC1804

SC4D

7P50

V2CN

-1G

PDYEC1804

SC4D

7P50

V2CN

-1G

PDY


12

R18014K7R2J-2-GP

DYR18014K7R2J-2-GP

DY

12345 6

78910

RN1802SRN8K2J-2-GP-URN1802SRN8K2J-2-GP-U

12345 6

78910

RN1801SRN8K2J-2-GP-URN1801SRN8K2J-2-GP-U

1 2R181122D6R2F-L1-GPR181122D6R2F-L1-GP


1 2ER1807 0R2J-2-GPDYER1807 0R2J-2-GPDY


12345

678

RN1803SRN10KJ-6-GP

RN1803SRN10KJ-6-GP


1 2

R18230R0402-PAD-2-GP

R18230R0402-PAD-2-GP

1 2R1805 22R2J-2-GPR1805 22R2J-2-GP

12

C1801SC220P50V2KX-3GP

DY


DY

12

EC1802

SC4D

7P50

V2CN

-1G

P DYEC1802

SC4D

7P50

V2CN

-1G

P DY

1 2R1806 22R2J-2-GPR1806 22R2J-2-GP

RSVD23 AV5

RSVD1 AY7RSVD2 AV7RSVD3 AU3RSVD4 BG4

RSVD5 AT10RSVD6 BC8

RSVD7 AU2RSVD8 AT4

RSVD17 BB5RSVD18 BB3RSVD19 BB7RSVD20 BE8RSVD21 BD4RSVD22 BF6

RSVD9 AT3RSVD10 AT1RSVD11 AY3RSVD12 AT5RSVD13 AV3RSVD14 AV1RSVD15 BB1RSVD16 BA3

RSVD25 AT8RSVD24 AV10

RSVD26 AY5RSVD27 BA2

RSVD28 AT12RSVD29 BF3

PIRQA#K40PIRQB#K38PIRQC#H38PIRQD#G38

REQ1#/GPIO50C46REQ2#/GPIO52C44REQ3#/GPIO54E40

GNT1#/GPIO51D47GNT2#/GPIO53E42GNT3#/GPIO55F46

PIRQE#/GPIO2G42PIRQF#/GPIO3G40PIRQG#/GPIO4C42PIRQH#/GPIO5D44

USBP0N C24USBP0P A24USBP1N C25USBP1P B25USBP2N C26USBP2P A26USBP3N K28USBP3P H28USBP4N E28USBP4P D28USBP5N C28USBP5P A28USBP6N C29USBP6P B29USBP7N N28USBP7P M28USBP8N L30USBP8P K30USBP9N G30USBP9P E30

USBP10N C30USBP10P A30USBP11N L32USBP11P K32USBP12N G32USBP12P E32USBP13N C32USBP13P A32

PME#K10

CLKOUT_PCI0H49CLKOUT_PCI1H43CLKOUT_PCI2J48

USBRBIAS# C33

USBRBIAS B33

OC0#/GPIO59 A14OC1#/GPIO40 K20OC2#/GPIO41 B17OC3#/GPIO42 C16OC4#/GPIO43 L16OC5#/GPIO9 A16

OC6#/GPIO10 D14OC7#/GPIO14 C14CLKOUT_PCI4H40 CLKOUT_PCI3K42

PLTRST#C6

TP1BG26TP2BJ26TP3BH25

TP6AH38TP7AH37TP8AK43TP9AK45

TP16Y13TP17K24TP18L24TP19AB46TP20AB45

TP21B21TP22M20TP23AY16

USB3RN1BE28USB3RN2BC30USB3RN3BE32USB3RN4BJ32USB3RP1BC28USB3RP2BE30USB3RP3BF32USB3RP4BG32USB3TN1AV26USB3TN2BB26USB3TN3AU28USB3TN4AY30USB3TP1AU26USB3TP2AY26USB3TP3AV28USB3TP4AW30

TP4BJ16TP5BG16

TP15AM5 TP14AM4 TP13AH12 TP12H3 TP11N30 TP10C18

TP24BG46

RSVD

PCI

USB

5 OF 10PCH1E

PANTHER-GP-NF

RSVD

PCI

USB

5 OF 10PCH1E

PANTHER-GP-NF

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BATLOW#

PM_CLKRUN#

DMI_TXP0DMI_TXP1DMI_TXP2DMI_TXP3

DMI_TXN0DMI_TXN1DMI_TXN2DMI_TXN3

PM_PWRBTN#

DMI_RXN2DMI_RXN3

SUS_PWR_ACK

H_PM_SYNC

PCH_WAKE#

DSWODVREN

PM_SUS_STAT#

SUS_CLK

PM_SLP_A#

PM_SLP_SUS#

PM_SLP_S3#

PM_SLP_S4#

PM_SLP_S5#

PM_SLP_LAN#

FDI_INT

DSWODVREN

PM_RSMRST#

DMI_RXP0DMI_RXP1DMI_RXP2DMI_RXP3

DMI_RXN0

PM_RI#

DMI_RXN1

AC_PRESENT

PM_SLP_LAN#

FDI_TXN0

FDI_TXN6

FDI_TXN4

FDI_TXN2

FDI_TXN5

FDI_TXN7

FDI_TXN3

FDI_TXN1

FDI_TXP0

FDI_TXP4

FDI_TXP6

FDI_TXP2

FDI_TXP5

FDI_TXP7

FDI_TXP3

FDI_TXP1

FDI_FSYNC1

FDI_LSYNC0

FDI_FSYNC0

FDI_LSYNC1

PM_RSMRST#

PCH_SUSCLK_KBC

RBIAS_CPY

SUSACK#

PWROK

DMI_COMP_R

PWROKSYS_PWROK

PM_RSMRST#

SUS_PWR_ACK

BATLOW#PM_RI#

AC_PRESENT

PCH_WAKE#

MEPWROK

PCH_DPWROK

PM_CLKRUN#

RTC_AUX_S5

3D3V_S5

3D3V_S0

RTC_AUX_S5

1D05V_PCH

3D3V_S0

PM_SLP_S4# [27,46]

PM_SLP_S3# [27,36,37,47]

PCH_SUSCLK_KBC [27]

PM_PWRBTN#[27]

AC_PRESENT[27]

FDI_FSYNC1 [4]

FDI_LSYNC0 [4]

FDI_INT [4]

FDI_FSYNC0 [4]

FDI_LSYNC1 [4]

S0_PWR_GOOD[27,36]

RUNPWROK[45,46,47]

XDP_DBRESET#[5]

SYS_PWROK[36]

PM_DRAM_PWRGD[37]

RSMRST#_KBC[27]

H_PM_SYNC [5]

FDI_TXN[7:0] [4]

FDI_TXP[7:0] [4]

DMI_RXN[3:0][4]

DMI_TXN[3:0][4]

DMI_RXP[3:0][4]

DMI_TXP[3:0][4]

PM_CLKRUN#_EC [27]

PCH_WAKE#_EC [27]

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (DM I/FDI/PM)A3

19 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (DM I/FDI/PM)A3

19 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (DM I/FDI/PM)A3

19 105Friday, March 30, 2012

<Core Design>

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

LOW Disabled

SSID = PCH

DMI_ZCOMP keep W=4 mils androuting length less than 500mils.DMI_IRCOMP keep W=4 mils androuting length less than 500mils.

Layout Note:

Sequence: S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

X03 2/6

X03 2/6X03 2/6

X02 2/6

X03 2/13

X03 2/6

1 2R1911 10KR2J-3-GPDYR1911 10KR2J-3-GPDY

1 2R1925 0R0402-PAD-2-GPR1925 0R0402-PAD-2-GP

1 2R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP

12R1920 10KR2J-3-GPDYR1920 10KR2J-3-GPDY

1 2R1929 0R0402-PAD-2-GPR1929 0R0402-PAD-2-GP

1 2R1902 750R2F-GPR1902 750R2F-GP

12R1908 10KR2J-3-GPR1908 10KR2J-3-GP


1 2R1910 0R2J-2-GPDYR1910 0R2J-2-GPDY

DMI0RXNBC24DMI1RXNBE20DMI2RXNBG18DMI3RXNBG20

DMI0RXPBE24DMI1RXPBC20DMI2RXPBJ18DMI3RXPBJ20

DMI0TXNAW24DMI1TXNAW20DMI2TXNBB18DMI3TXNAV18

DMI0TXPAY24DMI1TXPAY20DMI2TXPAY18DMI3TXPAU18

DMI_ZCOMPBJ24

DMI_IRCOMPBG25

FDI_RXN0 BJ14FDI_RXN1 AY14FDI_RXN2 BE14FDI_RXN3 BH13FDI_RXN4 BC12FDI_RXN5 BJ12FDI_RXN6 BG10FDI_RXN7 BG9

FDI_RXP0 BG14FDI_RXP1 BB14FDI_RXP2 BF14FDI_RXP3 BG13FDI_RXP4 BE12FDI_RXP5 BG12FDI_RXP6 BJ10FDI_RXP7 BH9

FDI_FSYNC0 AV12

FDI_FSYNC1 BC10

FDI_LSYNC0 AV14

FDI_LSYNC1 BB10

FDI_INT AW16

PMSYNCH AP14

SLP_SUS# G16

SLP_S3# F4

SLP_S4# H4

SLP_S5#/GPIO63 D10

SYS_RESET#K3

SYS_PWROKP12

PWRBTN#E20

RI#A10

WAKE# B9

SUS_STAT#/GPIO61 G8

SUSCLK/GPIO62 N14

ACPRESENT/GPIO31H20

BATLOW#/GPIO72E10

PWROKL22

CLKRUN#/GPIO32 N3

SUSWARN#/SUSPWRDNACK/GPIO30K16

RSMRST#C21

DRAMPWROKB13

SLP_LAN#/GPIO29 K14

APWROKL10

DPWROK E22

DMI2RBIASBH21

SLP_A# G10

DSWVRMEN A18

SUSACK#C12

DMI

FDI

System Power Management

3 OF 10PCH1C


DMI

FDI

System Power Management

3 OF 10PCH1C



1 2R1901 49D9R2F-GPR1901 49D9R2F-GP



1 2R1904 100KR2J-1-GPR1904 100KR2J-1-GP


1 2R1909 100KR2J-1-GPR1909 100KR2J-1-GP

12345

678

RN1901

SRN10KJ-6-GP

RN1901

SRN10KJ-6-GP

1 2R1921

0R0402-PAD-2-GPR1921

0R0402-PAD-2-GP

1 2R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2R1924

0R0402-PAD-2-GPR1924

0R0402-PAD-2-GP

12

EC1901SC4D7P50V2CN-1GP DYEC1901SC4D7P50V2CN-1GP DY

1 2R1916 0R0402-PAD-2-GPR1916 0R0402-PAD-2-GP

1 2R1905 10KR2J-3-GPR1905 10KR2J-3-GP

1 2R1907 0R2J-2-GPDYR1907 0R2J-2-GPDY


1 2R1927 0R0402-PAD-2-GPR1927 0R0402-PAD-2-GP


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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XTAL25_IN

PCIE_CLK_REQ6#

CLK_BUF_EXP_NCLK_BUF_EXP_P

SMB_CLK

XTAL25_OUT

CLK_BUF_CKSSCD_P

XTAL25_IN

XTAL25_OUT

CLK_PCI_FB

EC_SWI#

PCH_GPIO74

PCIE_CLK_REQ2#

CLKOUT_PEG_A_NCLKOUT_PEG_A_P

DRAMRST_CNTRL_PCH

PCIE_CLK_REQ6#

PCIE_CLK_XDP_P_RPCIE_CLK_XDP_N_R

CLK_PCH_SRC3_PCLK_PCH_SRC3_N

SML1_CLK

PEG_CLKREQ#_R

SML1_DATA

PCH_GPIO74

DRAMRST_CNTRL_PCH

SMB_DATA

XCLK_RCOMP

CLK_BUF_REF14

SML0_DATASML0_CLK

CL_CLK

CL_DATA

CL_RST#

SMB_DATA

SML0_CLK

PCIE_TXP4_CPCIE_TXN4_C

SML1_DATASML1_CLK

CLK_BUF_DOT96_PCLK_BUF_DOT96_N

CLK_BUF_CKSSCD_N

SMB_CLK

PEG_CLKREQ#_R

SML0_DATA

CLK_PCIE_REQ7#

SMB_CLK

SMB_DATA

CLK_BUF_CPYCLK_NCLK_BUF_CPYCLK_P

BOARD_ID1

JTAG_TCK

CLK_27M_VGA_R

BOARD_ID1BOARD_ID2

CLK_PCIE_REQ1#PCIE_CLK_REQ2#

CLK_PCIE_REQ1#

PCIE_CLK_REQ4#

PCIE_TXP6_CPCIE_TXN6_C

PCIE_CLK_REQ4#

EC_SWI#

CLK_PCIE_REQ7#PCIE_CLK_LAN_REQ#

CLK_PCIE_WLAN_REQ#PCIE_CLK_REQ0#

PCIE_CLK_REQ0#

CLK_PCH_SRC5_NCLK_PCH_SRC5_P

CLKOUT_DMI_NCLKOUT_DMI_P

CARD_READER_48M

CLK_PEG_B_REQ#

CLK_PEG_B_REQ#

+VCCDIFFCLKN

3D3V_S0

3D3V_S5

3D3V_S0

3D3V_S0

3D3V_S53D3V_S5

CLK_PCI_FB [18]

PCH_SMBDATA [14,15,65,66,69]

PCH_SMBCLK [14,15,65,66,69]

CLK_PCIE_VGA# [83]CLK_PCIE_VGA [83]

SML1_DATA [27,28,85]

SML1_CLK [27,28,85]

PEG_CLKREQ# [85]

CLK_EXP_N [5]CLK_EXP_P [5]

CLK_PCIE_WLAN#[65]CLK_PCIE_WLAN[65]

CLK_PCIE_WLAN_REQ#[65]

PCIE_CLK_LAN_REQ#[31]

CLK_PCIE_LAN[31]CLK_PCIE_LAN#[31]

BOARD_ID2[22]

PCIE_RXN6[31]PCIE_RXP6[31]

PCIE_TXP6[31]PCIE_TXN6[31]

PCIE_RXN4[65]PCIE_RXP4[65]PCIE_TXN4[65]PCIE_TXP4[65]

DRAMRST_CNTRL_PCH [37]

EC_SWI# [27]

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (PCI-E/SMBUS/CLOCK/CL)A3

20 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


20 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


20 105Friday, March 30, 2012

<Core Design>

SSID = PCH

LAN

WLAN

CRB : 1KCEKLT: 10K

S0 power rail CLKREQ#:PCIECLKRQ[2:1]#PCIE_CLK_RQ1#

PCIE_CLK_RQ3#PCIE_CLK_RQ0#

PCIE_CLK_RQ7#

PCIE_CLK_RQ4#

PCIE_CLK_RQ5#

PCIE_CLK_RQ2#

PCIE_CLK_RQ6#

S5 power rail CLKREQ#:PCIECLKRQ[0]#PCIECLKRQ[7:3]#

Layout Note:CLKOUT termination place close to PCH <500mil

NC

WLAN CLK

LANCLK

Layout Note:CLKOUT termination place close to PCH <500mil

0

Optimus(NV)

PX(AMD)

1

BOARD_ID2

UMA

BIOS UMA/DIS Strap pin

BOARD_ID1

DIS

1

0 0

0

1

1

Layout trace < 14000milLayout Note:

Layout Note:Layout trace < 14000mil

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

Layout Note:Can Place Far away PCH

Layout Note: 1500mil < Layout trace < 10000mil

X01 12/09

X01 12/09

X01 12/09

X01 12/09

X01 12/09

X02 2/6A00 3/23

A00 3/23

12 3

4RN2018

SRN10KJ-5-GP

RN2018

SRN10KJ-5-GP

1 2R2009 1KR2J-1-GPR2009 1KR2J-1-GP

12

R201010KR2J-3-GP

R201010KR2J-3-GP


12 3

4

RN

0R4P2R-PADRN2017

RN

0R4P2R-PADRN2017

12

R201310KR2J-3-GP UMAR201310KR2J-3-GP UMA

12 3

4RN2008SRN10KJ-5-GP

RN2008SRN10KJ-5-GP

12

R200410KR2J-3-GPUMA R200410KR2J-3-GPUMA

1 TP2003 TPAD14-OP-GPTP2003 TPAD14-OP-GP1 2

C2008SC15P50V2JN-2-GP


1 2C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP


1 2R200810KR2J-3-GP

R200810KR2J-3-GP

1 2R2007

90D9R2F-1-GP

R2007

90D9R2F-1-GP


1 2R2011 10KR2J-3-GPR2011 10KR2J-3-GP

41

2 3

X2001

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G61

X2001

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G61

12

R201210KR2J-3-GP SG

R201210KR2J-3-GP SG




12 3

4

RN

0R4P2R-PADRN2014

RN

0R4P2R-PADRN2014

12 3

4RN2019SRN10KJ-5-GP

RN2019SRN10KJ-5-GP


1234 5

678

RN2002

SRN10KJ-6-GP

RN2002

SRN10KJ-6-GP

12 3

4RN2021SRN10KJ-5-GP

RN2021SRN10KJ-5-GP

1234 5

678 RN2004

SRN2K2J-2-GPRN2004SRN2K2J-2-GP

12 3

4RN2020SRN10KJ-5-GP

RN2020SRN10KJ-5-GP

12 3

4

RN

0R4P2R-PADRN2012

RN

0R4P2R-PADRN2012

12

R20061M1R2J-GP

R20061M1R2J-GP

12 3

4RN2016

SRN0J-6-GPSG

RN2016

SRN0J-6-GPSG



1 2



1

2

34

5

6

Q20012N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3FQ2001

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3F

12


1234 5

678

RN2001

SRN10KJ-6-GP

RN2001

SRN10KJ-6-GPPERN1BG34PERP1BJ34

PERN2BE34PERP2BF34

PERN3BG36PERP3BJ36

PERN4BF36PERP4BE36

PERN5BG37PERP5BH37

PERN6BJ38PERP6BG38

PERN7BG40PERP7BJ40

PERN8BE38PERP8BC38

PETN1AV32PETP1AU32

PETN2BB32PETP2AY32

PETN3AV34PETP3AU34

PETN4AY34PETP4BB34

PETN5AY36PETP5BB36

PETN6AU36PETP6AV36

PETN7AY40PETP7BB40

PETN8AW38PETP8AY38

CLKOUT_PCIE0NY40CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48CLKOUT_PCIE2PAA47



CLKOUT_PCIE5NV45CLKOUT_PCIE5PV46

CLKIN_GND1_N BJ30CLKIN_GND1_P BG30

CLKIN_DMI_N BF18CLKIN_DMI_P BE18

CLKIN_DOT_96N G24CLKIN_DOT_96P E24

CLKIN_SATA_N AK7CLKIN_SATA_P AK5

XTAL25_IN V47XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ#/GPIO47 M10

PCIECLKRQ0#/GPIO73J2

PCIECLKRQ1#/GPIO18M1

PCIECLKRQ2#/GPIO20V10

PCIECLKRQ3#/GPIO25A8

PCIECLKRQ4#/GPIO26L12

PCIECLKRQ5#/GPIO44L14

CLKOUTFLEX0/GPIO64 K43

CLKOUTFLEX1/GPIO65 F47

CLKOUTFLEX2/GPIO66 H47

CLKOUTFLEX3/GPIO67 K49

CLKOUT_DMI_N AV22CLKOUT_DMI_P AU22

PEG_B_CLKRQ#/GPIO56E6CLKOUT_PEG_B_PAB40 CLKOUT_PEG_B_NAB42

XCLK_RCOMP Y47

CLKOUT_DP_P AM13CLKOUT_DP_N AM12


PCIECLKRQ7#/GPIO46K12


CLKOUT_ITPXDP_NAK14CLKOUT_ITPXDP_PAK13

SMBALERT#/GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT#/GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT#/PCHHOT#/GPIO74 C13

SML1CLK/GPIO58 E14

SML1DATA/GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6#/GPIO45T13

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

2 OF 10PCH1B


PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

2 OF 10PCH1B


12 3

4

RN2007

SRN2K2J-1-GP

RN2007

SRN2K2J-1-GP

1 2

R20030R2J-2-GP

DY

R20030R2J-2-GP

DY

123

4 RN2003SRN2K2J-1-GPRN2003SRN2K2J-1-GP


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_JTAG_TMS

HDA_BITCLK

HDA_RST#

HDA_SYNC

PCH_JTAG_TDI

SATA_LED#

PCH_GPIO21

LPC_AD0LPC_AD1LPC_AD2LPC_AD3

INT_SERIRQ

PCH_JTAG_TDO

RBIAS_SATA3

SATA_COMP

PCH_GPIO21

PCH_JTAG_TCK_BUF

RTC_X2

SM_INTRUDER#

RTC_X2

RTC_X1

SRTC_RST#

PCH_INTVRMEN

BBS_BIT0

RTC_X1

RTC_RST#

SATA3_COMP

HDA_SPKR

HDA_RST#

HDA_SDOUT

HDA_BITCLKHDA_SDOUT

PCH_GPIO33

HDA_SYNC

PCH_SPI_CLK

PCH_SPI_SI

PCH_SPI_CS0#

HDA_CODEC_BITCLK HDA_CODEC_SDOUT

HDA_SYNC

HDA_CODEC_SYNC_R

PCH_GPIO13

LPC_LAD1_PCHLPC_LAD2_PCH

LPC_LAD0_PCH

LPC_LAD3_PCH

LPC_LFRAME#_PCH

LPC_AD[3..0]

PCH_SPI_SO

RTC_AUX_S5

RTC_AUX_S5

1D05V_PCH

3D3V_S0

1D05V_PCH

3D3V_S0

+3VS_+1.5VS_HDA_IO

3D3V_S5

BBS_BIT0 [18]

HDA_SPKR[82]

LPC_AD[3..0] [27,71]

HDA_SDIN0[82]

SPI_CS0#_R[27,60]

SPI_SO_R[27,60]

SPI_SI_R[27,60]

SPI_CLK_R[27,60]

SATA_LED# [68]

ME_UNLOCK[27]

LPC_FRAME# [27,71]

HDA_CODEC_BITCLK[82]

HDA_CODEC_RST#[82]

HDA_CODEC_SDOUT[82]

SATA_RXN0 [56]SATA_RXP0 [56]SATA_TXN0 [56]SATA_TXP0 [56]


KB_DET# [69]


HDA_CODEC_SYNC[82]

RUN_ENABLE[36,37]

INT_SERIRQ [27]

RTCRST_ON[27]

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (SPI/RTC/LPC/SATA/IHDA)A3

21 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


21 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


21 105Friday, March 30, 2012

<Core Design>

SSID = PCH

No Reboot Strap

HDA_SPKRLow = DefaultHigh = No Reboot

HDA_SDOUTLow = DefaultHigh = Enable

Flash Descriptor Security Overide/Intel ME Debug Mode

PLL ODVR VOLTAGE

HDA_SYNCLow = 1.8V High = 1.5V

ODD

HDD1

HDA_SYNC:This strap is sampled on rising edge of RSMRST# and is used to sample 1.5VVccVRM supply mode. 1K external pull-up resistor is required on thissignal on the board. Signal may have leakage paths via powered off devices (AudioCodec) and hence contend with the external pull-up. A blocking FET isrecommended in such a case to isolate HDA_SYNC from the Audio Codec deviceuntil after the Strap sampling is complete.

mSATA

Layout Note:Place close PCH(<500mil)

Layout Note:HDA_SDO and HDA_BCLK must be length matched to within 500 mils

Low = External VRsHigh = Internal VRsINTVRMEN

Integrated SUS 1V VRM Enable

Layout Note:Place it at the open door location.

Layout Note:Place close together. For RNxxxx later.

*

*

*

*Layout Note:Place near PCH

Layout Note:HDD < 6000mil, mSATA < 6000mil, ODD < 12500mil

Layout Note:Place at the separated point

X01 12/21

A00 3/27

1 2R2119 210R2F-L-GPDYR2119 210R2F-L-GPDY

1 2R2109 33R2J-2-GPR2109 33R2J-2-GP

1 2R2108 33R2J-2-GPR2108 33R2J-2-GP

12

EC2103

SC4D

7P50

V2CN

-1G

P

DY EC2103

SC4D

7P50

V2CN

-1G

P

DY

12

C2104

SC1U

6D3V

2KX-

GP

C2104

SC1U

6D3V

2KX-

GP

12

R21171M1R2J-GPR21171M1R2J-GP

1 2R2103 1KR2J-1-GPR2103 1KR2J-1-GP

1 2R2112 37D4R2F-GPR2112 37D4R2F-GP

21

G2101

GAP-OPEN

G2101

GAP-OPEN

1 2R2110 33R2J-2-GPR2110 33R2J-2-GP

12

R212210KR2J-3-GPR2122

10KR2J-3-GP

12C2

101

SC15

P50V

2JN-

2-G

PC2

101

SC15

P50V

2JN-

2-G

P1 2

R2101 10MR2J-L-GPR2101 10MR2J-L-GP

1 2R2113 49D9R2F-GPR2113 49D9R2F-GP

12

R212633R2J-2-GPR212633R2J-2-GP

1 2R2116 0R0402-PAD-2-GPR2116 0R0402-PAD-2-GP

12R2124

33R2J-2-GP

R2124

33R2J-2-GP

1 2

R21071KR2J-1-GP

R21071KR2J-1-GP

1 2R2127 0R0402-PAD-2-GPR2127 0R0402-PAD-2-GP


G

S

D

Q2101

2N7002K-2-GP84.2N702.J312ND = 84.2N702.0313rd = 84.07002.I314th = 84.2N702.W31

Q2101


RTCX1A20

RTCX2C20

INTVRMENC17INTRUDER#K22

HDA_BCLKN34

HDA_SYNCL34

HDA_RST#K34

HDA_SDIN0E34

HDA_SDIN1G34

HDA_SDIN2C34

HDA_SDOA36

SATALED# P3

FWH0/LAD0 C38FWH1/LAD1 A38FWH2/LAD2 B37FWH3/LAD3 C37

LDRQ1#/GPIO23 K36

FWH4/LFRAME# D36

LDRQ0# E36

RTCRST#D20

HDA_SDIN3A34

HDA_DOCK_EN#/GPIO33C36

HDA_DOCK_RST#/GPIO13N32

SRTCRST#G22

SATA0RXN AM3SATA0RXP AM1SATA0TXN AP7SATA0TXP AP5

SATA1RXN AM10SATA1RXP AM8SATA1TXN AP11SATA1TXP AP10

SATA2RXN AD7SATA2RXP AD5SATA2TXN AH5SATA2TXP AH4

SATA3RXN AB8SATA3RXP AB10SATA3TXN AF3SATA3TXP AF1

SATA4RXN Y7SATA4RXP Y5SATA4TXN AD3SATA4TXP AD1

SATA5RXN Y3SATA5RXP Y1SATA5TXN AB3SATA5TXP AB1

SATAICOMPI Y10

SPI_CLKT3

SPI_CS0#Y14

SPI_CS1#T1

SPI_MOSIV4

SPI_MISOU3SATA0GP/GPIO21 V14

SATA1GP/GPIO19 P1

JTAG_TCKJ3

JTAG_TMSH7

JTAG_TDIK5

JTAG_TDOH1

SERIRQ V5

SPKRT10

SATAICOMPO Y11

SATA3COMPI AB13SATA3RCOMPO AB12

SATA3RBIAS AH1

RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

1 OF 10PCH1A


RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

1 OF 10PCH1A


1 2R2121 0R0402-PAD-2-GPR2121 0R0402-PAD-2-GP

1 2R2115 33R2J-2-GPR2115 33R2J-2-GP

G

S

D

Q2102


Q2102


12 3

4RN2103

SRN10KJ-5-GP

RN2103

SRN10KJ-5-GP

12

C2103SC1U6D3V2KX-GP

C2103SC1U6D3V2KX-GP

1 2R2136 0R0402-PAD-2-GPR2136 0R0402-PAD-2-GP

1 2R2111 51R2J-2-GPDYR2111 51R2J-2-GPDY

1 2R2128 0R0402-PAD-2-GPR2128 0R0402-PAD-2-GP


12

R212333R2J-2-GPR212333R2J-2-GP

1 2R2114 750R2F-GPR2114 750R2F-GP

12 3

4RN2102

SRN20KJ-1-GP

RN2102

SRN20KJ-1-GP


41

2 3

X2101

X-32D768KHZ-65-GP

82.30001.A412nd = 82.30001.841

X2101

X-32D768KHZ-65-GP

82.30001.A412nd = 82.30001.841


12R2104

1M1R2J-GP

R2104

1M1R2J-GP1 2

R2105330KR2F-L-GPR2105330KR2F-L-GP

12

EC2102

SC4D

7P50

V2CN

-1G

P

DY EC2102

SC4D

7P50

V2CN

-1G

P

DY

12

R212533R2J-2-GPR212533R2J-2-GP


12

C2102SC15P50V2JN-2-GPC2102SC15P50V2JN-2-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_THERMTRIP_R

H_A20GATE_PCH

H_CPUPWRGD

INIT3_3V#

H_RCIN#

PCH_GPIO37

PCH_GPIO36

H_PECI_R

PLL_ODVR_EN

RTC_DET#

DBC_EN

PCH_GPIO38

PCH_GPIO15

EC_SMI#

PCH_GPIO6

PCH_GPIO27

PLL_ODVR_EN

PCH_GPIO36

SATA_ODD_PRSNT#

COLOR_ENGINE

PCH_GPIO00

PCH_GPIO08

EC_SCI#

DGPU_PWROK

SATA_ODD_PWRGT

PCH_GPIO49

MSATA_DET#

DGPU_PWR_EN#

PCH_GPIO70

PCH_GPIO71

PCH_GPIO35

BOARD_ID2

PCH_GPIO57

COLOR_ENGINE

H_RCIN#

RTC_DET#PCH_GPIO57

H_A20GATE_PCH

SATA_ODD_PRSNT#

PCH_GPIO49

PCH_GPIO38

DGPU_PWR_EN#

PCH_GPIO15

DBC_EN

EC_SMI#

PCH_GPIO6EC_SCI#

DF_TVS

DF_TVS

PCH_NCTF_BH47

PCH_NCTF_BG48

PCH_NCTF_C48PCH_NCTF_B47

PCH_NCTF_BG2

PCH_NCTF_BH3

PCH_NCTF_C2PCH_NCTF_B3PCH_GPIO08

MSATA_DET#

PCH_GPIO00

PCH_GPIO37

DGPU_HOLD_RST#

DGPU_HOLD_RST#

DGPU_PWROK

DGPU_PWR_EN#DGPU_HOLD_RST#

3D3V_S0

3D3V_S0

3D3V_S5

1D8V_S03D3V_S0

3D3V_S0

VCCP_CPU

3D3V_S0

H_A20GATE [27]

H_CPUPWRGD [5]

H_THERMTRIP# [5]

H_RCIN# [27]

H_PECI [5,27]

DGPU_PWROK[27,86,92,93]

SATA_ODD_PWRGT [56]

BOARD_ID2 [20]

RTC_DET#[60]

H_SNB_IVB# [5]

EC_SCI#[27]

EC_SMI#[27]

DBC_EN[49]

MSATA_DET#[66]

SATA_ODD_PRSNT#[56]

DGPU_HOLD_RST#[83]

DGPU_PWR_EN#[93]

COLOR_ENGINE[49]

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (GPIO/CPU)A3

22 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (GPIO/CPU)A3

22 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (GPIO/CPU)A3

22 105Friday, March 30, 2012

DMB40

SSID = PCH

GPIO28(PLL_ODVR_EN)

Weakly internal pull up 20k.High - EnableLOW - Disable

PLL ON DIE VR ENABLE

Layout Note:Check these fuor balls are connected firstly, then to GND

X01 12/09

A00 3/23

GPIO27E16

GPIO28P8

GPIO24E8

GPIO57D6

LAN_PHY_PWR_CTRL/GPIO12C4

VSS_NCTF_1#A4A4

VSS_NCTF_2#A44A44

VSS_NCTF_3#A45A45

VSS_NCTF_4#A46A46

VSS_NCTF_5#A5A5

VSS_NCTF_6#A6A6

VSS_NCTF_7#B3B3

VSS_NCTF_8#B47B47

VSS_NCTF_9#BD1BD1

VSS_NCTF_10#BD49BD49

VSS_NCTF_11#BE1BE1

VSS_NCTF_12#BE49BE49

TACH2/GPIO6H36

TACH0/GPIO17D40

TACH3/GPIO7E38

SATA3GP/GPIO37M5

SATA5GP/GPIO49/TEMP_ALERT#V3

SCLOCK/GPIO22T5

SLOAD/GPIO38N2

SDATAOUT0/GPIO39M3

SDATAOUT1/GPIO48V13

PROCPWRGD AY11RCIN# P5

PECI AU16

THRMTRIP# AY10

GPIO8C10

BMBUSY#/GPIO0T7

GPIO15G2

TACH1/GPIO1A42

SATA2GP/GPIO36V8

INIT3_3V# T14

STP_PCI#/GPIO34K1

GPIO35K4

SATA4GP/GPIO16U2

VSS_NCTF_32#F49 F49

A20GATE P4

TACH4/GPIO68 C40

TACH6/GPIO70 C41

TACH7/GPIO71 A40

TACH5/GPIO69 B41

VSS_NCTF_17#BH3 BH3

VSS_NCTF_18#BH47 BH47

VSS_NCTF_19#BJ4 BJ4

VSS_NCTF_20#BJ44 BJ44



VSS_NCTF_23#BJ5 BJ5

VSS_NCTF_24#BJ6 BJ6

VSS_NCTF_25#C2 C2

VSS_NCTF_26#C48 C48

VSS_NCTF_27#D1 D1

VSS_NCTF_28#D49 D49

VSS_NCTF_29#E1 E1

VSS_NCTF_30#E49 E49

VSS_NCTF_31#F1 F1

TS_VSS4 AK10TS_VSS3 AH10TS_VSS2 AK11TS_VSS1 AH8

NC_1 P37

VSS_NCTF_13#BF1BF1

VSS_NCTF_14#BF49BF49

VSS_NCTF_15#BG2 BG2

VSS_NCTF_16#BG48 BG48

DF_TVS AY1

CPU/MISC

NCTF

GPIO

6 OF 10

NCTF

TES

T PI

N:A4

,A44

,A45

,A46

,A5,

A6,B

3,B4

7,BD

1,BD

49,B

E1,B

E49,

BF1,

BF49

,BG

2,BG

48,B

H3,B

H47,

BJ4,

BJ44

,BJ

45,B

J46,

BJ5,

BJ6,

C2,C

48,D

1,D4

9,E1

,E49

,F1,

F49

PCH1F


CPU/MISC

NCTF

GPIO

6 OF 10

NCTF

TES

T PI

N:A4

,A44

,A45

,A46

,A5,

A6,B

3,B4

7,BD

1,BD

49,B

E1,B

E49,

BF1,

BF49

,BG

2,BG

48,B

H3,B

H47,

BJ4,

BJ44

,BJ

45,B

J46,

BJ5,

BJ6,

C2,C

48,D

1,D4

9,E1

,E49

,F1,

F49

PCH1F



1 2

R22050R0402-PAD-2-GPR22050R0402-PAD-2-GP


12R2226 10KR2J-3-GP

DYR2226 10KR2J-3-GP

DY

12 3

4


1 2R2209

1KR2J-1-GP

R2209

1KR2J-1-GP


12R2228 10KR2J-3-GPR2228 10KR2J-3-GP

12R2225 10KR2J-3-GP

DYR2225 10KR2J-3-GP

DY


1234 5

678



12

R22072K2R2J-2-GPR22072K2R2J-2-GP

1 2R2203 0R2J-2-GPDYR2203 0R2J-2-GPDY

1234 5

678

RN2206SRN10KJ-6-GP

RN2206SRN10KJ-6-GP





12 3

4



12R2224 10KR2J-3-GP

DYR2224 10KR2J-3-GP

DY



12R2227 10KR2J-3-GPR2227 10KR2J-3-GP

12 3

4




1 2R2204 390R2J-1-GPR2204 390R2J-1-GP



12 3

4


1 2R2202 2K2R2J-2-GPR2202 2K2R2J-2-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.8VS_VCCTX_LVDS

+1.05VS_VCC_DMI_CCI

+3VS_VCCA_LVDS

VCCFDIPLL

VCCAPLLEXP

1D05V_PCH

1D05V_PCH

1D05V_PCH

1D05V_PCH

3D3V_S0

1D05V_PCH

3D3V_S0

VCCP_CPU

1D8V_S0

3D3V_S5

3D3V_S0

1D8V_S0

1D5V_S0

3D3V_S0

VCCVRM

1D05VS_VCC_DMI

1D05VS_VCC_DMI

VCCVRM

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER1)A3

23 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER1)A3

23 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER1)A3

23 105Friday, March 30, 2012

<Core Design>

SSID = PCHV5REF

Voltage Rail

VccDMI

VccCore

VccADPLLB

VccADAC

Vcc3_3

V5REF_Sus

VccDFTERM

VccDSW3_3

VccSPI

VccIO

VccADPLLA

VccClkDMI

VccVRM

VccSusHDA

VccRTC

VccASW

1.7

0.047

3.711

1.05

1.05

VccSus3_3

1.1

V_PROC_IO

VccTX_LVDS

VccSSC

VccALVDS

1.05

1.05

Voltage(V)

VccDIFFCLKN

3.3

1.05

3.3

5

5

0.001

0.228

0.001

0.001

Iccmax(A)

0.08

0.063

0.08

0.001

3.3

0.903

1.05

0.01

6uA

0.095

0.002

0.01

3.3

1.8

3.3

0.095

0.167

0.07

3.3

3.3

3.3

1.05

1.05

1.05

1.5

0.04

0.001

0.055

1.8

Refer to chipset EDS V.0.7

1.7A

3.711A

0.228A

0.061A

0.001A

0.04A

0.228A

0.167A

0.047A

0.07A

0.002A

0.01A

X03 2/6

X03 2/6

X03 2/16


12

C230

3SC

1U6D

3V2K

X-G

PC2

303

SC1U

6D3V

2KX-

GP

12



12

C231

7SC

D01U

16V2

KX-3

GP

C231

7SC

D01U

16V2

KX-3

GP

12

C230

7SC

D1U1

0V2K

X-5G

P

DY

C230

7SC

D1U1

0V2K

X-5G

P

DY

VCCCORE1AA23VCCCORE2AC23VCCCORE3AD21VCCCORE4AD23VCCCORE5AF21VCCCORE6AF23VCCCORE7AG21VCCCORE8AG23VCCCORE9AG24VCCCORE10AG26VCCCORE11AG27VCCCORE12AG29VCCCORE13AJ23VCCCORE14AJ26VCCCORE15AJ27

VCCDFTERM4 AJ17

VCCDFTERM3 AJ16

VCCIO17AN21

VCCIO18AN26

VCCIO19AN27

VCCIO20AP21

VCCIO23AP26

VCCIO24AT24

VCCIO15AN16

VCCIO16AN17

VCCIO21AP23

VCCIO22AP24

VCCADAC U48

VCCTX_LVDS1 AM37

VCCTX_LVDS2 AM38

VCCALVDS AK36

VCCVRM3 AT16

VCCVRM2AP16

VCCAPLLEXPBJ22

VCCAFDIPLLBG6

VCCIO28AN19 VCCTX_LVDS4 AP37VCCTX_LVDS3 AP36

VSSADAC U47

VSSALVDS AK37

VCCIO27AP17

VCC3_3_6 V33

VCC3_3_7 V34

VCC3_3_3BH29 VCCDFTERM2 AG17

VCCDFTERM1 AG16

VCCDMI1 AT20

VCCIO25AN33

VCCIO26AN34

VCCCORE16AJ29VCCCORE17AJ31

VCCSPI V1

VCCCLKDMI AB36

VCCDMI2AU20

POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

DFT / SPI

HVCMOS

7 OF 10PCH1G


POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

DFT / SPI

HVCMOS

7 OF 10PCH1G


12


12

C230

6SC

1U6D

3V2K

X-G

P

DY

C230

6SC

1U6D

3V2K

X-G

P

DY 12


12

C230

1SC

10U6

D3V5

KX-1

GP

C230

1SC

10U6

D3V5

KX-1

GP

12

EC23

05SC

D1U1

0V2K

X-5G

PEC

2305

SCD1

U10V

2KX-

5GP

12 C2

315

SC10

U6D3

V3M

X-G

P

DY C231

5SC

10U6

D3V3

MX-

GP

DY

12

C2313

SCD0

1U16

V2KX

-3G

P

C2313

SCD0

1U16

V2KX

-3G

P

12

C230

2SC

1U6D

3V2K

X-G

PDY

C230

2SC

1U6D

3V2K

X-G

PDY

1 2

R23060R0402-PAD-2-GP

R23060R0402-PAD-2-GP

1 2

R23080R0402-PAD-2-GP

R23080R0402-PAD-2-GP

1 2R2301

0R0603-PAD-2-GP

R2301

0R0603-PAD-2-GP

12

C2314

SCD1

U10V

2KX-

5GP

C2314

SCD1

U10V

2KX-

5GP

1 2

R23070R0402-PAD-2-GP

R23070R0402-PAD-2-GP

1 2R2304

0R0603-PAD-2-GP

R2304

0R0603-PAD-2-GP

12

C230

8SC

D1U1

0V2K

X-5G

PC2

308

SCD1

U10V

2KX-

5GP 1

2

C230

9SC

1U6D

3V2K

X-G

PC2

309

SC1U

6D3V

2KX-

GP

12

C231

8SC

22U6

D3V5

MX-

2GP

C231

8SC

22U6

D3V5

MX-

2GP

12

C2322SCD1U10V2KX-5GPC2322SCD1U10V2KX-5GP

12


12

C231

6SC

D01U

16V2

KX-3

GP

C231

6SC

D01U

16V2

KX-3

GP

12C2

310

SCD1

U10V

2KX-

5GP

C231

0SC

D1U1

0V2K

X-5G

P

12

C230

4SC

1U6D

3V2K

X-G

PC2

304

SC1U

6D3V

2KX-

GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+V1.05S_SSCVCC

+VCCSUS1

+V1.05S_VCCAPLL_SATA3

+V3.3S_VCC_CLKF33

+V1.05S_SSCVCC

+V3.3S_VCC_CLKF33

+1.05VS_VCCA_A_DPL

+VCCRTCEXT

DCPSUSBYP

VCCACLK

+VCCSST

+VCCDIFFCLK

+1.05VS_VCCA_B_DPL

+5VA_PCH_VCC5REFSUS

+VCCAPLL_CPY_PCH

+5VS_PCH_VCC5REF

3D3V_S5

+VCCDIFFCLK

+VCCA_USBSUS

+1.05VS_VCCA_B_DPL

+1.05VS_VCCA_A_DPL

DCPSUS

3D3V_S5

3D3V_S5

3D3V_S0

3D3V_S5

1D05V_PCH

1D05V_PCH

3D3V_S0

3D3V_S0

1D05V_PCH

1D05V_PCH

1D05V_PCH

VCCP_CPU

RTC_AUX_S5

1D05V_PCH

1D05V_PCH

1D05V_PCH

+VCCDIFFCLKN

3D3V_S5

1D05V_PCH

3D3V_S5

1D05V_PCH

5V_S0

5V_S5

+3VS_+1.5VS_HDA_IO

3D3V_S5

1D05V_PCH

VCCVRM

VCCVRM

3D3V_S0

3D3V_S0

3D3V_S5

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER2)A3

24 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER2)A3

24 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (POWER2)A3

24 105Friday, March 30, 2012

DMB40

SSID = PCH

0.001A

0.93A

0.167A

0.055A

0.095A

0.001A

6uA

(0.1uFx1)

0.01A

0.001A

0.001A

0.095A

0.08A

0.08A

VCCSUSHDA need to be at either 3.3V or 1.5V. All the CODEC I/O Voltages need to be at the same level either 3.3 V or 1.5 V.

VccDMI

Voltage Rail

V5REF

VccDFTERM

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLB

VccCore

VccClkDMI

VccADPLLA

VccIO

VccSPI

VccDSW3_3

1.7

VccASW

VccRTC

VccSusHDA

VccVRM

1.1

VccSus3_3

1.05

1.05

3.711

0.047

VccTX_LVDS

V_PROC_IO

Voltage(V)

1.05

1.05

VccALVDS

VccSSC

3.3

VccDIFFCLKN

0.001

5

5

3.3

1.05

Iccmax(A)

0.001

0.001

0.228

0.001

0.08

0.063

0.08

0.01

1.05

0.903

3.3

3.3

0.01

0.002

0.095

6uA

0.07

0.167

0.095

3.3

1.8

3.3

3.3

3.3

0.04

1.5

1.05

1.05

1.05

1.8

0.055

0.001

Refer to chipset EDS V.0.7

DG: noneCRB: 10uH

X01 1/9

X03 2/6

X03 2/6

X03 2/6

X03 2/16

12

C2406SC1U6D3V2KX-G

PC2406SC1U6D3V2KX-G

P

12

C2414SC1U6D3V2KX-GP

C2414SC1U6D3V2KX-GP

12

C2435SC1U6D3V2KX-GP

C2435SC1U6D3V2KX-GP

1 2R24120R0603-PAD-2-GPR24120R0603-PAD-2-GP

12

C2412SC1U6D3V2KX-GPC2412

SC1U6D3V2KX-GP

12




12

C2403SC22U6D3V5M

X-2GP

DY

C2403SC22U6D3V5M

X-2GP

DY

12

C241

8SC

D1U1

0V2K

X-5G

PC2

418

SCD1

U10V

2KX-

5GP

12


1 2R2408

10R2J-2-GP

R2408

10R2J-2-GP

1 2L2403

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2403

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

1 2

R24040R0402-PAD-2-GPR24040R0402-PAD-2-GP

1 2R2407

10R2J-2-GP

R2407

10R2J-2-GP

1 2L2401

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2401

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

12


1TP2405TPAD14-OP-GP

TP2405TPAD14-OP-GP

1 2L2402

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2402

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

1TP2404TPAD14-OP-GP

TP2404TPAD14-OP-GP

21

D2401CH751H-40PT-GP83.R0304.A8F

2nd = 83.R2004.B8F

D2401CH751H-40PT-GP83.R0304.A8F

2nd = 83.R2004.B8F

12

C2404SC22U6D3V5M

X-2GP

C2404SC22U6D3V5M

X-2GP

12

C2405SC1U6D3V2KX-G

P

DY

C2405SC1U6D3V2KX-G

P

DY

1TP2403TPAD14-OP-GP

TP2403TPAD14-OP-GP

12

C242

2SC

D1U1

0V2K

X-5G

PC2

422

SCD1

U10V

2KX-

5GP

12

C2432SC1U6D3V2KX-GP DYC2432SC1U6D3V2KX-GP DY

12

EC24

09SC

D1U1

0V2K

X-5G

PEC

2409

SCD1

U10V

2KX-

5GP

12


12C2433

SCD1U10V2KX-5GPC2433

SCD1U10V2KX-5GP

12


12


12

C2428SC1U6D3V2KX-GP

C2428SC1U6D3V2KX-GP

12

C242

1SC

D1U1

0V2K

X-5G

PC2

421

SCD1

U10V

2KX-

5GP

12


12



1 2

R24030R0402-PAD-2-GPR24030R0402-PAD-2-GP

12



12

C2437SC1U10V2KX-1GPDY C2437SC1U10V2KX-1GPDY

12


12

C2413SC1U6D3V2KX-GPC2413

SC1U6D3V2KX-GP

12



12

C2417SC4D7U6D3V3KX-GP


1 2

R24020R0402-PAD-2-GPR24020R0402-PAD-2-GP

12


21

D2402CH751H-40PT-GP83.R0304.A8F

2nd = 83.R2004.B8F

D2402CH751H-40PT-GP83.R0304.A8F

2nd = 83.R2004.B8F

12C2401

SC10U6D3V5KX-1GPDYC2401

SC10U6D3V5KX-1GPDY

12

C2436SC1U6D3V2KX-GP

C2436SC1U6D3V2KX-GP

1TP2402TPAD14-OP-GP

TP2402TPAD14-OP-GP

12

C242

0SC

D1U1

0V2K

X-5G

PC2

420

SCD1

U10V

2KX-

5GP

12


12

C2419SC1U6D3V2KX-G

P

DY

C2419SC1U6D3V2KX-G

P

DY

12 C2

408

SC10

U6D3

V5KX

-1G

P

DY C240

8SC

10U6

D3V5

KX-1

GP

DY

1 TP2406TPAD14-OP-GP

TP2406TPAD14-OP-GP

12


DCPSUSBYPV12

VCCASW1AA19

VCCASW2AA21

VCCASW3AA24

VCCASW5AA27

VCCASW6AA29

VCCSUSHDA P32

VCCSUS3_3_6 P24

VCCIO34 T26

VCCIO4 AD17

VCCASW7AA31

VCCASW8AC26

VCCASW9AC27

VCCASW10AC29

VCCASW11AC31

VCCASW12AD29

V5REF P34

VCC3_3_4 T34

VCCRTCA22

VCCSUS3_3_10 V24VCCSUS3_3_9 V23VCCSUS3_3_8 T24VCCSUS3_3_7 T23

VCCIO2 AC16

VCCADPLLBBF47

VCCDIFFCLKN1AF33

V5REF_SUS M26

VCCIO3 AC17

DCPSUS1T17

VCCSSCAG33

VCCADPLLABD47

VCCVRM4Y49

VCCACLKAD49

DCPRTCN16

VCCASW4AA26

VCCDIFFCLKN2AF34VCCIO7AF17

DCPSSTV16

VCCIO5 AF13

VCCASW22 T21

VCCASW23 V21

VCCASW21 T19

VCC3_3_1 AA16

VCC3_3_8 W16

VCCSUS3_3_2 N20

VCCSUS3_3_3 N22

VCCSUS3_3_4 P20

VCCSUS3_3_5 P22

VCCIO29 N26

VCCIO30 P26

VCCIO31 P28

VCCIO32 T27

V_PROC_IOBJ8

VCCIO33 T29

VCCDIFFCLKN3AG34

VCCASW13AD31

VCCASW14W21

VCCASW15W23

VCCASW16W24

VCCASW17W26

VCCASW18W29

VCCASW19W31

VCCASW20W33

VCCIO6 AF14

VCCVRM1 AF11

VCCIO12 AH13

VCCIO13 AH14

VCC3_3_2 AJ2

VCCAPLLSATA AK1

DCPSUS3AL24

VCCIO14AL29

DCPSUS4 AN23

VCCSUS3_3_1 AN24

VCCAPLLDMI2BH23

DCPSUS2V19

VCCDSW3_3T16

VCC3_3_5T38

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

10 OF 10PCH1J


POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

10 OF 10PCH1J


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (VSS)A3

25 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (VSS)A3

25 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

PCH (VSS)A3

25 105Friday, March 30, 2012

DMB40

SSID = PCH

VSS159AY4VSS160AY42VSS161AY46VSS162AY8VSS163B11VSS164B15VSS165B19VSS166B23VSS167B27VSS168B31VSS169B35VSS170B39VSS171B7

VSS173BB12VSS174BB16VSS175BB20VSS176BB22VSS177BB24VSS178BB28VSS179BB30VSS180BB38VSS181BB4VSS182BB46VSS183BC14VSS184BC18VSS185BC2VSS186BC22VSS187BC26VSS188BC32VSS189BC34VSS190BC36VSS191BC40VSS192BC42VSS193BC48VSS194BD46VSS195BD5VSS196BE22VSS197BE26VSS198BE40VSS199BF10VSS200BF12VSS201BF16VSS202BF20VSS203BF22VSS204BF24VSS205BF26VSS206BF28VSS207BD3VSS208BF30VSS209BF38VSS210BF40VSS211BF8VSS212BG17VSS213BG21VSS214BG33VSS215BG44VSS216BG8VSS217BH11VSS218BH15VSS219BH17VSS220BH19

VSS222BH27VSS223BH31VSS224BH33VSS225BH35VSS226BH39VSS227BH43VSS228BH7VSS229D3VSS230D12VSS231D16VSS232D18VSS233D22VSS234D24VSS235D26VSS236D30VSS237D32

VSS264 K7VSS265 L18VSS266 L2VSS267 L20VSS268 L26VSS269 L28VSS270 L36VSS271 L48VSS272 M12VSS273 P16VSS274 M18VSS275 M22VSS276 M24VSS277 M30VSS278 M32VSS279 M34VSS280 M38VSS281 M4VSS282 M42VSS283 M46VSS284 M8VSS285 N18VSS286 P30

VSS288 P11VSS289 P18VSS290 T33VSS291 P40VSS292 P43VSS293 P47VSS294 P7VSS295 R2VSS296 R48VSS297 T12VSS298 T31VSS299 T37VSS300 T4VSS301 W34VSS302 T46VSS303 T47VSS304 T8VSS305 V11VSS306 V17VSS307 V26VSS308 V27VSS309 V29VSS310 V31VSS311 V36VSS312 V39VSS313 V43VSS314 V7VSS315 W17VSS316 W19

VSS238D34VSS239D38VSS240D42VSS241D8VSS242E18VSS243E26VSS244G18VSS245G20VSS246G26VSS247G28VSS248G36VSS249G48VSS250H12VSS251H18

VSS317 W2VSS318 W27VSS319 W48VSS320 Y12VSS321 Y38VSS322 Y4VSS323 Y42VSS324 Y46VSS325 Y8VSS328 BG29VSS329 N24VSS330 AJ3

VSS287 N47

VSS252H22VSS253H24VSS254H26VSS255H30VSS256H32VSS257H34VSS258F3

VSS262 K39VSS263 K46

VSS259 H46VSS260 K18VSS261 K26

VSS331 AD47VSS333 B43VSS334 BE10VSS335 BG41VSS337 G14VSS338 H16VSS340 T36VSS342 BG22VSS343 BG24VSS344 C22VSS345 AP13

VSS172F45

VSS221H10

VSS346 M14VSS347 AP3VSS348 AP1VSS349 BE16VSS350 BC16VSS351 BG28VSS352 BJ28

9 OF 10PCH1I


9 OF 10PCH1I


VSS1AA17VSS2AA2VSS3AA3

VSS5AA34VSS6AB11VSS7AB14VSS8AB39VSS9AB4VSS10AB43VSS11AB5VSS12AB7VSS13AC19VSS14AC2VSS15AC21VSS16AC24VSS17AC33VSS18AC34VSS19AC48VSS20AD10VSS21AD11VSS22AD12VSS23AD13VSS24AD19VSS25AD24VSS26AD26VSS27AD27VSS28AD33VSS29AD34VSS30AD36VSS31AD37

VSS33AD39VSS34AD4VSS35AD40VSS36AD42VSS37AD43VSS38AD45VSS39AD46

VSS43AF10VSS44AF12

VSS46AD16VSS47AF16VSS48AF19VSS49AF24VSS50AF26VSS51AF27VSS52AF29VSS53AF31VSS54AF38VSS55AF4VSS56AF42VSS57AF46

VSS59AF7VSS60AF8VSS61AG19VSS62AG2VSS63AG31VSS64AG48VSS65AH11VSS66AH3VSS67AH36VSS68AH39VSS69AH40VSS70AH42VSS71AH46VSS72AH7VSS73AJ19

VSS76AJ33VSS77AJ34VSS78AK12VSS79AK3

VSS80 AK38VSS81 AK4VSS82 AK42VSS83 AK46VSS84 AK8VSS85 AL16VSS86 AL17VSS87 AL19VSS88 AL2VSS89 AL21VSS90 AL23VSS91 AL26VSS92 AL27VSS93 AL31

VSS96 AL48VSS97 AM11VSS98 AM14VSS99 AM36

VSS100 AM39

VSS102 AM45VSS103 AM46VSS104 AM7VSS105 AN2VSS106 AN29VSS107 AN3VSS108 AN31VSS109 AP12VSS110 AP19VSS111 AP28VSS112 AP30VSS113 AP32VSS114 AP38

VSS116 AP42VSS117 AP46VSS118 AP8VSS119 AR2VSS120 AR48VSS121 AT11VSS122 AT13VSS123 AT18VSS124 AT22VSS125 AT26VSS126 AT28VSS127 AT30VSS128 AT32

VSS131 AT42VSS132 AT46VSS133 AT7VSS134 AU24VSS135 AU30VSS136 AV16VSS137 AV20VSS138 AV24VSS139 AV30VSS140 AV38VSS141 AV4VSS142 AV43VSS143 AV8VSS144 AW14VSS145 AW18VSS146 AW2VSS147 AW22VSS148 AW26VSS149 AW28VSS150 AW32VSS151 AW34VSS152 AW36VSS153 AW40VSS154 AW48VSS155 AV11VSS156 AY12VSS157 AY22VSS158 AY28

VSS40AD8

VSS42AE3

VSS45AD14

VSS115 AP4

VSS0H5

VSS58AF5

VSS32AD38

VSS4AA33

VSS74AJ21VSS75AJ24

VSS41AE2

VSS129 AT34VSS130 AT39

VSS101 AM43

VSS95 AL34VSS94 AL33

8 OF 10PCH1H


8 OF 10PCH1H


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

26 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

26 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

26 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VBAT

3D3V_AUX_KBC_VCC

PSL_IN1#

MODEL_ID_DET

MODEL_ID_DET

PCB_VER_AD

KROW0KROW1KROW2KROW3KROW4KROW5KROW6KROW7

FAN_TACH1

BAT_SCLBAT_SDA

BAT_IN#

ECRST#

PCIE_WAKE#

USB_DET#

PSL_OUT#

PECI

ECSCI#_KBC

EC_A

GND

AD_IA_HW2

KBC_VCORF

PCB_VER_AD

PSL_IN2#

H_PROCHOT#_EC

PROCHOT_EC

EC_VTT

EC_SPI_DO_C

EC_SPI_CLK_CEC_SPI_DI_C

EC_SPI_CS#_C

VGA_THRM

ECSCI#_KBC

ECSMI#_KBC

PROCHOT_EC

PSL_OUT#

EC_VBKUP

KCOL0

KCOL9KCOL10KCOL11KCOL12KCOL13KCOL14KCOL15KCOL16

KCOL1KCOL2KCOL3KCOL4KCOL5KCOL6KCOL7KCOL8

USB_DET#

PSL_IN2#

LPC_AD3

LPC_AD0LPC_AD1LPC_AD2

PLT_RST#_EC

ECSMI#_KBC

PSL_IN1#

ECRST#

LID_CLOSE#

S5_ENABLE

AUDIO_PRESENT#INSTANT_LAUNCH#MOBILITY_CENTER#USB_DET#

ECRST#

AC_IN_KBC#

ECSWI#_KBC

ECSWI#_KBC

PM_CLKRUN#_EC

3G_EN

3G_EN

AMB_TEMP

AMB_TEMP

H_A20GATE

KBC_ON#_GATE_L

AOAC_PCIE_WAKE#_RAOAC_PCIE_WAKE#

KBC_ON#_GATEKBC_ON#_GATE_L

3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_S0

EC_AGNDEC_AGND

3D3V_AUX_KBC

EC_AGND

3D3V_AUX_KBC 3D3V_S0

VCCP_CPU

EC_AGND

EC_AGND

EC_AGND

RTC_AUX_S5

3D3V_AUX_S5

3D3V_AUX_S5 3D3V_AUX_S5 3D3V_AUX_S5

3D3V_AUX_KBC3D3V_S5

3D3V_AUX_KBC

VBAT

VBAT VBAT

3D3V_AUX_KBCVBAT

EC_AGND

3D3V_WLAN_AOAC

3D3V_WWAN_AOAC

3D3V_WLAN_AOAC

3D3V_LAN_S5

PURE_HW_SHUTDOWN#[28,36,85]

H_PROCHOT# [5,40]

EC_SCI#[22]

EC_SMI#[22]

USBDET_CON#[62]

L_BKLT_EN [17]

AD_IA[40]

PSID_EC[38]

FAN1_DAC[28]

PM_SLP_S3#[19,36,37,47]PCIE_WAKE#[31]

KBC_BEEP[82]

CHG_AMBER_LED#[68]

INSTANT_LAUNCH#_LED#[82]

AUDIO_PRESENT#_LED#[82]

PWRLED#[68]

MOBILITY_CENTER#_LED#[82]

KCOL[0..16] [69]

KROW[0..7] [69]

E51_TxD[65]

H_PECI[5,22]

AMP_MUTE#[82]PCH_SUSCLK_KBC[19]

PLT_RST# [5,18,31,65,66,71]

LPC_FRAME# [21,71]CLK_PCI_KBC [18]

LPC_AD[3..0] [21,71]

INT_SERIRQ [21]PM_CLKRUN#_EC [19]

SPI_CLK_R[21,60]

SPI_SI_R[21,60]SPI_SO_R[21,60]

SPI_CS0#_R[21,60]

PM_PWRBTN#[19]

S5_ENABLE[36]CAP_LED#[69]

BAT_IN#[39]LID_CLOSE#[70]

PM_SLP_S4#[19,46]RSMRST#_KBC[19]

WIFI_RF_EN[65]

S0_PWR_GOOD[19,36]

H_A20GATE [22]

TP_LOCK_LED#[68]

AC_PRESENT[19]

H_RCIN# [22]

TPCLK [69]TPDATA [69]

AD_IA_HW2 [40]BLON_OUT [49]

BAT_SDA [39,40]BAT_SCL [39,40]

SML1_DATA [20,28,85]SML1_CLK [20,28,85]

PM_LAN_ENABLE [31]

ME_UNLOCK[21]

IMVP_PWRGD[36,42]

LCD_TST_EN [49]

PWR_CHG_AD_OFF [38]

VGA_THRM[28]

USB_PWR_EN#[82]

BATT_WHITE_LED#[68]

RTCRST_ON [21]

LCD_TST [49]

AD_IA_HW[40]

KBC_PWRBTN#[68]

AC_IN#[40]

USBCHG_EN[62]

AOAC_WLAN_EN#[65]

FAN_TACH1[28]

AC_IN_KBC#[38]

EC_SWI#[20]

DGPU_PWROK [22,86,92,93]

AOAC_WWAN_EN#[66]

AOAC_PCIE_WAKE#[65,66]

BOOST_MODE# [40]

3G_EN[66]

MOBILITY_CENTER# [82]

INSTANT_LAUNCH# [82]

AUDIO_PRESENT#[82]

USBCHARGER_CB0[62]PCH_WAKE#_EC[19]

Title


Date: Sheet of


BMW Z4 DIS A00

KBC Nuvoton NPCE885A2

27 105Tuesday, April 03, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00



<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00



<Core Design>

SSID = KBC

Layout Note:Need very close to EC

143.0K

Connect GND and AGND planes via either 0R resistor or connect directly.

Layout Note:

100.0K 1.358V


Reserved


174.0KReserved 100.0K

Reserved

47.0K

1.65VReserved

64.9K

76.8

100.0K

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0KX00

X01

3.0V

2.75V

X02

100.0K

2.48V

A00

100.0K

100.0K

100.0K

100.0K

100.0K

10.0K

2.24V

20.0K

2.0V

33.0K

1.87V

1.204V

Reserved 100.0K 215.0K 1.048V

Power Switch Logic(PSL)

EC_GPIO47 High Active

TP

Charger

PCH

2.304V

154K(64.15435.6DL)

MODEL_ID_DET(GPIO07)

64.9K(64.64925.6DL)57.6K(64.57625.6DL)

1.299V

107K(64.10735.6DL)

100.0K

1.594V

137K(64.13735.6DL)

100.0K

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0K 3.0V

2.801V100.0K

2.598V

100.0K100.0K100.0K100.0K100.0K

10.0K(64.10025.6DL)

2.402V

2.093V

27.0K(64.27025.6DL)

1.392V

100.0K

200K(64.20035.6DL) 1.099V

82.5K(64.82525.6DL) 1.808V

TBD

2.001V

TBD

TBDTBDTBD

TBDTBDTBDTBDTBDTBD

TBD

TBD

100.0K100.0K

100.0K100.0K100.0K100.0K100.0K100.0K100.0K

100.0K

TBD

232K(64.23236.6DL)

73.2K(64.73225.6DL) 1.905V

13.7K(64.13725.6DL)

TBDTBDTBD

17.8K(64.17825.6DL)

TBD

2.902V

TBD

93.1K(64.93125.6DL)

22.1K(64.22125.6DL)

1.709V

TBD 2.702V

120K(64.12035.6DL)

32.4K(64.32425.6DL)37.4K(64.37425.6DL)

0.994V

1.499V

2.492V

43.2K(64.43225.6DL)2.201V49.9K(64.49925.6DL)

For System Reset.

AOAC Ambient temperature detect

X01 12/02

X01 12/02

X01 12/02

X01 12/02

X01 12/09

X01 12/09

X01 12/12

X01 12/13

X01 12/13

X01 12/20

X01 12/21

X01 12/21

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03 2/6

X03

X03 2/16A00 3/15

12

R270510KR2J-3-GPR270510KR2J-3-GP

1

2

3

D2707

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D2707

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

12

C270

6SC

D1U1

0V2K

X-5G

PC2

706

SCD1

U10V

2KX-

5GP

12

C2712SC1U25V3KX-1-GPC2712SC1U25V3KX-1-GP

1 2

R27400R2J-2-GP

DY

R27400R2J-2-GP

DY

12

R2703NTC-10K-27-GP

69.60013.1312nd = 69.60011.2013rd = 69.60037.011

R2703NTC-10K-27-GP

69.60013.1312nd = 69.60011.2013rd = 69.60037.011

1 2

R27670R0402-PAD-2-GP

R27670R0402-PAD-2-GP

1 233R2J-2-GP R271933R2J-2-GP R2719

1 2

R2716

1KR2J-1-GP

R2716

1KR2J-1-GP

1 2R2731 0R2J-2-GPDYR2731 0R2J-2-GPDY

12 C2

701

SC2D

2U10

V3KX

-1GP

C270

1SC

2D2U

10V3

KX-1

GP

1234 5

678

RN2702

SRN100KJ-5-GP

RN2702

SRN100KJ-5-GP

1 2

R27940R0402-PAD-2-GP

R27940R0402-PAD-2-GP

1 2

R27680R0402-PAD-2-GP

R27680R0402-PAD-2-GP

1 2R2778 0R0402-PAD-2-GPR2778 0R0402-PAD-2-GP

12

C2725

SC10

0P50

V2JN

-3GP

C2725

SC10

0P50

V2JN

-3GP

1 2

R27650R0402-PAD-2-GP

R27650R0402-PAD-2-GP

1 2R2708 10KR2J-3-GPR2708 10KR2J-3-GP

1 2R2727 0R0402-PAD-2-GPR2727 0R0402-PAD-2-GP

1 2R2715 100KR2J-1-GPR2715 100KR2J-1-GP

12

C2713SC47P50V2JN-3GPC2713SC47P50V2JN-3GP

12

R2711100KR2J-1-GP

R2711100KR2J-1-GP

124

3

56

RSTSW1SW-TACT-130-GP-U62.40009.7312nd = 62.40089.441

RSTSW1SW-TACT-130-GP-U62.40009.7312nd = 62.40089.441

12

R2706100KR2J-1-GP

R2706100KR2J-1-GP

12

C270

7SC

D1U1

0V2K

X-5G

P

DY C270

7SC

D1U1

0V2K

X-5G

P

DY

12



1 2R272233R2J-2-GP R272233R2J-2-GP

SD

G G

DQ2703DMP2130L-7-GP

2ND = 84.03413.A3184.02130.031

G

DQ2703DMP2130L-7-GP

2ND = 84.03413.A3184.02130.031

12

R27910R2J-2-GPDY R27910R2J-2-GPDY

12 C2

710

SCD1

U10V

2KX-

5GP

C271

0SC

D1U1

0V2K

X-5G

P

12

C2726

SCD1

U10V

2KX-

5GP

C2726

SCD1

U10V

2KX-

5GP

G

S

D

Q2704


Q2704


1 2R27920R0402-PAD-2-GP

R27920R0402-PAD-2-GP

12

R2704330KR2J-L1-GPR2704330KR2J-L1-GP

12

R2739100KR2F-L1-GPR2739100KR2F-L1-GP

G

S

D

Q2702


Q2702


1 2

R273520KR2J-L2-GPR273520KR2J-L2-GP

12

C2718SCD1U10V2KX-5GPDYC2718SCD1U10V2KX-5GPDY

12

C2715

SC1U

6D3V

2KX-

GPDY

C2715

SC1U

6D3V

2KX-

GPDY

1 2R272143R2J-GPR272143R2J-GP

12

C2717SCD1U10V2KX-5GP DYC2717SCD1U10V2KX-5GP DY

KBSOUT0/GPOB0/JENK# 53KBSOUT1/GPIOB1/TCK 52KBSOUT2/GPIOB2/TMS 51KBSOUT3/GPIOB3/TDI 50

KBSOUT4/GPOB4/JEN0# 49KBSOUT5/GPIOB5/TDO 48

KBSOUT6/GPIOB6/RDY# 47KBSOUT7/GPIOB7 43KBSOUT8/GPIOC0 42

KBSOUT9/GPOC1/SDP_VIS# 41KBSOUT10&P80_CLK/GPIOC2 40KBSOUT11&P80_DAT/GPIOC3 39

KBSOUT12/GPIO64 38KBSOUT13/GPIO63 37KBSOUT14/GPIO62 36

KBSOUT15/GPIO61/XOR_OUT 35GPIO60/KBSOUT16 34GPIO57/KBSOUT17 33

KBSIN0/GPIOA0/N2TCK 54KBSIN1/GPIOA1/N2TMS 55

KBSIN2/GPIOA2 56KBSIN3/GPIOA3 57KBSIN4/GPIOA4 58KBSIN5/GPIOA5 59KBSIN6/GPIOA6 60KBSIN7/GPIOA7 61

GPIO56/TA131GPIO14/TB163GPIO1/TB264

GPIO15/A_PWM32GPIO21/B_PWM118GPIO13/C_PWM62GPIO32/D_PWM65

GPIO66/G_PWM81GPIO33/H_PWM66GPIO45/E_PWM22

GPIO40/F_PWM16

VCC_POR#85

GPIO0/EXTCLK77

PECI13VTT12

GPIO87/CIRRXM/SIN_CR113 GPIO46/CIRRXM/TRIST#23

GP/I/O83/SOUT_CR/TRIST#111

GPIO55/CLKOUT/IOX_DIN_DIO30

2 0F 2U2701B

NPCE885PA0DX-1-GP

2 0F 2U2701B

NPCE885PA0DX-1-GP

12

R270910KR2J-3-GPR270910KR2J-3-GP

1 2

R27200R0402-PAD-2-GP

R27200R0402-PAD-2-GP

12

R2732100KR2J-1-GP

R2732100KR2J-1-GP

1 2R2723 0R0402-PAD-2-GPR2723 0R0402-PAD-2-GP

12

C270

8SC

D1U1

0V2K

X-5G

PC2

708

SCD1

U10V

2KX-

5GP

12

R2701100KR2J-1-GP

DYR2701

100KR2J-1-GP

DY

12

C2703SC2D2U10V3KX-1GPDY C2703SC2D2U10V3KX-1GPDY

12

R271310KR2B-GP

R271310KR2B-GP

1 2R2764 0R0402-PAD-2-GPR2764 0R0402-PAD-2-GP


1 233R2J-2-GP R273633R2J-2-GP R2736


1 2

R27330R0402-PAD-2-GP

R27330R0402-PAD-2-GP

1 2R2799 100KR2J-1-GPR2799 100KR2J-1-GP

12

R271010KR2F-2-GPR271010KR2F-2-GP

12

R27712D2R3-1-U-GPR27712D2R3-1-U-GP

1 2R2730 0R2J-2-GPDYR2730 0R2J-2-GPDY

12

R2734330KR2J-L1-GPR2734330KR2J-L1-GP

2

1

3

D2702

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

DY

D2702

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

DY

12

R272464K9R2F-1-GPR272464K9R2F-1-GP

1 2


DY


DY

12

R2726100KR2F-L1-GPR2726100KR2F-L1-GP

12C2720 SCD1U10V2KX-5GPDYC2720 SCD1U10V2KX-5GPDY

12

C270

4SC

D1U1

0V2K

X-5G

PC2

704

SCD1

U10V

2KX-

5GP

12 C2

716

SCD1

U10V

2KX-

5GP

C271

6SC

D1U1

0V2K

X-5G

P

123

4

RN2701

SRN4K7J-8-GP

RN2701

SRN4K7J-8-GP


1 2R2707 10KR2J-3-GPR2707 10KR2J-3-GP

C

B

E

Q2701MMBT3906-4-GP

2nd = 84.03906.F1184.T3906.A11

Q2701MMBT3906-4-GP

2nd = 84.03906.F1184.T3906.A11

12

C270

5SC

D1U1

0V2K

X-5G

P

DY C270

5SC

D1U1

0V2K

X-5G

P

DY

1 2R2702

0R0603-PAD-2-GP

R2702

0R0603-PAD-2-GP

1 2R272533R2J-2-GP R272533R2J-2-GP

VCC

119

VCC

246

VCC

376

VCC

488

VCC

511

5

AVC

C10

2

VDD

4

GN

D1

18G

ND

245

GN

D3

78G

ND

489

GN

D5

116

GN

D6

5

AGN

D10

3

GPIO11/CLKRUN# 8

LAD3/GPIOF4 1LAD2/GPIOF3 128LAD1/GPIOF2 127LAD0/GPIOF1 126

LFRAME#/GPIOF6 3LCLK/GPIOF5 2LRESET#/GPIOF7 7

SERIRQ/GPIOF0 125

GPIO85/GA20 121KBRST#/GPIO86 122

ECSCI#/GPIO54 29GPIO65/SMI# 9

GPIO10/LPCPD# 124

GPIO67/N2TMS123GPIO17/SCL1/N2TCK 70

GPIO73/SCL2 67

GPIO23/SCL3 119

GPIO22/SDA1/N2TMS 69

GPIO74/SDA2 68

GPIO31/SDA3 120

F_SDI&F_SDIO186F_SDIO&F_SDIO087F_SCK92 F_CS0#90

VREF104

GPIO90/AD097GPIO91/AD198GPIO92/AD299GPIO93/AD3100

GPIO94/DA0101GPIO95/DA1105GPIO96/DA2106

GPIO37/PSCLK1 72GPIO26/PSCLK2 10GPIO35/PSDAT1 71GPIO27/PSDAT2 11GPIO246

GPIO42/TCK17GPIO43/TMS20GPIO44/TDI21

GPIO34/CIRRXL14

GPIO47/SCL4 24

GPIO50/PSCLK3/TDO 25GPIO52/PSDAT3/RDY# 27

GPIO53/SDA4 28

PSL_IN1_GPI70# 73PSL_OUT_GPIO71# 74

VSBY

75

GPIO41/F_WP#80

GPIO7582GPIO7683GPIO7784

GPIO81/F_WP#91 PSL_IN2_GPI06# 93

GPIO7/AD794 GPIO3/AD695 GPIO4/AD596

GPIO97/DA3107

GPIO5/AD4108

GPIO30/F_WP#109

GPO82/IOX_LDSH/TEST#110 GP/I/O84/IOX_SCLK/XORTR#112

VBKU

P11

4

VCORF 44

GPIO0279

GPIO20/TA2/IOX_DIN_DIO117

GPIO3615

GPIO51/N2TCK26

1 0F 2U2701A

NPCE885PA0DX-1-GP

1 0F 2U2701A

NPCE885PA0DX-1-GP

1 2


12 C2

709

SC2D

2U10

V3KX

-1GP

DY C270

9SC

2D2U

10V3

KX-1

GP

DY

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FAN_VCC

FAN_VCC

FAN_TACH1_C

FON#

FAN_VCC

THERM_SYS_SHDN#

FAN_TACH1_C

FAN_VCC

THM_SML1_DATA

T_CRIT#

T_CRIT#

THM_SML1_CLK

NCT7718_DXP

THERM_SYS_SHDN#

ALERT#

ALERT#

NCT7718_DXN

THM_SML1_CLK

THM_SML1_DATA

VGA_THRM

MISC_THRM

3D3V_S0

5V_S0

5V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

PURE_HW_SHUTDOWN#[27,36,85]

FAN_TACH1[27]

FAN1_DAC[27]

P2800_VGA_DXP[85]

VGA_THRM [27]

P2800_VGA_DXN[85]

SML1_DATA[20,27,85]

SML1_CLK[20,27,85]

Title


Date: Sheet of


BMW Z4 DIS A00

Thermal NCT7718W/Fan Controllor P2793A3

28 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


28 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


28 105Friday, March 30, 2012

<Core Design>

SSID = Thermal

Layout Note:Signal Routing Guideline:Trace width = 15mil

EMI

Thermal Sensor

Temp.(C)

95Pull high

90

85

Pull low

Floating

ADJ

Fan controller

Layout Note:Need 10 mil trace width.

Layout Note:Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

GPU thermal sensor

Layout Note:Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

Layout Note:C2812 close U2801

2.System Sensor, Put on palm rest

X01 12/02

X03 2/6

X03 2/13

12

C2804

SCD1

U10V

2KX-

5GP

C2804

SCD1

U10V

2KX-

5GP

12


DY


DY1

2 C281

5

SCD1

U10V

2KX-

5GP

DY C281

5

SCD1

U10V

2KX-

5GP

DY

12

C2809SC4D7U6D3V3KX-GP DY

C2809SC4D7U6D3V3KX-GP DY

12

C281

4SC

10U6

D3V3

MX-

GP

C281

4SC

10U6

D3V3

MX-

GP

VDD1D+2D-3T_CRIT#4 GND 5ALERT# 6SDA 7SCL 8

U2801

NCT7718W-GP74.07718.0B9

U2801

NCT7718W-GP74.07718.0B9

12

EC2801SCD1U16V2KX-3GPDY EC2801SCD1U16V2KX-3GPDY

1 2R2814 2KR2F-3-GPR2814 2KR2F-3-GP

12

C2816SC470P50V3JN-2GPDYC2816SC470P50V3JN-2GPDY

12



12 3

4

RN2801

SRN2K2J-1-GP

RN2801

SRN2K2J-1-GP

1 AFTP2802AFTP2802

1 2R2813 0R0402-PAD-2-GPR2813 0R0402-PAD-2-GP 1

2

C2810SC2200P50V2KX-2GPDYC2810SC2200P50V2KX-2GPDY

1

2

34

5

6

Q28042N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3FQ2804

2N7002KDW-GP


1 AFTP2801AFTP2801

1 2

R28020R2J-2-GP

DY

R28020R2J-2-GP

DY

12

C2812SC2200P50V2KX-2GPC2812SC2200P50V2KX-2GP

12

C2803

SC4D

7U6D

3V3K

X-G

P

C2803

SC4D

7U6D

3V3K

X-G

P12


G

S

D

Q2802


Q2802


VCC5DXP6DXN7OTZ8 GND 2

ADJ 1TDL 3TDR 4

U2803

P2800EB0-GP74.02800.B71

DY

U2803

P2800EB0-GP74.02800.B71

DY

3

1

2

Q2803PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

Q2803PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

12 C2

808

SCD1

U10V

2KX-

5GP

DY C280

8

SCD1

U10V

2KX-

5GP

DY


12


FON#1VIN2VO3VSET4

GND 8GND 7GND 6GND 5

U2802

G991P11U-GP74.00991.0312nd = 74.02793.A313rd = 74.05606.A71

U2802

G991P11U-GP74.00991.0312nd = 74.02793.A313rd = 74.05606.A71

1 2

R28070R0402-PAD-2-GP

R28070R0402-PAD-2-GP

1 2R2815 18K7R2F-GPR2815 18K7R2F-GP

1

23

4

5

FAN1

ACES-CON3-11-GP

20.F0772.003

2nd = 20.F1841.003

FAN1

ACES-CON3-11-GP

20.F0772.003

2nd = 20.F1841.003

12

R2837402KR2F-GP

DY

R2837402KR2F-GP

DY

21

D2802

CH55

1H-3

0PT-

GP

2ND = 83.R5003.H8H3rd = 83.5R003.08F

83.R5003.C8F

DYD2802

CH55

1H-3

0PT-

GP

2ND = 83.R5003.H8H3rd = 83.5R003.08F

83.R5003.C8F

DY

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

29 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

29 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

29 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

30 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

30 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

30 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ISOLATn

LAN_XTAL1

LX

PLT_RST#_LANISOLATn

PCIE_RXN6_L

RBIAS

LOM_PPS

PCIE_RXP6_L

LX

LAN_XTAL0

CLK_LAN_REQ#_R

LAN_

ENAB

LE_R

_C PM_LAN_ENABLE_R

CLK_LAN_REQ#_EN

CLK_LAN_REQ#_R

Q40

2_1

PLT_RST#_LAN

LAN_XTAL1

LAN_XTAL0

RBIAS

LAN_SMCLKLAN_SMDATA

3D3V_S0

3D3V_LAN_S5

3D3V_LAN_S53D3V_S5

3D3V_LAN_S5 3D3V_LAN_S5

DVDDL AVDDL AVDDVCO

AVDDVCO

AVDDL

AVDDL

AVDDH

AVDDH

AVDDVCO

3D3V_LAN_S5

DVDDL

CLK_PCIE_LAN[20]CLK_PCIE_LAN#[20]

PCIE_RXP6[20]PCIE_RXN6[20]

PCIE_TXN6[20]PCIE_TXP6[20]

PCIE_WAKE#[27]

PM_LAN_ENABLE[27]

PCIE_CLK_LAN_REQ#[20]

PLT_RST#[5,18,27,65,66,71]

LAN_MDI1N[59]LAN_MDI1P[59]

LAN_MDI0N[59]LAN_MDI0P[59]

Title


Date: Sheet of


BMW Z4 DIS A00

LOMA3

31 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

LOMA3

31 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

LOMA3

31 105Friday, March 30, 2012

<Core Design>

SSID = LOM

Close to pin1Layout Note:


Layout Note:Close to pin13





Close to pin9Layout Note: Layout Note:

Close to pin22

X01 12/15

X01 12/15 X03 1/30

X03 2/6

A00 3/23

12

C3114SC1U6D3V2KX-GP

C3114SC1U6D3V2KX-GP

12




12

C3103

SC1U6D3V2KX-GP

C3103

SC1U6D3V2KX-GP

G

S

D

Q3105


Q3105


1 2

R31130R0402-PAD-2-GPR31130R0402-PAD-2-GP

12


DY


DY

12


12

C3124SC1U6D3V2KX-GP

DY

C3124SC1U6D3V2KX-GP

DY

12

C3107

SC1U6D3V2KX-GP

C3107

SC1U6D3V2KX-GP

12

R3122100KR2J-1-GP

R3122100KR2J-1-GP

12

C3125

SC10U6D3V5KX-1GP

C3125

SC10U6D3V5KX-1GP

1 234

RN3101SRN10KJ-5-GPDY

RN3101SRN10KJ-5-GPDY

12

R31312K37R2F-GPR31312K37R2F-GP


12

R310210KR2J-3-GP

R310210KR2J-3-GP

2 1

(

(

L3101BLM18KG601SN1D-GP

68.00084.G712nd = 68.00335.0913rd = 68.00230.131

(

(


68.00084.G712nd = 68.00335.0913rd = 68.00230.131

12

EC31

01SC

D1U1

0V2K

X-5G

P

DY

EC31

01SC

D1U1

0V2K

X-5G

P

DY

12

R311610KR2J-3-GPR311610KR2J-3-GP

41

2 3

X3101

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G61

X3101

XTAL-25MHZ-155-GP

82.30020.D412nd = 82.30020.G61

12



12

C3120

SCD1U10V2KX-5GP

C3120

SCD1U10V2KX-5GP

12

C3106

SCD1U10V2KX-5GP

C3106

SCD1U10V2KX-5GP

12

C3121

SC1U10V2KX-1GP

DY

C3121

SC1U10V2KX-1GP

DY

12

C3127

SC1KP50V2KX-1GP

C3127

SC1KP50V2KX-1GP

12

C3102

SC10U6D3V5KX-1GP

C3102

SC10U6D3V5KX-1GP

12



12

L3103IND-4D7UH-253-GP

68.4R71E.10R

2nd = 68.4R71G.10G

L3103IND-4D7UH-253-GP

68.4R71E.10R

2nd = 68.4R71G.10G


12

C3108

SCD1U10V2KX-5GP

C3108

SCD1U10V2KX-5GP


12

C3129SC18P50V2JN-1-GPC3129SC18P50V2JN-1-GP

12

C3109

SC1U6D3V2KX-GP

C3109

SC1U6D3V2KX-GP

VDD331

PERST# 2

WAKE#3

ISOLAT# 5

AVDDL_REG6AVDDH_REG9

RBIAS 10

AVDDL13 AVDD3316

TESTMODE 27

SMDATA 26SMCLK 25

PPS 24

AVDDH22

LX 40

DVDDL_REG37

AVDDL34 AVDDL31

GND 41

NC#17 17NC#18 18NC#19 19NC#20 20NC#21 21NC#28 28

XTLI 8XTLO 7

REFCLK_P33REFCLK_N32

CLKREQ#4

RX_N36 RX_P35

TX_N29 TX_P30

TRXP011TRXN012

TRXP114TRXN115

LED0 38LED1 39LED2 23

U3101

AR8162-AL3A-R-GP71.08162.A03

U3101

AR8162-AL3A-R-GP71.08162.A03

12



12

C3112

SCD1U10V2KX-5GP

C3112

SCD1U10V2KX-5GP

12

R310310KR2J-3-GPR310310KR2J-3-GP

12R3106

0R2J-2-GPDYR3106

0R2J-2-GPDY

G

DS

Q3106PA102FMG-GP-U84.00102.031

2nd = 84.02301.G31

Q3106PA102FMG-GP-U84.00102.031

2nd = 84.02301.G31

12

C3110SCD1U10V2KX-5GPDY C3110SCD1U10V2KX-5GPDY

2 1

(

(


68.00084.G712nd = 68.00335.0913rd = 68.00230.131

(

(


68.00084.G712nd = 68.00335.0913rd = 68.00230.131

12

C3126

SCD1U10V2KX-5GP

C3126

SCD1U10V2KX-5GP

12

C3130SC1U6D3V2KX-GP

C3130SC1U6D3V2KX-GP

3

1

2Q3102PMBS3904-1-GP

DYQ3102PMBS3904-1-GP

DY

12

C3101

SC10U6D3V5KX-1GP

C3101

SC10U6D3V5KX-1GP

12

C3105

SC1KP50V2KX-1GP

DY

C3105

SC1KP50V2KX-1GP

DY

12

EC3122

SC4D7U6D3V3KX-GP

EC3122

SC4D7U6D3V3KX-GP

12



3

1

2

Q3101PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

Q3101PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

12

C3104

SCD1U10V2KX-5GP

C3104

SCD1U10V2KX-5GP

12



12

R313630KR2J-4-GPR313630KR2J-4-GP

1 2

R311720KR2J-L2-GPR311720KR2J-L2-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

32 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

32 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

32 105Friday, March 30, 2012

DMB40

(Blanking)

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A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

33 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

33 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

33 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

34 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

34 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

34 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

35 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

35 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

35 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_S3CNTRL

5V_RUN_ENABLE

3.3V_RUN_ENABLE

1.5V_RUN_ENABLE

PS_S3CNTRL

15V_S5

5V_S5 5V_S0

3D3V_S5 3D3V_S0

3D3V_AUX_S5

1D5V_S3 1D5V_S0

S0_PWR_GOOD[19,27]

SYS_PWROK [19]

PS_S3CNTRL [37,93]

S5_ENABLE [27]

PURE_HW_SHUTDOWN# [27,28,85]

3V_5V_EN[41]

IMVP_PWRGD[27,42]

PM_SLP_S3#[19,27,37,47]

RUN_ENABLE[21,37]

Title


Date: Sheet of


BMW Z4 DIS A00

Power Plane EnableA3

36 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


36 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


36 105Friday, March 30, 2012

<Core Design>

3D3V_S0 ComsumptionPeak current 2.5A

5V_S0 ComsumptionPeak current 6A

5V_S0

3D3V_S0

ROSA Run Power

SSID = Reset.Suspend

G

GD

D

S

S

AO4468 MAX 11.6ARds(on) = 11 ~ 14mOhm

AO4468 MAX 11.6ARds(on) =11 ~ 14mOhm

1D5V_S0

MAX Current 6A

TPCA8062-H-GP MAX 28ARds(on) = 4.1~5.6m Ohm

X03 2/6

G

S

D

Q3603


Q3603


1 2

R360710KR2J-3-GP

R360710KR2J-3-GP

1 2

R363010KR2J-3-GP

R363010KR2J-3-GP

12

C3603SC10U6D3V5KX-1GPC3603SC10U6D3V5KX-1GP

12

R3602200KR2J-L1-GP DYR3602200KR2J-L1-GP DY

12


12


1

2

3

D3602BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D3602BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

1 2

R36140R0402-PAD-2-GP

R36140R0402-PAD-2-GP

1

2

3

D3601BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D3601BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

1 2

R360510KR2J-3-GP

R360510KR2J-3-GP

12345

678 S

SSGD

DDD

U3601AO4468-GP

84.04468.0372nd = 84.04178.0373rd = 84.02659.037

SSSGD

DDD

U3601AO4468-GP

84.04468.0372nd = 84.04178.0373rd = 84.02659.037

12


12


12

R3604100KR2J-1-GPR3604100KR2J-1-GP

12


1 2

R3606100KR2J-1-GP

R3606100KR2J-1-GP

12345

678 S

SSGD

DDD

U3602AO4468-GP

84.04468.0372nd = 84.04178.0373rd = 84.02659.037

SSSGD

DDD

U3602AO4468-GP

84.04468.0372nd = 84.04178.0373rd = 84.02659.037

12


1 2

R36031KR2J-1-GP

R36031KR2J-1-GP

12345

678 S

SSGD

DDD

U3606

TPCA8062-H-GP

84.08062.0372nd = 84.00460.037

SSSGD

DDD

U3606

TPCA8062-H-GP

84.08062.0372nd = 84.00460.037

1 2 3456

Q36022N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3F

Q36022N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3F

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Q37

02_D

Q37

01_D

0D75V_EN

VDDPWRGOOD_RPM_DRAM_PWRGD

VDDPWRGOOD_D

1D05V_VTT_PWRGD

SM_DRAMRST#_D

0D75V_EN

PM_DRAM_PWRGD

VDDPWRGOOD_R

1D5V_S00D75V_S0

1D5V_S3

3D3V_S0 1D5V_S0

+V_SM_VREF_CNTM_VREF_DQ_DIMMA

PS_S3CNTRL[36,93]

0D75V_EN [46]

PS_S3CNTRL[36,93]

1D05V_VTT_PWRGD[45,48]

DDR3_DRAMRST# [14,15]

DRAMRST_CNTRL_PCH[20]

SM_DRAMRST#[5]

PS_S3CNTRL[36,93]

PM_DRAM_PWRGD[19]

VDDPWRGOOD [5]

PS_S3CNTRL[36,93]

RUN_ENABLE[21,36]

PM_SLP_S3#[19,27,36,47]

Title


Date: Sheet of


BMW Z4 DIS A00

S3 Power ReductionA3

37 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


37 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


37 105Friday, March 30, 2012

DMB40

S3 Power Reduction CircuitSM_DRAMRST#

Close to CPUS3 Power Reduction Circuit SM_DRAMRST#

Close to DIMMS3 Power Reduction Circuit PM_DRAM_PWRGD

Close to CPUS3 Power Reduction Circuit PM_DRAM_PWRGD

PM_DRAM_PWRGD must have a maximum of 15ns rise or fall timeover VDDQ * 0.55± 200mV and the edge must be monotonic

Close to CPUS3 Power Reduction Circuit Processor VREF_DQ Implementation

X01 11/28

X01 12/02

SSID = Reset.Suspend

X03 2/6

G S

D

Q37022N7002K-2-GP

84.2N702.J312ND = 84.2N702.031DY

Q37022N7002K-2-GP

84.2N702.J312ND = 84.2N702.031DY

G

S

D

Q3709

2N7002K-2-GP

DY

Q3709

2N7002K-2-GP

DY

12

R3704220R2J-L2-GPDYR3704220R2J-L2-GPDY

G

S

D

Q3704

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.0313rd = 84.07002.I314th = 84.2N702.W31

Q3704

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.0313rd = 84.07002.I314th = 84.2N702.W31

1 2R3716 22R2J-2-GPDYR3716 22R2J-2-GPDY

1 2

R37181KR2J-1-GPR37181KR2J-1-GP

1 2

R37070R2J-2-GP

DY

R37070R2J-2-GP

DY

1 2

R3719910R2F-1-GPR3719910R2F-1-GP

G S

D

Q37012N7002K-2-GP84.2N702.J312ND = 84.2N702.0313rd = 84.07002.I314th = 84.2N702.W31


12

C3702SC100P50V2JN-3GPC3702SC100P50V2JN-3GP

12

R3705100KR2J-1-GPR3705100KR2J-1-GP

G

S

D

Q3703


Q3703


12

R370322R2J-2-GPR370322R2J-2-GP

12

R372239R2J-L-GPDYR3722

39R2J-L-GPDY

12

R3720750R2F-GPR3720750R2F-GP

12



12


12



12

R3702200R2F-L-GPDYR3702200R2F-L-GPDY

1 2

R37100R0402-PAD-2-GP

R37100R0402-PAD-2-GP

1

2

34

5

U3701

TC7SZ08FU-2-GP73.7SZ08.EAH2ND = 73.01G08.L043rd = 73.7SZ08.DAH

U3701

TC7SZ08FU-2-GP73.7SZ08.EAH2ND = 73.01G08.L043rd = 73.7SZ08.DAH

G

S

D

Q3708


Q3708


12

R371410KR2J-3-GPR371410KR2J-3-GP

1 2

R37170R2J-2-GP

DY

R37170R2J-2-GP

DY www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_ID_R

PSID_DISABLE#_R_C

PS_ID

PQ3802_1

PS_ID_R2

AD_OFF_LAD_OFF_R

PQ3809_D

AC_IN#_G

AD++DC_IN

3D3V_S5

5V_S5

3D3V_S5

PSID_EC [27]

PWR_CHG_AD_OFF[27]

AC_IN_KBC#[27]

Title


Date: Sheet of


BMW Z4 DIS A00DCIN

A3

38 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00DCIN

A3

38 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00DCIN

A3

38 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Support

Id=-9.6AQg=-25nCRdson=18~30mohm

PSID Layout width > 25milLayout Note:

X01 12/02

X01 12/19

X03 2/6

X03 1/30

X03 2/6

1 2PR3807

33R2J-2-GP

PR3807

33R2J-2-GP

12

PR3816

3K3R6J-GP

PR3816

3K3R6J-GP

AK

PD3801P6SBMJ24APT-GP

2nd = 83.22R03.03G83.P6SBM.AAG

PD3801P6SBMJ24APT-GP

2nd = 83.22R03.03G83.P6SBM.AAG

1234 5

678S

SSG D

DDD

PU3801

SI7121DN-T1-GE3-GP

84.06675.0302nd = 84.07121.037

SSSG D

DDD

PU3801

SI7121DN-T1-GE3-GP

84.06675.0302nd = 84.07121.037

12

PC38

05SC

D01U

50V2

KX-1

GP

PC38

05SC

D01U

50V2

KX-1

GP

G

SDD

PQ3801FDV301N-NL-GP

84.00301.A312nd = 84.3K329.031

D

PQ3801FDV301N-NL-GP

84.00301.A312nd = 84.3K329.031

12

PR3815100KR2J-1-GPDYPR3815100KR2J-1-GPDY

G

S

D

PQ3810

2N7002K-2-GP84.2N702.J31

DY

PQ3810

2N7002K-2-GP84.2N702.J31

DY

12

PR3814100KR2J-1-GPDYPR3814100KR2J-1-GPDY E

BC

R1

R2

PQ3804

PDTC124EU-1-GP84.00124.H1K

2nd = 84.05124.011

R1

R2

PQ3804

PDTC124EU-1-GP84.00124.H1K

2nd = 84.05124.011

12345

6789

DCIN1

DC-JACK255-GP

22.10261.401

DCIN1

DC-JACK255-GP

22.10261.401

12

PC38

01SC

1U25

V5KX

-1G

PPC

3801

SC1U

25V5

KX-1

GP

12

3

PD3803BAV99-5-GP-U

83.00099.T112nd = 83.3X101.011

PD3803BAV99-5-GP-U

83.00099.T112nd = 83.3X101.011

1 2PR3819

0R0603-PAD-2-GP

PR3819

0R0603-PAD-2-GP

3

1

2

PQ3802PMBS3904-1-GP

84.03904.L062nd = 84.03904.P11

PQ3802PMBS3904-1-GP

84.03904.L062nd = 84.03904.P11

1 2PR3808

33R2J-2-GPDYPR3808

33R2J-2-GPDY

12

PC38

06SC

10U2

5V5K

X-G

PPC

3806

SC10

U25V

5KX-

GP

12

PR3811100KR2J-1-GP

PR3811100KR2J-1-GP

12

PR380310KR2J-3-GPPR380310KR2J-3-GP

12

PC38

03SC

D01U

50V2

KX-1

GP

PC38

03SC

D01U

50V2

KX-1

GP

12

PR380215KR2J-1-GP

PR380215KR2J-1-GP

12

PR38062K2R2J-2-GPPR38062K2R2J-2-GP

GS

D

PQ38092N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

3rd = 84.07002.I314th = 84.2N702.W31

PQ38092N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

3rd = 84.07002.I314th = 84.2N702.W31

12

PC38

04SC

D01U

50V2

KX-1

GP

PC38

04SC

D01U

50V2

KX-1

GP

EB

CR1

R2PQ3805

PDTA124EU-1-GP84.00124.K1K2nd = 84.05124.A11

R1

R2PQ3805

PDTA124EU-1-GP84.00124.K1K2nd = 84.05124.A11

12

PC3802SCD1U25V3KX-GPPC3802SCD1U25V3KX-GP

12

PR38

0924

0KR3

-GP

PR38

0924

0KR3

-GP

1 2

3

PD3804SM24DTCT-GP-U

DY PD3804SM24DTCT-GP-U

DY

12

PR381047KR3J-L-GP

PR381047KR3J-L-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BAT_SCL

BAT_SDA

BAT_IN#

PBAT_SMBDAT1PBAT_SMBCLK1

BT+

PBAT_PRES1#

PBAT_SMBCLK1PBAT_SMBDAT1

PBAT_PRES1#SYS_PRES1#

SYS_PRES1#SYS_PRES1#

3D3V_AUX_KBC

BT+

BAT_SDA[27,40]BAT_SCL[27,40]

BAT_IN#[27]

Title


Date: Sheet of


BMW Z4 DIS A00

BATT CONNA3

39 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

BATT CONNA3

39 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

BATT CONNA3

39 105Friday, March 30, 2012

<Core Design>

Layout Note:Place near Battery CONN

Batt CONN

SSID = PWR.Support

X01 12/02

X01 12/02

X01 12/02

X01 12/20

Note: Mark the ON/OFF on the MB.

A00 3/15

12

EC3902SC10P50V2JN-4GPDYEC3902SC10P50V2JN-4GPDY

1AFTP3905AFTP3905

1 2R3902 100R2J-2-GPR3902 100R2J-2-GP

57

41NP1

2NP2

36

BATSW1SW-SLIDE77-GP

62.40068.0212nd = 62.40018.641

BATSW1SW-SLIDE77-GP

62.40068.0212nd = 62.40018.641

1 2R3904 100R2J-2-GPR3904 100R2J-2-GP

1AFTP3904AFTP3904

1 2

3

D3903BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

DY D3903BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

DY

12

EC3901SC10P50V2JN-4GPDYEC3901SC10P50V2JN-4GPDY 1

23456789

10

11BATT1

SYN-CON9-24-GP20.81755.009

2nd = 20.81771.009

BATT1

SYN-CON9-24-GP20.81755.009

2nd = 20.81771.009

1 2

3

D3901BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11


83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

DY

1AFTP3902AFTP3902

12

C3902SCD1U50V3KX-GP DYC3902SCD1U50V3KX-GP DY

1 2

3

D3902BAV99-5-GP-U

83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11


83.00099.T112nd = 83.00099.K113rd = 83.BAV99.D11

DYK

A

PD39031SMA18AT3G-GPDY PD39031SMA18AT3G-GPDY

1 2R3903 100R2J-2-GPR3903 100R2J-2-GP

1 2

R39010R2J-2-GP

DYR3901

0R2J-2-GP

DY

1AFTP3903AFTP39031

2

C3901SC2200P50V2KX-2GPC3901SC2200P50V2KX-2GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_CHG_ACOK

PWR_CHG_SRP

DC_IN_D

AC_IN#

PWR_CHG_BAT_SCL

PWR_CHG_BAT_SDA

PWR_CHG_IOUT

PWR_CHG_CMPOUT

PWR_CHG_CSOP_1

PWR_CHG_PHASE BT+_R

PWR_CHG_IFAULT

PWR_

CHG_

ACN

PWR_CHG_BTST

PWR_

CHG_

ACP

CHG_PHASE

PWR_CHG_REGN

PWR_CHG_ILIM

PWR_CHG_ACDET

AD+_G_2

PWR_CHG_ACOK

AD+_G_1

PWR_CHG_SRN

PWR_CHG_CMPIN

PWR_CHG_CSON_1

PWR_CHG_VCC

PWR_CHG_IOUT

PWR_CHG_LODRV

PWR_CHG_CMPOUT

PWR_CHG_HIDRV

PWR_CHG_CMPINPQ4004_6

PQ4904_3PWR_CHG_CMPIN

PWR_CHG_CMPOUT

PWR_CHG_REGN

3D3V_AUX_S5

AD+_TO_SYS

3D3V_AUX_KBC

DCBATOUTAD+

CHG_AGND

CHG_AGND CHG_AGND

CHG_AGND

CHG_AGNDCHG_AGND

CHG_AGND

AD+

CHG_AGND

CHG_AGND

CHG_AGND

CHG_AGND

CHG_AGND

3D3V_AUX_KBC

CHG_AGND

3D3V_AUX_KBC

PWR_CHG_REGN

3D3V_AUX_KBC

AD+

BT+

BT+

CHG_AGND

CHG_AGND

3D3V_AUX_S5

BAT_SCL[27,39]

H_PROCHOT#[5,27]

BAT_SDA[27,39]

AD_IA [27]

BOOST_MODE#[27]

AC_IN#[27]

AD_IA_HW [27]AD_IA_HW2[27]

Title


Date: Sheet of


BMW Z4 DIS A00

CHARGER BQ24727A2

40 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CHARGER BQ24727A2

40 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

CHARGER BQ24727A2

40 105Friday, March 30, 2012

<Core Design>

AD_IA_HWH_PROCHOT#

0

1

0

90W

65W

130W

AD_IA_HW2

1

0

0

Charger Current=1.25A

Id= -10AQg= -22nCRdson=14~13mohm

SSID = Charger

Id=-8.6AQg=-65nCRdson=15~18mohm

EC Code for BQ24727

X01 12/12

X01 12/21

X03 1/30

X03 2/16

A00 3/23

12

PG40

12GA

P-CL

OSE-

PWR-

3-GP

PG40

12GA

P-CL

OSE-

PWR-

3-GP

1

2

3 4

5

6

PQ4002

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F3rd = 84.2N702.E3F4th = 84.2N702.F3F

PQ4002

2N7002KDW-GP84.2N702.A3F


1234 5

678S

SSG D

DDD

PU4006

SI7121DN-T1-GE3-GP84.06675.0302nd = 84.07121.037

SSSG D

DDD

PU4006

SI7121DN-T1-GE3-GP84.06675.0302nd = 84.07121.037

12

PG40

09GA

P-CL

OSE-

PWR-

3-GP

PG40

09GA

P-CL

OSE-

PWR-

3-GP

12

PR4023

32K4R2F-1-GPDY

PR4023

32K4R2F-1-GPDY

12

PC40

22SC

220P

50V2

JN-3

GPPC

4022

SC22

0P50

V2JN

-3GP

1 2PG4011

GAP-CLOSE-PWR-3-GP

PG4011

GAP-CLOSE-PWR-3-GP

12

EC40

01SC

2200

P50V

2KX-

2GP

EC40

01SC

2200

P50V

2KX-

2GP

12

PC4016SC10U25V5KX-GP


1 2

PR40220R0402-PAD-2-GP

PR40220R0402-PAD-2-GP

ILIM10

VCC20

GN

D14

SCL9

SDA8

ACDET6

IOUT 7ACOK#5

ACP

2

ACN

1

BTST 17

REGN 16

HIDRV 18

PHASE 19

LODRV 15

CMPIN4

SRN 12

CMPOUT3

SRP 13

GN

D21

NC#1111

PU4001

BQ24727RGRR-GP74.24727.073

PU4001

BQ24727RGRR-GP74.24727.073

12


12

PC40

19SC

D1U2

5V3K

X-GP

PC40

19SC

D1U2

5V3K

X-GP

12



12

PR4026100KR2J-1-GPDY PR4026100KR2J-1-GPDY

G

SD

PQ40012N7002A-7-GP

DY

PQ40012N7002A-7-GP

DY

12

PR4025470KR2J-2-GPPR4025470KR2J-2-GP

1 2

PR40090R3J-0-U-GP

PR40090R3J-0-U-GP

12345

678 S

SSGD

DDD

PU4004

SI7121DN-T1-GE3-GP84.06675.0302nd = 84.07121.037

SSSGD

DDD

PU4004

SI7121DN-T1-GE3-GP84.06675.0302nd = 84.07121.037

1 2PC4007

SC1U25V3KX-1-GPPC4007

SC1U25V3KX-1-GP

1 2 3 45678

910

G1 D1 D1 D1

G2 S2 S2 S2

D1D2

/S1

Q1

Q2

PU4002FDMC7200S-GP84.07200.A372nd = 84.05524.037

G1 D1 D1 D1

G2 S2 S2 S2

D1D2

/S1

Q1

Q2

PU4002FDMC7200S-GP84.07200.A372nd = 84.05524.037

12

PC40

03SC

1U25

V3KX

-1-G

P

DYPC40

03SC

1U25

V3KX

-1-G

P

DY

12

PR4017100KR2J-1-GPPR4017100KR2J-1-GP

12

PR40

3510

KR2F

-2-G

P

DY

PR40

3510

KR2F

-2-G

P

DY

12

PR401119K1R2F-GPPR401119K1R2F-GP

12

PR40

248K

45R2

F-2-

GP

DY

PR40

248K

45R2

F-2-

GP

DY

1 2PR4010 20R5J-GPPR4010 20R5J-GP

12

PR40

0310

0KR2

J-1-

GPPR

4003

100K

R2J-

1-GP

12

PC40

20SC

D1U2

5V2K

X-GP

DY

PC40

20SC

D1U2

5V2K

X-GP

DY

G

SD PQ4006

2N7002A-7-GP

84.2N702.E312nd = 84.2N702.J31

PQ40062N7002A-7-GP

84.2N702.E312nd = 84.2N702.J31

12

PR40

0110

KR2F

-2-G

PPR

4001

10KR

2F-2

-GP

1 2

PC4002SCD1U25V2KX-GP

PC4002SCD1U25V2KX-GP

12

PR40060R2J-2-GP

DY

PR40060R2J-2-GP

DY

12



12



12 PC

4010

SCD4

7U25

V3KX

-1GP

PC40

10SC

D47U

25V3

KX-1

GP

12


12



1

2

3 4

5

6

PQ4004

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

3rd = 84.2N702.E3F4th = 84.2N702.F3F

PQ4004

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

3rd = 84.2N702.E3F4th = 84.2N702.F3F

12PG4007 GAP-CLOSE-PWR-3-GPPG4007 GAP-CLOSE-PWR-3-GP

12

PG40

02

GAP-

CLOS

E-PW

R-3-

GP

PG40

02

GAP-

CLOS

E-PW

R-3-

GP

12PG4008 GAP-CLOSE-PWR-3-GPPG4008 GAP-CLOSE-PWR-3-GP

12

EC40

02SC

D1U2

5V2Z

Y-1G

P

DY EC40

02SC

D1U2

5V2Z

Y-1G

P

DY

12

PR40

3149

K9R2

F-L-

GPPR

4031

49K9

R2F-

L-GP

1 2

PR4033D01R3721F-GP-UPR4033D01R3721F-GP-U

12

PR4028100KR2J-1-GP

DYPR4028100KR2J-1-GP

DY

K A

PD4001SD103AWS-1-GP

83.1R504.A8F2nd = 83.1R504.B8F

PD4001SD103AWS-1-GP

83.1R504.A8F2nd = 83.1R504.B8F

1 2

PR400820R5J-GP

PR400820R5J-GP

1 2

PC4013SC3300P50V3KX-1GP

DYPC4013SC3300P50V3KX-1GP

DY

12

PR40043KR5J-GPPR40043KR5J-GP

1 2PL4001

IND-2D2UH-161-GP-U

68.2R210.20T2nd = 68.2R21D.10Y

PL4001

IND-2D2UH-161-GP-U

68.2R210.20T2nd = 68.2R21D.10Y

12

PR4007

316KR2F-GP

PR4007

316KR2F-GP

1 2PR4019 10R2F-L-GPPR4019 10R2F-L-GP

12

PR40203K3R2F-2-GP

DY

PR40203K3R2F-2-GP

DY

12



12

PC40

23SC

D1U2

5V2K

X-GP

PC40

23SC

D1U2

5V2K

X-GP

12

PR4036120KR2F-L-GP DYPR4036120KR2F-L-GP DY

12

PR4032100KR2J-1-GPPR4032100KR2J-1-GP

12

PR4015120KR2J-L-GP

PR4015120KR2J-L-GP

12

PC40

21SC

D1U2

5V2K

X-GP

PC40

21SC

D1U2

5V2K

X-GP

12

PR4027100KR2J-1-GPPR4027100KR2J-1-GP

12

PR40213K3R2F-2-GP

DY

PR40213K3R2F-2-GP

DY

1 2

PR403054K9R2F-L-GPPR403054K9R2F-L-GP

G

SD PQ4005

2N7002A-7-GP

84.2N702.E312nd = 84.2N702.J31

PQ40052N7002A-7-GP

84.2N702.E312nd = 84.2N702.J31

12

PG4003GAP-CLOSE-PWR-3-GPPG4003GAP-CLOSE-PWR-3-GP

12


1 2PR4002

D01R3721F-GP-U

PR4002

D01R3721F-GP-U

12

PR40143D3MR2J-GPPR40143D3MR2J-GP

12

PR40180R2J-2-GP

DYPR4018

0R2J-2-GP

DY

12

PR4039100KR2J-1-GP

PR4039100KR2J-1-GP

12

PC40

11SC

D047

U25V

2KX-

GPPC

4011

SCD0

47U2

5V2K

X-GP

12


12 PC

4018

SCD1

U25V

2KX-

GPPC

4018

SCD1

U25V

2KX-

GP

12 PC

4012

SCD0

1U50

V2KX

-1GP

PC40

12SC

D01U

50V2

KX-1

GP

1 2PR4012 7D5R2F-GPPR4012 7D5R2F-GP

www.Vinafix.vn

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

PWR_3D3V_FB2

PWR_

5V3D

3V_V

REG3

3D3V

_TER

PWR_3D3V_DRVL2

PWR_5V_FB1

PWR_5V_LL1

PWR_3D3V_VBST2

PWR_

5V_S

NUB

PWR_5V_DRVH1PWR_3D3V_DRVH2

PWR_5V_VO1

PWR_3D3V_LL2

PWR_5V_VBST1

PWR_5V_FB1_RPWR_3D3V_FB2_R

PWR_3D3V_VBST2_1

PWR_5V3D3V_VCLK

PWR_

3D3V

_SNU

B

PWR_5V_VBST1_1

PC4108_1

PC41

03_2

PC41

02_2

PWR_3D3V_EN2

PWR_3D3V_EN2

PWR_5V_EN1

PWR_5V3D3V_VCLK

PWR_5V_EN1

PWR_5V_CS1PWR_3D3V_CS2

PWR_5V3D3V_PGOOD

PWR_5V_EN1_R

PWR_5V_DRVL1

5V_PWR15V_S5

3D3V_PWR_2

3D3V_PWR

PWR_DCBATOUT_3D3VDCBATOUT

3D3V_PWR

3D3V_PWR_2

3D3V_S5

PWR_DCBATOUT_5V

5V_PWR_2

3D3V_AUX_S5

5V_PWR 5V_S5

5V_PWR

PWR_DCBATOUT_5VDCBATOUT PWR_DCBATOUT_3D3VDCBATOUT

15V_PWR

3D3V_S5

3D3V_AUX_S5

3V_5V_EN [36]

Title


Date: Sheet of


BMW Z4 DIS A00

TPS51123_5V/3D3VA2

41 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

TPS51123_5V/3D3VA2

41 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

TPS51123_5V/3D3VA2

41 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_5v3p3v

Design Current = 12A18A<OCP< 21.6A

Design Current = 7.64A12.1A<OCP< 14.2A

D

S G

S

D

G

X01 12/02X01 12/02

X01 12/13

X01 12/12

X01 12/12

X03 2/10

X03 2/10

X03 2/10

X03 2/13

X03 2/16

X03 2/16

X03 2/16X03 2/20

1

2

3

PD4102BAT54-7-F-GP

DY

PD4102BAT54-7-F-GP

DY

12

PR41112D2R5F-2-GP

DY PR41112D2R5F-2-GP

DY

12

PR41126K65R2F-GP

PR41126K65R2F-GP

1 2PG4143

GAP-CLOSE-PWR-3-GP

PG4143

GAP-CLOSE-PWR-3-GP

1 2PG4130

GAP-CLOSE-PWR-3-GP

PG4130

GAP-CLOSE-PWR-3-GP

1 2PG4144

GAP-CLOSE-PWR-3-GP

PG4144

GAP-CLOSE-PWR-3-GP

12

PC4109

SC10U25V5KX-GP

PC4109

SC10U25V5KX-GP

1

234

567

8

910

PU4102

FDMS3600-02-RJK0215-COLAY-GP84.03664.0372nd = 84.06920.037

PU4102

FDMS3600-02-RJK0215-COLAY-GP84.03664.0372nd = 84.06920.037

12

PC4128SC22U6D3V5MX-2GP

DY PC4128SC22U6D3V5MX-2GP

DY 1 2PG4131

GAP-CLOSE-PWR-3-GP

PG4131

GAP-CLOSE-PWR-3-GP

12PL4102

IND-2D2UH-46-GP-U68.2R210.20B

2nd = 68.2R21B.10J

PL4102

IND-2D2UH-46-GP-U68.2R210.20B

2nd = 68.2R21B.10J

AK

PD4104BZT52C15S-GP

83.15R03.C3F2nd = 83.15R03.E3F

PD4104BZT52C15S-GP

83.15R03.C3F2nd = 83.15R03.E3F

12


DY


DY

1 2PG4132

GAP-CLOSE-PWR-3-GP

PG4132

GAP-CLOSE-PWR-3-GP

12

PC4127

SC4D

7U6D

3V3K

X-GP

PC4127

SC4D

7U6D

3V3K

X-GP

12PC4117

SCD1U25V3KX-GP

PC4117

SCD1U25V3KX-GP

12

PC4106SC1U25V3KX-1-GPPC4106

SC1U25V3KX-1-GP

1 2PG4133

GAP-CLOSE-PWR-3-GP

PG4133

GAP-CLOSE-PWR-3-GP

12

PC4103

SCD1U25V3KX-GP

PC4103

SCD1U25V3KX-GP1 2PG4102

GAP-CLOSE-PWR-3-GP

PG4102

GAP-CLOSE-PWR-3-GP

1 2PG4147

GAP-CLOSE-PWR-3-GP

PG4147

GAP-CLOSE-PWR-3-GP

12

PR4102120KR2F-L-GPPR4102120KR2F-L-GP

1 2PG4148

GAP-CLOSE-PWR-3-GP

PG4148

GAP-CLOSE-PWR-3-GP

12

PR41140R2J-2-GP DY

PR41140R2J-2-GP DY

12

PC4124SC18P50V2JN-1-GPDYPC4124SC18P50V2JN-1-GPDY

1 2PG4134

GAP-CLOSE-PWR-3-GP

PG4134

GAP-CLOSE-PWR-3-GP

1 2PG4146

GAP-CLOSE-PWR-3-GP

PG4146

GAP-CLOSE-PWR-3-GP

1 2PG4103

GAP-CLOSE-PWR-3-GP

PG4103

GAP-CLOSE-PWR-3-GP

1 2PL4101

IND-1D5UH-34-GP

68.1R510.10J2nd = 68.1R51A.10E

PL4101

IND-1D5UH-34-GP

68.1R510.10J2nd = 68.1R51A.10E

1 2PG4104

GAP-CLOSE-PWR-3-GP

PG4104

GAP-CLOSE-PWR-3-GP

1 2PG4145

GAP-CLOSE-PWR-3-GP

PG4145

GAP-CLOSE-PWR-3-GP

1 2PG4106

GAP-CLOSE-PWR-3-GP

PG4106

GAP-CLOSE-PWR-3-GP

1 2PR4127

0R0402-PAD-2-GP

PR4127

0R0402-PAD-2-GP

12

3

PD4101BAT54S-7F-GP83.00054.Y812nd = 83.0R203.081

PD4101BAT54S-7F-GP83.00054.Y812nd = 83.0R203.081

12

PC4104

SC1KP50V2KX-1GP

PC4104

SC1KP50V2KX-1GP

1 2PG4107

GAP-CLOSE-PWR-3-GP

PG4107

GAP-CLOSE-PWR-3-GP

12

PR412110KR2F-2-GPPR412110KR2F-2-GP

12

PC4130

SC10U25V5KX-GP

PC4130

SC10U25V5KX-GP

12

PC4116

SCD1U25V3KX-GP

PC4116

SCD1U25V3KX-GP

12

PC4115

SC10U25V5KX-GP

PC4115

SC10U25V5KX-GP

1 2PG4108

GAP-CLOSE-PWR-3-GP

PG4108

GAP-CLOSE-PWR-3-GP

12

PC4111

SC10U25V5KX-GP

PC4111

SC10U25V5KX-GP

1 2PG4109

GAP-CLOSE-PWR-3-GP

PG4109

GAP-CLOSE-PWR-3-GP

12

PC4120

SCD1U10V2KX-4GP

DY

PC4120

SCD1U10V2KX-4GP

DY

12

PR4119100KR2J-1-GPPR4119100KR2J-1-GP

12

PG4117

GAP-CLOSE-PWR-3-GP

PG4117

GAP-CLOSE-PWR-3-GP

1 2PG4110

GAP-CLOSE-PWR-3-GP

PG4110

GAP-CLOSE-PWR-3-GP

12

PC4113SCD01U50V2KX-1GP


1 2PG4111

GAP-CLOSE-PWR-3-GP

PG4111

GAP-CLOSE-PWR-3-GP

12

PC4119

SCD1U10V2KX-4GP

DY

PC4119

SCD1U10V2KX-4GP

DY

1 2

PR41091D5R3F-GP

PR41091D5R3F-GP

12

PR411710KR2F-2-GP

PR411710KR2F-2-GP

1 2PG4101

GAP-CLOSE-PWR-3-GP

PG4101

GAP-CLOSE-PWR-3-GP

1 2PG4112

GAP-CLOSE-PWR-3-GP

PG4112

GAP-CLOSE-PWR-3-GP

1 2 3 45678

S S SDDDD

G

PU4106SIS406DN-T1-GE3-GP

2nd = 84.00406.03784.07696.037

S S SDDDD

G


2nd = 84.00406.03784.07696.037

1 2

PR41160R0402-PAD-2-GP

PR41160R0402-PAD-2-GP

12


1 2PG4113

GAP-CLOSE-PWR-3-GP

PG4113

GAP-CLOSE-PWR-3-GP

12

PG4116

GAP-CLOSE-PWR-3-GP

PG4116

GAP-CLOSE-PWR-3-GP

1 2PG4114

GAP-CLOSE-PWR-3-GP

PG4114

GAP-CLOSE-PWR-3-GP

1 2PG4119

GAP-CLOSE-PWR-3-GP

PG4119

GAP-CLOSE-PWR-3-GP

12

3

PD4103BAT54S-7F-GP83.00054.Y81

2nd = 83.0R203.081

PD4103BAT54S-7F-GP83.00054.Y81

2nd = 83.0R203.081

12

PR41102D2R5F-2-GP DYPR41102D2R5F-2-GP DY

1 2PG4115

GAP-CLOSE-PWR-3-GP

PG4115

GAP-CLOSE-PWR-3-GP

1 2PG4120

GAP-CLOSE-PWR-3-GP

PG4120

GAP-CLOSE-PWR-3-GP

12PT

4101

SE22

0U6D

3VM

-30-

GP

77.52271.09L2nd = 77.92271.03L

PT41

01SE

220U

6D3V

M-3

0-GP

77.52271.09L2nd = 77.92271.03L

12

PR411515KR2F-GPPR411515KR2F-GP

1 2

PR41081D5R3F-GP

PR41081D5R3F-GP

1 2PG4118

GAP-CLOSE-PWR-3-GP

PG4118

GAP-CLOSE-PWR-3-GP

1 2PG4121

GAP-CLOSE-PWR-3-GP

PG4121

GAP-CLOSE-PWR-3-GP

1 2 3 45678

S S S GDDDD


2nd = 84.00412.03784.08884.A37

S S S GDDDD


2nd = 84.00412.03784.08884.A37

12

PC4110

SCD1U25V3KX-GP

PC4110

SCD1U25V3KX-GP

12PT

4103

SE22

0U6D

3VM

-30-

GP

77.52271.09L2nd = 77.92271.03L

PT41

03SE

220U

6D3V

M-3

0-GP

77.52271.09L2nd = 77.92271.03L

12

PR41330R0402-PAD-2-GPPR41330R0402-PAD-2-GP

1 2PG4135

GAP-CLOSE-PWR-3-GP

PG4135

GAP-CLOSE-PWR-3-GP

12PT

4104

SE22

0U6D

3VM

-30-

GP

77.52271.09L2nd = 77.92271.03L

PT41

04SE

220U

6D3V

M-3

0-GP

77.52271.09L2nd = 77.92271.03L

1 2PG4122

GAP-CLOSE-PWR-3-GP

PG4122

GAP-CLOSE-PWR-3-GP

12

PR41130R2J-2-GPDYPR41130R2J-2-GPDY

VBST29

DRVH210

SW28

DRVL211

VFB24

EN26

CS25

VREG

33

VIN

12

VBST1 17

DRVH1 16

SW1 18

DRVL1 15

VO1 14

VFB1 2

EN1 20

CS1 1

VREG

513

GND 21

VCLK 19

PGOOD7

PU4101

TPS51225RUKR-GP74.51225.073

PU4101

TPS51225RUKR-GP74.51225.073

1 2

PG4105GAP-CLOSE-PWR-3-GP

PG4105GAP-CLOSE-PWR-3-GP

12

PC4123SC560P50V-GPDY PC4123SC560P50V-GPDY

1 2PG4136

GAP-CLOSE-PWR-3-GP

PG4136

GAP-CLOSE-PWR-3-GP

1 2PR4130

0R0402-PAD-2-GP

PR4130

0R0402-PAD-2-GP

1 2PG4123

GAP-CLOSE-PWR-3-GP

PG4123

GAP-CLOSE-PWR-3-GP

12

PC41

26SC

1U6D

3V2K

X-GP

PC41

26SC

1U6D

3V2K

X-GP

1 2PG4137

GAP-CLOSE-PWR-3-GP

PG4137

GAP-CLOSE-PWR-3-GP

1 2PG4124

GAP-CLOSE-PWR-3-GP

PG4124

GAP-CLOSE-PWR-3-GP

12

PC4114

SC10U25V5KX-GP

PC4114

SC10U25V5KX-GP

12PC4121

SC330P50V3KX-GPDYPC4121

SC330P50V3KX-GPDY

1 2PG4138

GAP-CLOSE-PWR-3-GP

PG4138

GAP-CLOSE-PWR-3-GP

12


1 2PG4125

GAP-CLOSE-PWR-3-GP

PG4125

GAP-CLOSE-PWR-3-GP

12

PR41310R2J-2-GP

DY

PR41310R2J-2-GP

DY

1 2PG4139

GAP-CLOSE-PWR-3-GP

PG4139

GAP-CLOSE-PWR-3-GP

1 2PG4126

GAP-CLOSE-PWR-3-GP

PG4126

GAP-CLOSE-PWR-3-GP

12


1 2PC4118SCD1U25V3KX-GPPC4118SCD1U25V3KX-GP

1 2PG4140

GAP-CLOSE-PWR-3-GP

PG4140

GAP-CLOSE-PWR-3-GP

12

PC4125SC18P50V2JN-1-GP DYPC4125SC18P50V2JN-1-GP DY

1 2PG4127

GAP-CLOSE-PWR-3-GP

PG4127

GAP-CLOSE-PWR-3-GP

12

PC4129

SC10U25V5KX-GP

PC4129

SC10U25V5KX-GP

1 2PG4141

GAP-CLOSE-PWR-3-GP

PG4141

GAP-CLOSE-PWR-3-GP

1 2PG4128

GAP-CLOSE-PWR-3-GP

PG4128

GAP-CLOSE-PWR-3-GP

12


1 2PG4142

GAP-CLOSE-PWR-3-GP

PG4142

GAP-CLOSE-PWR-3-GP

1 2PG4129

GAP-CLOSE-PWR-3-GP

PG4129

GAP-CLOSE-PWR-3-GP

12

PC4102

SCD1U25V3KX-GP

PC4102

SCD1U25V3KX-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCORE_R_SEL2

PWR_VCORE_MRAMP1

PWR_VCORE__PWM3PWR_VCORE__PWM2PWR_VCORE__PWM1

PWR_AXG_IPH2_1

PWR_VCORE_R_SEL3PWR_VCORE_R_REF

PWR_VCORE_VIN_UVLO_R

PWR_VCORE_R_SEL6

PWR_VCORE_MRAMP1

PWR_AXG_MRAMP2

PWR_VCORE_VIN_UVLO

PWR_AXG_SENSE2_N

PWR_VCORE_VR_READY2

PWR_VCORE_R_SEL5

PWR_VCORE_VR_READY1

PWR_VCORE_VR_TT#

PWR_VCORE_R_SEL4

PWR_AXG_A_ERR2 PWR_AXG_SENSE2_P

PWR_AXG_PWM2_2

PWR_AXG_A2_IN2

PWR_VCORE_VDD3

PWR_AXG_A2_OUT2

PWR_AXG_PWM2_1

PWR_AXG_A3_IN2

PWR_AXG_A3_OUT2

VCORE_IPH1_R0

PWR_VCORE_VR_ENABLE

PWR_VCORE_A3_OUT1

PWR_AXG_TS_FAULT#2

PWR_VCORE_A3_IN1

PWR_VCORE_A2_OUT1

PWR_VCORE_A2_IN1

PWR_VCORE_R_OSC

PWR_VCORE_A_ERR1

PWR_VCORE_R_SEL0

PWR_VCORE_SENSE_N

PWR_VCORE__TP_FAULT#1

PWR_VCORE_SENSE_P

PWR_AXG_MRAMP2

H_CPU_SVIDCLK

PWR_VCORE_IPH1_1

PWR_VCORE_VR_READY2

PWR_VCORE_VR_TT#

VCORE_IN1_L0VCORE_IN1_R0

VCORE_IN1_R1

H_CPU_SVIDDAT

AXG_IN2_L1 AXG_IN2_R0

AXG_IN2_R1

AXG_IPH2_R0

PWR_VCORE_R_SEL1

PWR_VCORE_VR_READY1

GND_1318

1D8V_S0

1D8V_S0

GND_1318

GND_1318

5V_S5

VCC_CORE

VCC_GFXCORE

3D3V_S5

GND_1318

3D3V_S0

GND_1318

VCCP_CPU

VCCP_CPU

VCCSENSE[8]

VSSSENSE[8]

VSS_AXG_SENSE [9]

VCC_AXG_SENSE [9]

PWR_VCORE__PWM1[43] PWR_AXG_PWM2_1 [44]PWR_VCORE__TP_FAULT#1[43] PWR_AXG_TS_FAULT#2 [44]

VR_SVID_ALERT#[8]

H_CPU_SVIDDAT[8]

H_CPU_SVIDCLK[8]

PWR_VCORE_IPH1_1_L[43]

PWR_AXG_IPH2_1_R [44]

IMVP_PWRGD [27,36]

D85V_PWRGD[48]

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(1/3)A2

42 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(1/3)A2

42 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(1/3)A2

42 105Friday, March 30, 2012

<Core Design>

SSID = CPU.Regulator

boot voltage=0V

Volterra's suggestion:VCC 26x22uF(0805) 1-PHASE VCCVCCAXG 23x22uF(0805) for 1-PHASE VCCAXG

X01 12/21

X01 12/21X03 2/10

X03 2/10

X03 2/10X03 2/10

X03 2/13

X02 2/13

X03 2/13

X02 2/13

X03 2/16

X03 2/21

X03 2/21

1 2

PC4213SC3300P50V2KX-1GPPC4213SC3300P50V2KX-1GP

1 2

PC4236SC33P50V2JN-3GPPC4236SC33P50V2JN-3GP

1 2PR4250

0R0402-PAD-2-GP

PR4250

0R0402-PAD-2-GP

12

PR4262280R2F-1-GP

PR4262280R2F-1-GP

12

PR42280R0402-PAD-2-GP

PR42280R0402-PAD-2-GP

1 2

PC4237 SCD1U10V2KX-5GPPC4237 SCD1U10V2KX-5GP

1 2PR4245 10KR2F-2-GPPR4245 10KR2F-2-GP

1 2PR4202

10KR2F-2-GP

PR4202

10KR2F-2-GP

1 2PR4203

10KR2F-2-GP

PR4203

10KR2F-2-GP

12

PR423310KR2F-2-GPPR423310KR2F-2-GP

12

PR425715K4R2F-GP

PR425715K4R2F-GP

12

PR4208191R2F-GP

PR4208191R2F-GP

12PC4232

SC22P50V2JN-4GPDY

PC4232

SC22P50V2JN-4GPDY

12

PC4211SC1U6D3V2KX-GPPC4211SC1U6D3V2KX-GP

1 2PR4226 54D9R2F-L1-GPPR4226 54D9R2F-L1-GP

1 2

PC4219 SCD01U16V2KX-3GPPC4219 SCD01U16V2KX-3GP

12


1 2PC4234

SC22P50V2JN-4GPDY

PC4234

SC22P50V2JN-4GPDY

1 2

PR42230R0402-PAD-2-GP

PR42230R0402-PAD-2-GP

1 2PR422243KR2F-GPPR422243KR2F-GP

1 2

PR4240665R2F-2-GPPR4240665R2F-2-GP

12

PR42190R0402-PAD-2-GP

PR42190R0402-PAD-2-GP

12

PR423110R2F-L-GPPR423110R2F-L-GP

12

PR420121D5R2F-1-GP

PR420121D5R2F-1-GP

12

PR4263100KR2F-L1-GP

PR4263100KR2F-L1-GP

1 2

PR42530R0402-PAD-2-GP

PR42530R0402-PAD-2-GP

12


1 2PR422756K2R2F-2-GPPR422756K2R2F-2-GP

12


12

PR4210402R2F-GP

PR4210402R2F-GP

1 2

PR42540R0402-PAD-2-GP

PR42540R0402-PAD-2-GP

1 2PR4244

6K81R2F-1-GPDY

PR4244

6K81R2F-1-GPDY

1 2

PR42161K96R2F-1-GPPR42161K96R2F-1-GP

1 2

PC4233 SC22P50V2JN-4GPPC4233 SC22P50V2JN-4GP

1 2PR42461KR2F-3-GPPR42461KR2F-3-GP

1 2

PR42291K96R2F-1-GPPR42291K96R2F-1-GP

1 2PR4251

0R0402-PAD-2-GP

PR4251

0R0402-PAD-2-GP

1 2PR4225 130R2F-1-GPPR4225 130R2F-1-GP

ALER

T#43

R_S

EL4

44VR

_TT#

45

R_S

EL6

48

VDD31

VDD3VIN_UVLO4PWM1_35PWM1_26PWM1_17

IPH1_111MRAMP112

SEN

SE1+

13SE

NSE

1-14

R_S

EL1

37

A2_I

N1

16A2

_OU

T117

MRAMP2 27

A3_I

N2

21A2

_OU

T222

A2_I

N2

23A_

ERR

224

SENSE2- 25SENSE2+ 26

R_S

EL0

38

IPH2_1 28TS_FAULT#2 29PWM2_2 31PWM2_1 30R_SEL5 32

A_ER

R1

15

R_REF 34R_SEL2 36

IPH2_2 33

R_O

SC39

R_SEL3 35

VDIO

42

VR_R

EAD

Y146

VR_R

EAD

Y247

TS_FAULT#18IPH1_39IPH1_210

A3_O

UT2

20A3

_OU

T119

A3_I

N1

18

VR_E

NAB

LE40

VCLK

41

VDD2

GN

D49PU4201

VT1318MFQX-1-GP

74.01318.B73

PU4201

VT1318MFQX-1-GP

74.01318.B73

1 2PR4224 75R2F-2-GPDYPR4224 75R2F-2-GPDY

1 2

PC4238SC680P50V3JN-GP

PC4238SC680P50V3JN-GP

12

PR420920KR2F-L-GP

PR420920KR2F-L-GP

12

PR42610R0402-PAD-2-GP

PR42610R0402-PAD-2-GP

12

PR42070R0402-PAD-2-GP

PR42070R0402-PAD-2-GP

1 2PG4201

GAP-CLOSE-PWR-3-GP

PG4201

GAP-CLOSE-PWR-3-GP

1 2


1 2PR4237487R2F-GPPR4237487R2F-GP

12PR4234

6K81R2F-1-GPDYPR4234

6K81R2F-1-GPDY

12


1 2PR4206

62R2J-GP

PR4206

62R2J-GP

12


12

PR4204825R2F-GP

PR4204825R2F-GP

12

PR4211825R2F-GP

PR4211825R2F-GP

12

PR420561K9R2F-GP

PR420561K9R2F-GP

1 2


1 2PR423515KR2F-GPPR423515KR2F-GP

1 2PC4218

SC1000P50V3JN-GP-U

PC4218

SC1000P50V3JN-GP-U1

2

PR4215

13KR2F-GP

PR4215

13KR2F-GP

1 2

PC4235 SC22P50V2JN-4GPPC4235 SC22P50V2JN-4GP

12

PC4201SC10P50V2JN-4GP

DY

PC4201SC10P50V2JN-4GP

DY

1 2

PR42520R0402-PAD-2-GP

PR42520R0402-PAD-2-GP

1 2

PR42497K68R2F-GP

PR42497K68R2F-GP

12

PC4229

SC10P50V2JN-4GP

DY

PC4229

SC10P50V2JN-4GP

DY

1 2

PR4236953R2F-GPPR4236953R2F-GP

1 2


12

PR4260866KR2F-GP

PR4260866KR2F-GP

12

PC4214

SCD1U10V2KX-5GP

PC4214

SCD1U10V2KX-5GP

1 2

PR4239300R2F-GPPR4239300R2F-GP

1 2

PR4256750R2F-GP

PR4256750R2F-GP

1 2PR42647K5R2F-1-GPPR42647K5R2F-1-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCORE_PU4301_VDD

PWR_CORE_BT1

PWR_CORE_VX1

1D8V_S0

VCC_CORE

PWR_CPU

1D8V_S0

GND_1323S_1

5V_S5PWR_CPU

PWR_VCORE__PWM1[42]

PWR_VCORE_IPH1_1_L[42]

PWR_VCORE__TP_FAULT#1[42]

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1326_CPU_CORE2+1(2/3)A3

43 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1326_CPU_CORE2+1(2/3)A3

43 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1326_CPU_CORE2+1(2/3)A3

43 105Friday, March 30, 2012

<Core Design>


Layout Note:Small Cap close IC

D.C. = 25AP.C. =33A

X01 12/12

X01 12/13

X01 12/19

X01 12/21

X03 2/16

X03 2/16X03 2/20

12

PC4310SCD1U10V2KX-5GPPC4310SCD1U10V2KX-5GP

1 2EG4309

GAP-CLOSE-PWR-3-GP

EG4309

GAP-CLOSE-PWR-3-GP

12

PC43

04SC

10U6

D3V3

MX-

GP

PC43

04SC

10U6

D3V3

MX-

GP

1 2

PL4301

IND-D1UH-26-GP

68.R1010.10T2nd = 68.R1010.10X

PL4301

IND-D1UH-26-GP

68.R1010.10T2nd = 68.R1010.10X

12

PC4302SC4D7U6D3V3KX-GP


12

PC43

06SC

10U6

D3V3

MX-

GP

PC43

06SC

10U6

D3V3

MX-

GP

1 2EG4304

GAP-CLOSE-PWR-3-GP

EG4304

GAP-CLOSE-PWR-3-GP

1 2PG4301

GAP-CLOSE-PWR-3-GP

PG4301

GAP-CLOSE-PWR-3-GP

1 2EG4307

GAP-CLOSE-PWR-3-GP

EG4307

GAP-CLOSE-PWR-3-GP

1 2PR4301

10R2F-L-GP

PR4301

10R2F-L-GP

1 2EG4311

GAP-CLOSE-PWR-3-GP

EG4311

GAP-CLOSE-PWR-3-GP

VDDH

C1

VDDB1

TS_FAULT#A1

VCCA4

ISENSEB2

PWMB3

BST B4

VX#D1 D1

VX#H1 H1VX#H2 H2VX#H3 H3

VSS

E1

VX#K4 K4

VDDH

C4VD

DHC3

VDDH

C2

VSS

L1VS

SL2

VX#K3 K3VX#K2 K2VX#K1 K1VX#H4 H4

VX#F4 F4VX#F3 F3VX#F2 F2VX#F1 F1VX#D4 D4

VSS

L3

GNDA2

VSS

L4

VSS

J4VS

SJ3

VSS

J2VS

SJ1

VSS

G4

VSS

G3

VSS

G2

VSS

G1

VSS

E4VS

SE3

VSS

E2

VX#D3 D3VX#D2 D2

PU4301

VT1326SFCX-1-GP74.01326.A7Z

PU4301

VT1326SFCX-1-GP74.01326.A7Z

1 2EG4308

GAP-CLOSE-PWR-3-GP

EG4308

GAP-CLOSE-PWR-3-GP

12

PC43

08SC

1U6D

3V2K

X-G

PPC

4308

SC1U

6D3V

2KX-

GP

12

PC43

05SC

10U6

D3V3

MX-

GP

PC43

05SC

10U6

D3V3

MX-

GP

1 2EG4303

GAP-CLOSE-PWR-3-GP

EG4303

GAP-CLOSE-PWR-3-GP

12

PR4303

100R5F-2-GP

DY

PR4303

100R5F-2-GP

DY

1 2EG4306

GAP-CLOSE-PWR-3-GP

EG4306

GAP-CLOSE-PWR-3-GP

12


12

PC43

09SC

1U6D

3V2K

X-G

PPC

4309

SC1U

6D3V

2KX-

GP

1 2EG4310

GAP-CLOSE-PWR-3-GP

EG4310

GAP-CLOSE-PWR-3-GP

12

PC43

07SC

10U6

D3V3

MX-

GP

PC43

07SC

10U6

D3V3

MX-

GP

1 2EG4302

GAP-CLOSE-PWR-3-GP

EG4302

GAP-CLOSE-PWR-3-GP

1 2EG4305

GAP-CLOSE-PWR-3-GP

EG4305

GAP-CLOSE-PWR-3-GP

1 2PC4303

SCD1U25V2KX-GP

PC4303

SCD1U25V2KX-GP

1 2EG4301

GAP-CLOSE-PWR-3-GP

EG4301

GAP-CLOSE-PWR-3-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_AXG_BT3

PWR_AVG_VX1

PWR_AXG_PU4401_VDD

PWR_CPU

1D8V_S0

1D8V_S0

VCC_GFXCORE

GND_1323S_3

5V_S5PWR_CPU

PWR_AXG_PWM2_1[42]

PWR_AXG_IPH2_1_R[42]

PWR_AXG_TS_FAULT#2[42]

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(3/3)A3

44 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(3/3)A3

44 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT1318+1323_CPU_CORE1+1(3/3)A3

44 105Friday, March 30, 2012

<Core Design>


Layout Note:Small Cap close IC

D.C. = 22AP.C. =33A

X01 12/13

X01 12/20

X01 12/20

X01 12/21

X03 2/16

X03 2/16

X03 2/20

1 2EG4401

GAP-CLOSE-PWR-3-GP

EG4401

GAP-CLOSE-PWR-3-GP

12

PR4402

100R5F-2-GP

DY

PR4402

100R5F-2-GP

DY

TS_FAULT#A1

VCCA4

VDDB1

ISENSEB2

PWMB3

GNDA2

BST B4

VDDH

C4VD

DHC3

VDDH

C2VD

DHC1

VSS

E1VS

SE2

VSS

E3VS

SE4

VSS

G1

VSS

G2

VSS

G3

VSS

G4

VSS

J1VS

SJ2

VSS

J3VS

SJ4

VX#H4 H4VX#H3 H3VX#H2 H2VX#H1 H1VX#F4 F4VX#F3 F3VX#F2 F2VX#F1 F1VX#D4 D4VX#D3 D3VX#D2 D2VX#D1 D1

PU4401

VT1323SFCX-1-GP74.01323.A7Z

PU4401

VT1323SFCX-1-GP74.01323.A7Z

12

PC4408

SCD1U10V2KX-5GP

PC4408

SCD1U10V2KX-5GP

1 2PG4401

GAP-CLOSE-PWR-3-GP

PG4401

GAP-CLOSE-PWR-3-GP

1 2EG4411

GAP-CLOSE-PWR-3-GP

EG4411

GAP-CLOSE-PWR-3-GP

1 2EG4406

GAP-CLOSE-PWR-3-GP

EG4406

GAP-CLOSE-PWR-3-GP

1 2EG4404

GAP-CLOSE-PWR-3-GP

EG4404

GAP-CLOSE-PWR-3-GP

1 2EG4402

GAP-CLOSE-PWR-3-GP

EG4402

GAP-CLOSE-PWR-3-GP

12

PC44

03SC

10U6

D3V3

MX-

GP

PC44

03SC

10U6

D3V3

MX-

GP

1 2EG4409

GAP-CLOSE-PWR-3-GP

EG4409

GAP-CLOSE-PWR-3-GP

12

PC44

06SC

10U6

D3V3

MX-

GP

PC44

06SC

10U6

D3V3

MX-

GP

1 2

PL4401

IND-D1UH-26-GP

68.R1010.10T2nd = 68.R1010.10X

PL4401

IND-D1UH-26-GP

68.R1010.10T2nd = 68.R1010.10X

12


12

PC44

04SC

10U6

D3V3

MX-

GP

PC44

04SC

10U6

D3V3

MX-

GP

1 2PR4401

10R2F-L-GP

PR4401

10R2F-L-GP

1 2PC4402

SCD1U25V2KX-GP

PC4402

SCD1U25V2KX-GP

12

PC44

07SC

1U6D

3V2K

X-G

PPC

4407

SC1U

6D3V

2KX-

GP

1 2EG4407

GAP-CLOSE-PWR-3-GP

EG4407

GAP-CLOSE-PWR-3-GP

1 2EG4405

GAP-CLOSE-PWR-3-GP

EG4405

GAP-CLOSE-PWR-3-GP

1 2EG4410

GAP-CLOSE-PWR-3-GP

EG4410

GAP-CLOSE-PWR-3-GP

1 2EG4403

GAP-CLOSE-PWR-3-GP

EG4403

GAP-CLOSE-PWR-3-GP1

2



12

PC44

05SC

10U6

D3V3

MX-

GP

PC44

05SC

10U6

D3V3

MX-

GP

1 2EG4408

GAP-CLOSE-PWR-3-GP

EG4408

GAP-CLOSE-PWR-3-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCIO_SENSE_C

PWR_1D05V_STAT

PWR_1D05V_VSENSE-PWR_1D05V_VSENSE+

PU4501_OE

VCCIO_SENSE_1

PWR_1D05V_STAT

PWR_1D05V_VX

1D05V_PCH1D05VTT_PWR

AGND_1D05V_386

1D05VTT_PWR

AGND_1D05V_386

3D3V_S0

VCCP_CPU1D05VTT_PWR

VCCP_CPU

5V_S55V_PWR_1D05V

VSSIO_SENSE [8]

VCCIO_SENSE [8]


RUNPWROK[19,46,47]

Title


Date: Sheet of


BMW Z4 DIS A00

1D05V_PCH & VCCP_CPUA3

45 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


45 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


45 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_1p05v

Layout Note:140mil

Layout Note:400mil

D.C. =10.67A16.77A < OCP < 19.82A

Layout Note:Diff. pair

Layout Note:Close CPU output

X01 12/12

X03 2/10

X03 2/10

X03 2/10

X03 2/16

X03 2/16

X03 2/16

X03 2/16

X03 2/16A00 3/29

1 2PR4510 0R0402-PAD-2-GPPR4510 0R0402-PAD-2-GP

1 2PG4504

GAP-CLOSE-PWR-3-GP

PG4504

GAP-CLOSE-PWR-3-GP

12

PC45

11SC

22U6

D3V5

MX-

2GP

PC45

11SC

22U6

D3V5

MX-

2GP

1 2PG4508

GAP-CLOSE-PWR-3-GP

PG4508

GAP-CLOSE-PWR-3-GP

12

PC45

30SC

22U6

D3V5

MX-

2GP

PC45

30SC

22U6

D3V5

MX-

2GP

12

PC45

27SC

22U6

D3V5

MX-

2GP

DY

PC45

27SC

22U6

D3V5

MX-

2GP

DY

1 2PG4511

GAP-CLOSE-PWR-3-GP

PG4511

GAP-CLOSE-PWR-3-GP

1 2PG4514

GAP-CLOSE-PWR-3-GP

PG4514

GAP-CLOSE-PWR-3-GP

AGND A1

SENSE+A2SENSE-A3

STATA4

OEA5GND B1

VX#B2 B2VX#B3 B3VX#B4 B4

VDDB5

GND C1

VX#C2 C2VX#C3 C3VX#C4 C4

VDDC5

PU4501

VT386FCX-ADJ-GP

PU4501

VT386FCX-ADJ-GP

12

PC45

14SC

4D7U

6D3V

3KX-

GP

PC45

14SC

4D7U

6D3V

3KX-

GP

12PC

4506

SCD1

U10V

2KX-

5GP

PC45

06SC

D1U1

0V2K

X-5G

P

12

PC45

08SC

22U6

D3V5

MX-

2GP

PC45

08SC

22U6

D3V5

MX-

2GP

12

PC45

26SC

22U6

D3V5

MX-

2GP

DY

PC45

26SC

22U6

D3V5

MX-

2GP

DY

1 2PG4501

GAP-CLOSE-PWR-3-GP

PG4501

GAP-CLOSE-PWR-3-GP

12

PC45

12SC

22U6

D3V5

MX-

2GP

PC45

12SC

22U6

D3V5

MX-

2GP

1 2

PL4501

COIL-D2UH-2-GP

68.R2010.20B2nd = 68.R2010.10Q

PL4501

COIL-D2UH-2-GP

68.R2010.20B2nd = 68.R2010.10Q

12

EC45

07SC

D1U1

0V2K

X-5G

PEC

4507

SCD1

U10V

2KX-

5GP

12

PC45

10SC

22U6

D3V5

MX-

2GP

DY

PC45

10SC

22U6

D3V5

MX-

2GP

DY

1 2PR4506

2K74R2F-GPPR4506

2K74R2F-GP

12


1 2PG4517

GAP-CLOSE-PWR-3-GP

PG4517

GAP-CLOSE-PWR-3-GP

12

PC45

19SC

22U6

D3V5

MX-

2GP

PC45

19SC

22U6

D3V5

MX-

2GP

1 2PG4502

GAP-CLOSE-PWR-3-GP

PG4502

GAP-CLOSE-PWR-3-GP

1 2PG4506

GAP-CLOSE-PWR-3-GP

PG4506

GAP-CLOSE-PWR-3-GP

12


1 2PG4509

GAP-CLOSE-PWR-3-GP

PG4509

GAP-CLOSE-PWR-3-GP

1 2PG4512

GAP-CLOSE-PWR-3-GP

PG4512

GAP-CLOSE-PWR-3-GP

1 2PG4515

GAP-CLOSE-PWR-3-GP

PG4515

GAP-CLOSE-PWR-3-GP

12

PC45

20SC

22U6

D3V5

MX-

2GP

DY

PC45

20SC

22U6

D3V5

MX-

2GP

DY

1 2


12

PR45076K81R2F-1-GP

PR45076K81R2F-1-GP

1 2

PR4515150R2F-1-GP

DY

PR4515150R2F-1-GP

DY

12

PC45

18SC

22U6

D3V5

MX-

2GP

PC45

18SC

22U6

D3V5

MX-

2GP

12

PC45

25SC

22U6

D3V5

MX-

2GP

PC45

25SC

22U6

D3V5

MX-

2GP

1 2PR4523

0R0402-PAD-2-GP

PR4523

0R0402-PAD-2-GP

12


DY PC4531SC2200P50V2KX-2GP

DY


1 2

EL4501MPZ1608S300AT-GP

68.00212.051

EL4501MPZ1608S300AT-GP

68.00212.051

1 2PG4503

GAP-CLOSE-PWR-3-GP

PG4503

GAP-CLOSE-PWR-3-GP

1 2PG4507

GAP-CLOSE-PWR-3-GP

PG4507

GAP-CLOSE-PWR-3-GP

1 2PG4510

GAP-CLOSE-PWR-3-GP

PG4510

GAP-CLOSE-PWR-3-GP

12

PC45

13SC

22U6

D3V5

MX-

2GP

DY

PC45

13SC

22U6

D3V5

MX-

2GP

DY

1 2PG4513

GAP-CLOSE-PWR-3-GP

PG4513

GAP-CLOSE-PWR-3-GP

1 2PG4516

GAP-CLOSE-PWR-3-GP

PG4516

GAP-CLOSE-PWR-3-GP

12

PC45

15SC

D1U1

0V2K

X-5G

PPC

4515

SCD1

U10V

2KX-

5GP

12

PC45

16SC

22U6

D3V5

MX-

2GP

PC45

16SC

22U6

D3V5

MX-

2GP

12EC

4521

SCD1

U10V

2KX-

5GP

EC45

21SC

D1U1

0V2K

X-5G

P

12PC

4522

SCD1

U10V

2KX-

5GP

PC45

22SC

D1U1

0V2K

X-5G

P12EC

4528

SCD1

U10V

2KX-

5GP

EC45

28SC

D1U1

0V2K

X-5G

P

12

PC45

09SC

22U6

D3V5

MX-

2GP

PC45

09SC

22U6

D3V5

MX-

2GP

12

PC45

17SC

22U6

D3V5

MX-

2GP

PC45

17SC

22U6

D3V5

MX-

2GP

1 2



1 2PR4522

0R0402-PAD-2-GP

PR4522

0R0402-PAD-2-GP

12PC

4539

SCD1

U10V

2KX-

4GP

DYPC

4539

SCD1

U10V

2KX-

4GP

DY

12

PC45

29SC

22U6

D3V5

MX-

2GP

PC45

29SC

22U6

D3V5

MX-

2GP

12

PC45

23SC

22U6

D3V5

MX-

2GP

PC45

23SC

22U6

D3V5

MX-

2GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_1D5V_OE

PWR_1D5V_VSENSE-

PWR_1D5V_VXPWR_1D5V_STAT

PWR_1D5V_VSENSE-_R_1

PWR_1D5V_VSENSE+

PWR_1D5V_VSENSE-_R

0D75V_PWR_S5

0D75V_PWR_S3

0D75V_PWR_VLDOIN

PWR_1D5V_STAT

1D5V_S3

AGND_1D5V_385

3D3V_S0

AGND_1D5V_385

0D75V_S00D75V_PWR

DDR_VREF_S3

1D5V_S35V_S5

1D5V_S0

5V_S55V_PWR_1D5V

0D75V_EN[37]

PM_SLP_S4#[19,27]

RUNPWROK[19,45,47]

PM_SLP_S4#[19,27]

Title


Date: Sheet of


BMW Z4 DIS A00

VT385_1D5V_S3/RT9026_0D75V_S0A3

46 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT385_1D5V_S3/RT9026_0D75V_S0A3

46 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT385_1D5V_S3/RT9026_0D75V_S0A3

46 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_1p5v0p75v

RT9026 for 0D75V_S0

Layout Note:720mil

D.C. =13.7A21.6A < OCP < 25.4A

D.C. =0.7A

X01 12/12

X01 12/13

X01 12/15

UMA VT386SG VT385

X03 2/10

X02 2/10

X03 2/10

X03 2/10

X03 2/16

X03 2/16

X03 2/16

12PC

4615

SC22

U6D3

V5M

X-2G

P

DY

PC46

15SC

22U6

D3V5

MX-

2GP

DY

12PC

4619

SC22

U6D3

V5M

X-2G

PPC

4619

SC22

U6D3

V5M

X-2G

P

12

PC46

29SC

D1U1

0V2K

X-4G

P

DY

PC46

29SC

D1U1

0V2K

X-4G

P

DY

12PC

4624

SC22

U6D3

V5M

X-2G

PPC

4624

SC22

U6D3

V5M

X-2G

P

1 2

PC4618 SC3300P50V2KX-1GPPC4618 SC3300P50V2KX-1GP

1 2PR4622

0R0402-PAD-2-GP

PR4622

0R0402-PAD-2-GP

12PC

4635

SC22

U6D3

V5M

X-2G

P

DY

PC46

35SC

22U6

D3V5

MX-

2GP

DY

1 2PR4623

0R0402-PAD-2-GP

PR4623

0R0402-PAD-2-GP

12


1 2PG4602

GAP-CLOSE-PWR-3-GP

PG4602

GAP-CLOSE-PWR-3-GP

12PC

4608

SC22

U6D3

V5M

X-2G

PPC

4608

SC22

U6D3

V5M

X-2G

P

12PC

4623

SC22

U6D3

V5M

X-2G

PPC

4623

SC22

U6D3

V5M

X-2G

P

12

PC46

33SC

D1U1

0V2K

X-5G

PPC

4633

SCD1

U10V

2KX-

5GP

12

PC46

07SC

22U6

D3V5

MX-

2GP

PC46

07SC

22U6

D3V5

MX-

2GP

12

PC4603SC1U6D3V2KX-GP


12


12PC

4613

SC22

U6D3

V5M

X-2G

PPC

4613

SC22

U6D3

V5M

X-2G

P

12

PC46

01SC

10U6

D3V3

MX-

GP

PC46

01SC

10U6

D3V3

MX-

GP

12

PC46

28SC

22U6

D3V5

MX-

2GP

PC46

28SC

22U6

D3V5

MX-

2GP

12

EC46

38SC

D1U1

0V2K

X-4G

P

DY

EC46

38SC

D1U1

0V2K

X-4G

P

DY

12PC

4636

SC22

U6D3

V5M

X-2G

P

DY

PC46

36SC

22U6

D3V5

MX-

2GP

DY


1 2PR4621

0R0402-PAD-2-GP

PR4621

0R0402-PAD-2-GP

12

PC46

30SC

D1U1

0V2K

X-4G

P

DY

PC46

30SC

D1U1

0V2K

X-4G

P

DY

1 2PR4626

0R0402-PAD-2-GP

PR4626

0R0402-PAD-2-GP

12PC

4616

SC22

U6D3

V5M

X-2G

PPC

4616

SC22

U6D3

V5M

X-2G

P

12

PC46

32SC

D1U1

0V2K

X-5G

PPC

4632

SCD1

U10V

2KX-

5GP

12

PC46

06SC

10U6

D3V3

MX-

GP

PC46

06SC

10U6

D3V3

MX-

GP

1 2

PC4625

SC4700P50V2KX-1GP

PC4625

SC4700P50V2KX-1GP

12PC

4637

SC22

U6D3

V5M

X-2G

P

DY

PC46

37SC

22U6

D3V5

MX-

2GP

DY

12PC4602

SCD1U10V2KX-5GPPC4602

SCD1U10V2KX-5GP

1 2PG4601

GAP-CLOSE-PWR-3-GP

PG4601

GAP-CLOSE-PWR-3-GP

12PC

4620

SC22

U6D3

V5M

X-2G

PPC

4620

SC22

U6D3

V5M

X-2G

P

12

PC46

05SC

D1U1

0V2K

X-5G

PPC

4605

SCD1

U10V

2KX-

5GP

12PC

4627

SC68

00P2

5V2K

X-1G

PPC

4627

SC68

00P2

5V2K

X-1G

P

12PC

4610

SC22

U6D3

V5M

X-2G

PPC

4610

SC22

U6D3

V5M

X-2G

P

1 2PG4604

GAP-CLOSE-PWR-3-GP

PG4604

GAP-CLOSE-PWR-3-GP

1 2

EL4601BLM18PG330SN1D-GP

68.00143.0412nd = 68.00212.051


68.00143.0412nd = 68.00212.051

1 2PR4614150R2F-1-GP

DYPR4614150R2F-1-GP

DY

12

PC46

09SC

D1U1

0V2K

X-5G

PPC

4609

SCD1

U10V

2KX-

5GP


1 2PR4609

4K7R2F-GP

PR4609

4K7R2F-GP

12


1 2

PL4601

COIL-D20UH-GP

68.R2010.2012nd = 68.R2010.10P

PL4601

COIL-D20UH-GP

68.R2010.2012nd = 68.R2010.10P

1 2


68.00143.0412nd = 68.00212.051EL4602

BLM18PG330SN1D-GP

68.00143.0412nd = 68.00212.0511

2PC

4617

SCD1

U10V

2KX-

5GP

PC46

17SC

D1U1

0V2K

X-5G

P

AGNDA1

GNDB1

VDD B5

GNDC1

VDD C5

GNDD1

VDD D5

VX#B2 B2VX#B3 B3VX#B4 B4VX#C2 C2VX#C3 C3VX#C4 C4VX#D2 D2VX#D3 D3VX#D4 D4

SENSE+A2SENSE-A3

STATA4OEA5

PU4602

VT385FCX-ADJ-GP

PU4602

VT385FCX-ADJ-GP

VDDQSNS 1VLDOIN 2

VTT 3PGND 4

VTTSNS 5

VIN10S59GND8S37VTTREF6

GND

11

PU4601

RT9026PFP-GP

PU4601

RT9026PFP-GP

12

PC46

31SC

D1U1

0V2K

X-5G

PPC

4631

SCD1

U10V

2KX-

5GP

12PC

4622

SC22

U6D3

V5M

X-2G

PPC

4622

SC22

U6D3

V5M

X-2G

P

12

PC46

04SC

10U6

D3V3

MX-

GP

PC46

04SC

10U6

D3V3

MX-

GP

1 2PG4603

GAP-CLOSE-PWR-3-GP

PG4603

GAP-CLOSE-PWR-3-GP

12PC

4621

SC22

U6D3

V5M

X-2G

PPC

4621

SC22

U6D3

V5M

X-2G

P

12PC

4634

SC22

U6D3

V5M

X-2G

P

DY

PC46

34SC

22U6

D3V5

MX-

2GP

DY

12

PC46

11SC

4D7U

6D3V

3KX-

GP

PC46

11SC

4D7U

6D3V

3KX-

GP

1 2

PR46124K53R2F-1-GP

PR46124K53R2F-1-GP

12PC

4612

SC22

U6D3

V5M

X-2G

P

DY

PC46

12SC

22U6

D3V5

MX-

2GP

DY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_1D8V_SVIN

PWR_1D8V_EN

PWR_1D8V_FB

PWR_1D8V_PHASE

PWR_1D8V_PVDD1D8V_S01D8V_PWR

3D3V_S5

RUNPWROK[19,45,46]

PM_SLP_S3#[19,27,36,37]

Title


Date: Sheet of


BMW Z4 DIS A00

RT8068A_1D8V_S0A3

47 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

RT8068A_1D8V_S0A3

47 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

RT8068A_1D8V_S0A3

47 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_1p8v

X03 2/11

R1

R2

RT8068A for 1D8V_S0

Vo=0.6*(1+(R1/R2))

D.C. =0.87A1.29A < OCP <1.52A

X03 2/16

X03 2/16

1 2PG4707

GAP-CLOSE-PWR-3-GP

PG4707

GAP-CLOSE-PWR-3-GP

1 2PG4706

GAP-CLOSE-PWR-3-GP

PG4706

GAP-CLOSE-PWR-3-GP

1 2PG4701

GAP-CLOSE-PWR-3-GP

PG4701

GAP-CLOSE-PWR-3-GP

1 2PG4705

GAP-CLOSE-PWR-3-GP

PG4705

GAP-CLOSE-PWR-3-GP

12

PC4703SC1U6D3V2KX-GPPC4703SC1U6D3V2KX-GP

1 2PG4704

GAP-CLOSE-PWR-3-GP

PG4704

GAP-CLOSE-PWR-3-GP

PVIN10

PGOOD4

SVIN8

FB 6NC#7 7

LX#1 1

EN5

PVIN9

GND 11

LX#2 2

LX#3 3

PU4701

RT8068AZQWID-GP-U74.08068.A43

PU4701

RT8068AZQWID-GP-U74.08068.A43

1 2PG4703

GAP-CLOSE-PWR-3-GP

PG4703

GAP-CLOSE-PWR-3-GP

1 2PG4702

GAP-CLOSE-PWR-3-GP

PG4702

GAP-CLOSE-PWR-3-GP

12


12

PC4707SC10U6D3V3MX-G

PPC4707SC10U6D3V3M

X-GP1

2

PR470451KR2F-L-GPPR470451KR2F-L-GP

12


P


P

12

PC47

05

SC22

P50V

2JN-

4GP

PC47

05

SC22

P50V

2JN-

4GP

1 2PL4701

IND-1D5UH-71-GP-U

68.1R510.20J2nd = 68.1R51B.10Q

PL4701

IND-1D5UH-71-GP-U

68.1R510.20J2nd = 68.1R51B.10Q

12


P

DYPC4702SC10U6D3V3M

X-GP

DY

1 2PR4701

2D2R2F-GP

PR4701

2D2R2F-GP

12

PC4704SC22P50V2GN-GPDY PC4704SC22P50V2GN-GPDY

1 2

PR47020R0402-PAD-2-GP

PR47020R0402-PAD-2-GP

12


P


P

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCCSA_SEL0

PWR_VCCSA_FB

PWR_VCCSA_VCNTL

PWR_

VCCS

A_SE

L1

PWR_VCCSA_VIN

PWR_VCCSA_EN

VCCSA_PWR 0D85V_S0

5V_S5

VCCP_CPU

3D3V_S0

VCCSA_SENSE [9]

D85V_PWRGD[42]

VCCSA_SEL1 [9]


VCCSA_SEL0 [9]

Title


Date: Sheet of


BMW Z4 DIS A00

APL5916_VCCSAA3

48 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

APL5916_VCCSAA3

48 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

APL5916_VCCSAA3

48 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_vccsa

Iomax=4AOCP>9AVCCSA=0.9V

Vout=0.8*(1+R1/R2)

R1

R2

X03 2/16

X03 2/16

X02 1/9

Note: LDO solution VCCSA is 0.9V.

A00 3/23

A00 3/23

1 2PG4812

GAP-CLOSE-PWR-3-GP

PG4812

GAP-CLOSE-PWR-3-GP

1 2PG4808

GAP-CLOSE-PWR-3-GP

PG4808

GAP-CLOSE-PWR-3-GP

1 2PG4804

GAP-CLOSE-PWR-3-GP

PG4804

GAP-CLOSE-PWR-3-GP

12

PC4806

SC10U6D3V5KX-1GP

PC4806

SC10U6D3V5KX-1GP

12

PR480210KR2J-3-GP

PR480210KR2J-3-GP

12


12

PC4805

SC10U6D3V5KX-1GP

PC4805

SC10U6D3V5KX-1GP


1 2PG4809

GAP-CLOSE-PWR-3-GP

PG4809

GAP-CLOSE-PWR-3-GP

1 2PG4805

GAP-CLOSE-PWR-3-GP

PG4805

GAP-CLOSE-PWR-3-GP

12

PR4806160KR2F-GP DYPR4806160KR2F-GP DY

12


DY PC4807SCD1U10V2KX-4GP

DY

1 2

PR48030R0402-PAD-2-GP

PR48030R0402-PAD-2-GP

GND

1FB 2

VOUT 3VOUT 4

VIN 5

VCNT

L6

POK7

EN8VIN 9

PU4801

APL5916KAI-TRL-GP74.05916.031

2nd = 74.00977.031

PU4801

APL5916KAI-TRL-GP74.05916.031

2nd = 74.00977.031

12

PC4804

SC100P50V2JN-3GP

PC4804

SC100P50V2JN-3GP

12

PC4809SC1U6D3V2KX-GPDY PC4809SC1U6D3V2KX-GPDY

1 2PG4810

GAP-CLOSE-PWR-3-GP

PG4810

GAP-CLOSE-PWR-3-GP

1 2PG4806

GAP-CLOSE-PWR-3-GP

PG4806

GAP-CLOSE-PWR-3-GP

1 2PG4802

GAP-CLOSE-PWR-3-GP

PG4802

GAP-CLOSE-PWR-3-GP

1 2PR4807

10KR2J-3-GP

DYPR4807

10KR2J-3-GP

DY

12


PC4801SC1U6D3V2KX-GP 1

2

PC4802

SC10U6D3V5KX-1GP

PC4802

SC10U6D3V5KX-1GP

1 2PG4811

GAP-CLOSE-PWR-3-GP

PG4811

GAP-CLOSE-PWR-3-GP

1 2PG4807

GAP-CLOSE-PWR-3-GP

PG4807

GAP-CLOSE-PWR-3-GP12

PR480847KR2F-GP DY

PR480847KR2F-GP DY

1 2PG4803

GAP-CLOSE-PWR-3-GP

PG4803

GAP-CLOSE-PWR-3-GP

1 2PG4801

GAP-CLOSE-PWR-3-GP

PG4801

GAP-CLOSE-PWR-3-GP


12

PC4803

SC10U6D3V5KX-1GP

PC4803

SC10U6D3V5KX-1GP

G

DS

PQ48012N7002BK-GP

2nd = 84.2N702.W313rd = 84.2N702.J31

84.07002.I31

DY

PQ48012N7002BK-GP

2nd = 84.2N702.W313rd = 84.2N702.J31

84.07002.I31

DY

12

PR480580K6R2F-GP

PR480580K6R2F-GP

12

PR480410KR2F-2-GP

PR480410KR2F-2-GP

www.Vinafix.vn

USB_CAMERA

USB_CAMERA#

LCD_TST_CBLON_OUT_C

LCDVDD_EN

BLON_OUT_CLCD_BRIGHTNESS

USB_CAMERA#USB_CAMERA

LVDS_DDC_CLK_R_1LVDS_DDC_DATA_R_1

LCD_TST_C

DBC_EN_C

DBC_EN_C

COLOR_ENGINE_R

COLOR_ENGINE_R

LCD_POWER

COLOR_ENGINE_RLVDSA_DATA2#LVDSA_DATA2LVDSA_DATA1#LVDSA_DATA1LVDSA_DATA0#LVDSA_DATA0LVDSA_CLK#LVDSA_CLK

DCBATOUT_LCD DCBATOUT3D3V_CAMERA_S03D3V_S0

LCDVDD

3D3V_S0

3D3V_S0 3D3V_LCD_ROM

3D3V_LCD_ROM

DCBATOUT_LCD

3D3V_S0

LCDVDD

3D3V_CAMERA_S0

USB_PP12[18]

USB_PN12[18]

LCD_TST [27]BLON_OUT [27]

LCD_TST_EN[27]

LVDS_VDD_EN[17]

LVDSA_DATA1 [17]LVDSA_DATA1# [17]

LVDSA_DATA2# [17]LVDSA_DATA2 [17]

LVDSA_CLK# [17]LVDSA_CLK [17]

LVDSA_DATA0 [17]LVDSA_DATA0# [17]

AUD_DMIC_IN0 [82]AUD_DMIC_CLK [82]

L_BKLT_CTRL [17]

LVDS_DDC_DATA_R [17]LVDS_DDC_CLK_R [17]

DBC_EN [22]

COLOR_ENGINE [22]

Title


Date: Sheet of


BMW Z4 DIS A00

LCD ConnectorA3


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

LCD ConnectorA3


<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

LCD ConnectorA3


<Core Design>

SSID = VIDEOSSID = VIDEO

Camera Power

LCD Power for ROSA

Layout Note:Trace width = 80mil

LVDS CONN

X01 12/02X01 12/20

X01 12/30

X03 2/6

X03 2/13

X03 2/16

A00 3/27

A00 3/27

12F4901

POLYSW-1D1A24V-GP-U69.50007.A312nd = 69.50007.A41

F4901

POLYSW-1D1A24V-GP-U69.50007.A312nd = 69.50007.A41

12

R4908100KR2J-1-GPR4908100KR2J-1-GP

12

3 4

TR4902

FILTER-4P-6-GP69.10103.041

2nd = 68.00201.141

TR4902

FILTER-4P-6-GP69.10103.041

2nd = 68.00201.141

1 2

R49130R2J-2-GP

DYR49130R2J-2-GP

DY

12



1

2

3

D4901

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

D4901

BAT54CPT-GP

2ND = 83.00054.Q8183.R2003.E81

12 C4

904

SC1K

P50V

2KX-

1GP

C490

4SC

1KP5

0V2K

X-1G

P

1 2F4902 FUSE-2A32V-16-GPDYF4902 FUSE-2A32V-16-GPDY

12

EC49

09SC

3D3P

50V2

CN-G

PEC

4909

SC3D

3P50

V2CN

-GP

12

EC4907SCD1U25V3KX-GPDYEC4907SCD1U25V3KX-GPDY

12


12 3

4

RN4901

SRN100J-3-GP

RN4901

SRN100J-3-GP

12

R4909100KR2J-1-GPR4909100KR2J-1-GP

12

EC49

05SC

3D3P

50V2

CN-G

PEC

4905

SC3D

3P50

V2CN

-GP1

2

EC49

04SC

3D3P

50V2

CN-G

PEC

4904

SC3D

3P50

V2CN

-GP

1 234

RN4903SRN2K2J-1-GP

RN4903SRN2K2J-1-GP

12

EC49

06SC

3D3P

50V2

CN-G

PEC

4906

SC3D

3P50

V2CN

-GP

EN1GND2OUT3 IN#4 4

IN#5 5

U4901

G5285T11U-GP

74.05285.07F2nd = 74.09724.09F

U4901

G5285T11U-GP

74.05285.07F2nd = 74.09724.09F

12

EC49

02SC

3D3P

50V2

CN-G

PEC

4902

SC3D

3P50

V2CN

-GP

1 2EL4901 BLM18PG330SN1D-GP

68.00143.0412nd = 68.00212.051

EL4901 BLM18PG330SN1D-GP

68.00143.0412nd = 68.00212.051

12

C4907SC4D7U6D3V3KX-GPC4907SC4D7U6D3V3KX-GP

12

EC49

11SC

3D3P

50V2

CN-G

PEC

4911

SC3D

3P50

V2CN

-GP

1 2R4904

0R3J-0-U-GP

R4904

0R3J-0-U-GP

12

EC49

08SC

3D3P

50V2

CN-G

PEC

4908

SC3D

3P50

V2CN

-GP

1

23456789101112131415161718192021222324252627282930

31

32

33

34

35

36

37

38

39

40

LCD1

FOX-CON30-4-GP

20.F2173.030

2nd = 20.F2089.030

LCD1

FOX-CON30-4-GP

20.F2173.030

2nd = 20.F2089.030

12

C490

5SC

D1U2

5V3K

X-G

PC4

905

SCD1

U25V

3KX-

GP

12

R490233R2J-2-GPR490233R2J-2-GP

1 2

R49120R0402-PAD-2-GP

R49120R0402-PAD-2-GP

12



12

EC49

10SC

3D3P

50V2

CN-G

PEC

4910

SC3D

3P50

V2CN

-GP

1 2R4901 0R3J-0-U-GPR4901 0R3J-0-U-GP

12 3

4

RN4902SRN100J-3-GPRN4902SRN100J-3-GP

12

EC4903SCD1U10V2KX-5GP DYEC4903SCD1U10V2KX-5GP DY

12

EC49

01SC

3D3P

50V2

CN-G

PEC

4901

SC3D

3P50

V2CN

-GP

12 C4902

SC1U6D3V2KX-GPC4902SC1U6D3V2KX-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

CRT ConnectorA3

50 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CRT ConnectorA3

50 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

CRT ConnectorA3

50 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI_DATA1_R_C#_CON

HDMI_DATA0_R_C

HDMI_DATA2_R_C#_CON

HDMI_DATA0_R_C_CON

HDMI_CLK_R_C_CON

HDMI_CLK_R_C#_CON

HDMI_CLK_R_C

HDMI_HPD_E

HDMI_DATA2_R_CHDMI_DATA2_R_C#


HDMI_DATA0_R_C#

HDMI_DATA2_R_C#

HDMI_DATA2_R_C

HDMI_DATA1_R_C

HDMI_PLL_GND

HDMI_DATA0_R_C#_CON


HDMI_DATA1_R_C_CON

HDMI_CLK_R_CHDMI_CLK_R_C#

HDMI_HPD_B

HDMI_DATA2_R_C_CON

HPD_HDMI_CO

N

DDC_DATA_HDMIDDC_CLK_HDMI

HDMI_DATA0_R_C_CON

HDMI_DATA2_R_C_CON

HDMI_CLK_R_C#_CON

HDMI_DATA1_R_C#_CON

HDMI_DATA2_R_C#_CON

HDMI_DATA0_R_C#_CONHDMI_CLK_R_C_CON

HDMI_DATA1_R_C_CON

HDMI_CLK_R_C#

HDMI_DATA1_R_C#

DDC_CLK_HDMI

DDC_DATA_HDMI

D5102_2

D5102_1

3D3V_S05V_S0

3D3V_S0

5V_HDMI_S0

5V_S0 5V_HDMI_S0

5V_S0

HDMI_DATA2_R[17]

HDMI_PCH_DET[17]

PCH_HDMI_DATA[17]

HDMI_CLK_R#[17]HDMI_CLK_R[17]

HDMI_DATA0_R#[17]HDMI_DATA0_R[17]

HDMI_DATA1_R#[17]HDMI_DATA1_R[17]

HDMI_DATA2_R#[17]

PCH_HDMI_CLK[17]

Title


Date: Sheet of


BMW Z4 DIS A00

HDMI Level Shifter/ConnectorA3

51 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


51 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


51 105Friday, March 30, 2012

DMB40

HDMI CONN

HDMI Level Shifter

SSID = VIDEO

X01 12/02X01 12/27

X03 01/09

X03 2/6

X03 2/6

X03 02/14

X03 02/14

1 234

RN5101SRN2K2J-1-GPRN5101SRN2K2J-1-GP

12

3

D5102BAW56-2-GP

83.00056.G112nd = 83.00056.E11

D5102BAW56-2-GP

83.00056.G112nd = 83.00056.E11

1 2 3 45678

RN5106SRN680J-GPRN5106SRN680J-GP


3

1

2

Q5102PMBS3904-1-GP

84.03904.L062nd = 84.03904.P11

Q5102PMBS3904-1-GP

84.03904.L062nd = 84.03904.P11


1 2R5104

0R0603-PAD-2-GP

R5104

0R0603-PAD-2-GP

1 2R5101

0R0603-PAD-2-GP

R5101

0R0603-PAD-2-GP

1 2R5105

0R0603-PAD-2-GP

R5105

0R0603-PAD-2-GP

1 2

R51250R0402-PAD-2-GP

R51250R0402-PAD-2-GP

1

23456789

1011121314151617181921

22

23

20

HDMI1

SKT-HDMI19P-69-GP22.10296.2112nd = 22.10296.431

HDMI1

SKT-HDMI19P-69-GP22.10296.2112nd = 22.10296.431

1 2F5101

FUSE-1D1A6V-4GP-U69.50007.6912nd = 69.50007.771

F5101

FUSE-1D1A6V-4GP-U69.50007.6912nd = 69.50007.771


1 2 3 45678

RN5107SRN680J-GPRN5107SRN680J-GP

1

2

34

5

6

Q5104

2N7002KDW-GP


Q5104

2N7002KDW-GP


1 2R5107

0R0603-PAD-2-GP

R5107

0R0603-PAD-2-GP

12

R511210KR2J-3-GP

R511210KR2J-3-GP


1 2R5103

0R0603-PAD-2-GP

R5103

0R0603-PAD-2-GP

G S

D





12

R5110200KR2J-L1-GPDYR5110200KR2J-L1-GPDY

12R5111150KR2J-L1-GP R5111150KR2J-L1-GP



1 2R5106

0R0603-PAD-2-GP

R5106

0R0603-PAD-2-GP

12



1 2R5108

0R0603-PAD-2-GP

R5108

0R0603-PAD-2-GP

1 2R5102

0R0603-PAD-2-GP

R5102

0R0603-PAD-2-GP

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

52 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

52 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

52 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

53 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

53 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

53 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

54 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

54 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

54 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ITP/Fan ConnectorA3

55 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ITP/Fan ConnectorA3

55 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ITP/Fan ConnectorA3

55 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

SATA_TXN0_CSATA_TXP0_C

SATA_RXP0_CSATA_RXN0_C

SATA_ODD_DA#_C

SATA_ODD_DA#

ODD_PW

RGT#

ODD_PWR_5V

SATA_RX4-_CSATA_RX4+_C

SATA_TXN4_CSATA_TXP4_C

SATA_ODD_DA#_C

SATA_ODD_PWRGT

SATA_RXN0_CSATA_RXP0_C

SATA_TXP0_CSATA_TXN0_C

3D3V_S0 5V_S0

3D3V_S0

5V_S0

5V_S0ODD_PWR_5V

ODD_PWR_5V

3D3V_S0

5V_S0

5V_S5

SATA_TXN0[21]SATA_TXP0[21]

SATA_RXP0[21]SATA_RXN0[21]

SATA_ODD_PWRGT[22]

SATA_TXP4 [21]

SATA_RXN4 [21]

SATA_TXN4 [21]

SATA_RXP4 [21]

SATA_ODD_PRSNT# [22]

SATA_ODD_DA# [18]

Title


Date: Sheet of


BMW Z4 DIS A00

HDD/ODDA3

56 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

HDD/ODDA3

56 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

HDD/ODDA3

56 105Friday, March 30, 2012

<Core Design>

SSID = SATA

SATA_RX- and SATA_RX+ TraceLength match within 20 mil

Layout Note:AC coupling Cap; place near CONN(<100mils)

ODD CONN

HDD CONN

Zero Power ODD Power Sequence

100 mil

Layout Note:AC coupling Cap; place near CONN(<100mils)

Due to layout, HDD1 pin 23 modify 5V_S5

X01 12/02X01 12/15

GND S1GND S4GND S7

V33P1V33P2V33P3

GND P4GND P5GND P6

V5P7V5P8V5P9

GND P10

DAS/DSS P11GND P12

V12P13V12P14V12P15

A+S2A-S3

B+S6B-S5

23 2324 24

HDD1

SKT-SATA7P-15P-85-GP

20.81599.022

2nd = 22.10300.C51

HDD1

SKT-SATA7P-15P-85-GP

20.81599.022

2nd = 22.10300.C51

GND1 VIN2 VIN3 EN4 OC# 5VOUT#6 6VOUT#7 7VOUT#8 8

U5602

UP7534PRA8-15-GP

74.07534.D792nd = 74.00547.G79

U5602

UP7534PRA8-15-GP

74.07534.D792nd = 74.00547.G79

12C5613 SCD01U16V2KX-3GPC5613 SCD01U16V2KX-3GP

12


1 2R5606 0R5J-6-GPDYR5606 0R5J-6-GPDY

12

R5605100KR2J-1-GPR5605100KR2J-1-GP


1 2C5615 SCD01U16V2KX-3GPC5615 SCD01U16V2KX-3GP1 2C5616 SCD01U16V2KX-3GPC5616 SCD01U16V2KX-3GP

12

R560710KR2J-3-GP

R560710KR2J-3-GP

14NP1

65432

1

S7S6S5S4S3S2S1

NP215

ODD1

SKT-SATA7P+6P-77-GP-U

2nd = 20.81152.013

ODD1

SKT-SATA7P+6P-77-GP-U

2nd = 20.81152.013

1 2R5603 0R5J-6-GPDYR5603 0R5J-6-GPDY

12

C5617SC10U6D3V5KX-1GP


12

C5604SC10U6D3V5KX-1GPDY

C5604SC10U6D3V5KX-1GPDY



12



12


12

R56020R2J-2-GP

DYR5602

0R2J-2-GP

DY 1 2 3456 Q5601

2N7002KDW-GP


Q56012N7002KDW-GP


12C5614 SCD01U16V2KX-3GPC5614 SCD01U16V2KX-3GP

12

EC5601SCD1U10V2KX-5GPEC5601SCD1U10V2KX-5GP



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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

57 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

57 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

57 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

58 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

58 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

58 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AVDD_CEN

AVDD_CEN

MDO1+

MDO0+

XFR_CMT2MDO1-

XFR_CMT3

MDO0-

LAN_TERMINAL

XFR_CMT2

XFR_CMT3

XFR_CMT0

MDO0+

MDO1-

MDO1+

MDO0-

XFR_CMT1

LAN_MDI1P[31]

LAN_MDI1N[31]

LAN_MDI0P[31]

LAN_MDI0N[31]

Title


Date: Sheet of


BMW Z4 DIS A00

RJ45+TransfermerA4


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

RJ45+TransfermerA4


DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

RJ45+TransfermerA4


DMB40

RJ45 Connector

SSID = LOM

X03 2/29

1AFTP5904AFTP5904

1

2

3

6

7

89

10

11

14

15

161CT:1CT

1CT:1CT

Tx Side

Rx Side

XF5901

XFORM-12P-36-GP

68.HD081.30B

2nd = 68.0NS14.30B

1CT:1CT

1CT:1CT

Tx Side

Rx Side

XF5901

XFORM-12P-36-GP

68.HD081.30B

2nd = 68.0NS14.30B

1AFTP5903AFTP5903

1AFTP5901AFTP5901

12

C5903

SCD1

U10V

2KX-

5GP

C5903

SCD1

U10V

2KX-

5GP

91

3

5

7

2

4

6

810

RJ45

RJ45-8P-28-GP-U

22.10277.B61

RJ45

RJ45-8P-28-GP-U

22.10277.B61

12

C5901

SCD1

U10V

2KX-

5GP

C5901

SCD1

U10V

2KX-

5GP

1AFTP5909AFTP5909

1 2 3 45678

RN5901SRN75J-1-GPRN5901SRN75J-1-GP

1AFTP5908AFTP5908

1AFTP5907AFTP5907

12

C5905

SCD1

U10V

2KX-

5GP DY

C5905

SCD1

U10V

2KX-

5GP DY

1AFTP5906AFTP5906

1 2

C5902SC1000P3KV8KX-L1-GP

C5902SC1000P3KV8KX-L1-GP

12

C5904

SCD1

U10V

2KX-

5GP DY

C5904

SCD1

U10V

2KX-

5GP DY

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RTC_PWR

+RTC_VCC

SPI_WP#

SPI_HOLD_0#

RTC_PWR

3D3V_S5

3D3V_S5

3D3V_S5

RTC_AUX_S5

+RTC_VCC

3D3V_AUX_S5

SPI_CLK_R [21,27]SPI_SO_R[21,27]

SPI_SI_R [21,27]

SPI_CS0#_R[21,27]

RTC_DET# [22]

Title


Date: Sheet of


BMW Z4 DIS A00

Flash/RTCA3

60 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Flash/RTCA3

60 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Flash/RTCA3

60 105Friday, March 30, 2012

<Core Design>

SSID = Flash.ROM

SSID = RBATT

SPI Flash ROM(8M) for PCH

SPI

KBC

PCH

Layout Note:KBC----10"----PCHKBC----1.5"~6.5"----SPIPCH----0.5"~6.5"----SPI

X01 12/02

X01 12/02

X01 12/21

1 2


G

S

D

Q6002


Q6002


12

C6001SC10U6D3V5KX-1GP DYC6001SC10U6D3V5KX-1GP DY

12

EC6002SC4D7P50V2CN-1GP

DYEC6002SC4D7P50V2CN-1GP

DY

CS#1DO/IO12WP#/IO23GND4 DI/IO0 5CLK 6HOLD#/IO3 7VCC 8

U6001

W25Q64CVSSIG-GP

72.25Q64.B01

3rd = 72.25Q64.F012nd = 72.25640.D01

4th = 72.25Q64.D01

U6001

W25Q64CVSSIG-GP

72.25Q64.B01

3rd = 72.25Q64.F012nd = 72.25640.D01

4th = 72.25Q64.D01

12

EC6001SC10P50V2JN-4GPDY EC6001SC10P50V2JN-4GPDY

12



12

C6003SC1U6D3V2KX-GP

C6003SC1U6D3V2KX-GP

12


DY


DY

2

1

3

D6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

D6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

4

1

2

3RTC1

ACES-CON2-11-GP20.F0772.0022nd = 20.F1035.002

RTC1

ACES-CON2-11-GP20.F0772.0022nd = 20.F1035.002

1 234

RN6001SRN4K7J-8-GPRN6001SRN4K7J-8-GP


1 2

R6006100R2J-2-GP

DY

R6006100R2J-2-GP

DY

12

R60034K7R2J-2-GP

R60034K7R2J-2-GP

12

R600710MR2J-L-GPR600710MR2J-L-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

Reserved

61 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Reserved

61 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Reserved

61 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB20_DP0_C

USB_PN0_RR

USB_PP0_RR

USB20_DN0_C

USB30_TXDN1_C

USB30_RXDP1_C

USB20_DP0_C

USB20_DN0_C

USB30_RXDN1_C USB30_TXDN1_C

USB30_TXDP1_CUSB30_RXDP1_C

USB30_TXDP1_CUSB30_TXDN1_C

USB30_RXDP1_CUSB30_RXDN1_C

USB20_DP0_CUSB20_DN0_C

CTL3

ILIM1ILIM0

USB_PN0_RR

CTL1

USB_PP0_RR

ILIM_SEL

CTL2

USB30_TXDP1_R

USB30_TXDN1_R

USB30_TXDP1_C

USB30_RXDN1_C

USBDET

USBDET

USB30_VCCA

5V_S5

USB30_VCCA

USB30_VCCA


USBCHARGER_CB0[27]

USBCHG_EN[27]

USB_OC#0_1[18,82]

USBDET_CON# [27]

USB3_TX1_N[18]

USB3_TX1_P[18]

USB3_RX1_N[18]

USB3_RX1_P[18]

Title


Date: Sheet of


BMW Z4 DIS A00

USB 3.0A3

62 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

USB 3.0A3

62 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

USB 3.0A3

62 105Friday, March 30, 2012

<Core Design>

USB3.0 Port1 with power share

SSID = USB

USB Charger

TPS2541 charging type setting

CTL2CTL1

1 1 1

0 X

CTL3

0

CDP

DCP

X01 12/02

X01 12/13

X01 12/15

X01 12/23

X03 01/30

X03 2/6

X03 2/6

A00 3/23

A00 3/27

1 2



1 2

R62830R0402-PAD-2-GPR62830R0402-PAD-2-GP

1 2R6210 20KR2J-L2-GPR6210 20KR2J-L2-GP

1 2R6205 0R0402-PAD-2-GPR6205 0R0402-PAD-2-GP

1 2R6211 20KR2J-L2-GPDYR6211 20KR2J-L2-GPDY1 2

R6203 0R0402-PAD-2-GPR6203 0R0402-PAD-2-GP

IN1

DM_OUT 2DP_OUT 3ILIM_SEL4

DSC5CTL16CTL27CTL38

NC#99

DP_IN 10DM_IN 11OUT 12

FAULT#13

ILIM1 15ILIM0 16

GND 14GND 17

U6201

TPS2541RTER-GP74.02541.A73

U6201

TPS2541RTER-GP74.02541.A73

1 2

R62810R0402-PAD-2-GPR62810R0402-PAD-2-GP

1 2

R62820R0402-PAD-2-GPR62820R0402-PAD-2-GP

1 2R6204 0R0402-PAD-2-GPR6204 0R0402-PAD-2-GP

1 2

R62840R0402-PAD-2-GPR62840R0402-PAD-2-GP

1 2

R62080R2J-2-GP

R62080R2J-2-GP

12

C6201SC1U25V3KX-1-GPC6201SC1U25V3KX-1-GP

VBUS1

D-2D+3

PGND 4

SSRX- 5SSRX+ 6

GND 7

SSTX- 8SSTX+ 9

1010111112121313

USB1

SKT-USB13-70-GP-U

22.10341.691

USB1

SKT-USB13-70-GP-U

22.10341.691

12 C6

203

SC10

U6D3

V5KX

-1G

PC6

203

SC10

U6D3

V5KX

-1G

P

1 2

34TR6204

FILTER-4P-62-GP69.10080.021

2nd = 69.10103.061

TR6204

FILTER-4P-62-GP69.10080.021

2nd = 69.10103.061

1 2



1

2

3

4 5

6

7

8

U6204

AZ1065-06Q-GP

DY

U6204

AZ1065-06Q-GP

DY

12 C6

202

SCD1

U10V

2KX-

5GP

C620

2SC

D1U1

0V2K

X-5G

P

12

TC6201

ST10

0U6D

3VAM

-3-G

P 80.10715.B1L2nd = 78.10710.52L3rd = 77.C1071.22L

TC6201

ST10

0U6D

3VAM

-3-G

P 80.10715.B1L2nd = 78.10710.52L3rd = 77.C1071.22L

1 2R6202 0R0402-PAD-2-GPR6202 0R0402-PAD-2-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

63 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

63 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

63 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

Finger PrinterA3

64 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Finger PrinterA3

64 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Finger PrinterA3

64 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

WPAN_LED#WLAN_LED#

WLAN_22

PCH_SMBDATAPCH_SMBCLK

USB_PP11_RUSB_PN11_R

AOAC_WLAN_EN#

U650

1_D

AOAC_WLAN_EN#

VAUX_G_SW

WLAN_ACTBT_ACT

E51_TxD_R

CLK_PCIE_WLAN_REQ#_C

WLAN_WAKE#

USB_PN11_R

USB_PP11_R

E51_RxD_R

CLK_WLAN_REQ

#_EN

CLK_PCIE_WLAN_REQ#_C

1D5V_S03D3V_WLAN_AOAC1D5V_S0

3D3V_WLAN_AOAC3D3V_WLAN_AOAC

3D3V_S5

3D3V_S5

15V_S5

5V_S5

3D3V_WLAN_AOAC

3D3V_WLAN_AOAC

PLT_RST# [5,18,27,31,66,71]WIFI_RF_EN [27]


AOAC_PCIE_WAKE#[27,66]

BLUETOOTH_EN[18]

PCIE_RXN4[20]

E51_TxD[27]

PCIE_TXP4[20]PCIE_TXN4[20]

PCIE_RXP4[20]

USB_PN11[18]

USB_PP11[18]

AOAC_WLAN_EN#[27]

CLK_PCIE_WLAN[20]CLK_PCIE_WLAN#[20]

WLAN_LED# [68]WPAN_LED# [68]

CLK_PCIE_WLAN_REQ#[20]

Title


Date: Sheet of


BMW Z4 DIS A00

WLAN/BTA3

65 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

WLAN/BTA3

65 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

WLAN/BTA3

65 105Friday, March 30, 2012

<Core Design>

Mini Card Connector(802.11a/b/g/n)WLAN CONN

Rds(on) =33 ~ 40mOhmAO3404A MAX 4.9A

SSID = Wireless

X01 12/02

X01 12/09

X01 12/15

X03 2/6

X03 2/6

A00 3/23

12



1 2R6506

0R0603-PAD-2-GPR6506

0R0603-PAD-2-GP

12




12

C6504SC10U6D3V5MX-3GP DYC6504SC10U6D3V5MX-3GP DY


12



12

R651210KR2J-3-GPR651210KR2J-3-GP


1 2R6503

0R0603-PAD-2-GPR6503

0R0603-PAD-2-GP

12

C6506SCD01U50V2KX-1GPC6506

SCD01U50V2KX-1GP

12R6511

0R2J-2-GPDYR6511

0R2J-2-GPDY

1 2R6505

0R0402-PAD-2-GPR6505

0R0402-PAD-2-GP

G S

D



1 2

R65020R0402-PAD-2-GP

R65020R0402-PAD-2-GP

12

R6510100KR2J-1-GP

R6510100KR2J-1-GP

12

R651310KR2J-3-GP

R651310KR2J-3-GP

1 2

3 45 67 89 10

11 1213 1415 16

17 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 52

53

54

NP1

NP2

WLAN1

SKT-MINI52P-54-GP-U

62.10043.9812nd = 20.F1764.0523rd = 62.10043.F11

WLAN1

SKT-MINI52P-54-GP-U

62.10043.9812nd = 20.F1764.0523rd = 62.10043.F11

3

1

2

Q6502PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

Q6502PMBS3904-1-GP

84.03904.L062ND = 84.03904.P11

1 2

R6509100KR2J-1-GPR6509100KR2J-1-GP

G S

D

U65012N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

U65012N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

12

R6507100R2J-2-GPDYR6507100R2J-2-GPDY

1 2

R650810KR2J-3-GP

DY

R650810KR2J-3-GP

DY

G

D S

U6502AO3404A-GP

84.03404.B312nd = 84.03404.C31

U6502AO3404A-GP

84.03404.B312nd = 84.03404.C31

1 2R6504 0R2J-2-GPDYR6504 0R2J-2-GPDY

12 C6

501

SC10

U6D3

V5KX

-1G

PC6

501

SC10

U6D3

V5KX

-1G

P

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAS

USB_PP8_R

USB_PN8_R

SATA_RXN1_CSATA_RXP1_C

UIM_PWR

UIM_RESETUIM_VPP

SATA_TXN1_C

MSATA_DET#

UIM_DATA

SATA_TXP1_CUSB_PN8_R

3G_EN

USB_PP8_R

UIM_PWR

UIM_PWR

UIM_DATAUIM_CLK_L

UIM_VPPUIM_RESET

UIM_DATAUIM_CLKUIM_RESETUIM_VPP

WWAN_LED#

UIM_CLK_L

WWAN_WAKE#

AOAC_WWAN_EN#

U660

5_D

AOAC_WWAN_EN#

WWAN_G_SW

WWAN_22

UIM_CLK_L

1D5V_S0

3D3V_WWAN_AOAC

3D3V_WWAN_AOAC

3D3V_WWAN_AOAC

3D3V_WWAN_AOAC3D3V_WWAN_AOAC

3D3V_S5

3D3V_S5

15V_S53D3V_S0 3D3V_WWAN_AOAC

MSATA_DET# [22]

USB_PP8[18]

USB_PN8[18]

3G_EN[27]

SATA_RXP1 [21]SATA_RXN1 [21]

SATA_TXP1 [21]SATA_TXN1 [21]

AOAC_PCIE_WAKE# [27,65]

AOAC_WWAN_EN#[27]

PLT_RST#[5,18,27,31,65,71]

WWAN_LED#[68]

PCH_SMBDATA[14,15,20,65,69]PCH_SMBCLK[14,15,20,65,69]

Title


Date: Sheet of


BMW Z4 DIS A00

WWAN/MSATAA3

66 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

WWAN/MSATAA3

66 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

WWAN/MSATAA3

66 105Friday, March 30, 2012

<Core Design>

Layout Note:Close to SIM1

Layout Note:

WWAN CONN

DATA & CLK keep about 20mil

SSID = Wireless

Rds(on) =33 ~ 40mOhmAO3404A MAX 4.9A

X01 12/09

X03 1/30

A00 3/23

A00 3/23

1 2C6613 SCD01U16V2KX-3GPMSATAC6613 SCD01U16V2KX-3GPMSATA

1 2

R66160R0402-PAD-2-GPR66160R0402-PAD-2-GP

12

C6609

SCD0

1U50

V2KX

-1G

P

DYC6609

SCD0

1U50

V2KX

-1G

P

DY1

2

3 4

5

6

U6601SRV05-4-2-GP

DY

U6601SRV05-4-2-GP

DY

1 2

EC6602SC1U6D3V2KX-GP

WWAN

EC6602SC1U6D3V2KX-GP

WWAN 12

C6607SCD047U10V2KX-2G

P

MSA

TA_W

WA

N


P

MSA

TA_W

WA

N

1 2C6615 SCD01U16V2KX-3GP

MSATAC6615 SCD01U16V2KX-3GP

MSATA

12

EC6607SC33P50V2JN-3G

P

WWAN


P

WWAN 12

R6613100KR2J-1-GP DY

R6613100KR2J-1-GP DY

1 2

R66050R3J-0-U-GP

MSATA_WWAN

R66050R3J-0-U-GP

MSATA_WWAN

12

C6602SC33P50V2JN-3GP

WWAN

C6602SC33P50V2JN-3GP

WWAN

G S

D

U66052N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

U66052N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

1 2R6604 33R2J-2-GP

WWANR6604 33R2J-2-GP

WWAN


12

C6606SC33P50V2JN-3G

P

MSA

TA_W

WA

N

C6606SC33P50V2JN-3G

P

MSA

TA_W

WA

N

12

345678910111213141516

171819202122232425262728293031323334353637383940414243444546474849505152

53

54

NP1

NP2

WWAN1

SKT-MINI52P-54-GP-U62.10043.981

2nd = 20.F1764.0523rd = 62.10043.F11

MSATA_WWAN

WWAN1

SKT-MINI52P-54-GP-U62.10043.981

2nd = 20.F1764.0523rd = 62.10043.F11

MSATA_WWAN

12


MSATA_WWANC6604SCD1U10V2KX-5GP

MSATA_WWAN

12

TC6601ST220U6D3VDM

-20GP

WWAN77.22271.27L2nd = 79.22710.20L

TC6601ST220U6D3VDM

-20GP

WWAN77.22271.27L2nd = 79.22710.20L

12


WWAN


WWAN

1 2

R66030R3J-0-U-GP

MSATA_WWAN

R66030R3J-0-U-GP

MSATA_WWAN

1 2

R6612100KR2J-1-GP

DYR6612100KR2J-1-GP

DY

12

EC6601SC33P50V2JN-3GP

WWAN


WWAN

12

R6611100R2J-2-GP

DY

R6611100R2J-2-GP

DY

C1

C5C2C6C3C7

8

9

10

11

SIM1

SDCARD-10P-1-GP

WWAN

62.10051.971

SIM1

SDCARD-10P-1-GP

WWAN

62.10051.971

12


WWAN


WWAN

12

C6605SC33P50V2JN-3G

P

MSA

TA_W

WA

N

C6605SC33P50V2JN-3G

P

MSA

TA_W

WA

N

12


P

WWAN


P

WWAN

1 2R6601

0R0603-PAD-2-GPR6601

0R0603-PAD-2-GP

12

R66150R2J-2-GP

DY

R66150R2J-2-GP

DY

12


P

MSATA_WWAN


P

MSATA_WWAN

G

D S

U6607AO3404A-GP

84.03404.B312nd = 84.03400.B37

DY

U6607AO3404A-GP

84.03404.B312nd = 84.03400.B37

DY

1 2

R66020R0603-PAD-2-GP

R66020R0603-PAD-2-GP


G S

D

U66082N7002K-2-GP

DY

U66082N7002K-2-GP

DY


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

67 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

67 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

67 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

POWER_SW_LED_B

POWER_SW_LED_C

FPOWER_LED_ALED_PWR

HDD_LED_ASATA_LED_R

WLAN_LED_AWLAN_LED_R

LED_BAT

LED_BATCHG

BAT_AMBER_LED_A

BAT_WHITE_LED_A

TP_LOCK_LED_ATP_LOCK_LED_R

AOAC_LED#

KBC_PWRBTN#_C5V_S5

5V_S0

5V_S0

5V_S5

5V_S5

5V_S0

KBC_PWRBTN#[27]

PWRLED#[27]

SATA_LED#[21]

CHG_AMBER_LED#[27]

BATT_WHITE_LED#[27]

WWAN_LED#[66]

TP_LOCK_LED#[27]

HDD_LED_A [82]

FPOWER_LED_A [82]

BAT_WHITE_LED_A [82]

BAT_AMBER_LED_A [82]

TP_LOCK_LED_A [82]

WLAN_LED_A [82]WPAN_LED#[65]

WLAN_LED#[65]

Title


Date: Sheet of


BMW Z4 DIS A00

LED Bar/Power ButtonA3

68 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


68 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


68 105Friday, March 30, 2012

<Core Design>

SSID = User.Interface

LOW actived from KBC GPIO




Front Power LED

SATA HDD LED

Battery LED2(White_LED)

Battery LED1(Amber_LED)

TPLOCK LED

WLAN LED


PWRBTN

LOW actived from PCH GPIO

X01 12/02

X01 12/02 X01 12/15

X03 01/30

X03 1/30

A00 3/22

A00 3/22

A00 3/22

EB

C

R1

R2Q6806

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6806

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

EB

C

R1

R2Q6805

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6805

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

12

EC68

11SC

220P

50V2

KX-3

GP

DY

EC68

11SC

220P

50V2

KX-3

GP

DY

K A

D6803B0530WS-7-F-GP 83.R5003.G8H

2nd = 83.R5003.H8H

D6803B0530WS-7-F-GP 83.R5003.G8H

2nd = 83.R5003.H8H

EB

C

R1

R2Q6809

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6809

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

1 2R6811 1KR2J-1-GPR6811 1KR2J-1-GP

12

EC68

02SC

220P

50V2

KX-3

GP

DYEC68

02SC

220P

50V2

KX-3

GP

DY

A KPWLED2

LED-W-45-GP83.19213.H702nd = 83.00191.F70

PWLED2

LED-W-45-GP83.19213.H702nd = 83.00191.F70

12EC

6804

SC22

0P50

V2KX

-3G

P

DY

EC68

04SC

220P

50V2

KX-3

GP

DY

12 EC

6810

SC22

0P50

V2KX

-3G

P

DY

EC68

10SC

220P

50V2

KX-3

GP

DY

EB

C

R1

R2Q6808

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6808

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

12

EC68

12SC

220P

50V2

KX-3

GP

DY

EC68

12SC

220P

50V2

KX-3

GP

DY

1 2

R6806680R2J-3-GP

R6806680R2J-3-GPE

BC

R1

R2Q6801

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6801

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

1 2

R6802100R2F-L1-GP-U

R6802100R2F-L1-GP-U

12

EC68

01SC

220P

50V2

KX-3

GP

DY

EC68

01SC

220P

50V2

KX-3

GP

DY

1 2

R6815680R2J-3-GP

R6815680R2J-3-GP

1

2

3

D6801

BAT54A-7-F-1-GP

83.R2003.P812nd = 83.00056.G11D6801

BAT54A-7-F-1-GP

83.R2003.P812nd = 83.00056.G11

124

3

56

PWSW1SW-TACT-130-GP-U62.40009.731

2nd = 62.40089.441

PWSW1SW-TACT-130-GP-U62.40009.731

2nd = 62.40089.441

EB

C

R1

R2Q6807

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6807

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

1 2

R6812680R2J-3-GP

R6812680R2J-3-GP

1 2

R6818680R2J-3-GP

R6818680R2J-3-GP

1 2R6808 1KR2J-1-GPR6808 1KR2J-1-GP

A KPWLED1

LED-W-45-GP83.19213.H702nd = 83.00191.F70

PWLED1

LED-W-45-GP83.19213.H702nd = 83.00191.F70

1 2

R6804680R2J-3-GP

R6804680R2J-3-GP

1 2

R6805680R2J-3-GP

R6805680R2J-3-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPDATA_C

TP_VDDTPCLK_C

KCOL13

KCOL4

KROW7

KCOL10

KCOL3

KROW5

KCOL12

KCOL5

KCOL11

KCOL8

KROW2

KCOL0

KROW0

KCOL9

KCOL6

KROW4

KCOL2

KROW3

KCOL15

KCOL14

KCOL7

KROW6

KCOL1

KROW1

KCOL16

CAP_LED

CAP_LEDCAP_LED_Q

PCH_SMBCLKPCH_SMBDATA

TPDATA_CTPCLK_C

TP_VDDTP_VDDTP_VDD 3D3V_S0

CAP_LED

5V_S0 CAP_LED

3D3V_S5

TPCLK[27]TPDATA[27]

KROW[0..7] [27]

KCOL[0..16] [27]

KB_DET# [21]

CAP_LED#[27]

PCH_SMBDATA[14,15,20,65,66]PCH_SMBCLK[14,15,20,65,66]

Title


Date: Sheet of


BMW Z4 DIS A00

Key Board/Touch PadA3

69 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


69 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


69 105Friday, March 30, 2012

DMB40

SSID = Touch.PadSSID = KBC

Touch Pad Connector

Internal Keyboard Connector

CAP LED Control


Due to layout, TPAD1 pin 8 modify to 3D3V_S5

X01 12/02

A00 3/27

1 AFTP6923AFTP6923

1 AFTP6929AFTP6929

1 AFTP6907AFTP6907

1 234


1 2R6906

1KR2J-1-GP

R6906

1KR2J-1-GP

1 AFTP6921AFTP6921

EB

C

R1

R2Q6902

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

R1

R2Q6902

PDTA144VT-GP84.00144.P11

2nd = 84.DT144.A11

1

23456

7

8

TPAD1

PTWO-CON6-12-GP

20.K0382.0062nd = 20.K0320.006

TPAD1

PTWO-CON6-12-GP

20.K0382.0062nd = 20.K0320.006

1 AFTP6924AFTP6924

1 AFTP6918AFTP6918

12

EC6918SC33P50V2JN-3GPDY EC6918SC33P50V2JN-3GPDY

1 AFTP6931AFTP6931

1 AFTP6917AFTP6917

1 AFTP6912AFTP69121 AFTP6913AFTP6913

1 AFTP6930AFTP6930

1 2R6909

0R3J-0-U-GP

R6909

0R3J-0-U-GP

1 2R6910 0R2J-2-GPR6910 0R2J-2-GP

1AFTP6935AFTP6935

1 AFTP6933AFTP69331 AFTP6908AFTP6908

1 2R6911 0R2J-2-GPR6911 0R2J-2-GP

1 AFTP6910AFTP6910

1 AFTP6902AFTP6902

1 AFTP6932AFTP6932

1 AFTP6919AFTP6919

1 AFTP6928AFTP6928

1 AFTP6909AFTP6909

1 AFTP6937AFTP6937

1 AFTP6901AFTP6901

12

EC6917SC33P50V2JN-3GP DYEC6917SC33P50V2JN-3GP DY

1

23456789101112131415161718192021222324252627282930

31

32

KB1

ACES-CON30-14-GP

20.K0700.030

2nd = 20.K0750.030

KB1

ACES-CON30-14-GP

20.K0700.030

2nd = 20.K0750.030

12


1 AFTP6920AFTP6920

1 AFTP6925AFTP6925

1 AFTP6915AFTP6915

1 AFTP6914AFTP6914

1 AFTP6922AFTP6922

1 AFTP6911AFTP6911

1 AFTP6934AFTP6934

1 AFTP6926AFTP6926

1 AFTP6906AFTP6906

1 AFTP6927AFTP6927

1 AFTP6916AFTP6916

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LID_CLOSE#

3D3V_S5

LID_CLOSE#[27]

Title


Date: Sheet of


BMW Z4 DIS A00

Hall SensorA4

70 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Hall SensorA4

70 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Hall SensorA4

70 105Friday, March 30, 2012

DMB40


VSS 1VDD2

OUT3

LIDSW1

S-5711ACDL-M3T1S-GP

74.05711.07B2nd = 74.05712.0BB3rd = 74.01803.07B

LIDSW1

S-5711ACDL-M3T1S-GP

74.05711.07B2nd = 74.05712.0BB3rd = 74.01803.07B

12



12

C7002SCD047U16V2KX-1-GPDY C7002SCD047U16V2KX-1-GPDY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XDP_BPM1

XDP_BPM5

XDP_BPM2

XDP_BPM6

XDP_PRDY#

XDP_BPM3

XDP_BPM7

XDP_BPM0

XDP_BPM4

XDP_PREQ#

CFG0

LPC_LAD0_RLPC_LAD1_RLPC_LAD2_RLPC_LAD3_R

PLT_RST#_DEBUGLPC_FRAME#_DEBUG

LPC_AD[3..0]

LPC_AD0LPC_AD1LPC_AD2LPC_AD3

3D3V_S0

XDP_PRDY#[5]XDP_PREQ#[5]

XDP_BPM0[5]XDP_BPM1[5]




CFG0[7]

PLT_RST#[5,18,27,31,65,66]LPC_FRAME#[21,27]

CLK_PCI_LPC[18]

LPC_AD[3..0][21,27]

Title


Date: Sheet of


BMW Z4 DIS A00

Dubug connectorA3

71 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Dubug connectorA3

71 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Dubug connectorA3

71 105Friday, March 30, 2012

DMB40

CPU XDP

Debug Connector

SSID = CPU

SSID = DEBUG PORT

Layout Note:Place near trace separated point

A00 3/15







1234 5

678

RN7101SRN0J-7-GP

LPC

RN7101SRN0J-7-GP

LPC





1 2R7101 0R2J-2-GPLPCR7101 0R2J-2-GPLPC

111

23456789

1012

DB1

PAD-10P-177042-GPZZ.00PAD.Y41

DB1

PAD-10P-177042-GPZZ.00PAD.Y41


1 2R7102 0R2J-2-GPLPCR7102 0R2J-2-GPLPC

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

72 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

72 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

72 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

73 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

73 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

73 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

74 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

74 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

74 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

75 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

75 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

(Reserved)A3

75 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

76 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

76 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

76 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

77 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

77 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

77 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

78 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

78 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

78 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

79 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

79 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

79 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

80 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

80 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

80 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

81 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

81 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

81 105Friday, March 30, 2012

DMB40

(Blanking)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INSTANT_LAUNCH#_LED_1AUDIO_PRESENT#_LED_1MOBILITY_CENTER#_LED_1

INSTANT_LAUNCH#_LED_1AUDIO_PRESENT#_LED_1MOBILITY_CENTER#_LED_1

INSTANT_LAUNCH#AUDIO_PRESENT#MOBILITY_CENTER#

INSTANT_LAUNCH#_LED#AUDIO_PRESENT#_LED#MOBILITY_CENTER#_LED#

GND

HDD_LED_A

FPOWER_LED_A

BAT_AMBER_LED_ABAT_WHITE_LED_A

FPOWER_LED_A

WLAN_LED_A

HDD_LED_ABAT_WHITE_LED_ABAT_AMBER_LED_A

TP_LOCK_LED_AGND

WLAN_LED_A

GND

KBC_BEEP_RSB_SPKR_RAUD_PC_BEEPAUD_PC_BEEP

USB_PN10_CUSB_PP10_C

USB_PN1_CUSB_PP1_C

HDA_CODEC_BITCLK_C

HDA_CODEC_BITCLK_C

USB_PN10_C

USB_PN1_C

USB_PP1_C

USB_PP10_C

TPAN_PWR

5V_S0

3D3V_VGA_S0

3D3V_S0

5V_S5

5V_S0

5V_S5

5V_S5 5V_S0 3D3V_S0

3D3V_S5

5V_S0

3D3V_S0

INSTANT_LAUNCH#_LED# [27]AUDIO_PRESENT#_LED# [27]MOBILITY_CENTER#_LED# [27]

FPOWER_LED_A [68]

HDD_LED_A [68]BAT_WHITE_LED_A [68]BAT_AMBER_LED_A [68]

TP_LOCK_LED_A [68]

WLAN_LED_A [68]

VGA_R [85]VGA_G [85]VGA_B [85]

VGA_CRT_HSYNC [85]VGA_CRT_VSYNC [85]

VGA_CRT_DDCCLK [85]VGA_CRT_DDCDATA [85]

HDA_SPKR [21]KBC_BEEP [27]

AUDIO_PRESENT# [27]INSTANT_LAUNCH# [27]

MOBILITY_CENTER# [27]

HDA_CODEC_SYNC [21]

HDA_CODEC_SDOUT [21]

AUD_DMIC_IN0 [49]

HDA_SDIN0 [21]

HDA_CODEC_RST# [21]

AUD_DMIC_CLK [49]

AMP_MUTE# [27]

USB_PWR_EN# [27]USB_OC#0_1 [18,62]

USB3_RX2_N [18]

USB3_TX2_N [18]USB3_TX2_P [18]

USB3_RX2_P [18]

HDA_CODEC_BITCLK [21]

USB_PN10 [18]

USB_PP10 [18]

USB_PP1 [18]

USB_PN1 [18]


Title


Date: Sheet of


BMW Z4 DIS A00

IO Board ConnectorA3

82 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


82 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


82 105Friday, March 30, 2012

<Core Design>

SSID = User.Interface Due to layout, TPLED1 pin 5 modify 3D3V_S5

X01 12/02

X01 12/02

X01 12/09 Request by EMI

X01 12/13

X01 12/13

X01 12/13

X01 12/20

X01 12/20

X01 12/23

X01 12/23

X03 1/30

X03 2/6A00 3/15

A00 3/15

A00 3/23

A00 3/23

X01 12/23A00 3/23

A00 3/27

1AFTP8201AFTP8201

12

R823010KR2J-3-GP

R823010KR2J-3-GP

1 2ER8202 0R0603-PAD-2-GPER8202 0R0603-PAD-2-GP

1 2R8233 100KR2J-1-GPR8233 100KR2J-1-GP

1 2R8202 1KR2J-1-GPR8202 1KR2J-1-GP

1AFTP8215AFTP82151AFTP8209AFTP82091 2

EC8205 SC470P50V-2-GPEC8205 SC470P50V-2-GP

1AFTP8206AFTP8206

1

234

5

6

TPLED1

ACES-CON4-10-GP-U

20.K0320.004

2nd = 20.K0382.004

TPLED1

ACES-CON4-10-GP-U

20.K0320.004

2nd = 20.K0382.004

12

EC82

02SCD1U16V2KX-3G

PEC

8202

SCD1U16V2KX-3GP

1AFTP8202AFTP8202

12

EC82

07

SCD1U16V2KX-3GP

EC82

07

SCD1U16V2KX-3GP


1AFTP8205AFTP8205

1AFTP8207AFTP8207

1 2ER8205

0R0402-PAD-2-GPER8205

0R0402-PAD-2-GP


1 2EC8203 SC470P50V-2-GPEC8203 SC470P50V-2-GP

1AFTP8210AFTP8210

12

R823110KR2J-3-GPR823110KR2J-3-GP

1 2R8234 100KR2J-1-GPR8234 100KR2J-1-GP

1AFTP8208AFTP8208

1

2345678

9

10

MEDIA1

ACES-CON8-40-GP

20.K0667.0082nd = 20.K0665.008

MEDIA1

ACES-CON8-40-GP

20.K0667.0082nd = 20.K0665.008


1 2R82050R3J-0-U-GPDYR82050R3J-0-U-GPDY

1

23456

7

8

TPAN1

ACES-CON6-39-GP

DY

TPAN1

ACES-CON6-39-GP

DY111

234567891012

CRTBD1

PAD-10P-177042-GP

ZZ.00PAD.Y41

CRTBD1

PAD-10P-177042-GP

ZZ.00PAD.Y41

1AFTP8213AFTP8213

12

EC8206SC10P50V2JN-4GPEC8206SC10P50V2JN-4GP

12 C8

203

SC10U6D3V3MX-G

P

DY C820

3

SC10U6D3V3MX-G

P

DY


1AFTP8203AFTP8203

1AFTP8214AFTP8214

12

EC82

01

SCD1U16V2KX-3GP

EC82

01

SCD1U16V2KX-3GP

12 C8

205

SC10U6D3V3MX-G

P

DY C820

5

SC10U6D3V3MX-G

P

DY

1

23456

7

8

LEDBD1

PTWO-CON6-12-GP

20.K0382.0062nd = 20.K0320.006

LEDBD1

PTWO-CON6-12-GP

20.K0382.0062nd = 20.K0320.006

1 2R8203 1KR2J-1-GPR8203 1KR2J-1-GP

1

2345678910111213141516171819202122232425262728293031323334353637383940

41

42

43

44

45

46

47

48

49

50

51

IOBD1

FOX-CON40-2R-1-GP20.F2091.0402nd = 20.F2089.040

IOBD1

FOX-CON40-2R-1-GP20.F2091.0402nd = 20.F2089.040

1 2R8201 1KR2J-1-GPR8201 1KR2J-1-GP

1AFTP8216AFTP8216

12 C8

202

SC10U6D3V3MX-G

P

DY C820

2

SC10U6D3V3MX-G

P

DY

1AFTP8212AFTP8212


1 2R82040R3J-0-U-GPDYR82040R3J-0-U-GPDY

1AFTP8211AFTP8211

1 2EC8204 SC470P50V-2-GPEC8204 SC470P50V-2-GP

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCIE_CALRP

PWRGOOD PCIE_CALRN

VGA_RST#

PEG_RXN4

PEG_RXN5PEG_RXP5

PEG_RXN6

PEG_RXN7PEG_RXP7

PEG_RXP6

PEG_RXP4

PEG_RXN0

PEG_RXN1PEG_RXP1

PEG_RXN2

PEG_RXN3PEG_RXP3

PEG_RXP2

PEG_RXP0

PEG_C_RXP5

PEG_C_RXN7

PEG_C_RXP1PEG_C_RXN1



PEG_C_RXN0PEG_C_RXP0

PEG_C_RXN5

PEG_C_RXP7



PEG_TXP5PEG_TXN5

PEG_TXP7PEG_TXN7

PEG_TXN6

PEG_TXP4PEG_TXN4

PEG_TXP6

PEG_TXP3

PEG_TXN0

PEG_TXP1PEG_TXN1

PEG_TXN3

PEG_TXP2PEG_TXN2

PEG_TXP0

1V_VGA_S0

PEG_RXN[7..0] [4]

PEG_RXP[7..0] [4]

CLK_PCIE_VGA[20]CLK_PCIE_VGA#[20]

PEG_TXN[7..0][4]

PEG_TXP[7..0][4]

DGPU_HOLD_RST#[22] VGA_RST# [85]

Title


Date: Sheet of


BMW Z4 DIS A00GPU_PEG/STRAPPING(1/5)

A3

83 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of



A3

83 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of



A3

83 105Friday, March 30, 2012

<Core Design>

X01 12/15

SSID = VIDEO

X03 2/6

1 2C8327 SCD1U10V2KX-5GPSGC8327 SCD1U10V2KX-5GPSG




1 2R8326 1K27R2F-L-GPSGR8326 1K27R2F-L-GPSG



PWRGOODN10 PCIE_CALRN AA22PCIE_CALRP Y22

PCIE_REFCLKNAK32 PCIE_REFCLKPAK30

PCIE_RX0NAE31 PCIE_RX0PAF30

PCIE_RX10NR31 PCIE_RX10PT30

PCIE_RX11NP28 PCIE_RX11PR29

PCIE_RX12NN31 PCIE_RX12PP30

PCIE_RX13NM28 PCIE_RX13PN29

PCIE_RX14NL31 PCIE_RX14PM30

PCIE_RX15NK30 PCIE_RX15PL29

PCIE_RX1NAD28 PCIE_RX1PAE29

PCIE_RX2NAC31 PCIE_RX2PAD30

PCIE_RX3NAB28 PCIE_RX3PAC29

PCIE_RX4NAA31 PCIE_RX4PAB30

PCIE_RX5NY28 PCIE_RX5PAA29

PCIE_RX6NW31 PCIE_RX6PY30

PCIE_RX7NV28 PCIE_RX7PW29

PCIE_RX8NU31 PCIE_RX8PV30

PCIE_RX9NT28 PCIE_RX9PU29

PERST#AL27

PCIE_TX0N AG31PCIE_TX0P AH30

PCIE_TX10N U23PCIE_TX10P U24

PCIE_TX11N T27PCIE_TX11P T26

PCIE_TX12N T23PCIE_TX12P T24

PCIE_TX13N P26PCIE_TX13P P27

PCIE_TX14N P23PCIE_TX14P P24

PCIE_TX15N N26PCIE_TX15P M27

PCIE_TX1N AF28PCIE_TX1P AG29

PCIE_TX2N AF26PCIE_TX2P AF27

PCIE_TX3N AD26PCIE_TX3P AD27

PCIE_TX4N AB25PCIE_TX4P AC25

PCIE_TX5N Y24PCIE_TX5P Y23

PCIE_TX6N AB26PCIE_TX6P AB27

PCIE_TX7N Y26PCIE_TX7P Y27

PCIE_TX8N W23PCIE_TX8P W24

PCIE_TX9N U26PCIE_TX9P V27

PCI EXPRESS INTERFACE

CLOCK

CALIBRATION

1 OF 7

ROBSON-GP-U

VGA1A

SG

PCI EXPRESS INTERFACE

CLOCK

CALIBRATION

1 OF 7

ROBSON-GP-U

VGA1A

SG



1 2R8317 10KR2F-2-GPSGR8317 10KR2F-2-GPSG





12

C8333SC47P50V2JN-3GPDYC8333SC47P50V2JN-3GPDY


1 2R8322 0R0402-PAD-2-GPR8322 0R0402-PAD-2-GP


1 2R8318 2KR2F-3-GPSGR8318 2KR2F-3-GPSG



www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DQA0_12

DQA0_28

DQA0_11

DQA0_30

DQA1_2DQA1_3

DQA0_31

DQA0_0

DQA0_25

DQA0_1

DQA0_15

DQA1_4

DQA0_21

DQA0_18

DQA0_4

DQA0_23

DQA0_20

DQA0_9

DQA0_27

DQA0_13

DQA0_8

DQA0_29

DQA0_22

DQA0_5

DQA0_24

DQA0_19

DQA0_14

DQA0_17

DQA1_1

DQA0_26

DQA0_2

DQA0_6

DQA0_3

DQA0_7

DQA0_10

DQA0_16

DQA1_0

MVREFDA

MVREFDAMVREFSA

MVREFSA

DRAM_RST

MEM_CALRP0MEM_CALRN0

DRAM_RST_1

MEM_CALRP0

MEM_CALRN0

CLKTESTACLKTESTB

TESTEN

PX_EN_R

MAA0_0MAA0_1MAA0_2MAA0_3MAA0_4MAA0_5MAA0_6MAA0_7MAA1_0MAA1_1MAA1_2MAA1_3MAA1_4

MAA1_6MAA1_7MAA1_5

MAA0_8

MAA1_8

DQA1_5DQA1_6

DQA1_12DQA1_13

DQA1_9DQA1_10DQA1_11

DQA1_8DQA1_7

DQA1_19DQA1_20


DQA1_15DQA1_14

DQA1_26DQA1_27


DQA1_22DQA1_21

DQA1_28DQA1_29DQA1_30DQA1_31

MAA0_8

MAA1_8

MEM_CALRP1/DPC_CALR

1D5V_VGA_S0 1D5V_VGA_S0

1D5V_VGA_S0

CLKA0# [88]CLKA0 [88]

CLKA1 [89]CLKA1# [89]

RASA0# [88]RASA1# [89]

CASA1# [89]CASA0# [88]

CSA0#_0 [88]

CSA1#_0 [89]

CKEA0 [88]CKEA1 [89]

WEA1# [89]WEA0# [88]

MEM_RST[88,89]

PX_EN [86]

MAA0_[8..0] [88]

MAA1_[8..0] [89]

WCKA0_0 [88]WCKA0_0# [88]WCKA0_1 [88]WCKA0_1# [88]WCKA1_0 [89]WCKA1#_0 [89]WCKA1_1 [89]WCKA1#_1 [89]

EDCA0_0 [88]EDCA0_1 [88]EDCA0_2 [88]EDCA0_3 [88]EDCA1_0 [89]EDCA1_1 [89]EDCA1_2 [89]EDCA1_3 [89]

DDBIA0_0 [88]DDBIA0_1 [88]DDBIA0_2 [88]DDBIA0_3 [88]DDBIA1_0 [89]DDBIA1_1 [89]DDBIA1_2 [89]DDBIA1_3 [89]

ADBIA0 [88]ADBIA1 [89]

DQA0_[31..0][88]

DQA1_[31..0][89]

TESTEN[85]

Title


Date: Sheet of


BMW Z4 DIS A00GPU Memory(2/5)

A3

84 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A3

84 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A3

84 105Friday, March 30, 2012

DMB40

Layout Note:Place all these components very close to GPU(Within 25mm) and keep all component closeto each Other (within 5mm) except R_MEM_2

25mm (Max) 5mm (Max) 25mm (Max)

Layout Note:Place MVREF R & C close to GPU

X01 11/28

X01 12/12

SSID = VIDEO

1 2R8402

10R2J-2-GPSGR8402

10R2J-2-GPSG

1

TP8402TPAD14-OP-GP

TP8402TPAD14-OP-GP

12

R8414100R2F-L1-GP-USGR8414100R2F-L1-GP-USG

12C8401

SC12

0P50

V2JN

-1G

PSGC8401

SC12

0P50

V2JN

-1G

PSG

1TP8401TPAD14-OP-GP

TP8401TPAD14-OP-GP

1 2

R8407150R2F-1-GP

SG

R8407150R2F-1-GP

SG

12

R841040D2R2F-GPSGR841040D2R2F-GPSG

1 2R8403 240R2F-1-GPSGR8403 240R2F-1-GPSG

1 2

R840551R2J-2-GP

SG

R840551R2J-2-GP

SG

12

R8415100R2F-L1-GP-USGR8415100R2F-L1-GP-USG

12

R84045K1R2F-2-GP SG

R84045K1R2F-2-GP SG

12

C8402SCD1U10V2KX-5GPSGC8402SCD1U10V2KX-5GPSG

12

R84124K7R2J-2-GPSG R84124K7R2J-2-GPSG

1 2R8406 240R2F-1-GPSGR8406 240R2F-1-GPSG

1 2

R84080R2J-2-GP

DY

R84080R2J-2-GP

DY

12


12

R841140D2R2F-GPSGR841140D2R2F-GPSG

DQA_0K27DQA_1J29

DQA_10A28DQA_11C28DQA_12E27DQA_13G26DQA_14D26DQA_15F25DQA_16A25DQA_17C25DQA_18E25DQA_19D24

DQA_2H30

DQA_20E23DQA_21F23DQA_22D22DQA_23F21DQA_24E21DQA_25D20DQA_26F19DQA_27A19DQA_28D18DQA_29F17

DQA_3H32

DQA_30A17DQA_31C17DQA_32E17DQA_33D16DQA_34F15DQA_35A15DQA_36D14DQA_37F13DQA_38A13DQA_39C13

DQA_4G29

DQA_40E11DQA_41A11DQA_42C11DQA_43F11DQA_44A9DQA_45C9DQA_46F9DQA_47D8DQA_48E7DQA_49A7

DQA_5F28

DQA_50C7DQA_51F7DQA_52A5DQA_53E5DQA_54C3DQA_55E1DQA_56G7DQA_57G6DQA_58G1DQA_59G3

DQA_6F32

DQA_60J6DQA_61J1DQA_62J3DQA_63J5

DQA_7F30DQA_8C30DQA_9F27

MEM_CALRP1/DPC_CALRJ8

MVREFDAK26MVREFSAJ26

MEM_CALRN0J25TESTENK7

MEM_CALRP0K25

CASA0# G19CASA1# G16

CKEA0 K20CKEA1 J17

CLKA0 H26CLKA0# H25

CLKA1 G9CLKA1# H9

CSA0#_0 H22CSA0#_1 J22

CSA1#_0 G13CSA1#_1 K13

DQMA_0 E32DQMA_1 E30DQMA_2 A21DQMA_3 C21DQMA_4 E13DQMA_5 D12DQMA_6 E3DQMA_7 F4

MAA_0 K17MAA_1 J20

MAA_10 J11MAA_11 J13MAA_12 H11

MAA_BA2 G11MAA_14/BA0 J16MAA_15/BA1 L15

MAA_2 H23MAA_3 G23MAA_4 G24MAA_5 H24MAA_6 J19MAA_7 K19MAA_8 J14MAA_9 K14

ODTA0 L18ODTA1 K16

RASA0# G22RASA1# G17

RDQSA_0 H28RDQSA_1 C27RDQSA_2 A23RDQSA_3 E19RDQSA_4 E15RDQSA_5 D10RDQSA_6 D6RDQSA_7 G5

PX_EN AB16

RSVD#G14 G14

MAA_13 G20

WDQSA_0 H27WDQSA_1 A27WDQSA_2 C23WDQSA_3 C19WDQSA_4 C15WDQSA_5 E9WDQSA_6 C5WDQSA_7 H4

WEA0# G25WEA1# H10

DRAM_RSTL10

CLKTESTAK8CLKTESTBL7

MEMORY INTERFACE

3 OF 7

ROBSON-GP-U

VGA1C

SG

MEMORY INTERFACE

3 OF 7

ROBSON-GP-U

VGA1C

SG

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

JTAG_TDI_VGA

FAN_PWM_C

MEM_ID1MEM_ID0

JTAG_TMS_VGA

VGA_DIS

PWRCNTL_1

GPIO16_SSIN

CONFIG2

TX_PWRS_ENB

JTAG_TDO_VGA

PEG_CLKREQ#

BIF_GEN2_EN_A

HDMI_HPD_DET

PWRCNTL_0

CONFIG1

GPU_VREFG

THERMTRIP_VGA

TX_DEEMPH_EN

GENERICE_HPD4

GEN_B

RSVD

CONFIG0

GPIO6_VGA

GPIO18_VGA

JTAG_TCK_VGA

GEN_A

GPIO5_AC_BATT

GPIO17_VGA

JTAG_TRST#_VGA

VGA_BLEN

P2800_VGA_DXNP2800_VGA_DXP

THERMTRIP_R

THERMTRIP_VGA

Q5801_2

GPIO_10_ROMSCK

GPIO_VGA_04_CLKGPIO_VGA_03_DATA

GPIO_VGA_03_DATA

GPIO_VGA_04_CLK

XO_INXO_IN2

XTALOUT_R

XTAL_X1XTAL_X2

SS_SEL0

CLK_27R

CLK_100R

XO_IN

XTALIN_R

XO_IN2

XTAL_X1 XTAL_X2

SS_SEL1

XTALIN_R

XTALIN_R

TX_DEEMPH_EN

GPIO5_AC_BATT

CONFIG0

TX_PWRS_ENB

CONFIG2

VGA_DIS

CONFIG1

BIF_GEN2_EN_A

JTAG_TRST#_VGA

TESTEN

JTAG_TMS_VGA

DPC_VDD10

3D3V_S0_U8606

GPIO_8_ROMSO

JTAG_TDI_VGA

JTAG_TDO_VGA

JTAG_TCK_VGA

GPIO17_VGA

R2SET

GPU_RSET

VGA_CRT_HSYNC

VGA_CRT_VSYNC

VARY_BLDIGON

BACO_SCLBACO_SDA

PWRCNTL_1

PWRCNTL_0

1D8V_VGA_S0

DPLL_VDDC

1D8V_VGA_S0

1V_VGA_S0

DPLL_PVDD

1D8V_VGA_S0TSVDD

1D8V_VGA_S0

1D8V_VGA_S0

1V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

1D8V_VGA_S0AVDD_A2VDDQ

VDD1DI

AVSSQ

AVDD_A2VDDQ

VDD1DI

AVSSQ

AVSSQ

AVSSQ

3D3V_VGA_S0

3D3V_VGA_S0

VGA_RST#[83]

SML1_DATA [20,27,28]

SML1_CLK [20,27,28]

PURE_HW_SHUTDOWN# [27,28,36]

P2800_VGA_DXP[28]

P2800_VGA_DXN[28]TESTEN [84]

PEG_CLKREQ#[20]

PWRCNTL_1[92]

PWRCNTL_0[92]

VGA_CRT_DDCCLK [82]VGA_CRT_DDCDATA [82]

VGA_CRT_HSYNC [82]VGA_CRT_VSYNC [82]

VGA_B [82]

VGA_G [82]

VGA_R [82]

Title


Date: Sheet of


BMW Z4 DIS A00

GPU_DP/LVDS/CRT/GPIO(3/5)A1

85 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


85 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


85 105Friday, March 30, 2012

DMB40

MEMORY ID Table

DVPDATA[3:0]

0000

0001

Description

GDDR5 1.25GHZ SAMSUNG-K4G20325FD-FC04 128M*16

GDDR5 1.25GHZ Hynix-H5GQ2H24MFR-T2C 128M*16

DVPDATA[0:3] Default:Pull down

3.3V

3.3V

1.8V

1

1

?

0

0

GPIO8_ROMSO

0

RESERVED

1

AUD[1] XHSYNC

0:Disable external BIOS ROM device1:Enable external BIOS ROM device

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

X

PCIE TRANSMITTER DE-EMPHASIS ENABLED0:Tx de-emphasis disabled 1:Tx de-emphasis enabledTX_DEEMPH_EN GPIO1

TX_PWRS_ENBTransmitter Power Savings Enable0: 50% Tx output swing 1: Full Tx output swing

GPIO9 0

X

X XX

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 3K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE

VIP Device Strap Enable indicates to the software driver that it sense whether or not a VIP device is connected on the VIP Host interface.VIP_DEVICE_STRAP_EN

VGA_DIS0:VGA Controller capacity enabled1:The device won't be recognized as the system's VGA controller

GPIO[13:11]

PIN DESCRIPTION OF DEFAULT SETTINGSSTRAPS

GPIO_22_ROMCSB

CONFIGURATION STRAPS

BIOS_ROM_EN=1, Config[2:0] defines the ROM typeBIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture sizeROMIDCFG[2:0]

AUD[0] XVSYNC

X

BIOS_ROM_EN

GPIO21_BB_EN

RSVD

0:Advertises the PCIe device as 2.5GT/s capable at power on.1:Advertises the PCIe device as 5.0GT/s capable at power on.

0H2SYNC

0RESERVEDGPIO8

RSVD 0GENERICC

0BIF_GEN2_EN_A GPIO2

RESERVEDGPIO21

PLATFORMSETTINGRECOMMEND

optional input allow the system to request a fastpower reduction by setting GPIO5 to low.GPIO5_AC_BATT GPIO5

AUD[1:0]:11-Audio for both DisplayPort and HDMI

0

0

0

0

V2SYNC

GPIO0

1

0

0 0 0 1(256MB)

0

X

RESERVED

Straps Pin

LVDS Interface

330mA

125mA

75mA

5mA

70mA

45mA

X01 11/28

X01 11/28

0011 GDDR5 1.25GHZ Hynix-H5GQ2H24AFR-T2C 128M*16

X01 12/02

X01 12/02

SSID = VIDEO

X03 2/6

X03 2/6

A00 3/15

A00 3/15 1 2R852310KR2J-3-GPSGR852310KR2J-3-GPSG

12

C8516

SCD1

U10V

2KX-

5GP

DY

C8516

SCD1

U10V

2KX-

5GP

DY

VDD_100M4VDD_27M8

XIN1XOUT10

SS_SEL07SS_SEL13 GND 11GND_100M 6GND_27M 2

100M 527M 9

U8506

6V40088DNBGI8-GP71.64088.003

SG

2nd = 71.16020.003

U8506

6V40088DNBGI8-GP71.64088.003

SG

2nd = 71.16020.003

1 2L8512

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SGL8512

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SG

12

R852810KR2J-3-GP SG

R852810KR2J-3-GP SG

12

R8516249R2F-GP SG

R8516249R2F-GP SG


12

R852210KR2J-3-GP SG

R852210KR2J-3-GP SG

1 2R8507

0R0402-PAD-2-GP

R8507

0R0402-PAD-2-GP

12

C852

7

SC1U

6D3V

2KX-

GP

DYC852

7

SC1U

6D3V

2KX-

GP

DY

12 R85413KR2J-2-GP SG R85413KR2J-2-GP SG

12

C8521SC1U6D3V2KX-GPSGC8521SC1U6D3V2KX-GPSG

12 R853010KR2J-3-GP DY R853010KR2J-3-GP DY

41

2 3

X8501

XTAL-27MHZ-84-GP

82.30034.6512nd = 82.30034.681

SG

X8501

XTAL-27MHZ-84-GP

82.30034.6512nd = 82.30034.681

SG

12


1 2R8519 10KR2J-3-GPHYNIX_RTSR8519 10KR2J-3-GPHYNIX_RTS


12

C8534

SC1U

6D3V

2KX-

GP

DY C8534

SC1U

6D3V

2KX-

GP

DY



12

C8519

SCD1

U10V

2KX-

5GP DY

C8519

SCD1

U10V

2KX-

5GP DY

1 2

R8529124R2F-U-GP

DYR8529

124R2F-U-GP

DY


12

C8533

SC1U

6D3V

2KX-

GP DYC8533

SC1U

6D3V

2KX-

GP DY

1 2L8501

BLM18BD601SN1D-GPSG

68.00082.5312nd = 68.00226.0313rd = 68.00040.111

L8501

BLM18BD601SN1D-GPSG

68.00082.5312nd = 68.00226.0313rd = 68.00040.111


12 3

4

RN8502SRN10KJ-5-GP

SG

RN8502SRN10KJ-5-GP

SG

12

C8535

SCD1

U10V

2KX-

5GP

SG C8535

SCD1

U10V

2KX-

5GP

SG



12

C8509SC10U6D3V3MX-GP DYC8509SC10U6D3V3MX-GP DY

1 2R8543 5K11R2F-L1-GPSGR8543 5K11R2F-L1-GPSG

12

R8515499R2F-2-GPSGR8515499R2F-2-GPSG



1 2R8526 0R2J-2-GPDYR8526 0R2J-2-GPDY


12





12



12

C8543

SC1U6D3V2KX-GPDY

C8543

SC1U6D3V2KX-GPDY


12


SGC8524SC18P50V2JN-1-GP

SG


1TP8509TPAD14-OP-GPTP8509TPAD14-OP-GP

12


DY


DY

DMINUST2

DPLL_PVDDAF14DPLL_PVSSAE14

DPLL_VDDCAD14

DPLUST4

DPC_VSSR#1/DVPCLKU1

DVDATA_7/DVPCNTL_0AC7

DVPCNTL_1/TX2M_DPC0N Y2

DVPCNTL_2/TXCCM_DPC3N U5

DPC_VSSR#5/DVPCNTL_MV0AA1

DVPCNTL_MV1/TX1P_DPC1P Y4

DVDATA_0/DVPDATA_0Y7

DVPDATA_1/TX0M_DPC2N V2

DPC_VDD18#1/DVPDAT10AC6

DPC_PVDD/DVPDATA_11W6

DVDATA_9/DVPDATA_12AD7

DVPDATA_13/TX2P_DPC0P AA3

DVDATA_8/DVPDATA_14AC8

DPC_VDD10#1/DVPDAT15AA5

DVDATA_12/DVPDATA_16AE8

DPC_VDD10#2/DVPDAT17AA6

DVCNTL_0/DVPDATA_18AE9

DVDATA_3/DVPDATA_19AB4

DVDATA_1/DVPDATA_2Y8

DVDATA_11/DVPDATA_20AD9


DVDATA_10/DVPDATA_22AC10

DPC_VDD18#2/DVPDAT23AC5DVPDATA_3/TXCCP_DPC3P V4

DVDATA_4DVPDATA_4AB7

DPC_VSSR#2/DVPDAT5W1


DVPDATA_7/TX0P_DPC2P W3


DVPDATA_9/TX1M_DPC1N W5

GENERICAAB13GENERICBW8GENERICCW9GENERICDW7GENERICE_HPD4AD10

GPIO_0U6GPIO_1U10

GPIO_10_ROMSCKP2GPIO_11N6GPIO_12N5GPIO_13N3GPIO_14_HPD2Y9GPIO_15_PWRCNTL_0N1GPIO_16_SSINM4GPIO_17_THERMAL_INTR6GPIO_18_HPD3W10GPIO_19_CTFM2

GPIO_2T10

GPIO_20_PWRCNTL_1P8GPIO_21_BB_ENP7GPIO_22_ROMCSBN8GPIO_23_CLKREQBN7

GPIO_3_SMBDATAU8GPIO_4_SMBCLKU7GPIO_5_AC_BATTT9GPIO_6T8GPIO_7_BLONT7GPIO_8_ROMSOP10GPIO_9_ROMSIP4

H2SYNC AL13

HPD1AC14

HSYNC AH26

JTAG_TCKL3 JTAG_TDIL5

JTAG_TDOK4 JTAG_TMSL1

JTAG_TRST#L6

NC#AC20/DDCDATA_AUX3N AC20NC#AD20/DDCCLK_AUX3P AD20

TS_FDOR5TSVDDAD17TSVSSAC17

VREFGAC16

VSS1DI AD23

VSS2DI/NC#AC19 AC19

XTALINAM28XTALOUTAK28

A2VDD/NC#AE20 AE20

A2VDDQ/NC#AE17 AE17

A2VSSQ AE19

AUX1N AD4AUX1P AD2

AUX2N AD11AUX2P AD13

AVDD AG24AVSSQ AE22

B AH24

B2/NC#AK10 AK10B2#/NC#AL9 AL9

B# AG25

C/NC#AH12 AH12

COMP/NC#AJ9 AJ9

DDC1CLK AE6DDC1DATA AE5

DDC2CLK AC11DDC2DATA AC13

DDC6CLK AC1DDC6DATA AC3

DDCDATA_AUX5N AD16DDCCLK_AUX5P AE16

G AL25

G2/NC#AL11 AL11G2#/NC#AJ11 AJ11

G# AJ25

R AM26

R2/NC#AM12 AM12R2#/NC#AK12 AK12

R2SET/NC#AG13 AG13

R# AK26

RSET AD22

SCLR1SDAR3

TX0M_DPA2N AG5TX0P_DPA2P AG3

TX1M_DPA1N AH1TX1P_DPA1P AH3

TX2M_DPA0N AK1TX2P_DPA0P AK3

TX3M_DPB2N AM5TX3P_DPB2P AK6

TX4M_DPB1N AH6TX4P_DPB1P AJ7

TX5M_DPB0N AL7TX5P_DPB0P AK8

TXCAM_DPA3N AF4TXCAP_DPA3P AF2

TXCBM_DPB3N AM3TXCBP_DPB3P AK5

V2SYNC AJ13

VDD1DI AE23

VDD2DI/NC#AD19 AD19

VSYNC AJ27

Y/NC#AM10 AM10

NC#AB22/XO_IN2AB22 NC#AC22/XO_INAC22

RSVD#AF24AF24

NC#AA12 AA12

DVCNTL_2/TESTEN#2N9

DPC_VSSR#3/GNDU3

DPC_PVSS/GNDV6

DPC_VSSR#4/GNDY6

DVCNTL_1/NC#L9L9

DPA

DPB

DVO

I2C

GENERAL PURPOSE I/O

DAC1

DAC2

DDC/AUX

THERMAL

PLL/CLOCK

DPC

M92-S2/M93-S3

M92-S2/M93-S3M93-S3/M92-S2

M93-S3/M92-S2

M92-S2/M93-S3M92-S2/M93-S3

2 OF 7

ROBSON-GP-U

VGA1B

SG

DPA

DPB

DVO

I2C

GENERAL PURPOSE I/O

DAC1

DAC2

DDC/AUX

THERMAL

PLL/CLOCK

DPC

M92-S2/M93-S3

M92-S2/M93-S3M93-S3/M92-S2

M93-S3/M92-S2

M92-S2/M93-S3M92-S2/M93-S3

2 OF 7

ROBSON-GP-U

VGA1B

SG



1 234

RN8504SRN4K7J-8-GP

SG

RN8504SRN4K7J-8-GP

SG


1

2

3 4

5

6Q8503

2N7002KDW-GP


SG

Q8503

2N7002KDW-GP


SG

12

C8532

SCD1

U10V

2KX-

5GPSG C8532

SCD1

U10V

2KX-

5GPSG

1 2L8507

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8507

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C8542

SCD1

U10V

2KX-

5GP

DY

C8542

SCD1

U10V

2KX-

5GP

DY




1 2L8508

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SGL8508

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SG


12

C8515

SC1U

6D3V

2KX-

GP

DY

C8515

SC1U

6D3V

2KX-

GP

DY

1 2R8510 33R2J-2-GPSGR8510 33R2J-2-GPSG

1 2 3456

Q85012N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

DYQ8501

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

DY

12

C8523SC2200P50V2KX-2GP DYC8523SC2200P50V2KX-2GP DY1 2R8513 10KR2J-3-GPDYR8513 10KR2J-3-GPDY

1 234

RN8505SRN4K7J-8-GP

DY

RN8505SRN4K7J-8-GP

DY


1 2R8506

0R0603-PAD-2-GP

R8506

0R0603-PAD-2-GP

12

C852

8

SCD1

U10V

2KX-

5GP

DYC852

8

SCD1

U10V

2KX-

5GP

DY

1 2R8502 47R2J-2-GPSGR8502 47R2J-2-GPSG

DIGON AB12

TXCLK_LN_DPE3N AK14TXCLK_LP_DPE3P AL15

TXCLK_UN_DPF3N AJ19TXCLK_UP_DPF3P AH20

TXOUT_L0N_DPE2N AJ15TXOUT_L0P_DPE2P AH16

TXOUT_L1N_DPE1N AK16TXOUT_L1P_DPE1P AL17

TXOUT_L2N_DPE0N AJ17TXOUT_L2P_DPE0P AH18

TXOUT_L3N AK18TXOUT_L3P AL19

TXOUT_U0N_DPF2N AK20TXOUT_U0P_DPF2P AL21

TXOUT_U1N_DPF1N AJ21TXOUT_U1P_DPF1P AH22

TXOUT_U2N_DPF0N AK22TXOUT_U2P_DPF0P AL23

TXOUT_U3N AJ23TXOUT_U3P AK24

VARY_BL AB11

LVTMDP

LVDS CONTROL

6 OF 7

ROBSON-GP-U

VGA1F

SG

LVTMDP

LVDS CONTROL

6 OF 7

ROBSON-GP-U

VGA1F

SG

1 2L8509

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8509

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C8522SCD1U10V2KX-5GPSG

C8522SCD1U10V2KX-5GPSG

12R8521

0R2J-2-GPDY

R8521

0R2J-2-GPDY

1 2R8518 10KR2J-3-GPHYNIXR8518 10KR2J-3-GPHYNIX

12

C8544

SC1U

6D3V

2KX-

GP

DYC8544

SC1U

6D3V

2KX-

GP

DY



12


1 2R8517 0R2J-2-GPDYR8517 0R2J-2-GPDY

12


1 2

R85111MR2F-GP

DYR8511

1MR2F-GP

DY

1 2R8539 499R2F-2-GPSGR8539 499R2F-2-GPSG

12

C8525SC18P50V2JN-1-GPSG C8525SC18P50V2JN-1-GPSG

12


1 2R8525

0R2J-2-GPDYR8525

0R2J-2-GPDY

12

R8527150R2F-1-GPDY R8527150R2F-1-GPDY

1 2R8504

0R0603-PAD-2-GP

R8504

0R0603-PAD-2-GP

12

C8518

SC1U

6D3V

2KX-

GP DY

C8518

SC1U

6D3V

2KX-

GP DY

1 2R8501

715R2F-GPDYR8501

715R2F-GPDY

12

C8502SC10U6D3V3MX-GP DY

C8502SC10U6D3V3MX-GP DY


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPV10

BIF_VDDC_CORE

PX_EN_VDDC

PX_EN_1V

BIF_VDDC_1V

Q6802_5

PX_EN_VDDC

PX_EN_1V

1V_VGA_S0

MPV18

1D8V_VGA_S0

1D5V_VGA_S0

VGA_CORE

1D8V_VGA_S0

VGA_CORE

SPV18

VDDC_CT

3D3V_VGA_S0

1V_VGA_S0

MPV18

SPV18

MPV18

BIF_VDDC

VGA_CORE

1V_VGA_S0BIF_VDDC

3D3V_VGA_S0

BIF_VDDC

3D3V_VGA_S0

VGA_CORE

VDDR4

BIF_VDDC VGA_CORE

DGPU_PWROK[22,27,92,93]

8209A_EN/DEM_VGA [92,93]

PX_EN[84]

Title


Date: Sheet of


BMW Z4 DIS A00

GPU_POWER(4/5)A2

86 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

GPU_POWER(4/5)A2

86 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

GPU_POWER(4/5)A2

86 105Friday, March 30, 2012

<Core Design>

PX_EN

LowDIS

HighBACO

PX_EN_1V PX_EN_VDDC BIF_VDDC

High

Low

Low

High VGA_CORE

1V_VGA_S0

Mode

PX4.0

R8612

R8612DY

POP Q8601, Q8602, R8601, U8601, U8602, U8603 U8604, R8603, R8604, R8408

PX4.0 PX5.0

DY

POP

Q8601, Q8602, R8601, U8601, U8602, U8603 U8604, R8603, R8604, R8605, R8408

22A

1.2A

17mA

100mA

50mA

1.1A

440mA

3.9A

60mA

150mA

170mA

55mA

X01 11/28

X01 11/28 X01 11/28

X01 12/15

X01 12/15X01 12/15X01 11/28

SSID = VIDEO

A00 3/27

1 2

R86120R0402-PAD-2-GP

R86120R0402-PAD-2-GP

12

C863

0SC

1U6D

3V2K

X-GP

SG C863

0SC

1U6D

3V2K

X-GP

SG

G

DS

U8602AO3418-GP

84.03418.0312nd = 84.P8503.031

DY

U8602AO3418-GP

84.03418.0312nd = 84.P8503.031

DY1

2 C864

5SC

10U6

D3V3

MX-

GPDY C864

5SC

10U6

D3V3

MX-

GPDY

12

C863

8SC

1U6D

3V2K

X-GP

SG C863

8SC

1U6D

3V2K

X-GP

SG

1 2L8601

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8601

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C861

4SC

D1U1

0V2K

X-5G

P

SG C861

4SC

D1U1

0V2K

X-5G

P

SG

12

C866

2SC

4D7U

6D3V

3KX-

GPDY

C866

2SC

4D7U

6D3V

3KX-

GPDY 12

C864

2SC

22U6

D3V5

MX-

2GP

SG

C864

2SC

22U6

D3V5

MX-

2GP

SG

G

DS

U8601AO3400A-GP

84.03400.B372nd = 84.03203.031

DY

U8601AO3400A-GP

84.03400.B372nd = 84.03203.031

DY

PCIE_PVDDAM30

MPV18L8

SPV18H7

PCIE_VDDC L23

PCIE_VDDC T22PCIE_VDDC U22PCIE_VDDC V22

PCIE_VDDC L24PCIE_VDDC L25PCIE_VDDC L26PCIE_VDDC M22PCIE_VDDC N22PCIE_VDDC N23PCIE_VDDC N24PCIE_VDDC R22

PCIE_VDDR AB23PCIE_VDDR AC23PCIE_VDDR AD24PCIE_VDDR AE24PCIE_VDDR AE25PCIE_VDDR AE26PCIE_VDDR AF25PCIE_VDDR AG26

SPV10H8

SPVSSJ7

VDDR1H13

VDDR1K24VDDR1K9VDDR1L11VDDR1L12VDDR1L13VDDR1L20VDDR1L21VDDR1L22

VDDR1H16VDDR1H19VDDR1J10VDDR1J23VDDR1J24VDDR1J9VDDR1K10VDDR1K23

VDDR3AA17VDDR3AA18VDDR3AB17VDDR3AB18

VDDR4/VDDR5V12VDDR4Y12

VDDRHAL17

VSSRHAL16

VDD_CTAA20VDD_CTAA21VDD_CTAB20VDD_CTAB21 VDDC AA15

VDDC T17VDDC T20VDDC U13VDDC U16VDDC U18VDDC V21VDDC V15VDDC V17VDDC V20

VDDC/BIF_VDDC U21

VDDC N15

VDDC Y13VDDC Y16VDDC Y18

VDDC/BIF_VDDC R21

VDDC N17VDDC R13VDDC R16VDDC R18VDDC Y21VDDC T12VDDC T15

VDDCI M13VDDCI M15VDDCI M16VDDCI M17

BBP#1M11BBP#2M12

VDDCI M18

VDDCI M21VDDCI M20

VDDCI N20

NC#AA11/VDDR4AA11DVCLK/VDDR4Y11

NC#V11/VDDR5V11NC#U11U11

VDDR4/VDDR5U12

POWER

PLL

PCIE

CORE

MEM I/O

MEM CLK

I/O

BACK BIAS

LEVELTRANSLATION

ISOLATEDCORE I/O

M93-S3/M92-S2

4 OF 7

ROBSON-GP-U

VGA1D

SG

POWER

PLL

PCIE

CORE

MEM I/O

MEM CLK

I/O

BACK BIAS

LEVELTRANSLATION

ISOLATEDCORE I/O

M93-S3/M92-S2

4 OF 7

ROBSON-GP-U

VGA1D

SG

G

S

D

Q8601

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DYQ8601

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

DY

12 C8

661

SC10

U6D3

V3M

X-GPDY C866

1SC

10U6

D3V3

MX-

GPDY

12

C862

3SC

4D7U

6D3V

3KX-

GP

DY

C862

3SC

4D7U

6D3V

3KX-

GP

DY

12

R86041KR2J-1-GPDYR86041KR2J-1-GPDY

12 C8

663

SC10

U6D3

V3M

X-GPSG C866

3SC

10U6

D3V3

MX-

GPSG

12

C860

7SC

1U6D

3V2K

X-GP

DY

C860

7SC

1U6D

3V2K

X-GP

DY

12 C8657

SCD1

U10V

2KX-

5GP

DY

C8657

SCD1

U10V

2KX-

5GP

DY

1 2L8605

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SGL8605

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SG

12

C867

8SC

1U6D

3V2K

X-GP

DYC8

678

SC1U

6D3V

2KX-

GPDY

12

C861

7SC

1U6D

3V2K

X-GP

SG C861

7SC

1U6D

3V2K

X-GP

SG

12

C862

4SC

4D7U

6D3V

3KX-

GP

DY

C862

4SC

4D7U

6D3V

3KX-

GP

DY

1 2

R86010R2J-2-GP

DY

R86010R2J-2-GP

DY1

2

34

5

6

Q8602

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

DY

Q8602

2N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

DY

1 2

L8604

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8604

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C863

3SC

1U6D

3V2K

X-GP

DY C863

3SC

1U6D

3V2K

X-GP

DY

12

C861

9SC

1U6D

3V2K

X-GP

SG C861

9SC

1U6D

3V2K

X-GP

SG

12

C868

1SC

1U6D

3V2K

X-GP

SG C868

1SC

1U6D

3V2K

X-GP

SG

12

C861

0SC

1U6D

3V2K

X-GP

SG C861

0SC

1U6D

3V2K

X-GP

SG

12 C8

618

SC10

U6D3

V3M

X-GPDY C861

8SC

10U6

D3V3

MX-

GPDY

12

C866

8SC

1U6D

3V2K

X-GP

DY

C866

8SC

1U6D

3V2K

X-GP

DY

G

D S

U8603AO3400A-GP

84.03400.B372nd = 84.03203.031

DY

U8603AO3400A-GP

84.03400.B372nd = 84.03203.031

DY

12

C860

4SC

1U6D

3V2K

X-GP

SG C860

4SC

1U6D

3V2K

X-GP

SG

12

C863

2SC

1U6D

3V2K

X-GP

SG C863

2SC

1U6D

3V2K

X-GP

SG

12

C866

0SC

1U6D

3V2K

X-GP

DY

C866

0SC

1U6D

3V2K

X-GP

DY

12 C8

612

SC10

U6D3

V3M

X-GPDY C861

2SC

10U6

D3V3

MX-

GPDY

12

C865

0SC

22U6

D3V5

MX-

2GP

SG C865

0SC

22U6

D3V5

MX-

2GP

SG

12

C869

1SC

D1U1

0V2K

X-5G

P

SG C869

1SC

D1U1

0V2K

X-5G

P

SG

12

C865

8SC

1U6D

3V2K

X-GP

SG

C865

8SC

1U6D

3V2K

X-GP

SG

12

R86031KR2J-1-GPDY R86031KR2J-1-GPDY

12

C862

9SC

1U6D

3V2K

X-GP

SG C862

9SC

1U6D

3V2K

X-GP

SG

12 C8

651

SC10

U6D3

V3M

X-GPDY C865

1SC

10U6

D3V3

MX-

GPDY

12 C8656

SCD1

U10V

2KX-

5GPSG

C8656

SCD1

U10V

2KX-

5GPSG

12

C869

4SC

D1U1

0V2K

X-5G

P

DYC869

4SC

D1U1

0V2K

X-5G

P

DY

12

C861

6SC

1U6D

3V2K

X-GP

DY C861

6SC

1U6D

3V2K

X-GP

DY

12 C8655

SCD1

U10V

2KX-

5GPSG

C8655

SCD1

U10V

2KX-

5GPSG

12

C862

5SC

4D7U

6D3V

3KX-

GP

DY

C862

5SC

4D7U

6D3V

3KX-

GP

DY

12

C866

7SC

1U6D

3V2K

X-GP

DYC8

667

SC1U

6D3V

2KX-

GP

DY

12

C864

9SC

D1U1

0V2K

X-5G

P

DY

C864

9SC

D1U1

0V2K

X-5G

P

DY

G

D S

U8604AO3418-GP

84.03418.0312nd = 84.P8503.031

DY

U8604AO3418-GP

84.03418.0312nd = 84.P8503.031

DY

12 C8

654

SC10

U6D3

V3M

X-GPDY C865

4SC

10U6

D3V3

MX-

GPDY

12

C865

9SC

1U6D

3V2K

X-GP

SG

C865

9SC

1U6D

3V2K

X-GP

SG

12

C863

4SC

1U6D

3V2K

X-GP

SG C863

4SC

1U6D

3V2K

X-GP

SG

12

C865

3SC

D1U1

0V2K

X-5G

P

SG C865

3SC

D1U1

0V2K

X-5G

P

SG

12 C8

644

SC10

U6D3

V3M

X-GPDY C864

4SC

10U6

D3V3

MX-

GPDY1

2

C869

2SC

1U6D

3V2K

X-GP

DYC869

2SC

1U6D

3V2K

X-GP

DY

12

C864

0SC

1U6D

3V2K

X-GP

SG C864

0SC

1U6D

3V2K

X-GP

SG

12

C864

6SC

1U6D

3V2K

X-GP

DYC864

6SC

1U6D

3V2K

X-GP

DY

12

C860

3SC

1U6D

3V2K

X-GP

SG C860

3SC

1U6D

3V2K

X-GP

SG

12 C8

621

SC10

U6D3

V3M

X-GPDY C862

1SC

10U6

D3V3

MX-

GPDY1

2 C862

6SC

10U6

D3V3

MX-

GPSG C862

6SC

10U6

D3V3

MX-

GPSG

12

C862

8SC

1U6D

3V2K

X-GP

SG C862

8SC

1U6D

3V2K

X-GP

SG

12

C869

0SC

D1U1

0V2K

X-5G

P

DY

C869

0SC

D1U1

0V2K

X-5G

P

DY

12

C861

5SC

1U6D

3V2K

X-GP

SG C861

5SC

1U6D

3V2K

X-GP

SG

12

C8674SC

D1U1

0V2K

X-5G

P

SG

C8674SC

D1U1

0V2K

X-5G

P

SG

12

C862

2SC

1U6D

3V2K

X-GP

DY

C862

2SC

1U6D

3V2K

X-GP

DY

12

C863

1SC

1U6D

3V2K

X-GP

DY

C863

1SC

1U6D

3V2K

X-GP

DY

12

C864

1SC

1U6D

3V2K

X-GP

SG C864

1SC

1U6D

3V2K

X-GP

SG

12

C860

9SC

1U6D

3V2K

X-GP

SG C860

9SC

1U6D

3V2K

X-GP

SG

12

C866

4SC

4D7U

25V5

KX-G

P

SG C866

4SC

4D7U

25V5

KX-G

P

SG

12

C860

2SC

1U6D

3V2K

X-GP

SG C860

2SC

1U6D

3V2K

X-GP

SG

12

C861

3SC

D1U1

0V2K

X-5G

P

DY C861

3SC

D1U1

0V2K

X-5G

P

DY

12 C8

620

SC10

U6D3

V3M

X-GPDY C862

0SC

10U6

D3V3

MX-

GPDY

12

C860

6SC

1U6D

3V2K

X-GP

SG C860

6SC

1U6D

3V2K

X-GP

SG

12

C860

8SC

1U6D

3V2K

X-GP

SG C860

8SC

1U6D

3V2K

X-GP

SG

12

C863

6SC

1U6D

3V2K

X-GP

SG C863

6SC

1U6D

3V2K

X-GP

SG

12 C8

648

SC10

U6D3

V3M

X-GPDY C864

8SC

10U6

D3V3

MX-

GPDY

12

C863

9SC

1U6D

3V2K

X-GP

SG C863

9SC

1U6D

3V2K

X-GP

SG

1 2L8603

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SGL8603

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SG

12

C864

7SC

22U6

D3V5

MX-

2GP

SG

C864

7SC

22U6

D3V5

MX-

2GP

SG

12 C8

611

SC10

U6D3

V3M

X-GPDY C861

1SC

10U6

D3V3

MX-

GPDY

12

C865

2SC

1U6D

3V2K

X-GP

DY

C865

2SC

1U6D

3V2K

X-GP

DY

1 2L8602

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8602

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C863

7SC

1U6D

3V2K

X-GPDY

C863

7SC

1U6D

3V2K

X-GPDY

12 C8

643

SC10

U6D3

V3M

X-GPSG C864

3SC

10U6

D3V3

MX-

GPSG

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DPCD_CALR DPAB_CALR

VSS_MECH2VSS_MECH3

VSS_MECH1

DPAB_VDD18

1V_VGA_S0

DPAB_VDD10

DPAB_VDD18

DPAB_VDD10

DPAB_VDD18

DPAB_VDD18

1D8V_VGA_S0

DPEF_VDD18

DPEF_VDD10

1D8V_VGA_S0 DPEF_VDD18

DPEF_VDD10

1V_VGA_S0

DPEF_VDD18

DPEF_VDD18

Title


Date: Sheet of


BMW Z4 DIS A00

GPU_DPPWR/GND(5/5)A3

87 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


87 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


87 105Friday, March 30, 2012

DMB40

330mA

330mA

330mA

330mA

For Video output port power rail.

SSID = VIDEO


12 C8

703

SC1U

6D3V

2KX-

GP

DY C870

3SC

1U6D

3V2K

X-G

P

DY

1 2

R8703150R2F-1-GP

SG

R8703150R2F-1-GP

SG


12 C8

718

SC1U

6D3V

2KX-

GP

DY C871

8SC

1U6D

3V2K

X-G

P

DY

1 2L8701

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SGL8701

BLM18PG471SN1D-GP

2nd = 68.00214.21168.00143.181

SG

12 C8

719

SCD1

U10V

2KX-

5GP

DY C871

9SC

D1U1

0V2K

X-5G

P

DY

12 C8

720

SC1U

6D3V

2KX-

GP

DY C872

0SC

1U6D

3V2K

X-G

P

DY

12

C8732

SC10

U6D3

V3M

X-G

PDYC8732

SC10

U6D3

V3M

X-G

PDY

1 2L8703

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8703

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12 C8

725

SCD1

U10V

2KX-

5GP

DY C872

5SC

D1U1

0V2K

X-5G

P

DYPCIE_VSSAA27

PCIE_VSSAF32PCIE_VSSAG27PCIE_VSSAH32PCIE_VSSK28PCIE_VSSK32PCIE_VSSL27PCIE_VSSM32PCIE_VSSN25PCIE_VSSN27PCIE_VSSP25

PCIE_VSSAB24

PCIE_VSSP32PCIE_VSSR27PCIE_VSST25PCIE_VSST32PCIE_VSSU25PCIE_VSSU27PCIE_VSSV32PCIE_VSSW25PCIE_VSSW26PCIE_VSSW27

PCIE_VSSAB32

PCIE_VSSY25PCIE_VSSY32

PCIE_VSSAC24PCIE_VSSAC26PCIE_VSSAC27PCIE_VSSAD25PCIE_VSSAD32PCIE_VSSAE27

VSS_MECH A32VSS_MECH AM1VSS_MECH AM32

GND A3

GND AD8GND AE7GND AG12GND AH10GND AH28GND B10GND B12GND B14GND B16GND B18

GND A30

GND B20GND B22GND B24GND B26GND B6GND B8GND C1GND C32GND E28GND F10

GND/EVDDQ AA13

GND F12GND F14GND F16GND F18GND F2GND F20GND F22GND F24GND F26GND F6

GND AA16

GND F8GND G10GND G27GND G31GND G8GND H14GND H17GND H2GND H20GND H6

GND AB10

GND J27GND J31GND K11GND K2GND K22GND K6

GNDM6GNDN11GNDN12GNDN13

GND/EVDDQ AB15

GNDN16GNDN18GNDN21GNDP6GNDP9GNDR12GNDR15GNDR17GNDR20GNDT13

GND AB6

GNDT16GNDT18GNDT21GNDT6GNDU15GNDU17GNDU20GNDU9GNDV13

GND AC9

GNDV16GNDV18GNDY10GNDY15GNDY17GNDY20

GND AD6

GND T11GND R11

GND

5 OF 7

ROBSON-GP-U

VGA1E

SG

GND

5 OF 7

ROBSON-GP-U

VGA1E

SG

12 C8

712

SC1U

6D3V

2KX-

GP

DY C871

2SC

1U6D

3V2K

X-G

P

DY


12

C8726

SC10

U6D3

V3M

X-G

P DYC8726

SC10

U6D3

V3M

X-G

P DY

1 2L8704

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8704

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12

C8734

SC10

U6D3

V3M

X-G

PDYC8734

SC10

U6D3

V3M

X-G

PDY

1 2

R8701150R2F-1-GP

SGR8701

150R2F-1-GP

SG

DPA_PVDD AG8DPA_PVSS AG7

DPA_VDD10 AF6DPA_VDD10 AF7

DPA_VDD18 AE11DPA_VDD18 AF11

DPA_VSSR AE1DPA_VSSR AE3DPA_VSSR AG1DPA_VSSR AG6DPA_VSSR AH5

DPAB_CALR AE10

DPB_PVDD AG10DPB_PVSS AG11

DPB_VDD10 AF8DPB_VDD10 AF9

DPB_VSSR AF10DPB_VSSR AG9DPB_VSSR AH8DPB_VSSR AM6DPB_VSSR AM8

DPB_VDD18 AE13DPB_VDD18 AF13

DPE_PVDDAG18DPE_PVSSAF19

DPE_VDD10AG20DPE_VDD10AG21

DPE_VDD18AG15DPE_VDD18AG16

DPE_VSSRAG14DPE_VSSRAH14DPE_VSSRAM14DPE_VSSRAM16DPE_VSSRAM18

DPEF_CALRAF17

DPF_PVDDAG19DPF_PVSSAF20

DPF_VDD10AF22DPF_VDD10AG22

DPF_VDD18AF16DPF_VDD18AG17

DPF_VSSRAF23DPF_VSSRAG23DPF_VSSRAM20DPF_VSSRAM22DPF_VSSRAM24

DP PLL POWER

DP A/B POWERDP E/F POWER

7 OF 7

ROBSON-GP-U

VGA1G

SG

DP PLL POWER

DP A/B POWERDP E/F POWER

7 OF 7

ROBSON-GP-U

VGA1G

SG1

2

C8731

SC10

U6D3

V3M

X-G

P DYC8731

SC10

U6D3

V3M

X-G

P DY

12 C8

714

SCD1

U10V

2KX-

5GP

DY C871

4SC

D1U1

0V2K

X-5G

P

DY

1 2L8702

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SGL8702

BLM15BD121SS1D-GP

2ND = 68.00217.70168.00084.F81

SG

12 C8

702

SCD1

U10V

2KX-

5GP

DY C870

2SC

D1U1

0V2K

X-5G

P

DY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAA0_7MAA0_1MAA0_0MAA0_6MAA0_8

MAA0_2MAA0_5MAA0_4MAA0_3

VRAM1_ZQ

DQA0_0

DQA0_5

DQA0_17

VREFC_A0

VREFD1_A0VREFD2_A0

VREFC_A1

VREFD1_A1VREFD2_A1

MAA0_8

MAA0_0

MAA0_1

MAA0_3MAA0_2MAA0_5

MAA0_4

MAA0_6MAA0_7

DQA0_1DQA0_2DQA0_6

DQA0_16

DQA0_20

DQA0_18

DQA0_19DQA0_21

DQA0_22

DQA0_23

DQA0_7

DQA0_3

DQA0_4

VRAM1_ZQ

VRAM2_ZQ

VRAM2_ZQ

VREFC_A0 VREFD1_A0 VREFD2_A0

VREFD1_A1VREFC_A1 VREFD2_A1

DQA0_13

DQA0_15


DQA0_14

DQA0_10

DQA0_12

DQA0_28

DQA0_11

DQA0_27

DQA0_24

DQA0_29

DQA0_25

DQA0_8DQA0_9

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0


1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

MAA0_[8..0][84]

ADBIA0[84]RASA0#[84]CSA0#_0[84]CASA0#[84]WEA0#[84]

CLKA0#[84]CKEA0[84]

CLKA0[84]

DDBIA0_1[84]

DDBIA0_0[84]

DDBIA0_2[84] DDBIA0_3[84]

MEM_RST[84,89]

DQA0_[31..0] [84]

EDCA0_0 [84]

EDCA0_2 [84]WCKA0_1[84]

MEM_RST[84,89]

WCKA0_1#[84]

WCKA0_0[84]WCKA0_0#[84]

MAA0_[8..0][84] DQA0_[31..0] [84]

ADBIA0[84]

RASA0#[84]CSA0#_0[84]

CASA0#[84]WEA0#[84]

CLKA0#[84]CLKA0[84]

CKEA0[84]

WCKA0_0[84]WCKA0_0#[84]

WCKA0_1[84]WCKA0_1#[84]

EDCA0_1 [84]

EDCA0_3 [84]

Title


Date: Sheet of


BMW Z4 DIS A00GPU-VRAM1,2 (1/4)

A2

88 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A2

88 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A2

88 105Friday, March 30, 2012

DMB40

Use internal Vref memory voltage

MF=1Mirror

SSID = VIDEO

12

C8867SC1U6D3V2KX-GPSG C8867SC1U6D3V2KX-GPSG

12


12

C884

0SC

1U6D

3V2K

X-GP

SG

C884

0SC

1U6D

3V2K

X-GP

SG

12

R88345K49R2F-GP SGR88345K49R2F-GP SG

12

C883

9SC

1U6D

3V2K

X-GP

SG

C883

9SC

1U6D

3V2K

X-GP

SG

1 2R8812 120R2F-GPSGR8812 120R2F-GPSG

12


12


VREFDA10VREFCJ14

VREFDU10

VDDC5VDDC10VDDD11VDDG1VDDG4VDDG11VDDG14VDDL1VDDL4VDDL11VDDL14VDDP11VDDR5VDDR10

VDDQB1VDDQB3VDDQB12VDDQB14VDDQD1VDDQD3VDDQD12VDDQD14VDDQE5VDDQE10VDDQF1VDDQF3VDDQF12VDDQF14VDDQG2VDDQG13VDDQH3VDDQH12VDDQK3VDDQK12VDDQL2VDDQL13VDDQM1VDDQM3VDDQM12VDDQM14VDDQN5VDDQN10VDDQP1VDDQP3VDDQP12VDDQP14VDDQT1VDDQT3VDDQT12VDDQT14

VSS T10VSS T5VSS P10VSS L10VSS L5VSS K14VSS K1VSS H14VSS H1VSS G10VSS G5VSS D10VSS B10VSS B5

VSSQ U14VSSQ U12VSSQ U3VSSQ U1VSSQ R14VSSQ R12VSSQ R11VSSQ R4VSSQ R3VSSQ R1VSSQ N14VSSQ N12VSSQ N3VSSQ N1VSSQ M10VSSQ M5VSSQ K13VSSQ K2VSSQ H13VSSQ H2VSSQ F10VSSQ F5VSSQ E14VSSQ E12VSSQ E3VSSQ E1VSSQ C14VSSQ C12VSSQ C11VSSQ C4VSSQ C3VSSQ C1VSSQ A14VSSQ A12VSSQ A3VSSQ A1

VPP/NC#A5 A5VPP/NC#U5 U5

1 OF 2VRAM2A

H5GQ1H24AFR-T2L-GP

SG

1 OF 2VRAM2A

H5GQ1H24AFR-T2L-GP

SG

1 2R8811 120R2F-GPSGR8811 120R2F-GPSG

VREFDA10VREFCJ14

VREFDU10






1 OF 2VRAM1A

H5GQ1H24AFR-T2L-GP

SG

1 OF 2VRAM1A

H5GQ1H24AFR-T2L-GP

SG

12


12

C884

2SC

1U6D

3V2K

X-GP

SG

C884

2SC

1U6D

3V2K

X-GP

SG

DQ0 A4DQ1 A2

DQ10 B11DQ11 B13DQ12 E11DQ13 E13DQ14 F11DQ15 F13DQ16 U11DQ17 U13DQ18 T11DQ19 T13

DQ2 B4

DQ20 N11DQ21 N13DQ22 M11DQ23 M13DQ24 U4DQ25 U2DQ26 T4DQ27 T2DQ28 N4DQ29 N2

DQ3 B2

DQ30 M4DQ31 M2

DQ4 E4DQ5 E2DQ6 F4DQ7 F2DQ8 A11DQ9 A13

EDC0 C2EDC1 C13EDC2 R13EDC3 R2

A12/RFU#J5/NC#J5J5

ZQJ13

DBI0#D2DBI1#D13

DBI3#P2 DBI2#P13

WCK1D4WCK1#D5

WE#L12

WCK23P4WCK23#P5

BA3/A3H10

BA0/A2H11BA1/A5K10BA2/A4K11

CKE#J3 CK#J11 CKJ12

RAS#G3CS#G12

A10/A0H4 A9/A1H5

MFJ1

RESET#J2

ABI#J4

SENJ10

A8/A7K4

A11/A6K5

CAS#L3

2 OF 2VRAM2B

H5GQ1H24AFR-T2L-GP

SG

2 OF 2VRAM2B

H5GQ1H24AFR-T2L-GP

SG

12

R88372K37R2F-GP SG

R88372K37R2F-GP SG

12

C884

3SC

1U6D

3V2K

X-GP

SG

C884

3SC

1U6D

3V2K

X-GP

SG

12

R88242K37R2F-GP SG

R88242K37R2F-GP SG

12


12

C880

1SC

10U6

D3V5

KX-1

GP

SG C880

1SC

10U6

D3V5

KX-1

GP

SG

12

R88352K37R2F-GP SG

R88352K37R2F-GP SG

12

R8809120R2F-GP SG

R8809120R2F-GP SG

12


12


12

C884

4SC

1U6D

3V2K

X-GP

SG

C884

4SC

1U6D

3V2K

X-GP

SG

12


12

C884

5SC

1U6D

3V2K

X-GP

SG

C884

5SC

1U6D

3V2K

X-GP

SG

12

R88292K37R2F-GP SG

R88292K37R2F-GP SG

12


12

R88232K37R2F-GP SG

R88232K37R2F-GP SG

12


12

R8810120R2F-GPSGR8810120R2F-GPSG

12


DQ0 A4DQ1 A2


DQ2 B4


DQ3 B2

DQ30 M4DQ31 M2



A12/RFU#J5/NC#J5J5

ZQJ13

DBI0#D2DBI1#D13

DBI3#P2 DBI2#P13

WCK1D4WCK1#D5

WE#L12

WCK23P4WCK23#P5

BA3/A3H10


CKE#J3 CK#J11 CKJ12

RAS#G3CS#G12

A10/A0H4 A9/A1H5

MFJ1

RESET#J2

ABI#J4

SENJ10

A8/A7K4

A11/A6K5

CAS#L3

2 OF 2VRAM1B

H5GQ1H24AFR-T2L-GP

Samsung = 72.20325.B0UHynix = 72.05224.00U

SG

Hynix RTS = 72.05224.A0U

2 OF 2VRAM1B

H5GQ1H24AFR-T2L-GP

Samsung = 72.20325.B0UHynix = 72.05224.00U

SG

Hynix RTS = 72.05224.A0U

12


12


12

C884

1SC

1U6D

3V2K

X-GP

SG

C884

1SC

1U6D

3V2K

X-GP

SG

12


12


12


12

R88332K37R2F-GP SG

R88332K37R2F-GP SG

12

C883

8SC

1U6D

3V2K

X-GP

SG

C883

8SC

1U6D

3V2K

X-GP

SG

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAA1_5

DQA1_0

DQA1_7

VREFD1_A3

MAA1_8

VREFC_A3 VREFD2_A3

VREFC_A2

MAA1_4

VREFD1_A2

MAA1_3 DQA1_5

DQA1_18

MAA1_7

MAA1_4

DQA1_3

VRAM4_ZQ

MAA1_6

DQA1_22

DQA1_1

DQA1_23

VRAM3_ZQ

MAA1_2

DQA1_17

VRAM4_ZQ

MAA1_1

MAA1_0

VREFD1_A2

MAA1_3

DQA1_4

DQA1_21

MAA1_2

MAA1_7

VREFC_A2

MAA1_6DQA1_6

MAA1_5

DQA1_20

VREFC_A3

VREFD1_A3VREFD2_A3

DQA1_19

VRAM3_ZQ

DQA1_16

MAA1_1DQA1_2

MAA1_0 MAA1_8

VREFD2_A2

VREFD2_A2

DQA1_8

DQA1_24

DQA1_9

DQA1_14

DQA1_10

DQA1_15

DQA1_13

DQA1_25

DQA1_30

DQA1_26DQA1_27

DQA1_11

DQA1_12

DQA1_31DQA1_28

DQA1_29


1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0 1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

MAA1_[8..0][84]

MEM_RST[84,88]

DQA1_[31..0] [84]

WEA1#[84]

WCKA1_1[84]

MEM_RST[84,88]

DDBIA1_3[84]

CSA1#_0[84]

WCKA1#_1[84]

CLKA1#[84]CKEA1[84]

CLKA1[84]

DDBIA1_2[84]

DDBIA1_0[84]

CASA1#[84]ADBIA1[84]

RASA1#[84]

WCKA1_0[84]WCKA1#_0[84]

DDBIA1_1[84]

MAA1_[8..0][84] DQA1_[31..0] [84]

EDCA1_0 [84]

EDCA1_2 [84]EDCA1_3 [84]

EDCA1_1 [84]

WCKA1_1[84]WCKA1#_1[84]

WCKA1_0[84]WCKA1#_0[84]

CASA1#[84]

RASA1#[84]ADBIA1[84]

CKEA1[84]CLKA1#[84]CLKA1[84]

WEA1#[84]

CSA1#_0[84]

Title


Date: Sheet of


BMW Z4 DIS A00

GPU-VRAM3,4 (2/4)A2

89 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

GPU-VRAM3,4 (2/4)A2

89 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

GPU-VRAM3,4 (2/4)A2

89 105Friday, March 30, 2012

DMB40

Use internal Vref memory voltage

MF=1Mirror

SSID = VIDEO

12


12


12

C899

0SC

1U6D

3V2K

X-GP

SG

C899

0SC

1U6D

3V2K

X-GP

SG

12

R89412K37R2F-GP SG

R89412K37R2F-GP SG

12


12

C898

5SC

1U6D

3V2K

X-GP

SG

C898

5SC

1U6D

3V2K

X-GP

SG

12


DQ0 A4DQ1 A2


DQ2 B4


DQ3 B2

DQ30 M4DQ31 M2



A12/RFU#J5/NC#J5J5

ZQJ13

DBI0#D2DBI1#D13

DBI3#P2 DBI2#P13

WCK1D4WCK1#D5

WE#L12

WCK23P4WCK23#P5

BA3/A3H10


CKE#J3 CK#J11 CKJ12

RAS#G3CS#G12

A10/A0H4 A9/A1H5

MFJ1

RESET#J2

ABI#J4

SENJ10

A8/A7K4

A11/A6K5

CAS#L3

2 OF 2VRAM3B

H5GQ1H24AFR-T2L-GP

Samsung = 72.20325.00UHynix = 72.05224.00U

SG

2 OF 2VRAM3B

H5GQ1H24AFR-T2L-GP

Samsung = 72.20325.00UHynix = 72.05224.00U

SG

12


1 2R8914 120R2F-GPSGR8914 120R2F-GPSG

12

C890

1SC

1U6D

3V2K

X-GP

SG

C890

1SC

1U6D

3V2K

X-GP

SG

12

C890

7SC

1U6D

3V2K

X-GP

SG

C890

7SC

1U6D

3V2K

X-GP

SG

12


12

R89392K37R2F-GP SG

R89392K37R2F-GP SG

12

R89542K37R2F-GP SG

R89542K37R2F-GP SG

12

C880

4SC

10U6

D3V5

KX-1

GP

SG C880

4SC

10U6

D3V5

KX-1

GP

SG

12


12


12


12

R89462K37R2F-GP SG

R89462K37R2F-GP SG

12


12


12


12

C898

0SC

1U6D

3V2K

X-GP

SG

C898

0SC

1U6D

3V2K

X-GP

SG

12


12


12


12

C891

2SC

1U6D

3V2K

X-GP

SG

C891

2SC

1U6D

3V2K

X-GP

SG

1 2R8915 120R2F-GPSGR8915 120R2F-GPSG

12

C899

7SC

1U6D

3V2K

X-GP

SG

C899

7SC

1U6D

3V2K

X-GP

SG

DQ0 A4DQ1 A2


DQ2 B4


DQ3 B2

DQ30 M4DQ31 M2



A12/RFU#J5/NC#J5J5

ZQJ13

DBI0#D2DBI1#D13

DBI3#P2 DBI2#P13

WCK1D4WCK1#D5

WE#L12

WCK23P4WCK23#P5

BA3/A3H10


CKE#J3 CK#J11 CKJ12

RAS#G3CS#G12

A10/A0H4 A9/A1H5

MFJ1

RESET#J2

ABI#J4

SENJ10

A8/A7K4

A11/A6K5

CAS#L3

2 OF 2VRAM4B

H5GQ1H24AFR-T2L-GP

SG

2 OF 2VRAM4B

H5GQ1H24AFR-T2L-GP

SG

12

R8918120R2F-GP SG

R8918120R2F-GP SG

12

R8917120R2F-GPSGR8917120R2F-GPSG

12

R89522K37R2F-GP SG

R89522K37R2F-GP SG

VREFDA10VREFCJ14

VREFDU10






1 OF 2VRAM3A

H5GQ1H24AFR-T2L-GP

SG

1 OF 2VRAM3A

H5GQ1H24AFR-T2L-GP

SG

12


12

R89432K37R2F-GP SG

R89432K37R2F-GP SG

12


12

C888

3SC

1U6D

3V2K

X-GP

SG

C888

3SC

1U6D

3V2K

X-GP

SG

VREFDA10VREFCJ14

VREFDU10






1 OF 2VRAM4A

H5GQ1H24AFR-T2L-GP

SG

1 OF 2VRAM4A

H5GQ1H24AFR-T2L-GP

SG

12


www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

90 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

90 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

90 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

91 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

91 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

91 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWRCNTL_1#

PU9206_Y

PWR_VGA_AVDD

PQ9202_10

PQ9202_4

8209A_EN/DEM_VGA

PWR_VGA_VX

PQ9203_D

PWR_VGA_IRIPL

PWR_VGA_R_SEL/ILOADPWR_VGA_BIAS

PWR_VGA_CORE_PGOOD

PWRCNTL_1_1

PQ9202_11PQ9202_13

PU9202_6

PU9202_1

PWR_VGA_CORE_PGOOD

PWR_VGA_VSENSE-

PWR_VGA_CORE_EN_R#

PWR_VGA_VSENSE+PWR_VGA_VDES

PWRCNTL_0#

8209A_EN/DEM_VGA PQ9206_3

PWRCNTL_0_0

PWRCNTL_1_1

PWRCNTL_0_0

PWRCNTL_1_R PWRCNTL_0_R

PWRCNTL_0#

PWRCNTL_1#

PWRCNTL_0_D

PWRCNTL_0_0 PWRCNTL_0_R

PWRCNTL_1_D

PWRCNTL_1_1 PWRCNTL_1_R

AGND_VGA

VGA_CORE

5V_S5

5V_S5

AGND_VGA

AGND_VGA

5V_S5 VGA_CORE

5V_S5

VGA_CORE

3D3V_AUX_S5

VGA_CORE

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

DGPU_PWR_EN[93]

DGPU_PWROK [22,27,86,93]

8209A_EN/DEM_VGA [86,93]

PWRCNTL_1[85]PWRCNTL_0 [85]

Title


Date: Sheet of


BMW Z4 DIS A00

VT357_+VGA_COREA2

92 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT357_+VGA_COREA2

92 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

VT357_+VGA_COREA2

92 105Friday, March 30, 2012

<Core Design>

SSID = PWR.Plane.Regulator_vga_core

1 1V

0 0.9V

VID0 GPIO15 Voltage

X01 11/28

X01 11/28

Layout Note: Close VGA output

X02 2/10

X03 2/16

X03 2/16

X03 2/16

X03 2/16

X03 2/16

12

PC92

07SC

22U6

D3V5

MX-

2GP

SG

PC92

07SC

22U6

D3V5

MX-

2GP

SG

1 2

PL9201

COIL-D2UH-1-GP

SG

2nd = 68.R2010.10P68.R2010.20A

PL9201

COIL-D2UH-1-GP

SG

2nd = 68.R2010.10P68.R2010.20A

2 1PD9201

CH551H-30PT-GPDY

PD9201

CH551H-30PT-GPDY

2

31

147

PU9208A

TSLVC02APW-GP

SG

PU9208A

TSLVC02APW-GP

SG

1

2

34

5

6PQ9205

2N7002KDW-GP84.2N702.A3F


SG

PQ9205

2N7002KDW-GP84.2N702.A3F


SG

1 2PG9201

GAP-CLOSE-PWR-3-GP

PG9201

GAP-CLOSE-PWR-3-GP

5

64

147

PU9208B

TSLVC02APW-GP

SG

PU9208B

TSLVC02APW-GP

SG 12

PC92

17SC

D1U1

0V2K

X-5G

P

SG

PC92

17SC

D1U1

0V2K

X-5G

P

SG

12

PC92

02SC

D1U1

0V2K

X-5G

P

SG

PC92

02SC

D1U1

0V2K

X-5G

P

SG

12

PR92

2333

0KR2

J-L1

-GP

SGPR92

2333

0KR2

J-L1

-GP

SG

A2B1

GND3 Y 4

VCC 5PU9206

74LVC1G32GW-1GP73.01G32.AHH

SG

PU9206

74LVC1G32GW-1GP73.01G32.AHH

SG

12

PR920110R2J-2-GPSG PR920110R2J-2-GPSG

12

PC9220SCD01U50V2KX-1GPSG PC9220SCD01U50V2KX-1GPSG

12

PR92

0210

0KR2

J-1-

GP

DY

PR92

0210

0KR2

J-1-

GP

DY

12

PC92

12SC

D1U1

0V2K

X-5G

P

SG

PC92

12SC

D1U1

0V2K

X-5G

P

SG

12PC

9259

SC22

U6D3

V5M

X-2G

P

SGPC92

59SC

22U6

D3V5

MX-

2GP

SG

1 2PG9203

GAP-CLOSE-PWR-3-GP

PG9203

GAP-CLOSE-PWR-3-GP

12 PC

9223

SCD0

47U1

0V2K

X-2G

P

SG

PC92

23SC

D047

U10V

2KX-

2GP

SG

1 2

PR9222

52K3R2F-L-GPSG

PR9222

52K3R2F-L-GPSG

12

PR92173D3R5J-GPSGPR92173D3R5J-GPSG

1 2PR9210

10K7R2F-GPSG

PR9210

10K7R2F-GPSG

1 2

PR92150R0402-PAD-2-GP

PR92150R0402-PAD-2-GP

8

910

147

PU9208C

TSLVC02APW-GP

SG

PU9208C

TSLVC02APW-GP

SGG

DS

PQ9203AO3404A-GP84.03404.B31SG2nd = 84.03404.C31

PQ9203AO3404A-GP84.03404.B31SG2nd = 84.03404.C31

12

EC92

03SC

D1U1

0V2K

X-5G

P DY

EC92

03SC

D1U1

0V2K

X-5G

P DY

K APD9202

B0530WS-7-F-GPDY

PD9202

B0530WS-7-F-GPDY

12

PC92

06SC

22U6

D3V5

MX-

2GP

SG

PC92

06SC

22U6

D3V5

MX-

2GP

SG

12

PR920636K5R2F-GPSG PR920636K5R2F-GPSG

12

PC92

10SC

22U6

D3V5

MX-

2GP DY

PC92

10SC

22U6

D3V5

MX-

2GP DY

12PC

9204

SC22

U6D3

V5M

X-2G

P

SG

PC92

04SC

22U6

D3V5

MX-

2GP

SG

12PC

9261

SC22

U6D3

V5M

X-2G

P

DY

PC92

61SC

22U6

D3V5

MX-

2GP

DY

12

PR92163D3R5J-GPSGPR92163D3R5J-GPSG

12

PC92

08SC

22U6

D3V5

MX-

2GP

SG

PC92

08SC

22U6

D3V5

MX-

2GP

SG

12PC

9260

SC22

U6D3

V5M

X-2G

P

SG

PC92

60SC

22U6

D3V5

MX-

2GP

SG

12


K A

PD9203B0530WS-7-F-GP

SG

83.R5003.G8H2nd = 83.R5003.H8H

PD9203B0530WS-7-F-GP

SG

83.R5003.G8H2nd = 83.R5003.H8H

12


12

PC92

11SC

22U6

D3V5

MX-

2GP

SG

PC92

11SC

22U6

D3V5

MX-

2GP

SG

12

PC92

09SC

22U6

D3V5

MX-

2GP DY

PC92

09SC

22U6

D3V5

MX-

2GP DY

12PC

9218

SC22

U6D3

V5M

X-2G

P

DY

PC92

18SC

22U6

D3V5

MX-

2GP

DY

12

PC9216SCD1U10V2KX-4GPDYPC9216SCD1U10V2KX-4GPDY

12

PR92

1110

0KR2

J-1-

GP

SG

PR92

1110

0KR2

J-1-

GP

SG

12

EC92

01SC

D1U1

0V2K

X-5G

PDY

EC92

01SC

D1U1

0V2K

X-5G

PDY

12

PR9224360KR2F-GP

DY

PR9224360KR2F-GP

DY

12

PC92

13SC

6800

P25V

2KX-

1GP SG

PC92

13SC

6800

P25V

2KX-

1GP SG

1 2PR9203 44K2R2D-GPSGPR9203 44K2R2D-GPSG

12

PR9218100KR2J-1-GPDY PR9218100KR2J-1-GPDY

12 PC

9222

SCD0

47U1

0V2K

X-2G

P

DY

PC92

22SC

D047

U10V

2KX-

2GP

DY

12


SG


SG

12

PR921310KR2F-2-GP SG

PR921310KR2F-2-GP SG

12PC

9262

SC22

U6D3

V5M

X-2G

P

SG

PC92

62SC

22U6

D3V5

MX-

2GP

SG

1 2

PR9219

52K3R2F-L-GPSG

PR9219

52K3R2F-L-GPSG

1 2PR920536KR2F-GP

SGPR920536KR2F-GP

SG

BIASA1R_SEL/ILOADA2VDESA3VSENSE+A4OEA5

AGNDB1

IRIPLB2 AVDD B3TEMPB4 STATB5

GNDC1GNDC2GNDC3

VDD C4VDD C5

VX#D1 D1VX#D2 D2VX#D3 D3VX#D4 D4VX#D5 D5GNDE1

GNDE2GNDE3

VDD E4VDD E5

VX#F1 F1VX#F2 F2VX#F3 F3VX#F4 F4VX#F5 F5

GNDG1GNDG2GNDG3

VDD G4

VDD G5

PU9201

VT358FCX-ADJ-007-GP74.00358.A3Z

SG

PU9201

VT358FCX-ADJ-007-GP74.00358.A3Z

SG

12

PC92

01SC

D01U

16V2

KX-3

GP SG

PC92

01SC

D01U

16V2

KX-3

GP SG

1 2

PR92125K1R2F-2-GP

SGPR92125K1R2F-2-GP

SG

12PC

9203

SC22

U6D3

V5M

X-2G

P

SG

PC92

03SC

22U6

D3V5

MX-

2GP

SG

1 2PR9204 6K49R2F-1-GPSGPR9204 6K49R2F-1-GPSG

1 2PG9202

GAP-CLOSE-PWR-3-GP

PG9202

GAP-CLOSE-PWR-3-GP

1 2

PR92075K1R2F-2-GP

DYPR92075K1R2F-2-GP

DY

12

PC92

15SC

D1U1

0V2K

X-5G

P

SG

PC92

15SC

D1U1

0V2K

X-5G

P

SG

12

EC92

02SC

D1U1

0V2K

X-5G

PDY

EC92

02SC

D1U1

0V2K

X-5G

PDY

1 2PR9221 10KR2J-3-GPSGPR9221 10KR2J-3-GPSG

12


12PC

9264

SC22

U6D3

V5M

X-2G

P

SG

PC92

64SC

22U6

D3V5

MX-

2GP

SG

12

PR920910KR2F-2-GP DY

PR920910KR2F-2-GP DY

1 2 3456

PQ9206DMN66D0LDW-7-GP DYPQ9206DMN66D0LDW-7-GP DY

11

1213

147

PU9208D

TSLVC02APW-GP

73.07402.EHB

SG

PU9208D

TSLVC02APW-GP

73.07402.EHB

SG

1

2

3 4

5

6PQ9204

2N7002KDW-GP84.2N702.A3F


SG

PQ9204

2N7002KDW-GP84.2N702.A3F


SG

12

PC9219SC100P50V2JN-3GP SGPC9219SC100P50V2JN-3GP SG

1 2

PR9208

10K7R2F-GPDY

PR9208

10K7R2F-GPDY

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DIS_

1D5V

_VGA

_S0

1D5V_VGA_EN#

1D5V_VGA_EN

1D5V_VGA_EN#

1D5V_ENABLE

1D8V_VGA_EN# 1D8V_ENABLE_RC

1D8V_ENABLE

1D8V_VGA_EN5930_PGOOD_1V

1D5V

_ENA

BLE_

RC

3.3V_RUN_VGA_1

PWR_1V_PGOODPR9315_2

5930_PGOOD_1V

PWR_1V_EN

PWR_1V_EN#

PWR_1V_EN PQ9311_3

PR9319_1 PR9319_2

1D8V_VGA_EN#

DIS_1D8V_VGA_S0

PR9319_1

DGPU_PWR_EN

PS_S3CNTRL

3D3V_AUX_S5

15V_S5

1D5V_S3 1D5V_VGA_S0

1D5V_VGA_S0

3D3V_AUX_S5

1D8V_S01D8V_VGA_S0

1D8V_VGA_S0

15V_S5

3D3V_S0

3D3V_S0

3D3V_VGA_S0

1V_PWR 1V_VGA_S0

1D5V_S3 1V_VGA_S0_LDOIN

3D3V_VGA_S0

5V_S5

3D3V_AUX_S5

1V_VGA_S0

3D3V_VGA_S0

DGPU_PWR_EN[92]

DGPU_PWROK[22,27,86,92]

DGPU_PWR_EN [92]

8209A_EN/DEM_VGA[86,92]

DGPU_PWR_EN[92]

DGPU_PWR_EN# [22]

DGPU_PWR_EN[92]

DGPU_PWROK[22,27,86,92]

PS_S3CNTRL[36,37]

Title


Date: Sheet of


BMW Z4 DIS A00

DISCRETE VGA POWERA2

93 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


93 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


93 105Friday, March 30, 2012

<Core Design>

Discharge Circuit

G

GD

D

S

S

Discharge Circuit

G

GD

D

S

S

AO4468, SO-8Id=11.6A, Qg=9~12nCRdson=17.4~22m ohm

3D3V_S0 to 3D3V_VGA_S0 Transfer

dGPU mode

IGPU

IGPU with BACO

DGPU_PWR_EN#

L

H

L

1V_VGADesign current =2.2A

APL5930 for 1V_VGA_S0

Vout=0.8V*(R1+R2)/R2

Discharge Circuit

SSID = PWR.Plane.Regulator_3p3v_vga, 1p8v_vga, 1p5v_vga, 1v_vga 1D8V_S0 to 1D8V_VGA_S0 Transfer

1D5V_S3 to 1D5V_VGA_S0 Transfer

AO4468, SO-8Id=11.6A, Qg=9~12nCRdson=17.4~22m ohm

X01 11/28

X01 11/28

X01 11/28

X01 11/28X01 11/28

X01 11/28

X01 11/28

X01 11/28

X01 11/28

X01 12/15

X03 2/13

X02 2/13

X03 2/16

X03 2/16

X03 2/16

X03 2/16

X03 2/21

12


1 2PG9304

GAP-CLOSE-PWR-3-GP

PG9304

GAP-CLOSE-PWR-3-GP12

PC9317

SC22

U6D3

V5M

X-2G

PDY

PC9317

SC22

U6D3

V5M

X-2G

PDY

1 2 PR93010R2J-2-GP

DY PR93010R2J-2-GP

DY

SD

G

G

D

PQ9302DMP2130L-7-GP

2ND = 84.03413.A3184.02130.031

SGGD

PQ9302DMP2130L-7-GP

2ND = 84.03413.A3184.02130.031

SG

G

S

D

PQ9304


SG

PQ9304


SG

12


1

2

3 4

5

6PQ9311

2N7002KDW-GP84.2N702.A3F


SG

PQ9311

2N7002KDW-GP84.2N702.A3F


SG

12

PC9312

SCD0

1U16

V2KX

-3GP

DYPC9312

SCD0

1U16

V2KX

-3GP

DY

12

PR9333

20KR2F-L-GP

SGPR9333

20KR2F-L-GP

SG

GND 1FB 2VOUT#3 3VOUT#4 4VIN#5 5VCNTL6POK7EN8VIN#99

PU9303

APL5930KAI-TRG-GP74.05930.03D

SG

PU9303

APL5930KAI-TRG-GP74.05930.03D

SG

1 2

PR9330

10KR2J-3-GPSG

PR9330

10KR2J-3-GPSG

2 1

PD9302CH551H-30PT-GP

SG83.R5003.C8F2nd = 83.R5003.H8H


SG83.R5003.C8F2nd = 83.R5003.H8H

1 2PR9304 100KR2J-1-GP

SGPR9304 100KR2J-1-GP

SG

12

EC93

01SC

D1U1

0V2K

X-5G

P

DY

EC93

01SC

D1U1

0V2K

X-5G

P

DY

12

PC9327

SC10

U6D3

V3M

X-GP

SGPC9327

SC10

U6D3

V3M

X-GP

SG

12PR9303

470R2J-2-GP

SGPR9303

470R2J-2-GP

SG

1 2PR9332 100KR2J-1-GPSGPR9332 100KR2J-1-GPSG

12


12


12

PR9335100KR2J-1-GPSGPR9335100KR2J-1-GPSG

G

S

D

PQ9307

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.0313rd = 84.07002.I31

4th = 84.2N702.W31

SG

PQ9307

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.0313rd = 84.07002.I31

4th = 84.2N702.W31

SG

1 2 3456

PQ93052N7002KDW-GP84.2N702.A3F


SG

PQ93052N7002KDW-GP84.2N702.A3F


SG

1 2PR9326

0R2J-2-GPDYPR9326

0R2J-2-GPDY

12

PC9326SCD1U25V2KX-GPSG PC9326SCD1U25V2KX-GPSG

1 2PG9303

GAP-CLOSE-PWR-3-GP

PG9303

GAP-CLOSE-PWR-3-GP

2 1


SG83.R5003.C8F2nd = 83.R5003.H8H


SG83.R5003.C8F2nd = 83.R5003.H8H

12 PC9324

SCD1U10V2KX-5GP

SGPC9324SCD1U10V2KX-5GP

SG

12

PR93

15

4K99

R2F-

L-GP

SG

PR93

15

4K99

R2F-

L-GP

SG

1 2PG9301

GAP-CLOSE-PWR-3-GP

PG9301

GAP-CLOSE-PWR-3-GP

1 2

PR9302

100KR2J-1-GP

SGPR9302

100KR2J-1-GP

SG

12

PR93

22

1K27

R2F-

L-GP

SG

PR93

22

1K27

R2F-

L-GP

SG

12


1 2 3456

PQ93012N7002KDW-GP84.2N702.A3F


SG

PQ93012N7002KDW-GP84.2N702.A3F


SG

1 2

PR932720KR2J-L2-GP

SGPR932720KR2J-L2-GP

SG

1 2 3456

PQ93062N7002KDW-GP84.2N702.A3F


SG

PQ93062N7002KDW-GP84.2N702.A3F


SG

1 2PR9319

10KR2J-3-GPSG

PR9319

10KR2J-3-GPSG

12

PC9319SC10U6D3V5KX-1GP SGPC9319SC10U6D3V5KX-1GP SG

12

PC9316

SC22

U6D3

V5M

X-2G

PSG

PC9316

SC22

U6D3

V5M

X-2G

PSG

2 1


SG

83.R5003.C8F2nd = 83.R5003.H8H


SG

83.R5003.C8F2nd = 83.R5003.H8H

12


12345

678 S

SSGD

DDDPU9306

AO4468-GP84.04468.037

2nd = 84.04178.037

SG

3rd = 84.02659.037

SSSGD

DDDPU9306

AO4468-GP84.04468.037

2nd = 84.04178.037

SG

3rd = 84.02659.037

12 PC

9330

SC10

U6D3

V3M

X-GP

SG

PC93

30SC

10U6

D3V3

MX-

GP

SG

12

PC9313

SC1U

6D3V

2KX-

GP SG

PC9313

SC1U

6D3V

2KX-

GP SG

1 2

PR93110R0402-PAD-2-GP

PR93110R0402-PAD-2-GP

12


DY


DY

12345

678 S

SSGD

DDDPU9305

AO4468-GP84.04468.037

2nd = 84.04178.037

SG

3rd = 84.02659.037

SSSGD

DDDPU9305

AO4468-GP84.04468.037

2nd = 84.04178.037

SG

3rd = 84.02659.037

12


1 2

PR93200R0402-PAD-2-GP

PR93200R0402-PAD-2-GP

1 2

PR9334100KR2J-1-GP

SG

PR9334100KR2J-1-GP

SG

1 2

PR9312100KR2J-1-GP

SG

PR9312100KR2J-1-GP

SG

1 2PG9302

GAP-CLOSE-PWR-3-GP

PG9302

GAP-CLOSE-PWR-3-GP

1 2

PR9305

10KR2F-2-GPSG

PR9305

10KR2F-2-GPSG

12

EC93

02SC

D1U1

0V2K

X-5G

P

DY

EC93

02SC

D1U1

0V2K

X-5G

P

DY

12


DY


DY

12

PC9331

SC10U6D3V3MX-GPSG PC9331

SC10U6D3V3MX-GPSG

1 2 3456

PQ93032N7002KDW-GP84.2N702.A3F


SG

PQ93032N7002KDW-GP84.2N702.A3F


SG

12

PC9332

SC10U6D3V3MX-GPSGPC9332

SC10U6D3V3MX-GPSG

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

94 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

94 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

94 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

95 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

95 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

ReservedA3

95 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00Reserved

A3

96 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A3

96 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A3

96 105Friday, March 30, 2012

DMB40

(Blanking)

www.Vinafix.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3D3V_S5 DCBATOUT

DCBATOUT

DCBATOUT

DCBATOUT

DCBATOUT

5V_S0

3D3V_S5

3D3V_S5

3D3V_S5

3D3V_S5

3D3V_S5 3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

1D05V_PCH

3D3V_WWAN_AOAC

5V_S5 VGA_CORE

5V_S5

5V_S5

5V_S5

5V_S5

5V_S5

5V_S5

5V_S5

DCBATOUT

DCBATOUT

DCBATOUT

DCBATOUT

DCBATOUT

3D3V_S5

3D3V_S5

5V_S0

5V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

5V_S5

5V_S5

5V_S5

5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5 5V_S5

1D5V_S3 3D3V_S5 AVDDL DVDDL 1D8V_S0

+DC_IN +DC_IN

3D3V_S0 3D3V_S0

DCBATOUT 3D3V_AUX_S5

3D3V_AUX_S5 5V_S5

5V_S5 5V_S55V_S5 5V_S5

3D3V_S5 3D3V_S5

1D5V_S3

1D5V_S31D5V_S3 1D5V_S3 1D5V_S3

1D5V_S31D5V_S3 1D5V_S3 1D5V_S3

5V_S5 VGA_CORE

Title


Date: Sheet of


BMW Z4 DIS A00

UNUSED PARTS/EMI CapacitorsA2

97 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


97 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00


97 105Friday, March 30, 2012

<Core Design>


On the TOP side

RF EMI

X01 12/09 For EMIX01 12/15 For RF

X01 12/23

SSID = Mechanical

X01 12/30

X03 1/30

X03 2/13 X03 2/16X03 2/16RF EMI X03 2/21A00 3/27 A00 3/29

1

H2HT85BE95R29-U-5-GPH2HT85BE95R29-U-5-GP

12

EC97

77SC

D1U1

0V2K

X-5G

PEC

9777

SCD1

U10V

2KX-

5GP

12 EC

9755

SCD1

U10V

2KX-

5GP

DYEC

9755

SCD1

U10V

2KX-

5GP

DY

12

EC97

84SC

D1U1

0V2K

X-5G

PEC

9784

SCD1

U10V

2KX-

5GP

12 EC

9706

SCD1

U25V

2KX-

GPEC

9706

SCD1

U25V

2KX-

GP

12

EC97

61SC

D1U1

0V2K

X-5G

PDY

EC97

61SC

D1U1

0V2K

X-5G

PDY

12

EC97

27SC

D1U1

0V2K

X-5G

PDY

EC97

27SC

D1U1

0V2K

X-5G

PDY

12 EC

9702

SCD1

U25V

2KX-

GP

DY

EC97

02SC

D1U2

5V2K

X-GP

DY

12

EC97

14SC

D1U1

0V2K

X-5G

PEC

9714

SCD1

U10V

2KX-

5GP

12

EC97

39SC

D1U1

0V2K

X-5G

PEC

9739

SCD1

U10V

2KX-

5GP

12

EC97

63SC

D1U1

0V2K

X-5G

PEC

9763

SCD1

U10V

2KX-

5GP

12 EC

9707

SCD1

U25V

2KX-

GPEC

9707

SCD1

U25V

2KX-

GP

12

EC97

52SC

D1U1

0V2K

X-5G

PDY

EC97

52SC

D1U1

0V2K

X-5G

PDY

12

EC97

64SC

D1U1

0V2K

X-5G

PEC

9764

SCD1

U10V

2KX-

5GP

12 EC

9751

SCD1

U25V

2KX-

GPEC

9751

SCD1

U25V

2KX-

GP

12

EC97

85SC

D1U1

0V2K

X-5G

PEC

9785

SCD1

U10V

2KX-

5GP

12 EC

9704

SCD1

U25V

2KX-

GPEC

9704

SCD1

U25V

2KX-

GP

12

EC97

71SC

D1U1

0V2K

X-5G

P

DY

EC97

71SC

D1U1

0V2K

X-5G

P

DY

12 EC

9749

SCD1

U25V

2KX-

GPEC

9749

SCD1

U25V

2KX-

GP

12

EC97

16SC

D1U1

0V2K

X-5G

PEC

9716

SCD1

U10V

2KX-

5GP

12

EC97

58SC

D1U1

0V2K

X-5G

PDY

EC97

58SC

D1U1

0V2K

X-5G

PDY

12

EC97

75SC

D1U1

0V2K

X-5G

PEC

9775

SCD1

U10V

2KX-

5GP

1 2

EC9733

SCD1U10V2KX-5GP

SGEC9733

SCD1U10V2KX-5GP

SG

12 EC

9709

SCD1

U25V

2KX-

GPEC

9709

SCD1

U25V

2KX-

GP

12

EC97

53SC

D1U1

0V2K

X-5G

P

DY

EC97

53SC

D1U1

0V2K

X-5G

P

DY

12

EC97

41SC

D1U1

0V2K

X-5G

PEC

9741

SCD1

U10V

2KX-

5GP

1

HS3STF237R128H42-3-GP

34.4UV01.0012nd = 34.4UV01.101


34.4UV01.0012nd = 34.4UV01.101

12

EC97

86SC

D1U1

0V2K

X-5G

PEC

9786

SCD1

U10V

2KX-

5GP

12

EC97

34SC

D1U1

0V2K

X-5G

PEC

9734

SCD1

U10V

2KX-

5GP

12

EC97

26SC

D1U1

0V2K

X-5G

PEC

9726

SCD1

U10V

2KX-

5GP

12

EC97

67SC

D1U1

0V2K

X-5G

PEC

9767

SCD1

U10V

2KX-

5GP

12 EC

9747

SCD1

U25V

2KX-

GPEC

9747

SCD1

U25V

2KX-

GP

12

EC97

17SC

D1U1

0V2K

X-5G

PDY

EC97

17SC

D1U1

0V2K

X-5G

PDY

1


34.4UV01.0012nd = 34.4UV01.101


34.4UV01.0012nd = 34.4UV01.101

12

EC97

40SC

D1U1

0V2K

X-5G

PEC

9740

SCD1

U10V

2KX-

5GP

12

EC97

23SC

D1U1

0V2K

X-5G

PDY

EC97

23SC

D1U1

0V2K

X-5G

PDY

12

EC97

90SC

D1U1

0V2K

X-5G

PEC

9790

SCD1

U10V

2KX-

5GP

12

EC97

21SC

D1U1

0V2K

X-5G

PDY

EC97

21SC

D1U1

0V2K

X-5G

PDY

12

EC97

42SC

D1U1

0V2K

X-5G

PEC

9742

SCD1

U10V

2KX-

5GP

1

H7HOLE256R115-GPH7HOLE256R115-GP

12

EC97

72SC

D1U1

0V2K

X-5G

P

DY

EC97

72SC

D1U1

0V2K

X-5G

P

DY

1


12

EC97

81SC

D1U1

0V2K

X-5G

PEC

9781

SCD1

U10V

2KX-

5GP

12

EC97

22SC

D1U1

0V2K

X-5G

PEC

9722

SCD1

U10V

2KX-

5GP

12

EC97

10SC

D1U1

0V2K

X-5G

P

DY

EC97

10SC

D1U1

0V2K

X-5G

P

DY

12

EC97

15SC

D1U1

0V2K

X-5G

PDY

EC97

15SC

D1U1

0V2K

X-5G

PDY

12

EC97

87SC

D1U1

0V2K

X-5G

PEC

9787

SCD1

U10V

2KX-

5GP

12

EC97

43SC

D1U1

0V2K

X-5G

PEC

9743

SCD1

U10V

2KX-

5GP

12 EC

9703

SCD1

U25V

2KX-

GPEC

9703

SCD1

U25V

2KX-

GP

12

EC97

37SC

D1U1

0V2K

X-5G

PDY

EC97

37SC

D1U1

0V2K

X-5G

PDY

1


12

EC97

32SC

D1U1

0V2K

X-5G

PDY

EC97

32SC

D1U1

0V2K

X-5G

PDY

12

EC97

28SC

D1U1

0V2K

X-5G

PEC

9728

SCD1

U10V

2KX-

5GP

12

EC97

69SC

D1U1

0V2K

X-5G

PEC

9769

SCD1

U10V

2KX-

5GP

12

EC97

68SC

D1U1

0V2K

X-5G

PEC

9768

SCD1

U10V

2KX-

5GP

12

EC97

59SC

D1U1

0V2K

X-5G

PDY

EC97

59SC

D1U1

0V2K

X-5G

PDY

12

EC97

36SC

D1U1

0V2K

X-5G

PEC

9736

SCD1

U10V

2KX-

5GP

12

EC97

56SC

D1U1

0V2K

X-5G

PDY

EC97

56SC

D1U1

0V2K

X-5G

PDY

12 EC

9701

SCD1

U25V

2KX-

GPEC

9701

SCD1

U25V

2KX-

GP

12

EC97

73SC

D1U1

0V2K

X-5G

PEC

9773

SCD1

U10V

2KX-

5GP

1


12

EC97

65SC

D1U1

0V2K

X-5G

PEC

9765

SCD1

U10V

2KX-

5GP

1


34.4UV01.0012nd = 34.4UV01.101


34.4UV01.0012nd = 34.4UV01.101

1


34.4UV01.0012nd = 34.4UV01.101SG


34.4UV01.0012nd = 34.4UV01.101SG

12

EC97

88SC

D1U1

0V2K

X-5G

PEC

9788

SCD1

U10V

2KX-

5GP

12

EC97

82SC

D1U1

0V2K

X-5G

PEC

9782

SCD1

U10V

2KX-

5GP

1


12

EC97

89SC

D1U1

0V2K

X-5G

PEC

9789

SCD1

U10V

2KX-

5GP

12

EC97

24SC

D1U1

0V2K

X-5G

PEC

9724

SCD1

U10V

2KX-

5GP

12

EC97

45SC

D1U1

0V2K

X-5G

PDY

EC97

45SC

D1U1

0V2K

X-5G

PDY1

2

EC97

35SC

D1U1

0V2K

X-5G

PDY

EC97

35SC

D1U1

0V2K

X-5G

PDY

1


12 EC

9750

SCD1

U25V

2KX-

GPEC

9750

SCD1

U25V

2KX-

GP

12

EC97

62SC

D1U1

0V2K

X-5G

PDY

EC97

62SC

D1U1

0V2K

X-5G

PDY

12

EC97

25SC

D1U1

0V2K

X-5G

PDY

EC97

25SC

D1U1

0V2K

X-5G

PDY

12

EC97

05SC

4D7P

50V2

BN-G

PEC

9705

SC4D

7P50

V2BN

-GP

1

HS5STF237R148H67-GP

MSATA_WWAN

HS5STF237R148H67-GP

MSATA_WWAN

12 EC

9748

SCD1

U25V

2KX-

GPEC

9748

SCD1

U25V

2KX-

GP

12

EC97

19SC

D1U1

0V2K

X-5G

PEC

9719

SCD1

U10V

2KX-

5GP

12

EC97

74SC

D1U1

0V2K

X-5G

PEC

9774

SCD1

U10V

2KX-

5GP

12

EC97

18SC

D1U1

0V2K

X-5G

PEC

9718

SCD1

U10V

2KX-

5GP

12

EC97

38SC

D1U1

0V2K

X-5G

PEC

9738

SCD1

U10V

2KX-

5GP

12 EC

9708

SCD1

U25V

2KX-

GPEC

9708

SCD1

U25V

2KX-

GP

12

EC97

66SC

D1U1

0V2K

X-5G

PEC

9766

SCD1

U10V

2KX-

5GP

12

EC97

83SC

D1U1

0V2K

X-5G

PEC

9783

SCD1

U10V

2KX-

5GP

12

EC97

54SC

D1U1

0V2K

X-5G

PDY

EC97

54SC

D1U1

0V2K

X-5G

PDY

1

HS6STF237R148H67-GPHS6STF237R148H67-GP

12

EC97

60SC

D1U1

0V2K

X-5G

PDY

EC97

60SC

D1U1

0V2K

X-5G

PDY

12

EC97

31SC

D1U1

0V2K

X-5G

PDY

EC97

31SC

D1U1

0V2K

X-5G

PDY

12

EC97

20SC

D1U1

0V2K

X-5G

PDY

EC97

20SC

D1U1

0V2K

X-5G

PDY

12

EC97

46SC

D1U1

0V2K

X-5G

PDY

EC97

46SC

D1U1

0V2K

X-5G

PDY

12

EC97

30SC

D1U1

0V2K

X-5G

PEC

9730

SCD1

U10V

2KX-

5GP

12

EC97

44SC

D1U1

0V2K

X-5G

PEC

9744

SCD1

U10V

2KX-

5GP1

2

EC97

70SC

D1U1

0V2K

X-5G

PEC

9770

SCD1

U10V

2KX-

5GP

12

EC97

76SC

D1U1

0V2K

X-5G

PEC

9776

SCD1

U10V

2KX-

5GP

12

EC97

57SC

D1U1

0V2K

X-5G

PDY

EC97

57SC

D1U1

0V2K

X-5G

PDY

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

Power SequenceA1

98 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Power SequenceA1

98 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00

Power SequenceA1

98 105Friday, March 30, 2012

DMB40

V5REF_Sus must be powered up beforeVccSus3_3, or after VccSus3_3 within0.7 V. Also, V5REF_Sus must powerdown after VccSus3_3, or beforeVccSus3_3 within 0.7 V.

>9ms

Sense the power button status

>5ms

PCH to KBC GPIO00PCH_SUSCLK_KBC

KBC GPIO43 to PCHPM_RSMRST#(EC Delay 40ms) t05

t08a

t07

<90msKBC GPO84 to PCH

>5ms

>10ms

AC_PRESENTNot floating. 0ms<

3D3V_AUX_KBCPlatform to KBC PSL_IN2

AC KBC_PWRBTN#

PM_PWRBTN#

This signal has an internalpull-up resistor and has aninternal 16 ms de-bounce on theinput.

Sense the power button status

KBC GPIO20 to PCH

Press Power button

AC

Enable by PM_SLP_S4#

KBC GPIO23 to LAN>30us

3D3V_AUX_KBC

PM_SLP_S4#

PM_SLP_S3#

PM_LAN_ENABLE

t10

DCBATOUT

PM_PWRBTN#AC

PCH to KBC GPIO01

PCH to KBC GPIO44

S5_ENABLE

KBC GPIO43 to PCH

1D8V_S0

3D3V_S0

1D5V_S0

5V_S0

DDR_VREF_S3(0.75V)

1D5V_S3

+5V_RUN & +3.3V_RUN need meet 0.7V difference

+5VS_PCH_VCC5REF

(AC mode) (DC mode)

V5REF must be powered up beforeVcc3_3, or after Vcc3_3 within 0.7 V.Also, V5REF must power down afterVcc3_3, or before Vcc3_3 within 0.7 V.

VCCSA_S0TPS51461RGER PGOOD

VCCSA_PWRGD

CPU SVID BUS

0D85V_S0

VCC_CORE

VCC_GFXCORE

50us< <2000ust36

IMVP_PWRGD

t37ISL95831 PGOOD to system<5ms

DMI<200us

PCH to all systemt39

PLT_RST#

PCH to CPU

<100mst25

H_CPUPWRGD

t18

1ms<

KBC GPIO77 to PCHPWROK

>0us

PCH to CPU

t131D8V_S0

<650ms5ms<

EC_ENABLE#_1(GPIO31) keep low

This signal represents the PowerGood for all the non-CORE andnon-graphics power rails.

ALL_SYS_PWRGD=VCCSA_PWRGD>99mst14

t17VCCSA_PWRGD

<650ms2ms<

Tb

PCH to KBC GPIO00PCH_SUSCLK_KBC

t05

Huron River Platform Power Sequence

S5_ENABLE

5V_S5

3D3V_S5

3D3V_AUX_S5

KBC GPIO34 control power on by 3V_5V_EN

KBC_PWRBTN#

PM_PWRBTN#

t07

KBC GPIO20 to PCH

TPS51218 PGOOD

DCBATOUT

RTC_RST#

1D05V_PCH/VCCP_CPU

+RTC_VCCt01

RUNPWROK

1D05VTT_PWRGD

+RTC_VCC

RTC_RST#

0D75V_S0

t01

>10ms

+5V_ALW & +3.3V_ALW need meet 0.7V difference

>9ms

Ta

+5VA_PCH_VCC5REFSUS

CLK_EXP_P

+5V_ALW & +3.3V_ALW need meet 0.7V difference

Ta

Within logic high level and disable ifit is less than the logic low level.

+5VA_PCH_VCC5REFSUS

V5REF_Sus must be powered up beforeVccSus3_3, or after VccSus3_3 within0.7 V. Also, V5REF_Sus must powerdown after VccSus3_3, or beforeVccSus3_3 within 0.7 V.

t19

PM_RSMRST#

Press Power button

3D3V_AUX_S5

Platform to KBC PSL_IN2

red word: KBC GPIO

KBC GPIO34 control power on by 3V_5V_EN

PCH_RSMRST#DC

SetVID ACK

VDDPWRGOOD

red word: KBC GPIO

SYS_PWROK

>1ms>2mst20

>1ms+60ust21+t22

Enable by PM_SLP_S4#

PM_SLP_S4#

PM_SLP_S3#KBC GPIO23 to LAN

>30us

PM_LAN_ENABLE

t10

PCH to KBC GPIO44

PCH to KBC GPIO01

DDR_VREF_S3(0.75V)

1D8V_S0

3D3V_S0

1D5V_S0

5V_S0

+5V_RUN & +3.3V_RUN need meet 0.7V difference

1D5V_S3

+5VS_PCH_VCC5REF

V5REF must be powered up beforeVcc3_3, or after Vcc3_3 within 0.7 V.Also, V5REF must power down afterVcc3_3, or before Vcc3_3 within 0.7 V.

VCCSA_S0TPS51461RGER PGOOD

VCCSA_PWRGD

Tb

CPU SVID BUS

0D85V_S0

Ta

VCC_CORE

50us< <2000ust36

VCC_GFXCORE

ISL95831 PGOOD to systemIMVP_PWRGD

<5mst37

DMI<200us

PCH to all systemt39

PLT_RST#t25

H_CPUPWRGD

>0ust18

1ms<

PCH to CPU

<100ms

KBC GPIO77 to PCHPWROK

t131D8V_S0

PCH to CPU

t14

<650ms5ms<

VCCSA_PWRGD

This signal represents the PowerGood for all the non-CORE andnon-graphics power rails.

ALL_SYS_PWRGD=VCCSA_PWRGD>99ms

<650ms2ms< t17

Tb

1D05V_PCH/VCCP_CPU

1D8V_S0 & 1D5V_S3 power ready

TPS51218 PGOOD

RUNPWROK

1D05VTT_PWRGD

0D75V_S0

CLK_EXP_P

t19

ACKSetVID

VDDPWRGOOD

SYS_PWROK

>1ms>2mst20

>1ms+60ust21+t22

1D8V_S0 & 1D5V_S3 power ready

3D3V_S5

5V_S5

8209A_EN/DEM_VGA(Discrete only)

Thames PRO Power-Up/Down Sequence

DGPU_PWR_EN#(Discrete only)

3D3V_VGA_S0(Discrete only)

PCH GPIO48 output

3D3V_VGA_S0 above VT358 VIH

VGA_CORE(Discrete only)

3D3V_S0

5930_PGOOD_1V(Discrete only)APL5930 PGOOD

1V_VGA_S0(Discrete only)

1D8V_VGA_S0(Discrete only)

Tb

<20msTd

>0ms

For power-down, reversing the ramp-up sequence is recommended.

Tc

Ta >0ms

>0ms1D5V_VGA_S0(Discrete only)

VT358 PGOODDGPU_PWROK(Discrete only)

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

Power Sequence DiagramA2

99 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


99 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


99 105Friday, March 30, 2012

DMB40

OUTPUT

PGOOD1D05V_VTT_PWRGD

1D05_PCH/VCCP_CPU

DRAMPWRGD

PROCPWRGD

7

Panther Point PCH

-6aGPIO70

AC_IN#

Page47

Page46

13

PLT_RST#

Page45

Page48

Page42 & 43 & 44

10

2

SYS_PWROK

14

0D75V_ENVDDPWRGOOD

5c

H_CPUPWRGD_R

3V_5V_EN

VTT_EN

4

8

12

3D3V_AUX_KBC

5a

-3-3a

-3a -3a -3a

BUF_CPU_RST#

3b

PM_SLP_S3#

SWITCHPage40

SVID

SVID 11

RSTIN#

SM_DRAMPWROK

UNCOREPWRGOOD

Ivy Bridge CPU

AND GATEA

BY

5V_S5 1D5V_S3

11

9

IMVP_PWRGD

H_CPUPWRGD

SWITCH

Adapter in

PWR_CHG_ACOK

AD+

DCBATOUT

+RTC_VCC

Page40

VIN

ENC

Page41

DC/DC

RTC battery

-8

APWROK

SYS_PWROK

PWROK

VT386VOUT

PWRBTN#

RSMRST#

VR_ON

SVID

3D3V_AUX_S5

3

RTC_AUX_S5

-7

DCBattery

Page39

BT+

PLTRST#

PM_RSMRST#

PM_PWRBTN#

-6

-4

ACOK

5V_AUX_S5

3D3V_S0

SWITCHPage36

5V_S0

0D75V_S0VTT

VCC_CORE

VCC_GFXCORE

PGOOD

4a

1D8V_S0VIN

5

VOUT

RT8068ARUNPWROK

PGD

PM_SLP_S3#

S0_PWR_GOOD

S5_ENABLE

3

KBC_PWRBTN#

PM_SLP_S4#

4

RUNPWROK

5

5b

Wistron CHIEF RIVER POWER UP SEQUENCE DIAGRAM

V5IN VIN

5V_S5 DCBATOUT

APL5916VOUT

VIN

1D05VTT_PWRGDEN

VCCP_CPU

0D85_S0

PGOODD85V_PWRGD

5b

PM_SLP_S3#

PM_SLP_S4#GPIO44

GPIO01

GPIO77

SWITCHPage36

1D5V_S0

VCNTL

5V_S5

Power Up Sequence: -8 ~ 15

PM_DRAM_PWRGD

OUTPUT

VT1318/VT1323/VT1326

VINVDDP

VTTREF

VT385

DDR_VREF_S3

IMVP_VR_ON

SVID

VIN

6

-5-4

6 14SYS_PWROK

S5_ENABLE

15

5V_S5

AC

Page38

ChargerBQ24727

Page40

(3V/5V)

TPS51125RGER3D3V_AUX_S5

3D3V_S5

5V_S5

VREG5

VREG3

PWR_5V3D3V_ENC

Page27

GPIO20

GPIO43

GPIO6

KBC NPCE885

GPIO34

LL1

LL2

-3bPUMP

15V_S5

-3c

PGOOD3V_5V_POK

-1Power Button

1

-2SLP_S4# SLP_S3#

ENPM_SLP_S4#

EN

PM_SLP_S3#

SWITCHPage36

EN

VDD

3D3V_S55V_S5

4Sequence: S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

Page46

1D5V_S3

5

VOUT

RT9026

RUNPWROKPGD

PM_SLP_S4#EN

VDD

5V_S5

3

D85V_PWRGD

3a

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5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


BMW Z4 DIS A00

Power Block DiagramA3

100 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


100 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


100 105Friday, March 30, 2012

DMB40

Regulator LDO Switch

Power Shape

DVDDL

AR8162L

TPS51225RUKR

5V_S5

AO4468 VT358FCX

3D3V_VGA_S0

VGA_COREVCC_GFXCORE

SI7121DN

1D8V_S0BT+

BQ24727

Charger

3D3V_AUX_S5(3D3V_PWR_2)

Battery

Adapter 3D3V_S5

5V_S0

DDR_VREF_S3

1D5V_S3

0D85V_S0

RT8068AZQWID

DMP2130L

1D05V_PCH/VCCP_CPU

VT386FCX

G5285T11U

AO4468

For Discrete

TPS2541RTER+UP7534QRA8

USB30_VCCx

PA102FMG

3D3V_LAN_S5

AO4468

3D3V_S0

3D3V_CARD_S0

RTS5179

LCDVDDDMP2130L

3D3V_AUX_KBC

1D5V_VGA_S0

AD+

VT1318MFQ +VT1326SFCX + VT1323SFCX

DCBATOUT

VCC_CORE

0D75V_S0

15V_S5

SI7121DN

RT9026PFP TPCA8062

1D5V_S0

For Discrete

AO3404A

3D3V_WLAN_AOAC

AO4468

1D8V_VGA_S0

For Discrete

APL5930KAI

1V_VGA_S0

For Discrete

5V_PWR_2

VT385FCX

AO3404A

3D3V_WWAN_AOAC

APL5916

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A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of


BMW Z4 DIS A00SMBUS Block Diagram

A2

101 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A2

101 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of



A2

101 105Friday, March 30, 2012

DMB40

TPDATA

TPCLK

TP_VDD

‧

‧‧

TouchPad Conn.GPIO37/PSCLK1

GPIO35/PSDAT1

LCD CONN

PCH SMBus Block Diagram

PCH

SMBCLK

SMBDATA

GPIO74/SDA2

GPIO73/SCL2

KBC

3D3V_S0

‧

SRN2K2J-1-GP

3D3V_S5

‧

‧‧

SRN2K2J-1-GP

3D3V_S0

2N7002KDW

‧

‧

‧

BAT_SCL

BAT_SDA

Minicard WLAN

SMB_DATA

SMB_CLK

GPIO17/SCL1/N2TCK

GPIO22/SDA1/N2TMS

SMBus Address:A0h

SMBus Address:A4h

DIMM 1SCL

SDA

3D3V_AUX_KBC

‧

DIMM 2SCL

SDA

SMBus address:16h

SMB_CLK

SMB_DATA

PCH_SMBCLK

PCH_SMBDATA

PBAT_SMBCLK1

PBAT_SMBDAT1

KBC SMBus Block Diagram

Battery Conn.

PCH_SMBCLK

PCH_SMBDATA

BQ24727SCL

SDA

TPDATA

TPCLK

PCH_SMBDATA

PCH_SMBCLK

‧‧

SMBus address:12h

SRN10KJ-5-GP

SRN4K7J-8-GP

NPCE885PA0DX

0R2J-2-GP

HDMI CONN

SML0CLK

SML0DATA

SML0_CLK

SML0_DATA

3D3V_S5

‧

SRN2K2J-1-GP

Minicard W-WAN

SMB_DATA

SMB_CLK

PCH_SMBDATA

PCH_SMBCLK

‧‧

L_DDC_DATA

L_DDC_CLK

SDVO_CTRLDATA

SDVO_CTRLCLK

‧

SRN4K7J-8-GP

‧

SRN2K2J-1-GP

SML1DATA/GPIO75

SML1CLK/GPIO58

PCHSML1CLK/GPIO58

SML1DATA/GPIO75

LVDS_DDC_CLK_R_1

LVDS_DDC_DATA_R_1

GPIO_VGA_03_DATA

LVDS_DDC_CLK_R

LVDS_DDC_DATA_R

SRN0J-6-GP

‧

3D3V_S0

SRN2K2J-1-GP

2N7002KDW

SML1_CLK

SML1_DATA To KBC

3D3V_S5

3D3V_VGA_S0

To GPU

‧‧

2N7002DW-1-GP

‧

DDC_CLK_HDMI

DDC_DATA_HDMI

5V_S0

SRN2K2J-1-GP

3D3V_S0

PCH_HDMI_CLK

PCH_HDMI_DATA

‧

3D3V_S0

SRN2K2J-1-GP

‧‧

SMBus Address:41h

33R2J-2-GP

‧‧

GPIO_VGA_04_CLK

‧‧

‧

‧

‧

‧‧

‧‧

‧‧

0R2J-2-GPTPCLK_C

TPDATA_C

33R2J-2-GP

TouchPad Conn.

SMB_DATA

SMB_CLK

PCH_SMBDATA

PCH_SMBCLK

GPIO73/SCL2

GPIO74/SDA2

GPIO_4_SMBCLK

GPIO_3_SMBDATA

Thermal ICSCL

SDA

3D3V_S0

‧

3D3V_S5

‧

‧‧

SRN2K2J-1-GP

SRN2K2J-1-GP ‧‧

2N7002KDW

‧‧SML1_CLK

SML1_DATA

THM_SML1_CLK

THM_SML1_DATANCT7718W

SML1_CLKSML1_DATA

‧

SMBus address:99h/98h(R/W)

‧

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A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of


BMW Z4 DIS A00

Thermal/Audio Block DiagramCustom

102 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


102 105Friday, March 30, 2012

DMB40

Title


Date: Sheet of


BMW Z4 DIS A00


102 105Friday, March 30, 2012

DMB40

Thermal Block Diagram

CPU/SYSTEMThermalNCT7718W

D+

D-

Audio Block Diagram

Codec

92HD94

HP/MICCombo

PORTA_L

PORTA_R

PORTD_+L

PORTD_-L

DMIC_CLK/GPIO1

DMIC_0/GPIO2

PORTB_L

PORTB_R

NCT7718_DXP

NCT7718_DXN

PMBS3904-1-GPSC2200P50V2KX-2GP

SCL

SDA

KBCNPCE885P

GPIO4/AD5

PAGE28

PAGE27

T_CRIT#2N7002K

THERM_SYS_SHDN# SD

G

PURE_HW_SHUTDOWN# 3V_5V_EN

FAN CONTROL

VIN VSET

FAN

1_D

AC

GPIO94/DA0

VOUT

FAN VIN

TACH

GPIO56/TA1

FAN

_TA

CH

1

G991P11U

DigitalMIC

PORTD_+R

PORTD_-R

AUD_HP1_JACK_L

AUD_HP1_JACK_R

MIC_IN_L_R

AUD_DMIC_CLK_R

AUD_DMIC_IN0_R

SC470P50V3JN-2GP

3D3V_S0

PAGE28

PAGE29

3D3V_S03D3V_S5

‧

‧‧

SRN2K2J-1-GP

2N7002KDW

‧‧SML1_CLK

SML1_DATA

THM_SML1_CLK

THM_SML1_DATA

AUD_SPK_L+

AUD_SPK_R+

AUD_SPK_L-

AUD_SPK_R-

SPEAKER

VREFOUT_A AUD_VREFOUT_A

5V_S0

‧

SRN2K2J-1-GP

‧‧

IDT

GPIO74/SDA2GPIO73/SCL2

FAN

_VC

C

‧

2K2R3F

‧

MIC_JACK_R

3D3V_S0

2K2R2F-3-GP

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BMW Z4 DIS A00

Change HistoryA3

103 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

103 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

103 105Friday, March 30, 2012

<Core Design>

DATE PAGE Change Iteam Version DATE PAGE Change Iteam

2011 11/28 X01Change VT358 AVDD power rail to 5V_S5 to avoide leakage92

2011 11/28

85 Change U8506 power rail and select pin to 3D3V_VGA_S0 to avoid leakage

X01

2011 11/28

92 Re-name Cap PC4663 to PC9218.

X01

Owner

Change PU9303 to 74.05930.03D by design X0193

Change R3714 to 10K to fix step-like waveform

X01

Power

EE

EE

EE

EE

37

93 POP PD9301, PD9302, PD9303, PD9304, PC9328, change PR9327 to 20K, PR9330 to 10K, PC9326 to 0.1u, PR9312 to 100K, PR9312 re-connect to DGPU_PWR_EN, PD9302 re-connect to DGPU_PWROK for GPU power sequence

EE X01

2011 11/28

2011 11/28

2011 11/28

DY R8408 cause GPU support PX5.084

DY R8605, Q8602, R8603, R8604, U8601, U8602, U8603, U8604, cause GPU support PX5.086

EE

EE

2011 11/28

2011 11/28

X01

X01

2011 12/02 27 Reserved DGPU_PWROK signal to inform KBC EE X01

2011 12/02 62 POP R6208, DY R6201 for USB charging function. EE X01

852011 12/02 Change VRAM type setting. EE X01

2011 12/02 41

2011 12/02 27 Add R2737 for avoiding KBC power drop.

Change PT4101, PT4103, PT4104 to 77.52271.09L for design change

2011 12/02 37 Change R3719 to 0402 type

EE

EE

EE

X01

X01

X01

2011 12/02 69 Change TPAD1 conn by ME

822011 12/02 Change LEDBD1 conn by ME

2011 12/02 56 Change HDD1 conn by ME

68 Change PWSW1 conn by ME

Change RSTSW1 conn by ME27

2011 12/02

2011 12/02

Add BATSW1 and R3901 for avoiding MB crack on assembling.39

60 Change RTC1 conn by ME

39 DY D3901, D3902, D3903 cause the battery is internal type.

51 Re-name D5001 and F5001 to D5101 and F5101, and DY F5101 and add R5109 due to no current leakage problem

14 Change DM1 conn by ME

2011 12/02

2011 12/02

2011 12/02

2011 12/02

2011 12/02

ME

ME

EE

EE

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

27 Change R2724 to 20K for X01 version2011 12/02 EE X01

85 DY C8523, cause VGA temp detect by SMBUS.

28 DY U2803, C2817, C2818 cause VGA temp detect by SMBUS.

EE

EE

X01

X01

2011 12/02

2011 12/02

38 Del PR3812.2011 12/02

Change LCD1 conn by ME492011 12/02

60 POP U6001 and del ROMSK1 for X01 version2011 12/02

65 Change R6507 to J type2011 12/02

Change BATT1 conn by ME392011 12/02

Change IOBD1 conn by ME2011 12/02 82

68 Add WLAN/WWAN LED power control circuit

Change AOAC_PCIE_WAKE# pull high to 3D3V_WLAN_AOAC and PCIE_WAKE# to 3D3V_LAN_S5 27

Change WWAN power to 3D3V_S066

Change VCC_CORE MLCC by power team request

Change AXG_CORE MLCC by power team request

8

9

Reserved DGPU_HOLD_RST# & DGPU_PWR_EN# pull high and down22

97 Follow EMI request added Cap.

20 Rename PCIE request pin

272011 12/12 Change U2701 to new P/N

design change PU4001 by Power team request40

design change PU4106 by Power team request41

Change PU4102 to colay symbol by Power team request41

Change PU4501to VT386 by Power team request45

46 Change PR4609 and PR4612 by Power team request

48

43

Change PU4801 by Power team request

Reserved PT4301 by Power team request

2011 12/02

EE

EE

EE

EE

X01

X01

X01

X01

X01

X01

X01

Owner Version

2011 12/09

2011 12/09

2011 12/09

2011 12/09

2011 12/09

2011 12/09

2011 12/09

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

ME

ME

ME

ME

ME

ME

ME

ME

ME

Power

Power

Power

Power

Power

Power

Power

Power

Power

EE

EMI

EE

EE

EE

EE

2011 12/12

2011 12/12

2011 12/12

2011 12/12

2011 12/12

2011 12/12

2011 12/12

Change R8412 to 4.7k.842011 12/12 EE X01

65 Add WLAN requirst circuit2011 12/09

EE X01

2011 12/13 82 Add ER8201, ER8202, ER8203, ER8204 by EMI request. EMI X01

182011 12/13 Reserved USB_PN13, USB_PP13 test point. EE X01

622011 12/13 Del USB3.0 Redriver circuit. EE X01

27 Change R2735 and R2737 to 20K for fix AUX power overshoot.2011 12/13 EE X01

Change PC4127 to 4.7uF for fix AUX power overshoot.412011 12/13 EE X01

82 Add ER8205, EC8206 by EMI request. EMI X012011 12/13

2011 12/13 46 Add EL4601, EL4602 by EMI request. EMI X01

43

44

2011 12/13

2011 12/13

Add EG4301,EG4302EG4303,EG4304,EG4305,EG4306,EG4307 by EMI request.

Add EG4401,EG4402,EG4403,EG4404,EG4405,EG4406,EG4407 by EMI request.

EMI

EMI

X01

X01

152011 12/13 Change DM2 conn by ME request ME X01

2011 12/15 97 Add EC9736, EC9726, EC9750 EC9708, EC9709, EC9770, EC9705, EC9769 by RF request.

56 Add EC5601 by RF request.

Add EC4638 by RF request.

Add EC3122 by RF request.

46

31

2011 12/15

2011 12/15

2011 12/15

RF

RF

RF

RF

X01

X01

X01

X01

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Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

104 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

104 105Friday, March 30, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

104 105Friday, March 30, 2012

<Core Design>

DATE PAGE Change IteamVersionDATE PAGE Change Iteam

14 Change DM1 P/N to 62.10017.S812011 12/15 EE X01

Owner

2011 12/15 15 Change DM2 P/N to 62.10017.T01 EE X01

2011 12/15 62 Del R6201 change by USB detect function EE X01

652011 12/15 DY R6507, U6501 for design change EE X01

68 Add R6809, DY C6802, R6803, D6802, WLAN LED power control by AOAC_WLAN_EN#.

8

9

Change C825, C830, C831, C832 to 0805 type.

Change C906, C907, C908, C909, C910 to 0805 type.

2011 12/15

2011 12/15

2011 12/15

EE

EE

EE

X01

X01

X01

Del 1D8V_VGA_S0 power good circuit.93

Del VGA_RST# circuit.83

86 Del 1D5V_VGA_S0 power good circuit.

2011 12/15

2011 12/15

2011 12/15

EE X01

EE X01

EE X01

2011 12/15 31 Reserved EC3101 by RF request. RF X01

Reserved EC9771, EC9772 by RF request.2011 12/15 97 RF X01

2011 12/16 86 Change C8642, C8650, C8647 to 22u 0805 size. EE X01

2011 12/16 62 Pop TR6204, DY R6279, R6280.

492011 12/16 Pop TR4902, DY R4903, R4906.

EMI

EMI

X01

X01

8 Change C847 to 22u 0805 size.2011 12/16 EE X01

Pop C6802, for soft start.682011 12/16 EE X01

Change PC3806 to 0805 type

43 Del PT4301 cause no layout area.

382011 12/19

2011 12/19 Power

Power X01

X01

442011 12/20 Change PWR_GFX to PWR_CPU Power X01

18 Change touch panel USB signal to port 4. EE X012011 12/20

82 Reserved TPAN1, and swap IOBD1's main and 2nd source. EE X012011 12/20

49 Swap LCD1's main and 2nd source.2011 12/20 EE X01

2011 12/20

2011 12/20

14

15

Change R1401, R1402 to short pad

Change R1502 to short pad

EE

EE

X01

X01

39 Change R3902, R3903, R3904 to 100 ohm to avoid break KBC when battery in.2011 12/20 EE X01

Del RN2703, add R2714, R2715.272011 12/20 EE X01

482011 12/21 POP PR4814, change PR4811 to 365ohm, PR4813 to 100Kohm Power X01

Add R2115 and del R6001 for SPI louting setting21 EE X012011 12/21

8 DY C807, C843, C824. Power X01

42 Change PR4236 to 374ohm, PR4249 to 7.68Kohm. Power X01

2011 12/21

2011 12/21

Change PU4301 IC to lastly version.432011 12/21 Power X01

Change PU4401 IC to lastly version.44

Design change PU4002 by power request

Add R2716 to modify PSL circuit.27

40

Power X01

Power X01

EE X01

2011 12/21

2011 12/21

2011 12/21

82 Swap USB1, USB10 signal to TR8202 TR8201 for layout2011 12/23 EE X01

Owner

EE X01

Version

2011 12/23 62 Swap USB0 signal to TR6204 for layout

972011 12/23 Del H8. ME X01

512011 12/27 Pop D5101, DY R5109. EE X01

2011 12/30 93 Change PD9301, PD9302, PD9303, PD9304's 2nd source to 83.R5003.H8H EE X01

312011 12/30 Change U3101 to 71.08162.A03 due to vendor update new version. EE X01

972011 12/30 Pop EC9738, EC9739, EC9741, EC9743, EC9744, EC9764, EC9765, EC9766, EC9767, EC9768 EMI X01

2011 12/30 36, 93 Change U3601 U3602 PU9305 PU9306 2nd to 84.04178.037 Power X01

492011 12/30 Change TR4902 to 69.10103.041 EMI X01

51 Change HDMI SMBUS pull up power to 5V_HDMI_S0_R

X02

EE

2012 01/30 48 Reserved PC4818 PC4819 to prevent VCCSA power IC VID setting(PWM solution) EE

66 DY R6615.

Move IO BD conn signal for coaxial cable

EE

EE

2012 01/30

2012 01/30

2012 01/30

EE

2012 01/30

2012 01/30

EE2012 01/09 15, 24 DY C1507 and C2403 by PI testing result. X01

62 Change U6201 to lastly version.

40, 38 Change PR4004 to 3K and PR3816 to 3.3K for hiccup mode adaptor.

2012 01/09

82

2012 01/30 68

97, 38 Take off EC9704, del PS_ID_R.

Add D6803 to fix DW1703 BT LED behavior. and change WLAN LED power rail to 5V_S0. EE

EE

EE

31 Change L3101 to prevent the shortage problem.2012 01/30 EE

822012 02/06 Change TPAN1 P/N by ME request and modify conn pin define. EE

2012 02/06 31 Reserved C3110 for Lan IC.

2012 02/06 5, 8, 9, 14, 15, 19, 23, 24, 27, 28, 36, 37, 38, 49, 51,62, 65, 66, 83, 85

Change R504, R812, R909, R1404, R1405, R1505, R1503, R1921, R1916, R1924, R1929, R1925, R2304, R2301, R2307, R2306, R2308, R2403, R2404, R2412, R2402, R2702, R2765, R2794, R2778, R2792, R2733, R2767, R2768, R2720, R2764, R2723, R2727, R2807, R3614, R3710, PR3819, R4912, R4913, R5125, R5101,R5102, R5149, R5103, R5108, R5107, R5106, R5105, R6202, R6203, R6204, R6205, R6505, R6502, R6616, R8322, R8504, R8506, R8507, to short pad

EE

EE

2012 02/10 41, 42, 45,46, 47, 95

Change PR4127, PR4130, PR4133, PR4116, PR4251, PR4250, PR4212, PR4207, PR4228, PR4523, PR4522, PR4510, PR4511, PR4626, PR4621, PR4622, PR4623, PR4611, PR4602, PR4702 ,PR9215 to short pad

2012 01/09 48 Change VCCSA to LDO type.

Power

Power

2012 02/13 51 Change HDMI output power design EE

2012 02/13 41, 42, 1819, 28, 93

Change PR9311, PR9320, PR4116, PR4219, PR4223, PR4252, PR4254, PR4261, R1823, R1927 R2813 to short pad

Power

2012 02/13 97 Add EC9704, EC9706, EC9716, EC9718, EC9722, EC9724, EC9728, EC9730, EC9775, EC9776, EC9773, EC9774,EC9701, EC9751, EL4901 by EMI required

EMI

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

X03

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Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

105 105Monday, April 02, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

105 105Monday, April 02, 2012

<Core Design>

Title


Date: Sheet of


BMW Z4 DIS A00

Change HistoryA3

105 105Monday, April 02, 2012

<Core Design>

DATE PAGE Change Iteam Owner VersionOwner VersionDATE PAGE Change Iteam

2012 2/16 27 Change PCB version to X03, X02 is for VCCSA LDO version verify. EE X03

2012 2/16 97 Add EC9777, EC9778, EC9779, EC9780, EC9781, EC9782, EC9783, EC9784, EC9785, EC9786, EC9787, EC9788 by EMI required

EMI X03

82012 2/16 Del C819, add C815 EE X03

2012 2/16 40, 41, 4243, 44, 4546, 47, 4892, 93

Change Pad type, change to green cover type. EE X03

2012 2/16 92, 93 Reserved EC9201, EC9202, EC9203, EC9301, EC9302, EC9303 by RF required.

EMI X03

RF X03

45 Add EL4501, EL4502 by EMI required.2012 2/16

492012 2/16 Add EC4901, EC4902, EC4904, EC4905, EC4906, EC4908, EC4909, EC4910, EC4911, EC1524, EC1428, EC2409, EC2305, EC4528, EC4521, EC4507, EC9789, EC9790 by RF required.

RF X03

2012 2/20 41, 43, 44 Add Power Gap PG4115, PG4116, PG4117 EG4308, EG4309, EG4310. EG4311, EG4408EG4409, EG4410, EG4411 for power team

Power X03

2012 2/21 93 Add PQ9304 for fine tune GPU sequence EE X03

2012 2/21 42 Change PR4236 to 953ohm, PR4239 to 300ohm Power X03

2012 2/21 14, 97 Change EC9778, EC9779, EC9780 to EC1406, EC1407, EC1408 by layout. EE X03

2012 2/29 59 Change C5902 P/N. X03EE

2012 3/15 DY R8501, R8204, TPAN1, R3901 EE A0082, 85, 39

272012 3/15 Change R2724 to 64.9k for A00 PCB version EE A00

71, 822012 3/15 Change DB1 and CRTBD1 to green cover type symbol. EE A00

852012 3/15 Pop R8535 EE A00

68 Del WLAN LED control power rail circuit. 2012 3/22 EE A00

Change ER8201, ER8202, ER8203, ER8204, R6503, R6506, R6601, R6602, ER8205, R2205, R3113,R6281, R6282, R6283, R6284, R6616, PR4022, PR4801, PR4803, RN2012, RN2014, RN2017, to short pad and del TR6501, TR6601, TR8201, TR8202, TR6205, TR6206.

20, 22, 6265, 48, 4066, 82

A00EE2012 3/23

Pop EC8207, EC9734, reserved ER1807 by EMI request.82, 972012 3/27 EMI A00

Del R6279, R6280, R4903, R4906 by PSE request49, 622012 3/27 EE A00

Change R6909 to 0603 type.69

49 Change RN4902 to 100 Ohm.

Change R2136 R8612 to short pad, and change RN2101 to R2116, R2121, R2127, R2128 short pad21

2012 3/27

2012 3/27

2012 3/27

EE A00

EE A00

EE A00

2012 3/29 45, 97 Del EL4502 and EC9729 for layout. EE A00

2012 3/30 8 Del C819 for layout. EE A00

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