Analog Integrated Circuits and Signal Processing, 38, 83–101, 2004c© 2004 Kluwer Academic Publishers. Manufactured in The Netherlands.

Current Mode, Voltage Mode, or Free Mode? A Few Sage Suggestions

BARRIE GILBERTAnalog Devices Inc., 1100 NW Compton Drive, Beaverton, Oregon, USA

E-mail: barrie.gilbert@analog.com

Received June 15, 2002; Revised January 7, 2003; Accepted February 14, 2003

Abstract. Many claims have been made about the benefits of a current-mode (CM) approach to IC design. Theterm is used to draw attention to some kind of special dependence on currents as signals, often without a clearorientation to the broader field, referring instead to recent CM papers. Its use suggests a significant and valuabledistinction over “conventional” solutions, perhaps in the hope that this perspective, with an element of noveltyat the cell level, will influence circuit design in the stringent context of IC production. This paper asks: Whatfactors unambiguously define a current-mode circuit, and formally differentiate it from standard realizations ofsome function? Can one point to any compelling, and in the most favorable cases unique, advantages? Are thesecells clearly of general value, capable of widespread utility? These issues are examined from the critical viewpointthat no circuits carry the entire functional burden by the exclusive use of either currents or voltages, and very fewfully exploit the specific, but narrow, benefits of CM concepts. Real-world product development invariably demandsthe vigilant and full embrace of what might be called the Free Mode perspective, but merely as a mnemonic, not aclassification.

Key Words: current mode; analog design techniques

1. Introduction

This issue testifies to the continued interest in “currentmode” circuits. The bibliography provided at its end,while far from exhaustive, shows that these conceptshave a vigorous following. Yet, to the author’s knowl-edge, no rigorous definition of a current-mode circuitcan be found in the literature. Since the term has beenso widely employed, this should strike us as rather sur-prising. Its users presumably have something specificin mind, in choosing to identify their various contribu-tions by appealing to this term, which was originallyused to refer to a certain narrow class of techniques,without any attempt at a broader definition. Today, itall-too often appears to have joined the ranks of ambi-guity, and become just another good word, along withnovel, universal, low power, high speed, low cost, highaccuracy and the like. When was the last time you sawa paper using the words voltage mode in its title? Whatspecial principle would it convey to you?

This ambiguity can be attributed to a casual, and of-ten inappropriate, appeal to the term in publications,at times with insufficient regard for foundations de-

veloped decades ago, referencing instead recent andclosely similar work. Its colloquial application impliesthe use of currents as signals, invariably with a tacitclaim to a degree of novelty, announcing a different,and in some (unstated and unclear) way, advantageousimplementation of a function formerly realized usingother techniques. It hints at an ingeneous break with thetraditional reliance on the use of voltages. But what is avoltage-mode circuit? Clearly, no circuit is deserving ofthis exclusive designation, since none operates in such astrictly-defined and limited manner. Some, like charge-coupled devices and switched-capacitor circuits, comeclose to operating in this “pure” mode, although in apractical taxonomy, it might be more appropriate to callthese charge mode circuits.

Likewise, no circuit operates entirely in the currentmode.1 The literature shows that, in the majority ofcases, the papers and letters concern the realization ofsome basic function at the small-cell level, the focusof the work, in which currents are reckoned to playa special role. The fact that the completed circuit (ifever considered) will, at some point in a product de-velopment, place equal reliance on signal voltages is

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conveniently set aside. Indeed, essential voltages (lateridentified as state variables) frequently arise within thecell. This vision of “current mode” is far removed fromthe spirit of the first circuits that fell naturally into thisclass, which placed an essentially exclusive relianceon currents throughout a major portion of the signalchain, or as the variables realizing some special func-tion. In such circuits, the supporting circuitry requiredto interface with the “voltage-mode world” was a trivialand unremarkable part of each complete, stand-alonesolution.

1.1. The Relevance of “Analog Power”

Electrical theory concerns the conversion, transmis-sion, transformation, control, storage, and utilizationof energy. Electronic circuits address the origination,transmission, transformation, control, storage and uti-lization of information-bearing or control signals, in akaleidoscopic variety of forms. All require the efficientutilization of power, although it is invariably minute inelectronics; it usually plays no discernable role in cir-cuit operation. Thus, in logic design, the emphasis ison voltage mode when considering logic signals at gateinterfaces, and on current mode when considering theirdistribution. However, at the system level, a robust in-formation mode prevails. The incidental power in thou-sands of logic gates will eventually raise challengesof thermal management, and in analog circuits self-heating can seriously threaten accuracy; but clearly, inno such cases is it a signal.

An obvious exception is transceiver design, wherethe power content of the signals is an essential as-pect of the representation. An electromagnetic (volts-and-current) radio wave induces a minute amount ofpower on a receiving antenna, which is also respon-sive to the fundamental noise power kT of the sur-roundings. These define the power-signal-to-noise ratio(PSNR), whose preservation is crucial in processingthese signals, involving amplification (by fixed- andvariable-gain cells), frequency translation (by mixers),and the separation of the wanted carrier from others (byfilters). Eventually, when extracting the signal’s pay-load, power considerations become secondary, and thevoltage-mode viewpoint generally prevails during de-modulation. In modern receivers, using digital modu-lation, information-mode takes over beyond this point.

In all cases where the preservation of PSNR is theprimary consideration, the principles of impedance-

matching are identical to the load-matching rules es-sential to the efficient operation of a power-distributiongrid. In impedance-matched systems, both the voltagemagnitude and the current magnitude are of preciselyequal importance. Thus, the nation’s distribution net-work and your cell-phone’s transceiver are compellingexamples of the important power mode approach todesign.

In a broader view, analog signals are electrical rep-resentations of temporal, dimensional quantities inthe physical world. They are the continuous-time,continuous-amplitude and scaled tokens for a mea-sured value (such as temperature, pressure, position);a control or actuating variable, an accurate referencesource (voltage, frequency); a time base (in radar, TV,oscilloscopes, sonar); a stream of un-encoded audioor video; and much else. Throughout their process-ing chain, analog signals must have sufficient power tominimize errors, that is, considerably above the ther-mal noise power, kT. This evaluates to 4 × 10−21 Wper Hertz of information bandwidth at T = 290 K,often stated as −174 dBm/Hz. Disregard for signalpower, treating the signal as a pure voltage-mode orcurrent-mode quantity, is a permissible convenienceonly when PSNR considerations can be neglected.This is less common than might be assumed, how-ever. Regrettably, papers about current-mode circuitsoften omit any mention of their troublesome noisemechanisms.

1.2. The Dominance of Voltage Mode

For decades, the dominant signal representation modehas been in voltage form. This might sentimentally beidentified with the advent of the triode vacuum tube.In grounded-cathode amplifiers, its grid voltage, withnear-zero grid current, modulated the anode current.This was converted back to voltage mode by the anodeload impedance for use by later stages: the tube currentwas an incidental variable. However, the persistenceof voltage mode up to the present has much strongerpractical justifications, chiefly in the matter of powersources. Voltages can readily be probed by instrumentsto be displayed and accurately measured without break-ing circuit branches. Even when hiding behind a finiteimpedance, they can drive other compatible circuitswith only a moderate effect on their magnitude; theyare of obvious importance in both analog and digitalpractice.

Current Mode, Voltage Mode, or Free Mode? 85

Thus, for inverter-style CMOS logic in steady state,negligible current flows at its inputs or in the verti-cal branches of the cell. At moderate frequencies, itsvoltage-mode output can drive many similar gates with-out much concern about loading. While true, this viewis, of course, just a convenient simplification. Transientcurrent must flow at the input to alter the charge on thegate oxide and thus the channel current. The seriouseffects of load capacitance on the delay and transi-tion times, particularly of the interconnects betweengates, are well known. Such currents are clearly notsignals; they are just an unavoidable aspect of circuitoperation. Nevertheless, while incidental, logic designalways requires rigorous consideration of how thesecurrent mode aspects are addressed.

1.3. The Notion of State Variables

The idea of incidental variables takes us closer tothe heart of the matter. In CMOS logic, all the statevariables, those necessarily appearing in the equationswhose solution fully defines a circuit function, are volt-ages. Similarly, all state variables for a current-modecircuit must be currents; the incidental voltages causedby the presence of these currents are of minor interest.Thus: A voltage-mode (VM) circuit is one whose signalstates are completely and unambiguously determinedby its node voltages; a current-mode (CM) circuit is onewhose signal states are completely and unambiguouslydefined by its branch currents.

Theoretically, it should make no difference whichmode is used to realize a function; one is simply thedual of the other. Far less latitude prevails in develop-ing practical products. Both circuit types are poweredby voltage sources and perimeter interfaces are obligedto “speak voltage”. A current-mode realization mightat first appear to be preferable, even when requiringsignificant alteration to the structure, and the (often in-convenient) use of current-mode interfaces.2 But whilea straightforward matter to recast signal processing op-erations in an alternate (VM/CM) style, there is no in-herent guarantee, nor should there be any expectation,that either offers a clear and compelling advantage. Thechoice of the local mode is a pragmatic one, based onissues of convenience, the availability of known andtrusted cell concepts, or the natural and comfortable fitof the cell within a product framework. Beyond the cellboundary, and often within it, the representation modewill generally change fluidly and frequently.

1.4. The Practical Value of Duality

The concept of duality relates to pairs of circuits havinginterchanged state- and incidental variables, while pre-serving the function. For example, in the LC tank ofan RF oscillator there is a periodic exchange of en-ergy between magnetic flux (current mode) and di-electric stress (voltage mode). There is a duality be-tween a series-tuned tank, with its branch current asstate variable, where the inner node voltage is inci-dental (although, as for all such variables, cannot beoverlooked) and a parallel-tuned tank, having voltageas its state variable and incidental circulating currents.The supporting amplifier can optionally, and perhapsoptimally, use a local current- or voltage-mode designviewpoint.

A primary voltage source is needed to support signalprocessing. With rare exceptions, current signals andbiases in all types of circuit begin life as a voltages.This is not simply a matter of historical momentum.There is no practical dual for powering current-modecircuits. We do not start with a primary supply of say,5 mA, and divide it up between the various parts of thecircuit, accepting as incidental whatever voltages ap-pear. Current-mode circuit schematics commonly showmany ideal current sources, some of which are depen-dent variables, such as (3x −1)I0, where x is a normal-ized state variable. Often, there is little explanation (ornone) as to how these are, or should be, implemented.

Such casual circuit notions cannot claim to be com-plete. Imperfections in these current sources, such astheir finite conductance and capacitance, could mar thecircuit’s utility. Performance details for any incompletecircuit should be interpreted with critical caution. Onecan find examples in the literature of current-mode cellswhose practical accuracy, factoring in static, dynamic,matching and thermal aspects of these unspecified cur-rent sources, would probably be considerably poorerthan reported.

Novelty has no intrinsic value. There is no merit inpresenting an elegant-looking current-mode concept ifthe completed circuit requires the use of many auxiliaryelements to meet practically meaningful objectives.When it is known that a proposed circuit is actuallymore complex than revealed, or that it under-performswhat can be achieved by well-established means, onemust doubt the legitimacy of its inclusion in the profes-sional literature, except as a matter of curiosity. Circuitsare not products; only the latter have the power to enrichour lives. Cells are merely the fragmentary servants of

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a more complex set of down-to-earth practical needs,of value within the context of product design.

1.5. Sources—Voltage and Current

For decades, circuits have invariably relied on currentsources to support their operation. Thus, in ECL, everylogic gate needs a separate bias current, which is steeredbetween transistors according to the logic state. ECL isan example of current-mode logic (CML). While thismay be a convenient term for purposes of classification,the collector and base voltages play an indispensablerole; they are not in any sense “incidental” (Fig. 1).Indeed, all the state variables in CML are voltages!The term gm-mode logic might be used, although thegeneric current-steering logic is more illuminating andprecise.

References—fixed voltages or currents of known,accurate and stable value—are widely used in elec-tronics. An impeccably accurate value is rarely needed,or provides any added value. Common exceptions are(1) in a system demanding absolute accuracy, havinga voltage input and generating a dimensionless codedrepresentation for display, storage, or use by anotherprocessor; and (2) where such a code is converted to avoltage of absolute accuracy. ADCs and DACs are fa-miliar examples. But even here, absolute calibration isunimportant in many applications. In a well-integratedsystem it is often possible to use one voltage as a com-mon reference, VR , for an ADC (into DSP, say) anda subsequent DAC. Thus, the overall scaling does notsignificantly depend on VR . Similarly, one can scale afunction, say, a receiver’s RSSI voltage and a subse-quent ADC from a common mediocre reference. Suchratiometric operation has many benefits [1].

References are needed whenever there is a trans-lation to/from a voltage or current to an unrelated

Fig. 1. A “current-mode logic” cell; all state variables are voltages!

dimension. Thus, a voltage-to-frequency converter(VFC) must conform to a function of the form3 f =(VIN/VR) fS , where fS might be defined by a CR time-constant. Here, VR will often need to be very accu-rate. In a high-frequency VCO used in a PLL, absolutescaling is not needed, and VR may be hidden in thebuilt-in junction potential of a varactor diode. Likewise,the function of a linear current-mode multiplier/dividermust have the general form IOUT = IX IY /IU . In thiscase, IU is required to be a reliable constant when usedas a multiplier, and either IX or IY when used as adivider.

Voltage is fundamentally the ratio energy/charge.The band-gap reference exploits the well-defined en-ergy in a semiconductor, EG, that is required to raiseelectrons from the valence band to the conduction band,expressed as a voltage by dividing it by the electroncharge q = 1.602 × 10−19 C. In circuit design, it isdefined as EGE, its extrapolated intercept at TABS = 0.

Within a given technology, this voltage has an almostinvariant value, and thus provides a reliable basis for avoltage reference. In practice, access to EGE is indirect:a band-gap reference circuit does not inherently providethis exact voltage. To provide a first-order temperature-stable output, typically about 1.23 V (slightly morethan EGE), the cell must be designed for a specificprocess [1].

The question arises: What equivalent fundamentalmechanism can provide an accurate current reference?The distinctly different character of this quantity meansthat the accuracy of on-chip currents is inherently poor.They depend on semiconductor doping or film compo-sition, on the cross-sectional area and length of devices,on temperature (ambient and that due to self-heating)and in some cases the applied voltage (resistance non-linearity) or bias on an associated junction layer (resis-tivity modulation). No physical effect allows the gen-eration of a current to high accuracy, traceable to theAmpere, within a monolithic circuit. To realize a reli-able current source, one starts with a voltage and ar-ranges for it, or some fraction, to appear across a re-sistor. Monolithic resistors do not provide an accuratevalue as fabricated (a standard deviation of 10% is typ-ical) and they have temperature coefficients that maybe as high as 0.2%/◦C. Advanced analog-specific pro-cesses support thin-film resistors (SiCr or NiCr) of highstability (<10 ppm/◦C) which may be laser-trimmed toexact value.

In the dual view, current replication emulates thefan-out capability of the voltage-mode reference in

Current Mode, Voltage Mode, or Free Mode? 87

transposing currents from one part of a system to an-other. The preservation of accuracy here is not onlya matter of careful matching and attention to devicedelineation, using integer or low-fractional ratios ofunit devices, common-centroid layout techniques, andthe like. Numerous mechanical and fabrication stressesmust also be anticipated and in some way nulled. A va-riety of circuit modifications may be needed to raisethe output resistance of these mirrors, and to ensurethat these secondary reference currents are supply- andtemperature-stable and insensitive to manufacturingtolerances.4

A single master current can optionally be gener-ated by a high-accuracy off-chip resistor and replicatedor changed in polarity using some type of current-mirroring system. For close matching of several cur-rents, it may be better to distribute a voltage around thedie and use emitter degenerated BJTs or large MOSdevices in each cell. A better practice is to cluster thelarge devices into one bias block in the layout, and dis-tribute their currents to the target cells, adding a smallcascode transistor at the local level to radically reducethe capacitance and raise rOUT; a common base/gatebias line can be used for these.

While this kind of rigor is well understood by ex-perienced designers of analog monolithic circuits, the“current mode” notions encountered in the literatureall too often reveal little concern for these practicaldetails, which are of crucial importance in nonlinearcircuits design, where the bias values can affect thescaling of the function, cause signal-path distortion, ordegrade conformance to a desired algebraic form.

1.6. Dynamic Range

The case for current-mode circuits is sometimes basedon their presumed capacity to function over a largerrange of signal values5 than in the voltage mode.The assertion is not without merit in special circum-stances. Thus, a recent current-input logarithmic am-plifier, based on the reliable translinearity of the BJT,accepts inputs from 10 pA to 10 mA, a nine-decaderange (180 dB, but conservatively specified as 160 dB)and converts them to a decibel-scaled voltage with ex-cellent absolute accuracy. However, a general argumentfor the preeminence of current-mode processing is notso easily made [2].

The smallest discernible signal is limited either byoffsets or by noise. In the most favorable scenarios, the

peak signal amplitude in voltage-mode circuits is lim-ited by the supply voltage, which may be dictated by themaximum permissible terminal voltages on the activeelements. As process technologies continue to empha-size packing density and speed, the analog qualities oftransistors are degraded and the reduction in voltageswings is severe. It is common to use supply voltagesof 2.7–5.5 V, although many consumer products allowonly 1.5 V or even less for their supply. Differentialsignal representations are valuable in easing this con-straint. For the present comparative purposes, we cantake the upper end of the voltage swing as lying roughlybetween 0.5 and 5 V pk-pk.

The lower end of the dynamic range is harder toquantify. In DC systems, offset voltages may set thelimit. Using trimming, this may be as low as a few mi-crovolts; in commodity-grade products, one may haveto settle for worst-case values as high as 5 mV. Thus, thedynamic range of a DC-coupled circuit in an optimisticscenario might be, say, 5 V/5 µV or 120 dB, while in apessimistic scenario it might be as low as 0.5 V/5 mVor 40 dB—a 10,000:1 range of possibilities! In DC-coupled systems, wide-band noise can be removed byaggressive filtering, but 1/ f noise will often limit thisrange.

The AC dynamic range of a voltage-mode circuitis determined by its internal noise voltages, many ofwhich are generated by noise currents associated withthe active elements. The wide-band noise-spectral-density (NSD) depends on many biasing details anddevice parameters. The total noise depends not onlyon the information bandwidth (that is, the � f ), butalso on the absolute frequency range (that is, whether� f = f1 − f2 or f3 − f4). It increases at low frequen-cies, as flicker noise intrudes, and again at high fre-quencies, where device power gain falls and secondarysources assert an influence.

For example, consider a BJT differential pair usedas the transconductance in the first stage of an open-loop amplifier, biased with a fixed tail current 2IT of1 mA (Fig. 2a). Assuming a total input-referred re-sistance of 100 �, the voltage-noise-spectral-density6

at this current is ∼1.6 nV/√

Hz. For a peak inputswing of ±15 mV (∼10 mV RMS; higher input levelswould generate excessive distortion in this simple cell)and an information bandwidth of 1 kHz, the dynamicrange would be 20 log10{10 mV/(1.6 nV × √

1000)},or 106 dB. However, when this same cell is used as thetransconductance input stage of a unity-gain closed-loop amplifier, where the input/output signal swing

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Fig. 2. Basic analog building blocks.

could be more than ±4 V (∼2.8 V RMS) using dual 5 Vsupplies, the dynamic range is immediately extendedby 20 log10(2.8 V/10 mV) or 49 dB, to 155 dB; andif the at-frequency open-loop gain of this amplifier ishigh, the tanh-induced distortion becomes negligible.The dynamic range of voltage-mode circuits can be ex-tended even further, depending on the signal frequencyand permissible distortion limit, to over 180 dB in manytransducer applications.

What is the equivalent dynamic range for a current-mode circuit? Such comparisons can never be defini-tive. For example, DC offsets may impose a limit onthe dynamic range of a DC-coupled amplifier, whiletheir effect in a translinear multiplier or VGA cellmight be to cause even-order distortion.7 A basic BJTlimitation is that due to shot noise. For a collectorcurrent of IC this is

√2qIC per

√Hz. The current-

mode noise-limited dynamic range, assuming negligi-ble resistances, is therefore IC/

√2q IC , or

√IC/2q,

which evaluates to 135 dB/√

Hz at IC = 10 µA. Forthe 1 kHz bandwidth as used in the previous example,this amounts to 105 dB.

However, few if any practically-useful current-modefunctions can be achieved with a single transistor. In allstudies of dynamic range, a quality so freely interpretedand offered as evidence of a cell’s value, one must spec-ify exactly how the term is being used, the specific cir-cuit function, its detailed configuration, many of therelevant device parameters, and all operating condi-tions. In this regard, “current-mode” notions are oftenpresented with insufficient clarity or precision to assesstheir practical value.

Consider the noise-limited dynamic range of a ba-sic unity-gain current mirror, Fig. 2(b), comparable inutility as a current-mode building block to the differ-ential pair in voltage-mode. Using ideal BJTs, having

high beta and no junction resistances, each transistorexhibits an uncorrelated peak SNR (each bias currentdivided by each noise current) of

√IIN/2q. The overall

SNR is thus simply√

IIN/q. In practice, the junctionresistances associated with the base (rbb′ ) and emitter(ree′ ) influence the overall current noise. It is readilyshown that, for this mirror, the dynamic range benefitsfrom emitter resistance (whether internal to the tran-sistor or added as emitter degeneration) increasing atan asymptotic rate of 10 dB/decade above the cornerree′ 2 > kT/qIIN. On the other hand, the dynamic rangedecreases at the same asymptotic rate above the cornerrbb′ > kT/2qIIN.

It would be easy to continue such armchair explo-rations to discover various optima and desiderata. How-ever, it is inadvisable to explore only those academicaspects of behavior that just happen to be convenientlytractable, to the neglect of the broader view, involv-ing less-readily quantified effects in the fully-modeleddevice, or demanding the solution of frustrating nonlin-ear equations. It is likewise unproductive to dwell onlocal optimization, with insufficient concern for per-formance limitations elsewhere in the signal path.

2. Mode Transformations

All analog design has a consistent theme: the liberaluse of translations from one signal representation toanother, reflecting the innate necessity of what is herecalled the free mode perspective. Signals undergo nat-ural and fluid mode transformations through the por-tals of conductance and resistance, at low frequencies,or of admittance and impedance, whenever the signalfrequencies are high enough for device inertia to ex-ert a significant effect. These bridges from one modeto another are provided by the active elements, oftensupported by passive components, for a variety of ex-cellent reasons. Wherever at least one time-constantis involved (whether deliberate or incidental) modetransformations are inevitable. On these fundamentalgrounds, we cannot speak of a “current-mode filter”, a“current-mode integrator”, a “current-mode oscillator”and the like.

Conversion from voltage to current mode requires anadmittance or a transadmittance element (more famil-iar in the guise of transconductance, at low frequen-cies). Similarly, transformation from current to volt-age mode requires an impedance or a transimpedance

Current Mode, Voltage Mode, or Free Mode? 89

Fig. 3. Some voltage-mode aspects of a current mirror.

(transresistance, at low frequencies). In practice, muchof the design effort will be put into minimizing thedistortion caused by the inherent V -I nonlinearities ofthe active elements, and in coping with transistor mis-matches and their temperature sensitivities. Thus, bothbridges generally include resistors.

In the current mirror (Fig. 3(a)) the nonlin-ear, frequency- and temperature-dependent (NLFTD)impedance of Q1 converts the current IIN to a NLFTDvoltage, VBE(IIN, f, T ). This is applied to like deviceQ2 which responds as a NLFTD transadmittance togenerate IOUT. Using currents at both input and out-put, this is regarded as a “current-mode” cell. But thevoltage at the input node may be ignored only if IIN isprovided by a perfect current. The NLFTD of the mirrorprecludes this flippancy when the source of IIN has fi-nite admittance. Furthermore, for Q2 the precise valueof this voltage is crucial: it must be within ∼250 µV,a tolerance of roughly 0.03%, for a 1% error inIOUT.

Fig. 4. The V-mirror: A BJT super-mirror reflecting the free mode perspective.

In the schematic, emitters (and sources) should beshown as connected locally and grounded through asingle branch, to remind the layout designer to avoidmetal routing mistakes that could introduce spuriousvoltages (Fig. 3(b)). These can have painful conse-quences, underscoring the voltage-mode alter ego ofthe mirror. Non-degenerated BJT mirrors should beused sparingly, and only where low accuracy and highnoise are permissible. However, the benefits of degen-eration cannot be used when IIN has a wide range ofvalues or when the output must swing to almost the sup-ply rail. Figure 4(a) shows a mirror8 that addresses bothdesiderata. It is an example of a class called Voltage-Following Current Mirrors [3, 4]. The V-mirror exem-plifies the free mode aspects of practical cell design.(Notably, this term combines voltage and current inthe one expression). A low voltage gain in its rudimen-tary op amp is sufficient, since the change in VBE isalready small, being 60 mV/decade of IIN; more im-portant is a low offset voltage. Its bias currents do notaffect IOUT, since iB2 is canceled by iB1. By a simpledesign modification in the op amp, iB2 is arranged tobe κiB1 when Q2 = κQ1.

The V-mirror has interesting properties. If IIN weretruly a current source, its rOUT would in be principleinfinite9 even for low Early voltages in Q1/Q2, sincetheir collectors are equally biased to VOUT. This makesit attractive for loading a preceding cell, having a pairof output currents whose balance depends on its col-lectors being equally voltage-biased. With a load resis-tance RL added, rIN = −RL ; thus, an increase in IIN

causes the voltage at node a to decrease. In a simple

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Fig. 5. A CMOS version of the V-mirror.

mirror, as the VCE of Q2 drops below ∼150 mV its basecurrent rises rapidly, robbing IIN which causes IOUT tofall precipitously. Here, with the base currents providedby the amplifier, IOUT remains accurate down to verylow values of VOUT, even though the transistors are indeep saturation (Fig. 4(b)). Equal emitters are used inthis illustrative simulation, and the op amp’s voltagegain is ∼300. Other Q1/Q2 ratios can be used, over awide range, with the same cancellation of VAF errors.

Most examples in this paper use BJTs, butMOS/BiCMOS versions are usually possible with lit-tle change. Figure 5(a) shows a CMOS version ofa V-mirror on a 0.35 µm process, connected as adifferential-to-single-sided converter: IOUT = I2 − I1.The output error is 1% at VOUT ≈ 55 mV (Fig. 5(b)).The 3 dB bandwidth for I1 = 100 µA, I2 = 150 µA,VOUT = 1 V and CC = 1.5 pF is 180 MHz. In thesebaseline simulations, device matching is assumed tobe perfect. The use of large transistors and common-centroid layout practices is advised.

2.1. Mode Transformations in an Op Amp

While an op amp is correctly classified as a voltage-in, voltage-out element (formally, a voltage-controlledvoltage-source, VCVS), it should not, contrary tothe prevailing popular view, be regarded as a “high-gain amplifier with limited bandwidth”. Rather, itsopen-loop transfer function is essentially that of anintegrator: VOUT = VIN/sT , where T is its character-

istic time constant. The open-loop gain at a signal fre-quency f is defined by T , having a magnitude of unityat f1 = 1/2πT, and f1/ f at lower frequencies, overa range of many decades below f1. Thus, a loosely-named “10 MHz” op amp will have a voltage gainVOUT/VIN of only 10 at 1 MHz. The asymptotic open-loop DC gain is rarely of importance, even when usedat high closed-loop gains.

Whenever we encounter a time constant in a cir-cuit function, we need to consider very carefully whatdefines it. In a typical monolithic op amp (Fig. 6)it is defined by the product of a (real) on-chip re-sistor and on-chip capacitor. The resistor is impli-cated in determining the bias current IO , and thus thetransconductance (gm) of its input-stage transistors;then the capacitor CC defines the unity-gain angularfrequency ω1 = gm/CC . The gain-bandwidth product

Fig. 6. Mode transformations in an op-amp.

Current Mode, Voltage Mode, or Free Mode? 91

of practically all monolithic op amps is very poorlydefined; consequently, so is the open-loop gain at fre-quencies above a few Hertz. This key fact is curiouslyunderemphasized in treatments of op amp application.

Let’s follow the mode transformations for this im-plementation. While rudimentary, the essentials remainthe same after elaboration. Indeed, this actual circuitis of widespread value as shown; using care in de-vice sizing and balance, the inputs may operate downto ground. The differential voltage-mode signal VIN istransformed to a pair of current-mode signals by the IO -determined transconductance, gm , of the input stage.These two currents are then “weighed in the balance”of a current mirror, and remain in current mode at its ter-minals (although as noted, two mode transformationsoccur internally in any mirror).

The difference ISIG is applied to the voltage-gainstage, a grounded-emitter transistor, Q5, biased at aconstant IC . The difference current ISIG from the mir-ror flows almost entirely in CC (neglecting here the CJC

of Q5). At this point, an important mode transformationoccurs. It has the form of current-to-voltage, but not dueto a transresistance. Rather, it is due to the frequency-dependent impedance of CC , that is, j/(2π fCC ). Thesignal, now back in voltage form, is buffered by a unity-gain output stage, usually capable of delivering a mod-erately large load current, IL . The amplitude of thisoutput voltage is gm/2π fCC larger than the input, witha constant phase lag of 90◦ over a wide range of fre-quencies. Thus, two major and two minor mode trans-formations of the signal have occurred in this extremelysimple signal path, having the free-mode state variablesVIN, ISIG and VOUT.

2.2. Definitions and Criteria

A Working Definition is as follows: A current-modecircuit is one in which the state variables are exclusivelyin the form of currents. This allows for the fact that, inall real examples, there will, and must be, incidentalvoltages in the circuit. However, these do not appear inthe describing equations of the top-level function; theyare invariably scaled arbitrarily, and often exhibit hightemperature sensitivities. The VBE in the current mirroris such an incidental variable. While a mirror may beconveniently regarded as a current- mode cell, it will beclear that from the circuit’s viewpoint, this particularvoltage is crucially significant, being the precursor ofthe current-mode state variable to follow.

An abbreviated dual of these statements would be:In a voltage-mode circuit the state variables are ex-clusively in voltage form. In every practical case, therewill be incidental currents. These are invariably scaledarbitrarily while not affecting the overall scaling of thefunction. The load current, IL , in a practical realizationof the output buffer of Fig. 6 can be regarded as an in-cidental variable from a cursory perspective. However,like the VBE of the mirror example, this current couldbe very significant, in determining the buffer’s voltagegain, consequently the magnitude of the voltage-modestate variable which is the output, and the amplifier’sopen-loop gain at all frequencies down to zero.

2.3. Key Criteria

Legitimate examples of current-mode circuits can beidentified by asking these questions:

(1) Does the Working Definition apply? that is, areall of the state variables in current form? or moregenerously, the majority of them?

(2) Is the essential function independent of anydeliberately-introduced time constants?

It is reasonable and informative, though not necessary,to add these auxiliary questions:

(3) Is the circuit, and its presentation, complete in suf-ficient detail, that is, not dependent on any unspeci-fied supporting agents, such as the particular valuesof bias currents, or special functional derivatives ofthe state variables, such as (3x − 1)IO?

(4) If the circuit is addressing some function formerlyimplemented using voltage mode practice, does itoffer any compelling and defensible advantagesover the prior art, or does it merely replicate sucha function in a different, and perhaps interesting,way?

(5) Have the circuit’s special merits been recognizedand realized by other designers? Has it becomewidely adopted in actual products, on the basis ofthese unique merits? If of a totally new form, issuch an outcome likely, with the fourth criterion inmind?

These criteria may appear to be overly strict. Certainly,much that has appeared in the literature as “currentmode” would not qualify. The first to be challenged

92 Gilbert

would probably be the last one, testing the practicalutility of a “novel approach”. But for the designerof products—which must be complete, robust, high-yielding in mass production, inexpensive, benign, freeof artifacts, insensitive to supplies and temperature—this is the only important criterion. A current-mode cir-cuit, just like any other, must earn its reputation throughwidespread use, or risk being soon forgotten, along withhundreds of other curiosities that fill the pages of ourproceedings, transactions, letters, and journals.

3. Examples of Current-Mode Circuits

In the mid-1960’s, the author discovered a class ofcircuits, retrospectively satisfying the first four of theabove criteria, and for which he coined the term “Cur-rent Mode”. Within a decade, the last criterion was metin full.10 The first of this new family of cells arrived inthe following way. BJT current mirrors and differen-tial pairs were in wide use in 1965. As a linear-circuitelement, the mirror was a truly new form. Its topologywas not found in vacuum-tube design. Tubes require anegative grid bias to reduce the anode current to near-zero, which would not naturally arise if they were usedin place of BJTs.11

By contrast, the differential pair is a mode-transforming element. An input voltage, VIN, appliedbetween the bases unbalances the collector currents,making an output IOUT. Unlike the mirror, this couldbe realized in vacuum-tube form, and was, in op ampswidely used in control systems and analog comput-ers. It was called a long-tailed pair (LTP) becausethe bias current for the cathodes was provided by ahigh-value resistor (the “tail”) taken to a large nega-tive voltage. The BJT-LTP had a serious flaw: its IOUT

vs. VIN relationship is very nonlinear, having the formtanh(qVIN/2kT), with a quasi-linear region of a few mil-livolts. But its transconductance is an almost exactlylinear function of the tail current, a property later iden-tified by the name translinear. This was useful at a timewhen analog multiplication was still of broad generalvalue. Its potential was of specific interest to the authorin 1966, for use as the core of a 500 MHz variable-gain amplifier [5]. BJT-LTP cells remain at the heart ofmany contemporary VGAs, sometimes using anothercirca-mid-1960’s linear transconductance concept, themulti-tanh principle [6].

The question arose: Was there some way of merg-ing these two basic cells to realize a super-cell, having

Fig. 7. From current mirrors to current-mode multiplier.

the linearity of the fixed-gain current mirror but thevariable-gain properties of the differential pair, ex-ploiting the excellent linearity of its transconductancevalue with respect to the gain-controlling (tail) cur-rent? It became apparent that this was not only pos-sible, but effortless and natural, leading immediatelyto a current-mode analog multiplication element thatwas linear with respect to both of its inputs [7]. Thisone-step metamorphosis is shown in Fig. 7. In (a) wehave two independent mirrors, side-by-side; the choiceof complementary input currents will later become ap-parent. The outputs are simply linear replications of theinputs, with or without a current-mode gain/loss factor,depending on the ratio M of the emitter areas12 Q2/Q1and Q3/Q4.

Now cut the path from the inner emitters to theground node, join them, and provide them with a biascurrent 2IY , as in Fig. 7(b). With this one, tiny changein topology, we have transformed the inner transistorsfrom being the “hind legs” of two separate mirrors, intoa differential pair, resulting in a genuinely new current-mode element with surprisingly broad and valuableproperties. Both of the cell’s signal inputs—the statevariables 2IY and the dimensionless modulation factorx—and its signal outputs ±yIY are in current mode.

The voltage, �VBE, generated between the innerbases is incidental. If the world were kind enough tosupply all signals in current form, the variation of thisvoltage with signal currents and temperature wouldhave essentially no bearing on the operation and uti-lization of this cell. In practice, as when the currents I1

and I2 are generated directly by voltage inputs via resis-tors, the �VBE will frequently intrude into the overallcircuit behavior. It is of enough importance to give ita special name: the characteristic voltage. This termwas coined to refer to any situation in which two tran-sistors have a common emitter (source) connection

Current Mode, Voltage Mode, or Free Mode? 93

and operate at unequal collector (channel) current-densities. For the BJT, it is:

�VBE = kT

qlog

I1

I4= kT

qlog

I2/M

I3/M(1)

The mirror ratio M cancels out, and no longer deter-mines the gain. In practice, it would be made closelyequal to IY /IX , using a mean value of IY when thisis a variable. The key property of this cell is that theratio of the currents in Q2/Q3 replicates that in Q1/Q4.This follows directly from Eq. (1), assuming all tran-sistors are operating at a common temperature.13 Thisrelationship may be stated in quotient or product form:

I1/I4 = I2/I3 or I1 I3 = I2 I4 (2)

Using the complementary currents shown,

(1 + x)IX (1 − y)IY = (1 + y)IY (1 − x)IX (3a)

which collapses to

y = x (3b)

The differential input current is IIN = (2x − 1)IX andthe output is IOUT = (2x −1)IY . Thus, we can state thefunction in product form

IOUT = (IIN IY )/IX (4a)

or in “variable gain” form

IOUT = GCM IIN where GCM = IY /IX (4b)

3.1. The Evolution of Translinear Cells

This was the first example of a large class of nonlin-ear current-mode circuits. The extension of this ba-sic topology to four-quadrant multiplier operation wasstraightforward [5] and has been widely used. Scoresof other such cells quickly followed [5–7], numerouspatents, and doctoral theses, notably that of Seevinck[8], which cataloged all the then-known cells as wellas examples of formal synthesis methods. In 1975, theauthor proposed a formal definition of this class of cir-cuits, based on the strict translinear (STL) principle[9], in which all state variables are currents, and allvoltages are incidental.

In recent years, many papers [10–12] have exploitedsimilar principles using MOS in weak inversion, whereIDS(VGS) takes on an essentially exponential form. Insub-micron CMOS this regime extends to useful cur-rent levels (microamps). The large VGS offsets in smalldevices limit the accuracy of such cells; the use of muchlarger transistors to avoid this problem penalizes circuitspeed. In the main, these papers report on the perfor-mance of MOS in previously-known BJT topologies.Further branches of the evolutionary tree include theidea of dynamic translinear cells [13] and log-domainfilters [14, 15], although here the inclusion of time-constants precludes classification as “current mode”.However, these extensions do not use STL, but exploitthe concept of general translinearity [16].

In another evolutionary direction, MOS transistorsare used in strong inversion [17]. The common assump-tion of quadratic behavior in this regime is incorrect,casting serious doubt on any analysis based on thisapproximation. A further concern seen in analyses ofCMOS “current-mode” circuits is the simplifying as-sumption of the IDS(VGS) behaviour for a constant drainvoltage, whereas the device behavior is often signifi-cantly altered by the voltage swings at this terminal, dueto the varying VGS of subsequent (driven) cells. Moderndevices exhibit a strongly varying functional form ofIDS(VGS) over a range of IDS, even when VDS � VGS.Thus, in an analysis of sufficient rigor for practicalpurposes, many device parameters persist in the equa-tions defining the circuit function, that is, these voltagesbecome relevant state variables, strongly coloring thefunction of the cell.

The most stunning aspect of Eq. (2) is the number ofBJT and circuit parameters that instantly disappeared,being independent of bias levels, temperature and emit-ter area.14 Even the semiconductor material is unimpor-tant: the equations are equally valid for pure Ge or Si,and for SiGe, GaAs or other HBTs. The ascent of BiC-MOS as the process of choice for future mixed-signalICs will preserve these benefits of BJT current-modecells.

3.2. The Importance of Interfaces

The valuable properties of basic CM cells have beenwidely exploited in products during the past threedecades. However, this broad appeal should not beattributed to the fact that they locally operate in thecurrent mode. While interesting, this is but another

94 Gilbert

incidental factor; isolated cells serve no-one’s practicalneeds. They are only a starting point, the rudimentarycores of complete, application-ready products. Further-more, even within translinear CM cores, their intrinsicvoltage-mode aspects require close attention to achievehigh accuracy and low noise. In many contemporarycases where these cells are used, still in their originalforms, it is apparent that this rigor is not always ob-served.

The diversity of these products arises in the wayin which the near-universal requirement for them toslip effortlessly into a voltage-mode world have beenaddressed. This is the function of the supporting cir-cuitry, where the greatest novelty is required, and inwhich individual solutions branch most widely. And,with few exceptions, it is where all the genuine perfor-mances advances are to be found, as demonstrated inSection 3.6. In some cases, such as high-speed/high-frequency/low-noise products, designers are obligedto also pay attention to power-mode and impedance-mode aspects. But in every case, they are pursuing thepractical and unavoidable necessity of the free-modeperspective.

3.3. Two Seminal Cells

The fundamental relationship stated in Eq. (2) can alsobe obtained from a second four-transistor core. Figure 8shows the fixed, essential connections that define thesetwo seminal forms. It is only changes in the supportingcircuitry that determine the functional variety of allsuch elaborations. These include the methods by whichthe input currents are accurately forced in the collectorsof Q1 and Q2 (using other than the customary diodeconnections); the way the outputs I1 and I2 are utilized;the development of the �V BE in (a), and the generationof bias currents to provide an accurate CM gain, having

Fig. 8. The primitives of two general-purpose current-mode cores.

either a linear or a linear-in-dB (exponential or reverseexponential) relationship to a control voltage; and soon. Note that I1 and I2 can also be outputs, in eitherform. The inclusion of the transistor alpha in the lowercurrents in these figures is only a reminder that they arenot precisely equal to the sum of the upper currents.

It cannot too strongly be emphasized that, in com-petitive product design, it is this mode-transformingsupporting circuitry that calls for the greatest inge-nuity. This includes the choice (often, invention) ofcompact and efficient topologies, where the functionof every element can be fully justified; optimal devicescaling and biasing; the weighing of trade offs; atten-tion to numerous issues of robustness, manufacturing,testability, packaging; and so on. Depending on suchparticulars, the Fig. 8 cores might be expanded intofixed-gain current-mode amplifiers; fixed-gain, active-feedback voltage-mode amplifiers; many varieties ofvariable-gain amplifier; multipliers and dividers; squar-ing and square-rooting circuits; RMS-DC converters;and much else.15 We can classify these as developedcurrent-mode cells. When this work is completed, andall the perimeter connections to a current-mode cellhave been finally tied to their proper places, the work-ing schematic will put even the most sophisticated ofcurrent-mode cores into proper perspective.

3.4. An Illustrative Current-Mode Amplifier

Figure 9 shows an essentially complete CM amplifier.Only the biasing cells, providing two voltage rails forthe degenerated PTAT and ZTAT current sources, areomitted for clarity. The thin-film resistors of the 25 GHzCB-SOI process ensure high temperature stability ofperformance parameters. All internal state variables arein current form. The simple interfaces provide direct in-terfacing with voltage signals; the first stage behavesas a linear transconductance for VIN while the outputcurrents are converted to VOUT by the 25 � load resis-tors RL1 and RL2 (so the differential output resistanceis a fairly pure 50 �). The peak (clipping-level) outputis 3.2 V pk-pk, using a single 2.7 V supply. Option-ally, with RL1 = RL2 = 50 � and RL = 100 � theavailable linear power is >10 mW.

The core is little more than three NPN current mir-rors, having current gains of 6, 34/6, and 190/35, atotal CM gain of ×185, supported by PNP sourceswhose degeneration minimizes noise and offsets inthe signal-path. While the actual current values do not

Current Mode, Voltage Mode, or Free Mode? 95

Fig. 9. A fully-designed current-mode amplifier.

significantly affect the CM gain, the use of both PTATand ZTAT (zero-TC) currents ensure a temperature-stable overall voltage-mode gain of 48 dB (that is,×251, increasing by only 0.18 dB over a supply rangeof 2.7–3.3 V), and a constant peak output capacity.With reduced emitter degeneration, operation down to1.2 V is readily achieved.

The simulation results of Fig. 10 show the DC outputand incremental gain at 10 MHz, vs. VIN over ±6 mV.The deviation from an end-point fit (static nonlinear-

Fig. 10. DC output and AC linearity of current-mode amplifier.

ity) is 0.025%, essentially independent of temperature.The AC gain at −40◦ and 90◦C increases by +0.01 dBfrom its 25◦C value; the small change (+0.075 dB) atthe extremities of the VIN range demonstrates good AClinearity.16 Figure 11 shows the AC response and theinput-referred voltage noise spectral density (VNSD).The −3 dB bandwidth is constant at 255 MHz; the gain-bandwidth product is thus 64 GHz. The phase responseis essentially linear up to 200 MHz. The unloaded out-put noise at 25◦C for an information bandwidth of

96 Gilbert

Fig. 11. Gain magnitude and input-referred VNSD for current-mode amplifier.

1 MHz is ∼200 µV rms; for a signal output of 1 Vrms, the dynamic range is ∼74 dB.

3.5. Recent Extensions of CM Cells

In a flurry of excitement during the late 60’s, numer-ous BJT-CM cells were developed. Since then, veryfew distinctly novel strict-translinear cells have ap-peared. The advent of well-balanced complementarybipolar (CB) processes has added some variety to CMcell topologies, for example [18, 19, 21], but the advan-tageous adoption of these core cells into commercialproducts, as reported in the public domain, appears tobe minimal. Taking full advantage of CB on silicon-on-insulator (SOI) technologies, which provide true three-terminal transistors, the sophistication of the support-ing circuitry that can clothe simple cores with standardvoltage-mode interfaces has continued to show inge-nuity, again underscoring the observation that “circuits(cells) are not products”.

The progress in log-domain (translinear) filters hasalso been aided by the advent of CB. In one realiza-tion of the form [20], the key cell shown Fig. 12(a),a voltage-controlled current-mirror, is used for tuningthe filter at each basic integrator stage. This cell is ofpre-CB vintage [2], using substrate PNPs. But in fail-ing to meet the first two criteria, log-domain filters areclearly not examples of CM design. In fact, all filtersmust necessarily operate in a free mode fashion, sincethere is an essential interplay between voltage-modeand current-mode state variables. Figure 12(b) showsanother useful mirror [6]. As in the last example, it pro-

Fig. 12. Voltage- and current-controlled current-mirrors.

vides an independent port for a linear-in-dB variationof the mirror gain (VM is scaled 3 mV/dB at 300 K), butthis time using a current as the control variable. Whilethese two mirrors are based on the same principles, theuse of currents at all of the boundary terminals in thesecond example clearly puts this particular realizationinto the class of current-mode circuits, meeting all fiveof the proposed criteria.

3.6. A Highly-Developed Translinear VGA

To further demonstrate that performance advancesand circuit novelty in products using a current-modecore are invariably found in the supporting free-modecircuitry, Fig. 13 outlines the structure of a voltage-in/voltage-out variable-gain amplifier. Its core is es-sentially the familiar cell of Fig. 8(a), but with someimportant modifications, not shown here. Its CM signalgain is simply IN /ID , and is closely specified over arange of >100 dB. The denominator current, ID , andthe numerator current, IN , are independently controlledby voltages VG and VM , respectively, applied to high-impedance interfaces.

This VGA is designed to manage a wide range of in-put voltages (from the noise floor to ±4 V). A linear-in-dB gain law is desirable, and is essential as a practicalmatter with a large gain span. ID has an accurately-scaled exponential response to VG , the primary gain-control voltage of 0 to 1.5 V, scaled 30 mV/dB. A logicinput allows the gain to either increase (0–50 dB) ordecrease (50–0 dB) with VG ; both modes are neededin contemporary applications. On the other hand, IN ,thus the overall gain, increases linearly with respectto VM . This also allows the peak output voltage tobe accurately set, useful in driving an ADC. VM de-faults to 0.5 V, for a peak output of ±2 V; at its max-imum value of 5 V, the gain is 20 dB higher and the

Current Mode, Voltage Mode, or Free Mode? 97

Fig. 13. Basic structure of a high-performance variable-gain amplifier.

differential output is then limited by the supply, VS ,(2.7–6 V) and the rail-to-rail drivers, to ±(VS–0.5 V).The input-voltage capacity, output amplitude, overallgain, AC response, and scaling of all control interfacesare temperature-stable.

Based on the diverse performance objectives forthis product, the 25 GHz CB-SOI process was used.The internal structure of this enhanced core and itsvoltage-mode aspects were key to addressing these is-sues. Transistor geometries were chosen to maintainthe lowest possible junction resistances, which is cru-cial in applying this type of cell to any situation wherecurrent densities varies widely; even minute amountsof ohmic enhancement to the characteristic voltage,�VBE, can impair gain accuracy, gain law confor-mance, and signal-path linearity at a stroke. Perfor-mance erosion due to secondary-tier transistor issues—including less-commonly considered basic parame-ters, weak avalanche, self-heating, and others—wasexplored during the design, using a specially-preparedCAD library that allows individual parameters to beselectively included or omitted. This valuable insight-generating hypothesis/test approach to simulation iscalled Foundation Design.

The input voltage, VIN, is immediately converted tocurrent form, VIN/RI , by the two resistors RI /2. Forthis mode transformation to be accurately scaled andhighly linear, the magnitude of the error voltage VE —inboth its linear and nonlinear component parts—shouldbe much less than VIN. This requires that the loop ampli-fier A(s) has high voltage-gain and current-gain, under

all operating conditions. The high voltage gain ensuresthat the �VBE is attenuated to insignificance; high cur-rent gain prevents diversion of signal current away fromthe collectors of Q1 and Q2. This is a very challengingobjective at maximum gain, when VIN/RI and ID aresmallest, and at high signal frequencies.

For example, with a typical full-scale �VBE of50 mV, and a minimum VIN of 5 mV, then, in orderto reduce VE to 5 µV (that is, 0.1% of VIN) the voltagegain A(s) must be 10,000. This may sound like a rea-sonable value for the “open-loop gain” of a generic opamp. However, for a 100 MHz signal it demands a gain-bandwidth product A(s) of 1000 GHz.17 A primary ob-jective was to maintain a perfectly constant magnitudeand phase response in the signal path, whether alteredby VG or VM , for a specified total gain span of 100 dB.Figure 14 shows the actual gain and the remarkablystable AC response over a 105-dB gain span, achievedby varying VG and VM in combination so as to pro-vide 22 demanded gain values at 5 dB intervals. In thisstudy, the HF compensation networks were set for ahigher bandwidth (230 MHz) than the more conserva-tive center value (150 MHz) used for the productionpart. The package impedances were also omitted here,since the primary objective was to confirm the theory(see below), free of secondary confusing effects.

This extreme constancy in the AC response of aVGA is unprecedented. It is not unusual in extantproducts to see a “focal zone” at some high fre-quency in which the actual gain magnitude is almostcompletely independent of the demanded gain. This

98 Gilbert

Fig. 14. AC gain and phase response of high-performance translinear VGA.

shortcoming is due to a variety of HF feed-forwardsneak paths, that generate a larger output magnitudethan the primary path; such effects also badly damagea linear phase response. During this design, all AC re-sponses were routinely normalized to the 1 MHz valueto examine the relative deviation at each gain setting(see lower panel of Fig. 14). An arbitrary design ob-jective of ±0.05 dB at 100 MHz was posed, and met,during the development. This insight-rich rigor is rec-ommended in every VGA development, as a tool toexplore fine-scale response anomalies.

This solution stems from first recognizing that thetransconductance of the Q1/Q2 pair, gm D , propor-tional to ID , varies by 1000:1 over a 60-dB gain span.The input stage of the loop amplifier is a differen-tial pair with a transconductance gm A, proportionalto IA; an on-chip capacitor CF sets its local unitygain frequency to gm A/CF . But the feedback factorfrom its output back to its input is gm D RI , which like-wise varies by 1000:1. To achieve a constant overallbandwidth, the product gm Dgm A is stabilized by ar-ranging the tail current IA to vary inversely as ID .This is easily accomplished, since ID is of the formIO exp(−VG/VT ), in the increasing-gain mode. By pro-viding an accurately tracking inverse exponential cur-rent IA = IO exp(VG/VT ), the overall unity-gain fre-quency is gm Dgm A RI /CF , and since exp(−VG/VT ) ·exp(VG/VT ) = 1, it is constant. In the “gain down”mode, the exponentials are reversed. Incidentally, theform of ID and IA provide another example of freemode principles, where IO and VG play an equallyvital role.

Thus, the overall −3 dB frequency is controlled di-rectly by the accurate temperature stable (thin-film) re-sistors forming RI and the half-sections of CF (MOMcapacitors) multiplied by the gain-independent ratioID IA/I 2

O . These tail currents vary from about 4 µAto 4 mA, providing 5 dB overlap at each end ofthe gain range. The RTI voltage noise at full gain is∼5 nV/

√Hz, which is little more than the noise of

RI alone (4.02 nV/√

Hz, using RI = 1 k�). Thecurrent-mode outputs, whose magnitude can be var-ied linearly by IN over a further >40-dB range, areapplied to a pair of TZAs (wide-band transimpedanceamplifiers), each with ZT = RO/2, and converted tobalanced voltage-mode form, behind a well-controlledoutput impedance of 75 � per side. Their common-mode voltage level defaults to VS/2, but can option-ally be set by the user using an unity-scaled override.Figure 15 shows the measured RTI noise, with the inputterminals (VIN) short-circuited, at three temperatures.Figure 16 shows the main gain versus VG in both the“Gain Up” and “Gain Down” modes, and the measureddeviation (“gain linearity”), at three temperatures.

This forum does not allow a full discussion of manydetails and trade-offs in the design of this advancedVGA structure. Nevertheless, it serves to illustrate how,starting once again with the same 40-year-old current-mode core, the elaboration provided by a mixed bagof free mode principles transforms it from just aninteresting cell idea to a powerful and versatile product,now in full production. Numerous such elaborations ofrudimentary cores have generated an extended and still-growing family of such products. However, it would not

Current Mode, Voltage Mode, or Free Mode? 99

Fig. 15. Measured RTI noise spectral density vs. VG at threetemperatures.

Fig. 16. Measured gain-up and -down and gain error vs. VG at threetemperatures.

be helpful to present these as “current-mode circuits”;indeed, the papers that described some of these devel-opments never used that term in their titles.

4. Concluding Reflections

Science and engineering are deservedly well-regardedfor their precision of expression. Rapid reference to nu-merous topics in our communication of ideas requiresthe ongoing development of a taxonomy, an agreedsystem of classification. This process is fueled by thewidespread observance of its specialist terms over asubstantial period of time, and eventually formalizedby an institution such as the IEEE. The boundariesbuilt into our pre-ratified taxonomy of integrated cir-cuit design must be definitive, and its terms should be

both appropriate (as mind-joggers) and unambiguous,if they are to be of value as a tool of communication.But however carefully selected, coined and partitioned,the names we give to our topologies, techniques andtricks retain their importance as the vectors of essentialideas only if applied carefully and frugally, with fullrespect for the benefits of consensus. Such rigor is notroutinely evident in the broad field of circuit design,and many cases of the misuse of inadequately-definedterms could be cited.

This paper offers an overdue clarification of themeaning of the term current mode, and proposes aWorking Definition and Five Criteria that a circuitshould exemplify in order to qualify. It is recommendedthat this useful, but narrow and specialized term, shouldbe applied in an appropriately exacting manner. TheCriteria should be used to test concepts that might, onfirst impulse, be referred to as “current mode” in na-ture. In view of the fact that their state variables are aneven mix of currents and voltages, many of the circuitspublished in recent years cannot properly employ thisterm. It is surely in the interest of authors, and the com-munity at large, that paper titles and key words capturethe essential and specific top-level features of each ad-vance in circuit design. This rigor will set the stage forthe subject, and provide the busy reader (all of us) witha clearer pre-view of both the context and the content. Itwill also facilitate searches, and reduce the number offalse positives, the bane of filtering the ever-expandingwarehouse of technical literature.

It was noted that the fastidious management of thevoltage-current product—the signal power—is oftena designer’s primary concern. The term impedance-mode might be used in this domain, since the circuittechniques are dominated by considerations of source-load matching and the maximization of power transfer.However, the value of introducing yet another class intoan already-bulging taxonomy is debatable. Similarly,little would be gained by referring to charge-coupleddevices or switched-capacitor circuits by using the termcharge mode to draw attention to their exploitation ofthis particular state variable. For so-called “current-mode logic” (CML), the term gm mode might be moreappropriate in the quest for precision, since its statevariables are in fact entirely in voltage mode. Buthere, the preferred and well-established term current-steering clearly defines this logic family; and unlikeemitter-coupled logic, it is technology-blind.

Signals in analog circuits are universally charac-terized by frequent mode transformations. Product

100 Gilbert

designers are obliged to adopt a fluid viewpoint, aseach sub-region is developed. Since the term mixedmode is widely understood to refer to integrated sys-tems in which analog and digital signals co-exist, theterm free mode is proposed. It is emphasized that thisterm is not intended to be used to define, distinguish orname a class. It simply refers to an appropriate perspec-tive on design, useful as a mnemonic. Thus, since alloscillators, filters, pulse-shaping, delaying, timing andrate functions (integration and differentiation) are nec-essarily free mode in form, there would be no point orpurpose in titling a paper, for example, “A Free-ModeVoltage-to-Frequency Converter”; they all are!

This paper’s frequent emphasis on practical valueshould not imply a lack of respect for formal theories,or the pursuit of insight-generating algebraic analyses(even though these often require falling back on ap-proximations). Rather, it stems from the concerned ob-servation that many papers and letters published abouta variety of small-cell notions suggest a very limitedview of the broader sweep and practical needs of to-day’s IC industry. The merits of another incrementalreconfiguration of familiar cell topology are often hardto identify. In practicing design with the purpose ofsolving pressing contemporary problems, and satisfy-ing specific and difficult real-world needs, we mustkeep in mind that the generic circuit fragments andtricks, that we designers amass in our portfolios overtime, are for the most part servants-in-waiting, for fu-ture and adaptation and deployment in meeting a va-riety of practical objectives. Unless and until they aredeveloped into complete, robust products that are ableto address increasingly-stringent real-world demands,cells remain of little value, except as mental stimulantsand didactic tools.

Our technologies have always had their greatest sig-nificance and influence when applied within the con-text of everyday life. Very often, their latent valueslie in reserve for years, waiting to be understood andappreciated, and then imaginatively exploited throughthe inventive efforts of the community of pragmaticand resourceful product designers. We must each beself-challenged to pursue genuine novelty, and seekto transform our personal bag of tricks, assorted andmany-modal, into the affordable and reliable productsthat will rapidly leave our realm of the intriguing andarcane, to take their place with all the other modern in-dispensable commodities, and become unremarkablycommonplace.

Notes

1. A super-conducting ring might be classified as a “pure current-mode” device, since current is sustained without an associatedvoltage drop. Such a totally-closed loop cannot meaningfully becalled a “circuit”.

2. Current-mode input or output interfaces are sometimes requiredby the application. Thus, a logarithmic amplifier in fiber-opticpower-measurement systems must accept its input as a currentfrom a photodiode.

3. More generally, a polynomial of the form f = fO +{(VIN/VR)±b(VIN/VR)2 ± c(VIN/VR)3 . . . } fS .

4. “The development of analog cells is 70% bias design and30% signal-path design”. This lecture-room maxim is obvi-ously a generalization. Nevertheless, the design of the corefunction of an analog circuit is usually straightforward, whilethe provision of robust and artifact-free biasing requires carefulthought.

5. The ratio of the largest permissible signal to the noise floor, bothdefined as RMS quantities for a stated bandwidth, is commonlyreferred to as “dynamic range” and specified in decibels. How-ever, this term needs to be carefully defined within a particularcontext, since many interpretations can apply.

6. In the examples in this paper, the assumed operating temperatureis 300 K, unless otherwise stated.

7. While VBE offset voltages are PTAT, they are partly a manifes-tation of fixed, non-unity emitter-area ratios. Such mismatchescause a variety of temperature-invariant errors in current-modecells.

8. When first used, colleagues called this general form a GCM(Gilbert Current Mirror). The author prefers cell names thatdefine structure. Note that, simply as a useful mnemonic, thefigure superimposes a “V”.

9. A finite source resistance rSRC transforms to −rSRC at the output.However, when used as a differential current balance the rSRC

due to the VAF of the two sources cancel at I1 = I2 when thesecurrents are balanced by an outer feedback loop. Thus, as acontrol-loop integrator, the final error is very small.

10. Exemplifying this criterion, the first paper on current-mode am-plifiers and multipliers in the Journal of Solid State Circuits wasalso the first to be cited 100 times in later papers. While thecurrent mirror was the first current-mode cell of notable andenduring value, this term was not in general use at that time.

11. CMOS transistors for use in “inverter-style” logic requiredthem to be enhancement-mode types, giving the current mir-ror a new lease of life when CMOS was turned to analogapplications.

12. In cases where this gain or loss factor must be robust in produc-tion, integer emitter units would be used. The ratio M could, ofcourse, differ for the two mirrors.

13. But this is not always the case, as discussed in the paper Dis-tortion Due To Self-Heating In Translinear Multipliers UsingThermally-Isolated Bipolar Transistors, to be published at alater date.

14. While this is essentially correct, slight increases in the char-acteristic voltage caused by the device’s contacting resistancescorrupt the purity of Eq. (2) even in this basic current-modecell. These voltage-mode aspects of the cell’s internal behaviordemand careful consideration in many practical applications,

Current Mode, Voltage Mode, or Free Mode? 101

particularly when the current densities must be high in order tominimize the effective inertia of the cell.

15. For an interesting elaboration of the Fig. 8(b) form, see the DataSheet for the Analog Devices AD538.

16. This form differs from that of an ideal differential pair, whichwould show a reduction of gain of 0.117 dB at ± 6 mV (T =25◦C). The actual form is modified by the choice of biasing anddevice scaling.

17. GBW products much higher than this (>50,000 GHz) are rou-tinely achieved in RF logarithmic amplifiers; but these usemany cascaded stages without feedback. Here, we have a feed-back system containing two gm stages. The detailed design ofthe voltage-mode amplifier A(s) is the key to this successfulimplementation.

References

1. J. Huijsing, R. van de Plassche, W. Sansen (Eds.), Analog cir-cuit design: Low-noise, low-power, low-voltage; Mixed-ModeDesign wit Cad Tools; Voltage, Current and Time References.Kluwer, 1996, pp. 269–352.

2. A.F. Arbel, “Comparison between the noise performance ofcurrent-mode and voltage-mode amplifiers.” Analog IntegratedCircuits and Signal Processing Journal, vol. 7, no. 3, pp. 221–242, 1995.

3. GCM in Electronics Letters.4. C. Toumazou, F.J. Lidgey, D.G. Haigh (Eds.), “Analogue IC

design: The current-mode approach.” IEE Circuits and SystemsSeries 2, Perigrinus Press, 1990; Chapter 6, B. Gilbert, “CurrentMirrors”, Sec. 6.5.5.

5. B. Gilbert, “A new wideband amplifier technique.” IEEE Journalof Solid State Circuits, vol. SC-3, no. 4, pp. 353–365, 1968.

6. B. Gilbert, “The multi-tanh principle: A tutorial overview.”IEEE Journal of Solid State Circuits, vol. 33, no. 1, pp. 2–17,1998.

7. B. Gilbert, “A precise four-quadrant multiplier with subnanosec-ond response.” IEEE Journal of Solid State Circuits, vol. SC-3,no. 4, pp. 365–373, 1968.

8. Later TL cell.9. Unavailable at time of publication.

10. Seevinck thesis.11. B. Gilbert, “Translinear circuits: A proposed classification.” IEE

Electronics Letters, vol. 11, no. 1, pp. 14–16, 1975.12. Many papers using MOS in weak inversion.13. A.G. Andreou and K.A. Boahen, “Translinear cicruits in sub-

threshold MOS.” Analog Integrated Circuits and Signal Pro-cessing Journal, vol. 9, no. 2, pp. 141–166, 1996.

14. B.A. Minch, C. Dioro, P. Hasler, and C.A. Mead, “Translinearcircuits using subthreshold floating-gate MOS transistors.” Ana-log Integrated Circuits and Signal Processing Journal, vol. 9,no. 2, pp. 167–180, 1996.

15. J. Mulder, “Dynamic translinear circuits: An overview.” AnalogIntegrated Circuits and Signal Processing Journal, vol. 22, no. 2,pp. 111–126, 2000.

16. D.R. Frey, “Log-domain filtering: An approach to current-modefiltering.” IEE Proceedings, vol. 140, no. 6, pp. 406–415, 1993.

17. M. Punzenberg and C. Enz, “A compact low-power BiCMOSlog-domain filter.” IEEE Journal of Solid State Circuits, vol. 33,no. 7, pp. 1123–1128, 1998.

18. B. Gilbert, “Translinear circuits: An historical review.” AnalogIntegrated Circuits and Signal Processing Journal, vol. 9, no. 2,pp. 95–118, 1996.

19. R.J. Weigerink, “Computer-aided analysis and design of MOStranslinear circuits operating in strong inversion.” Analog Inte-grated Circuits and Signal Processing Journal, vol. 9, no. 2,pp. 181–188, 1996.

20. L. Magram and A.F Arbel, “Application of complementarytechniques to a bipolar translinear gain cell and a translin-ear CCII+.” Analog Integrated Circuits and Signal ProcessingJournal, vol. 9, no. 2, p. 119, 1996.

21. J. Ahn and N. Fujii, “Current-mode continuous-time filters usingcomplementary current-mirror pairs.” Analog Integrated Cir-cuits and Signal Processing Journal, vol. 11, no. 2, pp. 109–118,1996.

Barrie Gilbert (Life Fellow, IEEE) pursued an earlyinterest in semiconductors and alloy junction transis-tors at Mullard Ltd (UK). In 1964, at Tektronix, hedeveloped advances in oscilloscopes and their first in-tegrated circuits. In 1970–72 he was Group Leader atPlessey Research Labs (UK), working on holographicmemories. He consulted to Analog Devices Inc. (1972–77) and later joined that company as their first ADI Fel-low in 1979. He manages the Northwest Labs, ADI’sfirst remote design center, in Beaverton, developing avariety of IC products for the communications industry,and holds 65 patents. He has authored papers in JSSCand other journals, is a contributor to several texts,and a co-editor of a recent book. For work on mergedlogic he received the IEEE Outstanding AchievementAward (1970) and for contributions to nonlinear signalprocessing the IEEE Solid-State Circuits Council Out-standing Development Award (1986). He was OregonResearcher of the Year in 1990, and received the Solid-State Circuits Award in 1992, the ISSCC OutstandingPaper Award on five occasions, the Best Paper Awardat ESSCIRC twice, and several awards for Best Prod-uct of the Year. He received an Honorary Doctoratefrom Oregon State University in 1997. For recreationhe composes music for virtual orchestra, writes poetryand communes with his feline companions.