CURRENT MIRROR/SOURCE EMT451/4. DEFINITION Circuit that sources/sinks a constant current as biasing...
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Transcript of CURRENT MIRROR/SOURCE EMT451/4. DEFINITION Circuit that sources/sinks a constant current as biasing...
DEFINITION
Circuit that sources/sinks a constant current
as biasing elementsas load devices for amplifier stages
CURRENT MIRRORS
Principle : if the G-S potentials of two identical MOS transistors are equal, the channel currents should be equal.
Mathematical perspective: ID = f(VGS)=Iref for a MOSFET -> hence VGS = f-1(ID)=f-1(Iref)
i.e. apply VGS, get Iref, or transistor biased at Iref produces VGS
If the same voltage is applied to G and S of a second MOSFET, then ID=Iout=f(VGS)=f[f-1(Iref)]=ff-1Iref=Iref
Another way of saying it: if we have two MOS devices with equal VGS in saturation, then they will carry equal currents
BASIC CURRENT MIRRORVDD
R
M2M1
IoIREF
The most basic current mirror circuit consists of 2 matching MOSFET transistors connected back to back, such that both have the same Gate-to-Source voltage.
Given: (*) The two enhancement-type NMOS transistors have matching features, as follows: VTH,1 = VTH,2 , kn,1’ = kn,2’, λ1 = λ2 =0(*) “By structure” we have that VGS,1 = VGS,2
(*) Typically the supply VDD, resistor R and a desired reference current IREF are all given.(*) The ratio (W/L)1 is not necessarily equal to the ratio (W/L)2
(*) “By structure” we have that VGD,1 = 0, and because the transistor is an enhancement-type, this guarantees that transistor 1 is always in Saturation Mode
BASIC CURRENT MIRROR (cont’d)
Need: Using the transistors geometries (W/L)1 and (W/L)2 as design parameters, we want to create a DC current Io, as long as transistor M2 is in Saturation Mode
VDD
R
M2M1
IoIREF
BASIC CURRENT MIRROR (cont’d)
VDD
R
M2M1
IoIREF
The Drain of transistor M2 is connected to a load circuit, not necessarily a resistor. The load circuit typically involves one or more additional MOSFET transistors. Depending on the load, transistor M2 may be in any of three modes: Saturation, Triode or Cutoff. Of course, only when it is in Saturation it will work as originally planned (a DC current source)
BASIC CURRENT MIRROR (cont’d)
VDD
R
M2M1
IoIREF
The current Io always goes away from the load circuit and into M2. Such a DC current source is said to be a sink.
BASIC CURRENT MIRROR (cont’d)
Design of a Current Mirror DC Sink
We shall look first at M1:
R
VV
VVL
WkII
GSDD
THGSnREFD
1,
21,1,11,1 )()('
2
1
So, indeed if IREF is specified and VDD and R are given,
then by the right-hand term the needed voltage VGS,1 is
specified. Then, using the middle term, need to solve for (W/L)1.
VDD
R
M2M1
IoIREF
Example 1:
Let VDD = 5V, VTH,1 = 1V, kn,1' = 20μA/V2 and R = 1KΩ.What should be (W/L)1 needed for creating IREF = 1mA?
VDD
R
M2M1
IoIREF
VVV
R
VVmAI GS
GSGSDDREF 4
1
51 1,
1,1,
11.11)(
)14()(10202
1)()('
2
11
1
21
321,1,11,
L
WL
WVV
L
WkmAI THGSnREF
22,2,2
2 2
1THGSoxnDO VV
L
WCII
21,1,1
1 2
1THGSoxnDREF VV
L
WCII
1
2
/
/
LW
LW
I
I
REF
O
Neglect CLM = 0
IO VO
+
-
VDD
R
M2M1
IOIREF
ID1
ID2
VO+
-
Let us now focus our attention on the "mirror" transistor M2:
We now divide the two equations and use all the given matching parameters of the two transistors.
Example 2 (Follow-up to Example 1)
What should be (W/L)2 if we want Io = 7mA?SolutionBy Example 1 we have that IREF = 1mA and (W/L)1 = 11.11. Therefore:
77.77)(11.11
)(
1
7
)(
)(
2
2
1
2
L
WLW
mA
mA
LWLW
I
I
REF
o
VDD
R
M2M1
IoIREF
Question: What do we do if we want to create a source DC current
source, rather than a sink ?[A "source" is when the current goes from the current
source into the load circuit]
Answer: If we build a current mirror current source using PMOS
transistors (rather than NMOS) then the output DC current will be "sourced" and not "sunk".
Question: If we need to generate multiple different DC current
sources and sinks, what is the total number of resistors needed for the design?
Answer: Just one resistor for the entire circuit!
Current Steering
The use of a negative DC supply –VSS does not change the fact that, by-structure, both transistors, in every mirror pair, have the same VGS voltage.
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
Recalculation of Reference Current
R
VVVVV
L
WkII GSSSDD
THGSnREFD
)()()('
2
1 1,21,1,11,1,
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
NMOS Current Mirror Sinks:
1
22
)(
)(
LWLW
I
I
REF
1
33
)(
)(
LWLW
I
I
REF
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
Current Steering Mechanism:
The Drain current of the NMOS transistor M3 comes from the Drain of the PMOS transistor M4.
I4 = I3
Can "steer" a current from NMOS current mirror to PMOS current mirror, or vice versa.
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
There is no need for the NMOS and PMOS to be matching: Only all the NMOS transistors must match among
themselves, and the PMOS transistors must be mutually matching.
Current Steering Mechanism:
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
PMOS Current Mirror
For the PMOS transistors M4 and M5, the following parameters must match:
VTH,4 = VTH,5 , kp,4’ = kp,5’, λ4 = λ5
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
4
5
4
5
)(
)(
L
WL
W
I
I
We can now relate the sourced current I5 to the reference current IREF:
4
5
1
3
4
5
3
435
)(
)(1
)(
)(
LWLW
LWLW
I
I
I
I
I
I
I
I
REFREF
4
5
1
35
)(
)(
)(
)(
LWLW
LWLW
I
I
REF
1) We need only one resistor R, no matter how large is the number of DC currents generated.
2) By using current steering we can create sourcing currents from sinking currents or vice versa.
3) The reference current can reside either in a NMOS current mirror or in a PMOS current mirror.
Summary:
Given: VDD = 5V, VSS = 0VTH,1 = VTH,2 = VTH,3 = 1V, kn,1' = kn,2'=kn,3'= 20μA/V2 and R = 1KΩ.VTH,4 = VTH,5 = -1V, kp,4' = kp,5'= 30μA/V2
Need: A reference current of IREF = 1mA, one sink current of 7mA and one source current of 5mA.
Question: Using the diagram scheme just discussed, what should be all (W/L) ratios of all five transistors?
Example ( a follow-up to the previous example)
The beginning of the solution is identical to what has been done in the previous examples. Let's quote the results: (W/L)1 = 11.11 and (W/L)2 = 77.77mA. Current I2 is then the desired sink current
Solution:
M2M1
M3
M4 M5
VDDVDD
VDD
R I2IREF
I3
I4 I5
-VSS -VSS
-VSS
Now:
4
53
4
5
1
35
)(
)(
11.11
)(
)(
)(
)(
)(
1
5
LWLW
LW
LWLW
LWLW
mA
mA
I
I
REF
There are infinitely many choices for the geometric dimensions of transistors M3, M4 and M5. For
instance, we may take (W/L)3 = 11.11, (W/L)4 = 10
and (W/L)5 = 50. Current I5 is then the required
source current.
The channel-length modulation effect may be responsible for errors in the operation of a Current Mirror Current Source. For instance, depending on the load of M2 we may get VDS,2 ≠ VDS,1. As a result the value of I2 will slightly vary, depending on the load. It means that the current source is not ideal - it has a finite output resistance, equal to ro of the respective output transistor.
MULTIPLE CURRENT MIRROR
Since there is no gate current in a MOSFET, a number of MOSFETs can be connected to a single reference MOSFET M1. Different output currents can be obtained by suitably adjusting the width-to-length ratios of MOSFETs (i.e. M2 and M3). In practice, the gate length, L is normally kept constant and the gate width, W of M2, M3, and M4 gives the relationship of the output currents I2, I3, and I4 to IR as I2 = (W2 /W1)IR, I3 = (W3 /W1)IR, and I4 = (W4 /W1)IR
The small-signal output resistance of the current source is, Ro = rds1 = 1/ID1
CASCODE CURRENT MIRROR
U s i n g K V L a n d t h e r e l a t i o n xogs irv 21 , w e g e t
xoxomxoxogsmxoxoox irirgirirvgiririrv 22112111211 )()( w h i c h g i v e s t h e o u t p u t r e s i s t a n c e OR o f t h e c u r r e n t s o u r c e a s
2211 )1( oomoO rrgrR
F o r i d e n t i c a l t r a n s i s t o r s , ooo rrr 21 a n d oR b e c o m e s2
111 )2( omomoO rgrgrR
WILSON CURRENT MIRROR
Applying KVL , we get
2
111 )(m
xogsmxx g
irvgiv
which, after substituting for 1gsv
and simplifying, gives
the output resistance OR as
)1(
)1(1
3311
331
2
1
2
1
omoo
omo
m
m
m
o
x
xO
rgrr
rgrgg
gr
iv
R
for 321 mmm ggg The drain voltages 1DV and 3DV of 1M and 3M are unequal. Therefore,
drain currents 1DI and 3DI are also unequal. This problem can be
solved by adding one diode-connected MOSFET.