CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates...

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CT455: Computer Organization CT455: Computer Organization Logic gate Logic gate

Transcript of CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates...

Page 1: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CT455: Computer OrganizationCT455: Computer OrganizationLogic gateLogic gate

Page 2: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Lecture 4:Lecture 4:Logic Gates and CircuitsLogic Gates and Circuits

Logic GatesLogic Gates The InverterThe Inverter The AND GateThe AND Gate The OR GateThe OR Gate The NAND GateThe NAND Gate The NOR GateThe NOR Gate The XOR GateThe XOR Gate The XNOR GateThe XNOR Gate

Drawing Logic CircuitDrawing Logic Circuit Analysing Logic CircuitAnalysing Logic Circuit Propagation DelayPropagation Delay

Page 3: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Lecture 4:Lecture 4: Logic Gates and Circuits Logic Gates and Circuits

Universal Gates: NAND and NORUniversal Gates: NAND and NOR NAND GateNAND Gate NOR GateNOR Gate

Implementation using NAND GatesImplementation using NAND Gates

Implementation using NOR GatesImplementation using NOR Gates

Implementation of SOP ExpressionsImplementation of SOP Expressions

Implementation of POS ExpressionsImplementation of POS Expressions

Positive and Negative LogicPositive and Negative Logic

Integrated Circuit Logic FamiliesIntegrated Circuit Logic Families

Page 4: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Digital (logic) Elements: Digital (logic) Elements: GatesGates

Digital devices or gates have one or more inputs and Digital devices or gates have one or more inputs and produce an output that is a function of the current produce an output that is a function of the current input value(s).input value(s).

All inputs and outputs are binary and can only take All inputs and outputs are binary and can only take the values 0 or 1the values 0 or 1

A gate is called a combinational circuit because the A gate is called a combinational circuit because the output only depends on the current input combination. output only depends on the current input combination.

Digital circuits are created by using a number of Digital circuits are created by using a number of connected gates such as the output of a gate is connected gates such as the output of a gate is connected to to the input of one or more gates in such connected to to the input of one or more gates in such a way to achieve specific outputs for input values. a way to achieve specific outputs for input values.

Digital or logic design is concerned with the design of Digital or logic design is concerned with the design of such circuits.such circuits.

Page 5: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

IntroductionIntroductionHardware consists of a few simple building blocksHardware consists of a few simple building blocks These are called These are called logic gateslogic gates

AND, OR, NOT, … AND, OR, NOT, …

NAND, NOR, XOR, …NAND, NOR, XOR, …

Logic gates are built using transistorsLogic gates are built using transistors

NOT gate can be implemented by a single NOT gate can be implemented by a single transistortransistor

AND gate requires 3 transistorsAND gate requires 3 transistors

Transistors are the fundamental devicesTransistors are the fundamental devices

Pentium consists of 3 million transistorsPentium consists of 3 million transistors

Compaq Alpha consists of 9 million transistorsCompaq Alpha consists of 9 million transistors

Now we can build chips with more than 100 Now we can build chips with more than 100 million transistorsmillion transistors

Page 6: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic GatesLogic Gates

Gate SymbolsGate Symbols

EXCLUSIVE OR

a

ba.b

a

ba+b

a a'

a

b(a+b)'

a

b(a.b)'

a

ba b

a

ba.b&

a

ba+b1

AND

a a'1

a

b(a.b)'&

a

b(a+b)'1

a

ba b=1

OR

NOT

NAND

NOR

Symbol set 1 Symbol set 2

(ANSI/IEEE Standard 91-1984)

Page 7: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Truth TablesTruth TablesProvides a Provides a listinglisting of every possible combination of values of every possible combination of values of binary inputs to a digital circuit and the corresponding of binary inputs to a digital circuit and the corresponding outputs.outputs.

x y x . y x + y0 0 0 00 1 0 11 0 0 11 1 1 1

INPUTS OUTPUTS… …… …

Example (2 inputs, 2 outputs):Example (2 inputs, 2 outputs):

Digital circuit

inputs outputs

x

y

inputs outputs

x + y

x . y

Truth table

Page 8: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Basic ConceptsBasic ConceptsSimple gatesSimple gates ANDAND OROR NOTNOT

Functionality can be Functionality can be expressed by a truth expressed by a truth tabletable A truth table lists A truth table lists

output for each output for each possible input possible input combinationcombination

Other methodsOther methods Logic expressionsLogic expressions Logic diagramsLogic diagrams

Page 9: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Basic Concepts (cont’d)Basic Concepts (cont’d)Additional useful Additional useful gatesgates NANDNAND NORNOR XORXORNAND = AND + NOTNAND = AND + NOTNOR = OR + NOTNOR = OR + NOTXOR implements XOR implements exclusive-OR functionexclusive-OR functionNAND and NOR gates NAND and NOR gates require only 2 require only 2 transistorstransistors AND and OR need 3 AND and OR need 3

transistors!transistors!

Page 10: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Realizing Logic in HardwareRealizing Logic in HardwareBoolean Algebra and truth tables are essential important Boolean Algebra and truth tables are essential important tools to express logical relationships.tools to express logical relationships.

To use these tools in the real world , we must have some To use these tools in the real world , we must have some physical way to represent TRUE and FALSE (T and F).physical way to represent TRUE and FALSE (T and F).

In, digital electronic circuits, T and F are represented by In, digital electronic circuits, T and F are represented by

voltage levelsvoltage levels: : The transistor-transistor logic (TTL) 74LS family of digital The transistor-transistor logic (TTL) 74LS family of digital

integrated circuits produces two voltage levels:integrated circuits produces two voltage levels:

< .5V which represents low voltage L (0) and,< .5V which represents low voltage L (0) and,

> 2.7V which represents high voltage H (1) for > 2.7V which represents high voltage H (1) for the digital device.the digital device.

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CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Electronic Logic Gates Electronic Logic Gates

Electrical Signals and Logic ValuesElectrical Signals and Logic Values

A signal that is set to logic 1 is said to be A signal that is set to logic 1 is said to be assertedasserted, , activeactive, or , or truetrue..

An An active-highactive-high signal is asserted when it is high signal is asserted when it is high (positive logic).(positive logic).

An An active-lowactive-low signal is asserted when it is low signal is asserted when it is low (negative logic).(negative logic).

Electric Signal Logic ValuePositive Logic Negative Logic

High Voltage (H) 1 0Low Voltage (L) 0 1

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Logic Gates: The InverterLogic Gates: The Inverter

The The InverterInverterA A'

0 11 0

A A' A A'

Application of the inverter: complement.Application of the inverter: complement.

1

0

0

1

0

1

0

1

1

0

0

1

1

0

1

0

Binary number

1’s Complement

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Logic Gates: The AND GateLogic Gates: The AND Gate

The The ANDAND Gate Gate

A B A . B0 0 00 1 01 0 01 1 1

A

BA.B

&A

BA.B

Page 14: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic Gates: The AND GateLogic Gates: The AND Gate

Application of the AND GateApplication of the AND Gate

1 sec

A

1 secEnable

A

EnableCounter

Reset to zero between Enable pulses

Register, decode and frequency display

Page 15: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic Gates: The OR GateLogic Gates: The OR Gate

The The OROR Gate Gate

1

A

BA+B

A

BA+B

A B A + B0 0 00 1 11 0 11 1 1

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Logic Gates: The NAND GateLogic Gates: The NAND Gate

The The NANDNAND Gate Gate

&A

B(A.B)'

A

B(A.B)'

A

B(A.B)'

NAND Negative-OR

A B (A.B)'0 0 10 1 11 0 11 1 0

Page 17: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic Gates: The NOR GateLogic Gates: The NOR Gate

The The NORNOR Gate Gate

NOR Negative-AND

1

A

B(A+B)'A

B(A+B)'

A

B(A+B)'

A B (A+B)'0 0 10 1 01 0 01 1 0

Page 18: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic Gates: The XOR GateLogic Gates: The XOR Gate

The The XORXOR Gate Gate

=1A

BA B

A

BA B

A B A B0 0 00 1 11 0 11 1 0

Page 19: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Logic Gates: The XNOR GateLogic Gates: The XNOR Gate

The The XNORXNOR Gate Gate

A

B(A B)'

=1A

B(A B)'

A B (A B) '0 0 10 1 01 0 01 1 1

Page 20: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Basic Concepts (cont’d)Basic Concepts (cont’d)Proving NAND gate is universalProving NAND gate is universal

Page 21: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Basic Concepts (cont’d)Basic Concepts (cont’d)Proving NOR gate is universalProving NOR gate is universal

Page 22: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Drawing Logic CircuitDrawing Logic Circuit

When a Boolean expression is provided, we can When a Boolean expression is provided, we can easily draw the logic circuit.easily draw the logic circuit.

Examples:Examples:

(i) F1 = xyz' (note the use of a 3-input AND gate)(i) F1 = xyz' (note the use of a 3-input AND gate)

xy

z

F1

z'

Page 23: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Drawing Logic CircuitDrawing Logic Circuit

(ii) F2 = x + y'z (can assume that variables and their (ii) F2 = x + y'z (can assume that variables and their complements are available) complements are available)

(iii) F3 = xy' + x'z

x

y'z

F2

y'z

x'z

F3

x'z

xy'xy'

Page 24: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Analysing Logic CircuitAnalysing Logic Circuit

When a logic circuit is provided, we can analyse the When a logic circuit is provided, we can analyse the circuit to obtain the logic expression.circuit to obtain the logic expression.

Example: What is the Boolean expression of F4?Example: What is the Boolean expression of F4?

A'B'

A'B'+C (A'B'+C)'

A'

B'

CF4

F4 = (A'B'+C)' = (A+B).C'

Page 25: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Logic Functions Logic Functions (cont’d)(cont’d)

3-input majority 3-input majority functionfunction

AA BB CC FF

00 00 00 0000 00 11 0000 11 00 0000 11 11 1111 00 00 0011 00 11 1111 11 00 1111 11 11 11

Logical expression Logical expression formform

F = A B + B C + F = A B + B C + A CA C

Page 26: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Propagation DelayPropagation Delay

Every logic gate experiences some delay (though Every logic gate experiences some delay (though very small) in propagating signals forward.very small) in propagating signals forward.

This delay is called This delay is called Gate (Propagation) DelayGate (Propagation) Delay..

Formally, it is the average transition time taken for Formally, it is the average transition time taken for the output signal of the gate to change in response to the output signal of the gate to change in response to changes in the input signals.changes in the input signals.

Three different propagation delay times associated Three different propagation delay times associated with a logic gate:with a logic gate:

ttPHLPHL: output changing from the High level to Low level: output changing from the High level to Low level

ttPLHPLH: output changing from the Low level to High level: output changing from the Low level to High level

ttPDPD=(t=(tPLH PLH + t+ tPHLPHL)/2 (average propagation delay))/2 (average propagation delay)

Page 27: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Propagation DelayPropagation Delay

Input Output

Output

InputH

L

L

H

tPHL tPLH

Page 28: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Propagation DelayPropagation Delay

A B C

Ideally, no Ideally, no delay:delay:

1

0

1

0

0

1

time

Signal for C

Signal for B

Signal for A

In reality, output signals In reality, output signals normally lag behind normally lag behind input signals:input signals:1

0

1

0

0

1

time

Signal for C

Signal for B

Signal for A

Page 29: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Calculation of Circuit DelaysCalculation of Circuit Delays

Amount of propagation delay per gate depends on:Amount of propagation delay per gate depends on: (i) gate type (AND, OR, NOT, etc)(i) gate type (AND, OR, NOT, etc) (ii) transistor technology used (TTL,ECL,CMOS etc),(ii) transistor technology used (TTL,ECL,CMOS etc), (iii) miniaturisation (SSI, MSI, LSI, VLSI) (iii) miniaturisation (SSI, MSI, LSI, VLSI)

To simplify matters, one can assume To simplify matters, one can assume (i) an average delay time per gate, or(i) an average delay time per gate, or (ii) an average delay time per gate-type.(ii) an average delay time per gate-type.

Propagation delay of logic circuitPropagation delay of logic circuit= longest time it takes for the input signal(s) to propagate to the = longest time it takes for the input signal(s) to propagate to the

output(s).output(s).

= earliest time for output signal(s) to stabilise, given that input = earliest time for output signal(s) to stabilise, given that input signals are stable at time 0.signals are stable at time 0.

Page 30: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Calculation of Circuit DelaysCalculation of Circuit Delays

In general, given a logic gate with delay, t.In general, given a logic gate with delay, t.

If inputs are stable at times t1,t2,..,tn, respectively; then the earliest time in which the output will be stable is:

max(t1, t2, .., tn) + t

LogicGate

t1

t2

tn

: :

max (t1, t2, ..., tn ) + t

To calculate the delays of all outputs of a To calculate the delays of all outputs of a combinational circuit, repeat above rule for all gates.combinational circuit, repeat above rule for all gates.

Page 31: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Calculation of Circuit DelaysCalculation of Circuit Delays

As a simple example, consider the full adder circuit As a simple example, consider the full adder circuit where all inputs are available at time 0. (Assume where all inputs are available at time 0. (Assume each gate has delay t.)each gate has delay t.)

where outputs S and C, experience delays of 2t and 3t, respectively.

XY S

C

Z

max(0,0)+t = t

t

0

0

0

max(t,0)+t = 2t

max(t,2t)+t = 3t2t

Page 32: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Universal Gates: NAND and NORUniversal Gates: NAND and NOR

AND/OR/NOT gates are sufficient for building any AND/OR/NOT gates are sufficient for building any Boolean functions.Boolean functions.

We call the set {AND, OR, NOT} a We call the set {AND, OR, NOT} a complete setcomplete set of of logic.logic.

However, other gates are also used because:However, other gates are also used because:(i) usefulness(i) usefulness(ii) economical on transistors(ii) economical on transistors(iii) self-sufficient(iii) self-sufficient

NAND/NOR: economical, self-sufficientNAND/NOR: economical, self-sufficientXOR: useful (e.g. parity bit generation)XOR: useful (e.g. parity bit generation)

Page 33: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

NAND GateNAND Gate

NAND gate is NAND gate is self-sufficientself-sufficient (can build any logic (can build any logic circuit with it).circuit with it).

Therefore, {NAND} is also a complete set of logic.Therefore, {NAND} is also a complete set of logic.

Can be used to implement AND/OR/NOT.Can be used to implement AND/OR/NOT.

Implementing an inverter using NAND gate:Implementing an inverter using NAND gate:

(x.x)' = x' (T1: idempotency)

x x'

Page 34: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

NAND GateNAND Gate

((xy)'(xy)')' = ((xy)')' idempotency = (xy) involution

((xx)'(yy)')' = (x'y')' idempotency = x''+y'' DeMorgan = x+y involution

Implementing AND using NAND gates:Implementing AND using NAND gates:

Implementing OR using NAND gates:Implementing OR using NAND gates:

xx.y

y

(x.y)'

x

x+y

y

x'

y'

Page 35: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

NOR GateNOR Gate

NOR gate is also self-sufficient.NOR gate is also self-sufficient. Therefore, {NOR} is also a complete set of logicTherefore, {NOR} is also a complete set of logic

Can be used to implement AND/OR/NOT.Can be used to implement AND/OR/NOT.

Implementing an inverter using NOR gate:Implementing an inverter using NOR gate:

(x+x)' = x' (T1: idempotency)

x x'

Page 36: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

NOR GateNOR Gate

((x+x)'+(y+y)')'=(x'+y')' idempotency = x''.y'' DeMorgan = x.y involution

((x+y)'+(x+y)')' = ((x+y)')' idempotency = (x+y) involution

Implementing AND using NOR gates:Implementing AND using NOR gates:

Implementing OR using NOR gates:Implementing OR using NOR gates:

xx+y

y

(x+y)'

x

x.y

y

x'

y'

Page 37: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation using NAND Implementation using NAND gatesgates

Possible to implement any Boolean expression using Possible to implement any Boolean expression using NAND gates.NAND gates.

Procedure:Procedure:

(i) (i) Obtain sum-of-products Boolean expression:Obtain sum-of-products Boolean expression:

e.g. F3 = xy'+x'ze.g. F3 = xy'+x'z

(ii) (ii) Use DeMorgan theorem to obtain expression Use DeMorgan theorem to obtain expression using 2-level NAND gatesusing 2-level NAND gates

e.g. F3 = xy'+x'ze.g. F3 = xy'+x'z

= (xy'+x'z)' ' involution= (xy'+x'z)' ' involution

= ((xy')' . (x'z)')' DeMorgan= ((xy')' . (x'z)')' DeMorgan

Page 38: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation using NAND gatesImplementation using NAND gates

F3 = ((xy')'.(x'z)') ' = xy' + x'z

x'z

F3

(x'z)'

(xy')'xy'

Page 39: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation using NOR gatesImplementation using NOR gates

Possible to implement any Boolean expression using Possible to implement any Boolean expression using NOR gates.NOR gates.

Procedure:Procedure:

(i) (i) Obtain product-of-sums Boolean expression:Obtain product-of-sums Boolean expression:

e.g. F6 = (x+y').(x'+z)e.g. F6 = (x+y').(x'+z)

(ii) (ii) Use DeMorgan theorem to obtain expression Use DeMorgan theorem to obtain expression using 2-level NOR gates.using 2-level NOR gates.

e.g. F6 = (x+y').(x'+z)e.g. F6 = (x+y').(x'+z)

= ((x+y').(x'+z))' ' involution= ((x+y').(x'+z))' ' involution

= ((x+y')'+(x'+z)')' DeMorgan= ((x+y')'+(x'+z)')' DeMorgan

Page 40: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation using NOR gatesImplementation using NOR gates

F6 = ((x+y')'+(x'+z)')'

= (x+y').(x'+z)

x'z

F6

(x'+z)'

(x+y')'xy'

Page 41: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Logical EquivalenceLogical EquivalenceAll three circuits implement F = A B functionAll three circuits implement F = A B function

Page 42: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Logical Equivalence (cont’d)Logical Equivalence (cont’d)

Derivation of logical expression from a circuitDerivation of logical expression from a circuit Trace from the input to outputTrace from the input to output

Write down intermediate logical expressions along the Write down intermediate logical expressions along the pathpath

Page 43: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Logical Equivalence (cont’d)Logical Equivalence (cont’d)Proving logical equivalence: Truth table methodProving logical equivalence: Truth table method

AA B B F1 = A BF1 = A B F3 = (A + B) (A + B) (A F3 = (A + B) (A + B) (A + B)+ B)

00 0 0 0 0 0 0

00 1 1 0 0 0 0

11 0 0 0 0 0 0

11 1 1 1 1 1 1

Page 44: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation of SOP ExpressionsImplementation of SOP Expressions

Sum-of-Products expressions can be implemented Sum-of-Products expressions can be implemented using:using:

2-level AND-OR logic circuits2-level AND-OR logic circuits 2-level NAND logic circuits2-level NAND logic circuits

AND-OR logic circuitAND-OR logic circuit

F = AB + CD + E

F

A

B

D

C

E

Page 45: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation of SOP ExpressionsImplementation of SOP Expressions

NAND-NAND circuit (by NAND-NAND circuit (by circuit transformation)circuit transformation)

a) add double bubblesa) add double bubbles

b) change OR-with- b) change OR-with- inverted-inputs to NAND inverted-inputs to NAND & bubbles at inputs to& bubbles at inputs to their complementstheir complements

F

A

B

D

C

E

A

B

D

C

E'

F

Page 46: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Deriving Logical Expressions (cont’d)Deriving Logical Expressions (cont’d)

3-input majority function3-input majority function

AA BB CC FF

00 00 00 0000 00 11 0000 11 00 0000 11 11 1111 00 00 0011 00 11 1111 11 00 1111 11 11 11

SOP logical expressionSOP logical expression

Four product termsFour product terms Because there are 4 rows with a Because there are 4 rows with a

1 output1 output

F = A B C + A B C +A B C + A B CF = A B C + A B C +A B C + A B C

Sigma notationSigma notation

S(3, 5, 6, 7)S(3, 5, 6, 7)

Page 47: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Brute Force Method of ImplementationBrute Force Method of Implementation

3-input even-parity 3-input even-parity functionfunction

AA BB CC FF

00 00 00 0000 00 11 1100 11 00 1100 11 11 0011 00 00 1111 00 11 0011 11 00 0011 11 11 11

SOP implementationSOP implementation

Page 48: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation of POS ExpressionsImplementation of POS Expressions

Product-of-Sums expressions can be implemented Product-of-Sums expressions can be implemented using:using:

2-level OR-AND logic circuits2-level OR-AND logic circuits 2-level NOR logic circuits2-level NOR logic circuits

OR-AND logic circuitOR-AND logic circuit

G = (A+B).(C+D).E

G

A

B

D

C

E

Page 49: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Implementation of POS ExpressionsImplementation of POS Expressions

NOR-NOR circuit (by NOR-NOR circuit (by circuit transformation):circuit transformation):

a) add double bubblesa) add double bubbles

b) changed AND-with-b) changed AND-with- inverted-inputs to NORinverted-inputs to NOR & bubbles at inputs to& bubbles at inputs to their complementstheir complements

G

A

B

D

C

E

A

B

D

C

E'

G

Page 50: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Deriving Logical Expressions Deriving Logical Expressions (cont’d)(cont’d)

3-input majority 3-input majority functionfunction

AA BB CC FF

00 00 00 0000 00 11 0000 11 00 0000 11 11 1111 00 00 0011 00 11 1111 11 00 1111 11 11 11

POS logical expressionPOS logical expression

Four sum termsFour sum terms Because there are 4 Because there are 4

rows with a 0 outputrows with a 0 output

F = (A + B + C) (A + B + C)F = (A + B + C) (A + B + C)

(A + B + C) (A + B + C)(A + B + C) (A + B + C)

Pi notationPi notation

(0, 1, 2, 4 )(0, 1, 2, 4 )

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CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Brute Force Method of Brute Force Method of ImplementationImplementation

3-input even-parity 3-input even-parity functionfunction

AA BB CC FF

00 00 00 0000 00 11 1100 11 00 1100 11 11 0011 00 00 1111 00 11 0011 11 00 0011 11 11 11

POS implementationPOS implementation

Page 52: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Positive & Negative LogicPositive & Negative Logic In logic gates, usually:In logic gates, usually:

H (high voltage, 5V) = 1H (high voltage, 5V) = 1 L (low voltage, 0V) = 0L (low voltage, 0V) = 0

This convention – This convention – positive logicpositive logic..

However, the reverse convention, However, the reverse convention, negative logicnegative logic possible:possible:

H (high voltage) = 0H (high voltage) = 0 L (low voltage) = 1L (low voltage) = 1

Depending on convention, same gate may denote Depending on convention, same gate may denote different Boolean function.different Boolean function.

Page 53: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Positive & Negative LogicPositive & Negative Logic

A signal that is set to logic 1 is said to be A signal that is set to logic 1 is said to be assertedasserted, or , or activeactive, or, or truetrue..

A signal that is set to logic 0 is said to be A signal that is set to logic 0 is said to be deasserteddeasserted, , or or negatednegated, or , or falsefalse..

Active-high signal names are usually written in Active-high signal names are usually written in uncomplemented form.uncomplemented form.

Active-low signal names are usually written in Active-low signal names are usually written in complemented form.complemented form.

Page 54: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Positive & Negative LogicPositive & Negative Logic

Positive logic:Positive logic:

Negative logic:Negative logic:

EnableActive High: 0: Disabled 1: Enabled

Enable

Active Low: 0: Enabled 1: Disabled

Page 55: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Integrated Circuit Logic FamiliesIntegrated Circuit Logic Families

Some digital integrated circuit families: TTL, CMOS, Some digital integrated circuit families: TTL, CMOS, ECL.ECL.

TTLTTL: : TTransistor-ransistor-TTransistor ransistor LLogic. ogic. Uses bipolar junction transistorsUses bipolar junction transistors

Consists of a series of logic circuits: standard TTL, low-Consists of a series of logic circuits: standard TTL, low-power TTL, Schottky TTL, low-power Schottky TTL, power TTL, Schottky TTL, low-power Schottky TTL, advanced Schottky TTL, etc.advanced Schottky TTL, etc.

Page 56: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Integrated Circuit Logic FamiliesIntegrated Circuit Logic Families

TTL Series Prefix Designation Example of Device

Standard TTL 54 or 74 7400 (quad NAND gates)

Low-power TTL 54L or 74L 74L00 (quad NAND gates)

Schottky TTL 54S or 74S 74S00 (quad NAND gates)

Low-powerSchottky TTL

54LS or 74LS 74LS00 (quad NAND gates)

Page 57: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Integrated Circuit Logic FamiliesIntegrated Circuit Logic Families

CMOSCMOS: : CComplementary omplementary MMetal-etal-OOxide xide SSemiconductor.emiconductor. Uses field-effect transistorsUses field-effect transistors

ECLECL: : EEmitter mitter CCoupled oupled LLogic. ogic. Uses bipolar circuit technology.Uses bipolar circuit technology.

Has fastest switching speed but high power consumption.Has fastest switching speed but high power consumption.

Page 58: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Integrated Circuit Logic FamiliesIntegrated Circuit Logic Families

Performance characteristicsPerformance characteristics Propagation delay time.Propagation delay time.

Power dissipation.Power dissipation.

Fan-outFan-out: Fan-out of a gate is the maximum number of : Fan-out of a gate is the maximum number of inputs that the gate can drive.inputs that the gate can drive.

Speed-power product (SPP): product of the propagation Speed-power product (SPP): product of the propagation delay time and the power dissipation.delay time and the power dissipation.

Page 59: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Drawing Logic CircuitsDrawing Logic Circuits

When a Boolean expression is provided, When a Boolean expression is provided, we can easily draw the logic circuit.we can easily draw the logic circuit.

Examples:Examples:

F1 = xyz'F1 = xyz'

(note the use of a 3-input AND gate)(note the use of a 3-input AND gate)

xy

z

F1

z'

Page 60: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Analysing Logic CircuitsAnalysing Logic Circuits

When a logic circuit is provided, we can analyse When a logic circuit is provided, we can analyse the circuit to obtain the logic expression.the circuit to obtain the logic expression.

Example: What is the Boolean expression of F4?Example: What is the Boolean expression of F4?

A'B'A'B'+C (A'B'+C)'

A'

B'

CF4

F4 = (A'B'+C)'

Page 61: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Analysing Logic CircuitAnalysing Logic Circuit

Example: What is Boolean expression of F5?Example: What is Boolean expression of F5?

z

F5

x

y

F5 =

Page 62: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Simple Circuit Design: Two-input Simple Circuit Design: Two-input MultiplexerMultiplexer

Multiplexer with two input bits, A, B and a control input Multiplexer with two input bits, A, B and a control input bit S and output Z. Depending on the value of S, the bit S and output Z. Depending on the value of S, the circuit is to transfer either the the value of A or B to the circuit is to transfer either the the value of A or B to the output Zoutput Z

AA

BB

ZZ

SSS A B ZS A B Z0 0 0 00 0 0 00 0 1 00 0 1 00 1 0 10 1 0 10 1 1 10 1 1 11 0 0 01 0 0 01 0 1 11 0 1 11 1 0 01 1 0 01 1 1 11 1 1 1

Truth table from circuit description

Using logic design methods(to be studied later) we get theoptimal logic function for Z

Z = S’. A + S . B

B

Z

A

S

S’. A

S . BS’. A + S . B

Page 63: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (1)Analysis of Combinational Circuits (1)

Digital Circuit Digital Circuit DesignDesign:: Word description of a functionWord description of a function

a set of switching equationsa set of switching equations

hardware realization (gates, programmable logic devices, etc.)hardware realization (gates, programmable logic devices, etc.)

Digital Circuit Digital Circuit AnalysisAnalysis:: Hardware realizationHardware realization

switching expressions, truth tables, timing diagrams, etc.switching expressions, truth tables, timing diagrams, etc.

Analysis is used Analysis is used To determine the behavior of the circuitTo determine the behavior of the circuit To verify the correctness of the circuitTo verify the correctness of the circuit To assist in converting the circuit to a different form.To assist in converting the circuit to a different form.

Page 64: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (2)Analysis of Combinational Circuits (2)

Algebraic MethodAlgebraic Method: Use switching algebra to derive a desired : Use switching algebra to derive a desired form.form.

ExampleExample 2.332.33: Find a simplified switching expressions and logic : Find a simplified switching expressions and logic network for the following logic circuit (Fig. 2.21a).network for the following logic circuit (Fig. 2.21a).

a

c

b

a

bc

P1

P2

P3

P4

f (a, b, c)

(a)

Page 65: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (3)Analysis of Combinational Circuits (3)

Write switching expression for each gate output:Write switching expression for each gate output:

The output is:The output is:

Simplify the output function using switching algebra:Simplify the output function using switching algebra:

[Eq. 2.24][Eq. 2.24]

[T8][T8]

[T5(b)][T5(b)]

[T4(a)] [T4(a)] = = b cb c [Eq. 2.32][Eq. 2.32]

Therefore, Therefore, f f ((a,b,ca,b,c) = () = (bb cc)' = )' =

,1 abP ,2 caP ,3 cbP )(214 caabPPP

)()(),,( 43 caabcbPPcbaf

),,( cbaf caabcb )(

caabcbbc

cabacbbc )(

cbacbbc cbbc

),,( cbaf

cb

bc

f (a, b, c)

Page 66: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (4)Analysis of Combinational Circuits (4)

ExampleExample 2.342.34: Find a simplified switching expressions and logic : Find a simplified switching expressions and logic network for the following logic circuit (Fig. 2.22).network for the following logic circuit (Fig. 2.22).

a

c

b

b

ab

f (a, b, c)

ca

Given circuit

a + b

a b

b c

a + c

a + b + a + c

(a b)(b c)

Page 67: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (5)Analysis of Combinational Circuits (5)

Derive the output expression:Derive the output expression:

ff((a,b,ca,b,c))

==

== [T8(b)][T8(b)]

== [T8(a)][T8(a)]

== [Eq. 2.24][Eq. 2.24]

== [P5(b)][P5(b)]

== [P6(b), T4(a)] [P6(b), T4(a)]

== [T4(a)][T4(a)]

== [T9(a)][T9(a)]

== [T7(a)][T7(a)]

== [Eq. 2.24][Eq. 2.24]

)())(( cabacbba )))(( cabacbba

))(())(( cabacbba ))(())(( cabacbcbbaba

cbbacaaacbbacbbacbbacbba cbbacacbacba

cbbacacba bacacba

bacaba

baca

Simplified circuit

b

c

a

a

f (a, b, c)

Page 68: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (6)Analysis of Combinational Circuits (6)

Truth Table MethodTruth Table Method: Derive the truth table one gate at a time.: Derive the truth table one gate at a time.

The truth table for Example 2.34:The truth table for Example 2.34:

abc f(a,b,c)000 0 0 0001 1 0 1010 0 1 1011 1 1 1100 0 1 1101 0 1 1110 0 0 0111 0 0 0

ca ba

Page 69: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (7)Analysis of Combinational Circuits (7)

Analysis of Timing DiagramsAnalysis of Timing Diagrams Timing diagramTiming diagram is a graphical representation of is a graphical representation of

input and output signal relationships over the time input and output signal relationships over the time dimension.dimension.

Timing diagrams may show intermediate signals Timing diagrams may show intermediate signals and propagation delays.and propagation delays.

Page 70: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Analysis of Combinational Circuits (8)Analysis of Combinational Circuits (8)

Example 2.35Example 2.35: Derivation of truth table from a timing : Derivation of truth table from a timing diagramdiagram

AB

C

(a)(b)

(c)

A

B

C

Time

Inputs Outputs

fa(A, B, C) fb(A, B, C)

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

0

1

1

0

0

0

1

1

0

1

0

1

0

1

1

0

t0 t1 t2 t3 t4 t5 t6 t7

t0

t1

t2

t3

t4

t5

t6

t7

Y = fa (A, B, C)

Z = fb (A, B, C)

InputsOutputs

Y = fa (A, B, C)

Z = fb (A, B, C)

ABC

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CS1103CS1103 Chapter 1: IntroductionChapter 1: Introduction

Page 72: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

Integrated CircuitsIntegrated Circuits An Integrated circuit (IC) is a number of logic An Integrated circuit (IC) is a number of logic gated fabricated on a single silicon chip.gated fabricated on a single silicon chip.

ICs can be classified according to how many ICs can be classified according to how many gates they contain as follows:gates they contain as follows:

Small-Scale Integration (SSI):Small-Scale Integration (SSI): Contain 1 to 20 gates. Contain 1 to 20 gates. Medium-Scale Integration (MSI):Medium-Scale Integration (MSI): Contain 20 to 200 gates. Examples: Contain 20 to 200 gates. Examples:

Registers, decoders, counters.Registers, decoders, counters. Large-Scale Integration (LSI):Large-Scale Integration (LSI): Contain 200 to 200,000 gates. Include Contain 200 to 200,000 gates. Include

small memories, some microprocessors, programmable logic devices.small memories, some microprocessors, programmable logic devices. Very Large-Scale Integration (VLSI):Very Large-Scale Integration (VLSI): Usually stated in terms of Usually stated in terms of

number of transistors contained usually over 1,000,000. Includes most number of transistors contained usually over 1,000,000. Includes most microprocessors and memories.microprocessors and memories.

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Computer Hardware Computer Hardware GenerationsGenerations

The First Generation, 1946-59: Vacuum Tubes, Relays, The First Generation, 1946-59: Vacuum Tubes, Relays, Mercury Delay Lines: Mercury Delay Lines:

ENIAC (Electronic Numerical Integrator and Computer): ENIAC (Electronic Numerical Integrator and Computer): First electronic computer, 18000 vacuum tubes, 1500 First electronic computer, 18000 vacuum tubes, 1500 relays, 5000 additions/sec.relays, 5000 additions/sec.

First stored program computer: EDSAC (Electronic Delay First stored program computer: EDSAC (Electronic Delay Storage Automatic Calculator).Storage Automatic Calculator).

The Second Generation, 1959-64: DiscreteThe Second Generation, 1959-64: Discrete Transistors. Transistors. (e.g (e.g IBM 7000 series, IBM 7000 series,

DEC PDP-1)DEC PDP-1)

The Third Generation, 1964-75: Small and Medium-Scale The Third Generation, 1964-75: Small and Medium-Scale Integrated (SSI, MSI) Circuits. Integrated (SSI, MSI) Circuits. (e.g. IBM 360 (e.g. IBM 360 mainframe)mainframe)

The Fourth Generation, 1975-Present: The The Fourth Generation, 1975-Present: The Microcomputer. VLSI-based Microprocessors.Microcomputer. VLSI-based Microprocessors.

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Hierarchy of Computer ArchitectureHierarchy of Computer Architecture

I/O systemInstr. Set Proc.

Compiler

OperatingSystem

Application

Digital DesignCircuit Design

Instruction Set Architecture

Firmware

Datapath & Control

Layout

Software

Hardware

Software/Hardware Boundary

High-Level Language Programs

Assembly LanguagePrograms

Microprogram

Register TransferNotation (RTN)

Logic Diagrams

Circuit Diagrams

Machine Language Program

Page 75: CT455: Computer Organization Logic gate. Lecture 4: Logic Gates and Circuits Logic Gates Logic Gates Logic Gates Logic Gates The Inverter The Inverter.

SummarySummaryLogic Gates

AND, OR, NOT

NAND

NOR

Drawing Logic Circuit

Analysing Logic Circuit

Given a Boolean expression, draw the circuit.

Given a circuit, find the function.

Implementation of a Boolean expression using these Universal gates.

Implementation of SOP and POS Expressions

Positive and Negative Logic

Concept of Minterm and Maxterm

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End of fileEnd of file