CSE 91 Fall 2009 Embedded Systems

©2009 R. Gupta, UCSD

CSE 91 Fall 2009

Embedded Systems

Rajesh K. Gupta

Computer Science and Engineering

University of California, San Diego.


Topics We Will Discuss

• What are embedded systems?

• How do computers ‘interface’?

• What has that got to do with computers and ‘chips’?

• Hands-on Exercise: Do It Yourself Computing– How do we connect different components?

– How do we program embedded systems?

Keywords:Embedded ComputerProgrammable SystemsSystems on ChipPSOCI2C, Serial, USB, ASCIIISA


http://images.google.com/imgres?imgurl=wetpc.com.au/html/Assets/jpg/general/WetPC1.jpg&imgrefurl=http://wetpc.com.au/html/newsroom/&h=2774&w=1813&prev=/images%3Fq%3Dwearable%2Bcomputer%26start%3D20%26svnum%3D10%26hl%3Den%26lr%3D%26ie%3DUTF-8%26oe%3DUTF-8%26sa%3DN

http://www.gsmworld.com/images/3g/nokia2_lrg.jpg

http://images.google.com/imgres?imgurl=www.albright.edu/images/reporter/wint02/cellphone.jpg&imgrefurl=http://www.albright.edu/reporter/wint02/lastword-wint02.html&h=213&w=140&prev=/images%3Fq%3Dcellphone%26start%3D40%26svnum%3D10%26hl%3Den%26lr%3D%26ie%3DUTF-8%26oe%3DUTF-8%26sa%3DN


The Computing Experience• The Computer Center

– Mainframe computing

• The Personal Computer– Desktop, laptop, palm top computing

• The Ubiquitous Embedded Computer– Mobile, purpose-built.


Hardware Architecture & Organization• Computer Architecture is how a builder/user sees it

– How do you see your house? This building?– Instruction Set Architecture (ISA), Memory System Architecture

• Computer Organization refers to the structure of a computer:

DataPathController

controlenablesselects

dataconditions

Memory

CPUAddress

R/W

Data


Software ‘Architecture’

Assembler

Hardware

Micro-operations

Application

CompilerEmbedded SoftwareAnd Configuration


A Personal Computer (PC)

• Uses commodity components and standard interfaces to build the machine

• Choose different components for performance, capacity, cost– Faster hard drive, processor, memory, interfaces


PC Components

• Case:– desktop, minitower, mid case, mid tower, full tower, large tower– include a power supply (typically 200 watts)

• CPU and CPU fan– sold as a chip

• Motherboard– single-board computer – contains place holders for CPU and Memories– Memory modules

• Interfaces– Video (card and monitor)– Others: (I/O card) “Floppy, CD-ROM, Keyboard, Hard drive,

Sound card, Speakers, Modem, Tape/zip , Mouse”


168-pin SDRAM

184-pin DDR-SDRAM

The Stuff at Fry’s


Not at Fry’s Yet!

Mani Srivastava, UCLA


Personal Computing

• “Low cost and general purpose”

CPU MEM

BUS

CPU DATA

BUS

INST


Computer Organization

CPU MEM

BUS

DevicesDevicesDevices

DrivesInput devices

Output devicesNetworking Interface

1

2

3

4


Memory

CPU MEM

BUS

DevicesDevicesDevices

2-3 GHz 50 ns SIMMPC2-5300 667 MHz DIMM


CPU – Memory Interaction

DataPathController

controlenablesselects

dataconditions

Memory

CPUAddress

R/W

Data

• CPU controlled by a clock pulse.• Memory is controlled by R/W control signals.

• CPU must synchronize its memory read, write operations with respect to its internal clock.

• Example: 5 MHz clock, 500 ns access time.

Clock

clock

addr VALID

select

R/W’

VALIDdata

WRITE CYCLE

200 ns

500 ns


A Processor’s Interfaces

• Two basic types– Communicate ‘via’ memory

• Sender writes to a memory location

• Receiver reads from that memory location

– Communicate directly

• Sender and receivers connected by ‘ports’

• How do we measure goodness of an interface?– Maximum data-rate of transfer? Bits or bytes per second?


What is this connector?

9-pin RS232C: DE-9 A “Serial” Port


Then What Are These?


From RS232c to USB

• “D-Sub” connectors– A: 15 pin

– B: 25 pin

– C: 37 pin

– D: 50 pin

– E: 9 pin

• RS232 was DB25– RS232c was DE9

• Specified by EIA in 1969– Electricals (voltage levels)

– Signaling rate, timing, slew-rate

– Mechanicals

– But not: character encoding, character framing, protocols

Question 1: How many keys on your keyboard?Question 2: How many bits it will take to encode these?


What is ASCII?

• American Standard Code for Information Interchange– Published in 1963, revised 1967, 1986

• 128 characters, incl. 33 non-printing or control– 94 printable characters: 26 + 10 + 11-25 symbols

– Is SPACE printable?

• 8-bit extension by MAC OS Roman

• Unicode and Universal Character Set (UCS)– UTF-8, UTF-16, UTF-32


Interface Basics

1. Who/Where to send/receive information?– Ports: mechanicals, electrical

2. What information to send?– Signals and Packets: Electrical signaling, logical

encoding

3. How to send the information?– Protocols: synchronous, asynchronous

How do we measure goodness of an interface?


1. Ports

• Which door to knock at or open?

• All processors already have one door: memory– Memory-mapped IO

• They may have additional I/O ports– How are these ports identified?

– How are devices connecting to these ports identified?

• Mechanically, Electrically, or at a ‘higher level’

• Memory-mapped versus dedicated IO– What happens to CPU when I/O operation is in progress?


2. Signaling

• How many wires? What do they carry?– Serial signaling: Send one bit at a time

• Direction of signaling: Half and Full Duplex– Synchronous versus Asynchronous

• Asynchronous serial communication– Send a START signal prior to each byte– And a STOP signal after each byte– Generally use more than 8-bit to transmit a byte (10 to 12)

• UART: Universal Asynchronous Receiver Transmitter– Again, no shared clock. The RX must lock onto data and detect

individual bits – TX is a Parallel-to-Series converter

• RX is a Series-to-Parallel converter


3. Protocols

• Request/Acknowledge Handshakes– RTS = Request to Send: Transmitter (TX) asserts RTS

– CTS = Clear to Send: Receiver (RX) asserts CTS

• This gives you flow control– i.e., data transfer can proceed at a rate that is

acceptable

• Let us examine two protocols– I2C and USB


I2C: inter-integrated circuit• Two-wire

– A microcontroller can control a network of devices with just two general-purpose IO pins and software. (upto a few meters)

• Connects multiple devices on a multi-drop bus

• Devices can be attached or detached without affecting other devices– 7-bit address space, 16 reserved, 112 nodes maximum

• 10 kbps (low), 100 kbps, 400 kbps (fast), FM+ 1 Mbps, HS 3.4 Mbps



I2C Wires

• Two bidirectional wires– SDA: Serial Data

– SCL: Serial Clock

• ‘Open drain’: normally high when not in use– MASTER node issues the SCL and addresses SLAVES

– SLAVE node receives the SCL and the address

– “Wired AND” logical function.



So, how do we write or read?• Normally, both SDA and SCL are ‘high’

– “sense” before you drive a line

• A device that wants to write pulls SDA low– Followed by SCL going low

• So, everyone else knows that a transmission is starting



START, Data, Data,…,Data, STOP!


Putting it together

• Start Condition: With SCL low, SDA goes HL

• Bits are ‘sampled’ on the rising edge of SCL

• Stop Condition: With SCL high, SDA goes LH



Standardizing the Standard: USB• RS232C was not standard enough

– Too much flexibility (on data rate, parity, flow control)

• USB: standardized the door and the lane– Software takes care of the data, information side– The ‘OS’ is aware of the device interface– Up to 127 devices. One standard cable.– Devices identify themselves. Not the interface.

• USB 1.1: 12 Mbps (Normal), 1.5 Mbps (Low)• USB 2.0: 480 Mbps (High)• USB 3.0: 4.8 Gbps (Super)


USB

• Shielded 4-wire cable

• One host in a network: host controller– Upstream versus downstream connection and connectors (A versus B)

• Host controller either directly connects to device (star) or through a hub (tiered star)– Because of the connectors, no device-to-device connections

• When a device is attached to the network– Based on its identification, the host OS determines the software driver to be

used, – device is assigned a unique address and – host requests its internal configuration.

1 Vbus USB device power (+5 V)

Red

3 D+ Differential data line Green

2 D- Differential data line White

4 GND Power and signal ground

Black


Classes of Devices

• Host controller know about the following class of devices– Audio– HID– Hub– IrDA– Mass storage: HD, CDROM, DVD– Monitor– Communications – Physical interface device– Power– Printer– Imaging– Common class…


The Chip: A Packaged Part

http://education.netpack-europe.org/chipp.php

Quad Flat Pack (QFP)

Ball Grid Array (BGA)


CypressPSoC

8-Bit CPU CoreWith RAM and ROM

I/O Pins(Each port up to 8 bits)

Blocks for processingDigital signals

Blocks for processingAnalog signals

All “Toys” such as ADC’s, Timers, RS232, etc. are madeout of configurable digital and

analog blocks


What can you do with Digital/Analog Blocks?• Analog-to-Digital Converters

– 8- to 14-bit resolution, multiple configurations

• Digital-to-Analog Converters– 6- to 9-bit resolution

• Timers, Counters, PWMs– 8- to 32-bit resolution

• Serial Interfaces– RS232, I2C, SPI

• Programmable Gain Amplifiers, Filters

• Random sequences

• Etc.


PSoC 29x66 Mechanical Characteristics

28 Pin – 3 I/O Ports

29x66-Series PSoCs come infive sizes.

The primary difference is the number of I/O pins.

• PDIP – Plastic Dual Inline Package• SSOP – Shrink Small Outline Package• SOIC – Small Outline Integrated Circuit• TQFP – Thin Quad Flat Pack• QFN – Quad Flat No Leads

100 Pin – 8 I/O Ports

48 Pin – 6 I/O Ports44 Pin – 5 I/O Ports


Key PSoC Electrical Characteristics• Supply voltage either 3.3V or 5.0V

– Built in controller (SMP) provides 3.3V from a single 1.5V battery or 5.0V from two 1.5V batteries

• Clock speed: 930 KHz – 24 MHz– Can use internal oscillator or external crystal

• Power usage (running): 15 – 70 mW– AA battery supplies about 2 Watt-Hours

– Around 80 hours of life on one AA

• Power usage (sleep): 10 – 70 uW– Around 80,000 hours or 10 years of life on one AA


The PSoC CPU Core – M8C

M8C CPU CoreExecutes instructions (arithmetic,

logic, data movement, control)Modifies registers and memory

Flash Memory – 32K Bytes in 29x66Holds program code (nonvolatile!)

Can be used to hold user data.

Supervisory ROMHolds boot-up code and

code to read from flash memory.

Clock Sources 930KHz – 24MHzProvides basic timing for the CPU

and peripheral devices.

SRAM – 2048 Bytes in 29x66Regular memory for use of CPUand peripherals. 256 bytes easily

accessible – remainder requires paging.

Interrupt ControllerAllows external events to be communicated to the CPU

System Bus – 8 Bits WidePasses data between the CPU, memory, ports and peripherals


Hands-on Exercise

• Tasks– Design the ‘machine’

• Actually, a ‘circuit’ that connects an LED to a control SWITCH

• You build the machine in a schematics editor (PSOC Designer)

– Program the ‘machine’

• Write the C-code for the program that will run on the machine.

– Build the ‘machine’

• Wire-wrap the connections

• Download the configuration and embedded code.

VLSI/CAD, Computer Architecture

Software, Programming, OS

Prototyping

In Embedded Systems we do it all, for a given purpose: Purpose Built Machines!


Design the machine: Find Components and Connect in Editor


Program the machine

• How do you make sure that the program never dies?– Repeat forever

• How do you sample the switch?– Read PORT as a collection of 8-bits

– Extract the bit you want through a mask

• How do you turn ON, OFF the LED?– Make calls to LED routines (written in assembly –

why?)

Where is the Operating System?

Where does the code reside?


Build the machine

What is a HOST computer?

What happens to the ‘programmer’ after the machine is built?

CSE 91 Fall 2009 Embedded Systems

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