CSE 477Design Problems1 1. Encode binary value using PCM zBinary # --> zHow accurate can you get?...
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Transcript of CSE 477Design Problems1 1. Encode binary value using PCM zBinary # --> zHow accurate can you get?...
CSE 477 Design Problems 1
1. Encode binary value using PCM
Binary # -->
How accurate can you get? (+/- 1 usec?)
CSE 477 Design Problems 2
2. Timer/Interrupt Examples: Timestamp Input Events
Keep a queue of input events Each event is a timestamp
CSE 477 Design Problems 3
3. Stepper Motor Control
Simple idea
(Timing of signals is important: Acceleration/Deceleration)
A
B
A
B
0
2 3
1
A
B
CSE 477 Design Problems 4
4. Serial Communications
Sample the data bits at the right time
Can you adapt to the current data rate?
start stop
CSE 477 Design Problems 5
Graphics Intro/Overview
Each location in memory corresponds to one pixel on the display
A process reads the memory and sends the value to the memory at the right time
The memory is called a “frame buffer”
Memory Display
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8 9 10 11
0 1 2 3
4 5 6 7
8 9 10 11
CSE 477 Design Problems 6
Frame Buffer
To display something, just write values into the frame buffer The display happens automatically The frame buffer memory is “dual-ported”
i.e. shared between two independent processes Hardware assist for drawing objects
reduces bandwidth and computation e.g. lines, rectangles, characters, triangles, ...
Frame Buffer Display
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8 9 10 11
0 1 2 3
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8 9 10 11
W rite to the pixels inthe Frame Buffer tochange the Display
CSE 477 Design Problems 7
Double-Buffering
What if the image changes from one frame to the next? Use two frame buffers: change one while the other displays
then switch
Frame Buffer 0
Display
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4 5 6 7
8 9 10 11
0 1 2 3
4 5 6 7
8 9 10 11
W rite to Frame Buffer
Frame Buffer 1
0 1 2 3
4 5 6 7
8 9 10 11
CSE 477 Design Problems 8
Double-Buffering
Redraw everything on the screen, every frame Lots of computation
Frame Buffer 0
Display
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4 5 6 7
8 9 10 11
0 1 2 3
4 5 6 7
8 9 10 11
W rite to Frame Buffer
Frame Buffer 1
0 1 2 3
4 5 6 7
8 9 10 11
CSE 477 Design Problems 9
Double-Buffering
Changing the display 1. Erase and redraw every frame 2. Erase what changes and redraw
Overlap?
Frame Buffer 0
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4 5 6 7
8 9 10 11W rite to Frame Buffer
Frame Buffer 1
0 1 2 3
4 5 6 7
8 9 10 11
CSE 477 Design Problems 10
Drawing Objects
e.g. Lines Bresenham’s algorithm Forward differencing
Fast: add/subtract pixel/clock
No accumulated error
CSE 477 Design Problems 11
Windowing
Display only a part of the frame buffer e.g. fast panning, scrolling
X origin
Y origin
CSE 477 Design Problems 12
Zoom/Shrink
e.g. Zoom by 2x extend to 1.25x? extend to .75x?
Cheap/fast hack Works OK for some
applications not images
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0 0 1 1 2
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20 21 22
0 0 1 1 2
10 10 11 11 12
10 10 11 11 12
20 20 21 21 22
CSE 477 Design Problems 13
Rotations
Very similar to line drawing Fast, cheap transformation
31 22 13 14 5
0 1 2
10 11 12
20 21 22
3 4 5 6
13 14 15 16
23 24 25 26
30 31 32 33 34 35 36
CSE 477 Design Problems 14
Color Map
Maps each value in memory to a value for the display e.g. color transformation (3,3,2) -> (2,2,2) e.g. binary image planes
Use each bit to represent one color Overlapping colors defined by color map Mask a plane (color) by changing the color map
e.g. 4 bit image planes Two images - switch between them by changing the color
map
Memory Display
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8 9 10 11
0 1 2 3
4 5 6 7
8 9 10 11
Color Map
256x6
8 6
CSE 477 Design Problems 15
Sprites
Objects display over the background check origin values to decide what to display transparency?
X origin
Y origin
X origin
Y origin
X origin
Y origin
CSE 477 Design Problems 16
VGA Timing
CSE 477 Design Problems 17
One Frame
Vertical Synch tells the monitor when to go back to the top The Blanking Interval turns off the video at the top and
bottom of the screen
CSE 477 Design Problems 18
One Line
Each frame is divided into many lines Horizontal synch tells the monitor to go back to the start of the
next line Each line is divided into pixels
No timing signal: just change the value from one pixel to the next
CSE 477 Design Problems 19
Using a 24 MHz clock
Line: 31.77 usec x 24 MHz = 762 clocks/line Frame: 16.784 msec x 24 MHz = 402,816 clocks/frame (!)
402,816 / 762 clocks/line = 528 lines But:
we display 512 pixels/line 480 lines/frame
The rest of the time? Blanking Syncs
CSE 477 Design Problems 20
VGA Interface
Simple counting will work! VGA interface
supplies X, Y User supplies
pixel value one/clock
HCNT
0 511 762? ?
HSYNC
0
479
527
?
?VSYNC
VisibleImage
CSE 477 Design Problems 21
Design Problem:
Complete the VGA interface design Sketch design for frame buffer memory
VGA supplies address Reads one port of memory There should be another port for writing (and reading) Design the dual-ported memory