CSE 331. Computer Organizationeceweb1.rutgers.edu/~yyzhang/spring05/notes/331-week1.pdf · 331...
Transcript of CSE 331. Computer Organizationeceweb1.rutgers.edu/~yyzhang/spring05/notes/331-week1.pdf · 331...
331 W01.1Spring 2005
14:332:331Computer Architecture and Assembly Language
Spring 2005
Lecture 1
[Adapted from Dave Patterson’s UCB CS152 slides and
Mary Jane Irwin’s PSU CSE331 slides]
331 W01.2Spring 2005
Course Administration
Instructor: Yanyong Zhang [email protected] 518Hours: TF 10 -11 am
TAs: TBD Labs: Everyone will be using your ece account. Texts:Computer Organization and Design: The Computer Organization and Design: The
Hardware/Software Interface,Hardware/Software Interface, Third EditionThird Edition, , Patterson and HennessyPatterson and Hennessy
VHDL Starter’s GuideVHDL Starter’s Guide, , YalamanchiliYalamanchili
331 W01.3Spring 2005
Course AdministrationCourse web page http://www.ece.rutgers.edu/~yyzhang/spring05
Please check the course web page regularly (at least once before class) for announcements, assignments, etc.
Class mailing list [email protected] post emails on this list only when you want to talk to the whole class. If you only want to talk to the instructor, or a TA, please do not abuse the mailing list. I will be using the list to distribute the announcements and answer some common questions.
WebCT is available for you to check your grades and conduct group discussion. I will NOT post any notes there.
331 W01.4Spring 2005
ConventionPlease check your email and the course web page regularly.
Every classFirst 10-15 minutes, review of last class. Students will be randomly picked to answer questionsClass participation will be based on thisDiscussion-oriented
Instructor vs. TA vs. studentsInstructors are responsible for answering questions related to the lectures to both students and TAsStudents should ask TAs about the homework and gradesIf TAs cannot answer the students, they will contact the instructor directly.
331 W01.5Spring 2005
Course Goals and Structure
Fundamentals of assembly language programmingMIPS assembler programming using the spim system
Introduction to the major components of a computer system. To bridge the gap between high level programming and low level digital design.
VHDL design simulation using the Synopsys VSS tools
Prerequisite (required): 14:332:231 Digital Logic Design14:332:252 Programming Methodology
Corequisites14:332:333 Computer Architecture Lab
331 W01.6Spring 2005
spim Assembler and Simulatorspim is a self-contained assembler and simulator for the MIPS R2000/R3000
It provides a simple assembler, debugger and a simple set of operating system servicesIt implements both a simple, terminal-style interface and a visual windowing interface
Available asxspim on unix
- installed on the Sun machines in EE bldg, /usr/local/spim/bin/xspim
PCSpim on Windows- can be downloaded and installed on your own PC from
www.cs.wisc.edu/~larus/spim.htmlSorry, there is no Macintosh version of spim
331 W01.7Spring 2005
vhdl Analyzer and Simulator
VSS is Synopsys’s VHDL system simulatorIt provides a vhdl analyzer that translates vhdl code into the binary required by the vhdl simulatorIt provides a vhdl simulator and a source code debuggerwith a graphical user interface for monitoring the simulationIt provides a waveform viewer for observing the results of the simulation as signal waveforms
Available asvhdlan (text based) or gvan (graphical)vhdlsim (text based) or vhdldbx (graphical)waves
- The entire (almost) Synopsys tool set is installed on the Sun machines in the EE bldg
331 W01.8Spring 2005
Grading InformationGrade determinates
Midterm Exam #1 ~21%Midterm Exam #2 ~23%Final Exam ~26%7 Homework/Programming Assignments ~20%In-class pop quizzes ~ 5%Class Participation ~ 5%
Please let me know about exam conflicts ASAP
331 W01.9Spring 2005
Grading PoliciesAssignments will be submitted via email (mostly) and must be turned in by 5:00pm on the due date. No late assignments will be accepted.
All the assignments should be completed individually. Duplicate assignments will receive duplicate grades of zero. Second offenses will result in a final course grade of F.
Grades will be posted on the WebCTSee TAs about grading questions on the assignments; see instructor (me) about grading questions on the examsMust submit email request for change of grade after discussions with the TAs or instructor
331 W01.10Spring 2005
Head’s UpThis week’s material
Course introduction- Reading assignment – PH 1.1 through 1.3 and A.9 through
A.10
Reminders14:332:333 will start from next weekQuestion/comments about the system go to [email protected]; questions about the programming assignments go to the course TAs.
Next week’s materialIntroduction to MIPS assembler
- Reading assignment - PH 3.1 through 3.3, 3.4, and 3.7
331 W01.11Spring 2005
What You Should Already KnowHow to write, compile and run programs in a higher level language (C, C++, Java, …)
How to create, organize, and edit files and run programs on Unix
How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.)
Logic designHow to design combinational and sequential components (Boolean algebra, logic minimization, technology mapping, decoders and multiplexors, latches and flipflops, registers, mealy/moore finite state machines, state assignment and minimization, etc.)How to use a logic schematic capture and simulation tool (e.g., LogicWorks)
331 W01.12Spring 2005
Below the ProgramHigh-level language program (in C)
swap (int v[], int k)(int temp;
temp = v[k];v[k] = v[k+1];v[k+1] = temp;
)
Assembly language program (for MIPS)swap: sll $2, $5, 2
add $2, $4,$2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31
Machine (object) code (for MIPS)000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000. . .
331 W01.13Spring 2005
Below the ProgramHigh-level language program (in C)
swap (int v[], int k)(int temp;
temp = v[k];v[k] = v[k+1];v[k+1] = temp;
)
Assembly language program (for MIPS)swap: sll $2, $5, 2
add $2, $4,$2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31
Machine (object) code (for MIPS)000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000. . .
C compiler
assembler
331 W01.14Spring 2005
Advantages of Higher-Level LanguagesHigher-level languages
As a result, very little programming is done today at the assembler level
Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, …)Improve programmer productivity – more understandable code that is easier to debug and validateImprove program maintainabilityAllow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine)Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine
331 W01.15Spring 2005
Machine OrganizationCapabilities and performance characteristics of the principal Functional Units (FUs)
e.g., register file, ALU, multiplexors, memories, ...
The ways those FUs are interconnected
e.g., buses
Logic and means by which information flow between FUs is controlled
The machine’s Instruction Set Architecture (ISA)
Register Transfer Level (RTL) machine description
331 W01.16Spring 2005
Major Components of a Computer
Processor
Control
Datapath
Memory
Devices
Input
Output
331 W01.17Spring 2005
Computer TypesNotebook computer
Sony Vaio, IBM Thinkpad, etcMobile users
DesktopDell Dimension, Dell OptiPlexMost widely used in everyday life
WorkstationDell Precision, Sun Blade, IBM IntelliStationSame dimensions as desktop computersHigh-resolution graphics I/O capability, more computational power
servers ~ supercomputersHP Integrity Superdome, IBM eServerComputing power and storage
331 W01.18Spring 2005
Computer Organization
Processor
Control
Datapath
Memory
Devices
Input
Output
331 W01.19Spring 2005
Instruction vs. Datavoid main (){ // instruction
int a,b,c; // datac = a + b; // instruction
}
Instructions (machine instructions)Govern the transfer of information within a computer (e.g., load, store)Specify the arithmetic and logic operations to be performed (e.g., add, sub, mul)
Data Operands of the instruction
Both instructions and data are in binary format
331 W01.20Spring 2005
Input Device Inputs Object Code
Processor
Control
Datapath
Memory
Devices
Input
Output
000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000
Input devicesKeyboardMouseNetworkJoysticks, trackballs, etc
331 W01.21Spring 2005
Object Code Stored in Memory
Processor
Control
Datapath
Memory Devices
Input
Output
000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000
331 W01.22Spring 2005
Memory Unit: to store the programPrimary storage: fast memory that operates at electronic speed
Programs must be stored in fast memory when they are being executedThe memory contains a large number of semiconductor storage cells, each containing a bitThe unit of memory access is a byte or a word, not a bit To provide easy access to any byte/word, a distinct address is associated with each byte locationThe number of bits in each word is called word length of the computer. That is also the length of instructions.RAM: random access memory. Access time to any location is uniformMemory hierarchy: L-1 cache, L-2 cache, main memory
Secondary storageMagnetic disks, tapes, optical disks
331 W01.23Spring 2005
How to execute a program?Sequential execution
Fetch
DecodeExec
331 W01.24Spring 2005
Processor OrganizationControl needs to have the
Ability to input instructions from memoryLogic and means to control instruction sequencingLogic and means to issue signals that control the way information flows between datapath componentsLogic and means to control what operations the datapath’s functional units perform
Datapath needs to have theComponents - functional units (e.g., adder) and storage locations (e.g., register file) - needed to execute instructionsComponents interconnected so that the instructions can be accomplishedAbility to load data from and store data to memory
331 W01.25Spring 2005
Instruction FetchHow do you know which instruction next?
PC (Program Counter)
Where to store PC? (disk, memory, cache, register)
How to update PC? (sequential, branch)
331 W01.26Spring 2005
Processor Fetches an Instruction
Processor fetches an instruction from memory
Processor
Control
Datapath
Memory Devices
Input
Output
000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000
PC
331 W01.27Spring 2005
Control Decodes the Instruction
Control decodes the instruction to determine what to execute
Processor
Control
Datapath
Memory
Devices
Input
Output
000000 00100 00010 0001000000100000
331 W01.28Spring 2005
Datapath Executes the Instruction
Datapath executes the instruction as directed by control
Processor
Control
Datapath
Memory
Devices
Input
Outputcontents Reg #4 ADD contents Reg #2results put in Reg #2
000000 00100 00010 0001000000100000
331 W01.29Spring 2005
Output Data Stored in Memory
At program completion the data to be output resides in memory
Processor
Control
Datapath
Memory Devices
Input
Output000001000101000000000000000000000000000001001111000000000000010000000011111000000000000000001000
331 W01.30Spring 2005
Output Device Outputs Data
Processor
Control
Datapath
Memory
Devices
Input
Output
000001000101000000000000000000000000000001001111000000000000010000000011111000000000000000001000
331 W01.31Spring 2005
Hardware/Software Interface
Application software
System software
hardware
Instruction set architecture (architecture)
Instruction set architecture includes everything programmers need to know to make a binary program to work
InstructionArithmetic and Logic Unit (ALU), registers, etc
331 W01.32Spring 2005
The Instruction Set Architecture
instruction set architecture
software
hardware
The interface description separating the software and hardware.
331 W01.33Spring 2005
MIPS R3000 Instruction Set ArchitectureInstruction Categories
Load/StoreComputationalJump and BranchFloating Point
- coprocessorMemory ManagementSpecial
Registers
R0 - R31
PCHILO
3 Instruction Formats: all 32 bits wide
OP
OP
rs rt rd sa funct
rs rt immediate
OP jump target
Q: How many already familiar with MIPS ISA?
331 W01.34Spring 2005
How Do the Pieces Fit Together?
Compiler
OperatingSystem
Application
FirmwareInstruction Set
ArchitectureI/O systemInstr. Set Proc.Memory system
Datapath & Control
Digital DesignCircuit Design
Coordination of many levels of abstraction
Under a rapidly changing set of forces
Design, measurement, and evaluation
331 W01.35Spring 2005
How Do the Pieces Fit Together?
Compiler
OperatingSystem
Application
FirmwareInstruction Set
ArchitectureI/O systemInstr. Set Proc.
Datapath & Control
Memory system
Digital DesignCircuit Design
Coordination of many levels of abstraction
Under a rapidly changing set of forces
Design, measurement, and evaluation