CSC255-702/703 - CTI/DePaul1 CSC-255 Lecture 5 CPU, Stored-Program Concept, Program Execution...

CSC255-702/703 - CTI/DePaul 1

CSC-255

Lecture 5CPU, Stored-Program Concept,

Program Execution(Covers Brookshear Chapter 2)

Modified by Ufuk Verun from

Jim Janossy © 2002, DePaul University CTI – Chicagoand

Brookshear © 2003 Pearson Education, Inc.


Resources

This PowerPoint presentation is available for download at www.depaul.edu/~uverun/classes/CSC255/fall2002/slides/Lecture_05.pptTexbook: Chapter 2, Appendix CA Simple Machine Simulator: http://wwwes.cs.utwente.nl/software/simpsim

Print slides at 6 slides/page, avoid waste!Exams are based on slide content, homework and assigned readings


Algorithmic Machine

Must be able to: Manipulate stored data Perform operations on data Coordinate sequence of operations

Central Processing Unit (CPU) does it (in general)


Basic Computer Components Overview

Central Processing Unit (CPU )Memory (RAM – Random Access Memory)CPU and RAM are installed on the main circuit board (motherboard)CPU and RAM communicate on busDisk drive, motherboard, power supplyThere are also devices such as graphics adaptor card, network interface card (NIC), sound card, etc.


Computer Components Diagram


Memory-Mapped Input/Output


Central Processing Unit

ALU CU


Registers

Similar to memory cells, but with a lot faster access time Located as part of the CPU There is no bus transfer to access the register

Usually limited number of registers CPU has a limited capacity for components,

therefore cannot pack so many registers Usually 8, 16, or more (depending on the

architecture)


Registers…

Temporary holding place for data being manipulated by the CPU and ALU operationsIn most architectures, ALU is not allowed to manipulate data directly in memory cells Data in memory needs to be moved to a

register first

There are two types of registers: Special purpose (Program Counter -– PC,

Instruction Register –- IR) General purpose (e.g., R0, R1, R2, …)


Example: CPU/Registers and Main Memory

Example from Appendix C in Textbook


Memory Usage Facts

Registers hold data immediately applicable to an operation

Cache holds recently used memory RAM holds data needed soon External storage (“mass storage”,

such as hard disk) holds data and instructions not needed immediately

Price decreases, capacity increases


Control Unit

1. Transfers data from memory to register2. Tells ALU when and which register has

data3. Activates logic circuits in ALU4. Tells ALU which register to put result in5. Transfers data from register to memory

(if asked)Speed is usually measured in MIPs (millions of instructions per second)


Bus

Connects CPU, memory, disk, and other componentsCPU can access data through the bus by specifying the memory cell addressUsually 16 or 32 bits “wide” (parallel bit transfer, not serial one-at-a-time)Bus Speed (bits/sec) may differ from CPU speedSome architectures support multiple buses


Example Algorithm: Add Contents of Two Memory Cells


Machine Instruction Types

Just a few instructions are sufficient for basic operationsThree main categories: Data transfer Arithmetic/Logic Control

Each instruction type is represented by a bit pattern


Machine Instruction Format

Example from Appendix C in textbook


Instruction Decoding



Instruction Decoding…



Machine Architectures vs Instruction Set

Reduced Instruction Set Computer (RISC) Relatively few basic instructions only Complex instructions have to be

implemented by using basic instructionsComplex Instruction Set Computer (CISC) Large number of instructions Instructions provided for complex tasks as

well as simple tasksBoth used in practice RISC: Motorola/IBM PowerPC, Sun SPARC CISC: Intel


Data Transfer Instructions

Instructions associated with the transfer of data, such as: LOAD register,address

Copy bit pattern from memory cell (specified by address) to register

STORE register,address Copy bit pattern from register to memory cell

(specified by address) MOVE register1,register2

Copy bit pattern from register1 to register2


Arithmetic/Logic Instructions

Instructions associated with the arithmetic and logical manipulation of data in CPU registers, such as: ADD, SUBTRACT NEGATE (Two’s complement negation) AND, OR, XOR SHIFT, ROTATE

Usually involves one or more registers


AND. . .

Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 1 0 0 0 1 0 0 0


OR. . .

Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 1 1


XOR. . .

Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 0 1 0 1 0 0 1 1


Bit-Oriented Instructions

AND, OR, XOR are useful in testing or changing single bits or collections of bits within a byteThese operations common in communications or port-setting tasksInvolve use of a mask or pattern and an input byte


AND with a Mask

0 0 0 0 1 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 0 0 0 0 1 0 1 0 (result)

Mask can be used to zero out or hide any desired part of a byte


AND in a Bit Test


Is bit 5 (from left) set to 1 in the input?AND with mask 00001000 then check to see if the result is = 00000000


AND to Turn Off a Bit


Modifying a bit in a byte is possible by using AND with the appropriate mask


OR to Turn On a Bit


Modifying a bit in a byte is possible by using OR with the appropriate mask


XOR to Complement


XOR with a mask of all 1’s produces the complement of the input bit pattern


XOR to Get a Number’s Two’s Complement

1 1 1 1 1 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 0 1 0 1 0 1 0 1 (result)XOR with a mask of all 1’s produces the

complement of the input bit patternAdd 1 to complement of input pattern:

0 1 0 1 0 1 0 10 0 0 0 0 0 0 10 1 0 1 0 1 1 0

+Two’s complement of input1 0 1 0 1 0 1 0


Right Logical Shift

1 0 1 0 1 0 1 1

0 is fed from left

0 1 0 1 0 1 0 1 1 The rightmost 1 is lost

Right shift instruction

0 1 0 1 0 1 0 1

Input pattern

Output pattern


Right Circular Logical Shift

1 0 1 0 1 0 1 1

The rightmost bitmoves to leftmost

Right shift instruction

1 1 0 1 0 1 0 1

Input pattern

Output pattern

1 0 1 0 1 0 1 1


Rotate Bit Pattern to Right


Shift Definitions

Circular shifts are also called rotationsTwo types of shifts: left and rightLogical shifts lose bits at end moved toCircular shifts circulate bits to frontArithmetic shifts preserve sign bit (don’t involve it in shifts), the most significant bit


Control Instructions

Instructions associated with program flow control, such as: GO address JUMP address SKIP address GOIF - “GO IF (condition)” address STOP, HALT, QUIT


Stored-Program Concept

Von-Neumann machineProgram is in memory cells like dataControl unit extracts instructions from memory, decodes, executesMachine language is in bit patternsChapter 2 and Appendix C in textbook describe a simulator


Programs vs. Data

There is no difference in appearance between programs and data Both are stored as 0’s and 1’s Both are housed in memory

Who keeps track of what is what? Answer: you (the programmer) must


Program Execution

Control Unit handles itProgram Counter contains memory cell address of next instructionInstruction Register contains the current instruction (the instruction now being executed)


Machine Cycle

Fetch Bring next instruction from memory to CU Increment the program counter (depending

on how many bytes the instruction has)

Decode Interpret instruction in instruction register

Execute Activate appropriate circuitry for instruction


Machine Cycle


Machine Cycle Timing

Controlled by an oscillator called “clock”Clock ticks at a very fast rate (such as 1.8GHz)Circuits in CU that actually Fetch, Decode, Execute are triggered by clockEach instruction execution might take one or more clock cycles to complete Depends on how complicated the instruction

is


General Program Startup

Program counter is initialized to 0 (points to first memory cell as place to get next instruction)Fetch brings instruction in cell 0 (the one that is currently referenced by the program Counter) to instruction register in CUProgram execution starts and continues until a termination instruction (such as halt) is reached


How to Handle Jump (Branch/Go/Skip) Instruction?

Branching instruction is interesting Basic form: jmp address

All it does is put the address contained in the instruction into the Program CounterOn next machine cycle, Fetch gets the instruction in the cell that the Program Counter points to


Simple Machine Simulator

http://wwwes.cs.utwente.nl/software/simpsim

Implements the machine architecture described in Brookshear Appendix CAdds a few more instructions: jumpLE,jumpEQSupports storing data items: dbAnything written to register RF is displayed on output windowSupports labeling a location in code (useful for handling relocation of instructions during program edits and for jumps)Executable program is also available on Course Online (SimpSim.exe)Get this program and experiment with it to understand the basicsCheck the help pages and instruction formats/examples


Simple Machine Simulator

Refer to the screen of SimpSim for the architecture description based on Appendix C and how to use the simulatorThere are some example programs: simpleadd.asm asciiout.asm hello.asm multiply_1.asm multiply_2.asm divide.asm


Example: Simple Addition Program (simpleadd.asm)

; Simple Addition Example...;; CSC255 - CTI/DePaul; Ufuk Verun;; This program adds the contents of two memory cells X and Y, and; stores the result in memory cell Z.; A: Contents of memory cell X; B: Contents of memory cell Y; At the end, result=A+B is stored in memory cell Z.; load R1,[X] ;Load contents of memory cell X (A) into R1 load R2,[Y] ;Load contents of memory cell Y (B) into R2 addi R1,R1,R2 ;Calculate R1=A+B store R1,[Z] ;Store the result of A+B in memory cell Z haltX: db 10 ;X is the memory address that contains 10Y: db 20 ;Y is the memory address that contains 20Z: db 0 ;Z is the memory address that holds result


Example: ASCIIOut Program (asciiout.asm)

; ASCII Output Example...; load RF,0 ; Initialize to 0 load R7,1 ; IncrementNextChar:addi RF,RF,R7 ; Increase (is written to ; RF(=screen)) jmp NextChar ; Repeat

Assembled code:

00: 2F 0002: 27 0104: 5FF706: B004


Example: HelloWorld Program (hello.asm)

; Hello World Example...;; CSC255 - CTI/DePaul; Ufuk Verun;; This program displays a Hello World message and smiling faces...; load R1,Message ; The start of the string load R2,1 ; Increment step load R0,0 ; 0 is used to identify string-terminatorNextChar:load RF,[R1] ; Get character and print it on screen addi R1,R1,R2 ; Increase address jmpEQ RF=R0,Ready ; When string-terminator, then ready jmp NextChar ; Next characterReady: halt

Message: db 10,10,10 db 32,32,32,32,1,32,2,32,1,32,2,32,1,10 db " Hello World !!",10 db 32,32,32,32,1,32,2,32,1,32,2,32,1 db 0 ; String-terminator


More Examples:

The following additional examples are available on Course OnlineMake sure you understand how each one works

multiply_1.asm, multiply_2.asm; There is no multiply instruction in the architecture of Appendix C.; This program calculates A*B by repetitive additions.; Result is calculated by adding A B times and keeping the running result; in register R4.; At the end of the program, the result is stored in register R4.

divide.asm; There is no divide instruction in the architecture of Appendix C.; This program calculates A/B by repetitive subtractions, where A and B; are positive integers within range 1..127 (in two's complement using; 8 bits).; Result is calculated by subtracting B from A (as long as we can without; going negative); Quotient is found by counting how many times we subtracted.; At the end, the quotient is stored in R3, the remainder is stored in R4.; Example:; for A=10, B=3, we need to store R3=3, R4=1 at the end.


Multiple Programs in Memory

Several programs can be in memory at the same timeRunning a program just means setting the Program Counter to point to the cell with the program’s first instructionThe operating system (for example Windows XP) manages memory management and processing of programs

CSC255-702/703 - CTI/DePaul1 CSC-255 Lecture 5 CPU, Stored-Program Concept, Program Execution...

Documents

Transcript of CSC255-702/703 - CTI/DePaul1 CSC-255 Lecture 5 CPU, Stored-Program Concept, Program Execution...