CS 316 Intro to Computer System Organization and Programming€¦ · 2 © Kavita Bala, Computer...

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CS 316Intro to Computer System

Organizationand Programming

Kavita BalaFall 2007

Computer ScienceCornell University

© Kavita Bala, Computer Science, Cornell University

Information

• Instructor: Kavita Bala ([email protected])

• Tu/Th 1:25-2:40 Hollister B14

2


Course Objective

• Bridge the gap between hardware and software– How a processor works– How a computer is organized

• Establish a foundation for building higher-level applications– How to understand program performance– How to understand where the world is going


Who am I?• Current life

– Graphics– Parallel processing

in graphics

• Previous life– Compilers– Operating Systems– Networks

3


Who am I?

Complexityand realism

Slow

Games

CGIMovies

Reality

Time

Scalable AlgorithmsUnderstanding of human vision

Parallel Processing


Course Staff• TAs

– Adam Arbree ([email protected])– Jed Liu ([email protected])– Robert Burgess ([email protected])

• Undergraduate consultants: – Daniel Margo, Matt Oliveri, Ben Pu

• AA: Amy Fish ([email protected])

• Sections: – Tu/Th/Fr 2:55-4:10– Wednesday section cancelled

4


Book• Computer Organization

and Design– The Hardware/Software

Interface

• David Patterson, John Hennessy– Get revised printing from

summer


Course• Programming Assignments: 6-8

– Work in groups of 2

• Homeworks: 4-5– Work alone

• 2 prelims, 1 final project

5


Grading• Breakdown

– 35-50% Projects (approx. 8 assignments)– 30-40% Prelims (2)– 15-20% Homeworks (approx. 4-5)– 5% Flexgrade (participation, attitude,

improvement and effort)


Administrivia• http://www.cs.cornell.edu/courses/cs316/2007fa

– Updates– Schedule– Lecture notes– Office hours– Homeworks, etc.

6


Communication

• Email– [email protected]– The email alias goes to me and the TAs,

not to whole class

• Mailing list for students– Sign up sheet


Sections & Projects• Sections start next week

• Projects will be done in two-person teams– We will pair you up if you don’t have a

preferred partner– Start early, time management is key– Manage the team effort

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Academic Integrity• All submitted work must be your own

– OK to study together– Cannot share solutions however

• Project groups submit joint work– Same restrictions apply to projects at the

group level– Cannot be in possession of someone else’s

solution• Closed-book exams, no calculators


Computer System Organization

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Transistors and Gates

in out

+

gnd

0110

OutIn

Truth table


Logic and State

a

b

1

c

d

2

3

4

o1

o0

o1

o2

S

RQ

Q

9


A Calculator

01

adde

rm

ux

mux

reg

reg

led-

dec

8

88

8

8

add/sub select

……

doit


Basic Computer System• A processor executes instructions

– Processor has some internal state in storage elements (registers)

• A memory holds instructions and data– von Neumann architecture: combined inst and

data• A bus connects the two

regs bus

processor memory

0101000010010100

…addr, data, r/w

10


Simple Processor

memory

inst

32

pc

2

00

new pccalculation

register file

control

5 5 5

alu


MIPS Processor

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Computer System Organization


Example Machine Organization• TI SuperSPARCtm TMS390Z50 in Sun

SPARCstation20

Floating-point Unit

Integer Unit

InstCache

RefMMU

DataCache

StoreBuffer

Bus Interface

SuperSPARC

L2$

CC

MBus Module

MBus

L64852 MBus controlM-S Adapter

SBus

DRAM Controller

SBusDMA

SCSIEthernet

STDIOserialkbdmouseaudioRTCBoot PROMFloppy

SBusCards

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Why should you care?

• Bridge the gap between hardware and software– How a processor works– How a computer is organized

• Establish a foundation for building higher-level applications– How to understand program performance– How to understand where the world is going


Moore’s Law• 1965

– number of transistors that can be integrated on a die would double every 18 to 24 months (i.e., grow exponentially with time).

• Amazingly visionary – 2300 transistors, 1 MHz clock (Intel 4004) - 1971– 16 Million transistors (Ultra Sparc III)– 42 Million transistors, 2 GHz clock (Intel Xeon) – 2001– 55 Million transistors, 3 GHz, 130nm technology, 250mm2 die

(Intel Pentium 4) – 2004– 290+ Million transistors, 3 GHz (Intel Core 2 Duo) – 2007

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Processor Performance Increase

1

10

100

1000

10000

1987 1989 1991 1993 1995 1997 1999 2001 2003

Year

Perf

orm

ance

(SPE

C In

t)

SUN-4/260 MIPS M/120

MIPS M2000

IBM RS6000

HP 9000/750

DEC AXP/500

IBM POWER 100

DEC Alpha 4/266

DEC Alpha 5/500

DEC Alpha 21264/600

DEC Alpha 5/300

DEC Alpha 21264A/667 Intel

Xeon/2000

Intel Pentium 4/3000


Where is the Market?

290

933

488

1143

892

1354

862

1294

1122

1315

0

200

400

600

800

1000

1200

1998 1999 2000 2001 2002

EmbeddedDesktopServers

Mill

ions

of C

ompu

ters

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GPUs: Faster than Moore’s Law

Peak Performance (Δ's/sec)

Year

HP CRXSGI Iris

SGI GT

HP VRX

Stellar GS1000

SGI VGX

HP TVRX

SGI SkyWriter

SGI

E&SF300

One-pixel polygons (~10M polygons @ 30Hz)

SGIRE2

RE1Megatek

86 88 90 92 94 96 98 00104

105

106

107

108

109

UNC Pxpl4

UNC Pxpl5

UNC/HP PixelFlow

Flat shading

Gouraudshading

Antialiasing

Slope ~2.4x/year (Moore's Law ~ 1.7x/year) SGI

IR E&SHarmony

SGI R-Monster

Division VPX

E&S Freedom

Accel/VSISVoodoo

Glint

DivisionPxpl6

PC Graphics

Textures

SGICobalt

Nvidia TNT3DLabs

Graph courtesy of Professor John Poulton (from Eric Haines)

GeForce

104

105

106

107

108

109

ATI Radeon 256

nVidiaG70


Computer System Programming

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Instruction Set Architecture (ISA)• ISA

– abstract interface between hardware and the lowest level software

– user portion of the instruction set plus the operating system interfaces used by application programmers


Overview

I/O systemInstr. Set Proc.

Compiler

OperatingSystem

Application

Digital DesignCircuit Design

Instruction SetArchitecture

Firmware

Memory system

Datapath & Control

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MIPS R3000 ISA• Instruction Categories

– Load/Store– Computational– Jump and Branch– Floating Point

coprocessor– Memory Management

R0 - R31

PCHILO

OP

OP

OP

rs rt rd sa funct

rs rt immediate

jump target

Registers


Calling Conventions

main: jal mult

Laftercall1:add $1,$2,$3

jal multLaftercall2:

sub $3,$4,$5

mult: addiu sp,sp,-4sw $31, 0(sp)beq $4, $0, Lout...jal mult

Linside:…

Lout:lw $31, 0(sp)addiu sp,sp,4jr $31

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Data Layout

sp

arguments

return address

local variables

saved regs

arguments

saved regs

return address

blue() {

pink(0,1,2,3,4,5);

}

pink() {

orange(10,11,12,13,14);

}

local variables


Buffer Overflows

sp

arguments

return address

local variables

saved regs

arguments

saved regs

return address

blue() {

pink(0,1,2,3,4,5);

}

pink() {

orange(10,11,12,13,14);

}

orange() {

char buf[100];

gets(buf); // read string, no check!

}

local variables

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Parallel Processing

• Spin Locks

• Shared memory, multiple cores

• Etc.


Can answer the question…..

• A: for i = 0 to 99– for j = 0 to 999

A[i][j] = Computation ()

• B: for j = 0 to 999– for i = 0 to 99

A[i][j] = complexComputation ()

• Why is B 15 times slower than A?

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Applications

• Distributed ray tracer– Multiple cores running highly parallel

application– Great images!

• Core war– Corrupt your neighbors context!


Covered in this course

I/O systemInstr. Set Proc.

Compiler

OperatingSystem

Application

Digital DesignCircuit Design

Instruction SetArchitecture

Firmware

Memory system

Datapath & Control

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Nuts and Bolts:Switches, Transistors, Gates


A switch

• A switch is a simple device that can act as a conductor or isolator

• Can be used for amazing things…

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Switches• Either (OR)

• Both (AND)

+

-

-

• But requires mechanical force


Transistors

• Solid-state switch– The most amazing

invention of the 1900s

• PNP and NPN

base

collector

emitter

NP Pcollector emitter- +

PNP

base

base

collector

PN N

emitter

+ - NPN

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Transistors

base

collector

PN N

emitter

+ - NPN

• Semi-conductor


• NPN Transistor

• Connect E to C whenbase = 1

P and N Transistors• PNP Transistor

• Connect E to C whenbase = 0

E

C

E

C

B B

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Then and Now

• The first transistor– on a workbench at

AT&T Bell Labs in 1947

• An Intel Pentium– 125 million

transistors


Inverter

0110

OutIn

• Function: NOT• Called an inverter• Symbol:

• Useful for taking the inverse of an input

• CMOS: complementary-symmetry metal–oxide–semiconductor

in out

Truth table

in out

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NAND Gate

011110101 100

outBA

• Function: NAND• Symbol:

ba out


NOR Gate

011010

001100

outBA • Function: NOR• Symbol:

CS 316 Intro to Computer System Organization and Programming€¦ · 2 © Kavita Bala, Computer...

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