Course: High-Speed and Low-Power VLSI (97.575) Professor: Maitham Shams
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Transcript of Course: High-Speed and Low-Power VLSI (97.575) Professor: Maitham Shams
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Course: High-Speed and Low-Power VLSI (97.575)
Professor: Maitham Shams
Presentation: True Single-Phase Adiabatic CircuitryBy Ehssan HosseinzadehSpecial Student
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OutlineIntroductionAdiabatic Switching CircuitsTrue Single-Phase adiabatic CircuitResultsConclusionReferences
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IntroductionImportance of Reducing Power DissipationTechniques=>Parallelism => Pipeline=> Transformation=> Reduce the Chip wide Supply voltage=> Energy Recovery
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Adiabatic - Switching CircuitsConventional EnergeticSwinging voltage on capacitor:- Zero => VV => ZeroEngergy dissipation per transition E= CV2
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Adiabatic - Switching CircuitsRecovery EnergyEdiss= P. T = I2 . R .T = (RC/T) CV2
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True Single-Phase adiabatic Circuit
Different Approaches: Signal voltage swing > Vt of CMOS => Adiabatic AmplificationDynamic logic families=> 2N2P, 2N-2N2P, => True Signle-Phase Energy-Recovery Logic (TSEL) => SourceCoupled Adiabatic Logic (SCAL)
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True Single-Phase adiabatic CircuitTrue Single-Phase Energy-Recovery Logic (TSEL) Cascades are composed of alternating PMOS and NMOS gatesTSEL GATES
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PMOS DP:Vpc: H-LVpc VRP - |vtp|
EP:Vin: H , Vpc:LVpc < VRP - |vtp|Ddp > |Vtp| Vpc VRP - |vtp|
NMOSEN:Vpc > VRN + |vtn|
CN:Vpc VRN + |vtn|
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TSEL CascadesTSEL Cascades are built by stringing together alternating PMOS and NMOS gates
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SCAL GatesSingle Phase power Clock Operation
Tunable Current Source at each Gate
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VpcVbpVbn
DP:Vpc: H-LAdiabatlically tillVpc > |Vtp|EP:Vpc: L-HVbp increaseVdd - |Vbp| > |Vtp|Vpc < Vxp - |Vtp|Dpp > |Vtp|Vpc > Vxp - |Vtp|
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SCAL Cascades
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Results8-bit Carry-Lookahead adder (CLAs)Developed in Static CMOS, PAL, 2N2P, TSEL, SCAL (0.5um) Freq: 10 200 MHzSCAL CLA => 1.5 2.5 times more efficient than PAL, 2N2PSCAL CLA => 2 5 times less dissipative than purely combinational or pipelined CMOS
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ConclusionTrue Single-phase adiabatic logic family:TSEL, SCALSource-coupled variant of TSEL => Increase energy efficiency by using tunable current source Avoid the problems:Multiple Power-clock schemes- Increased energy dissipation- Layout Complexity in clock distribution,- Clock Skew- Multiple powerclock generator
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ReferencesTrue Single Phase Adiabatic Circuitry, Suhwan Kim and Mario PapaefthymiouEnergy Recovery For Low Power CMOS, WC Athas and N. TzartanisLow Power Digital Systems Based on Adiabatic-Switching Principles, William C. Athas