Control et Acquisition Hardware: FEC ON : TTCRx Ok ON : RING open FEC OUT IN ON.
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Transcript of Control et Acquisition Hardware: FEC ON : TTCRx Ok ON : RING open FEC OUT IN ON.
![Page 1: Control et Acquisition Hardware: FEC ON : TTCRx Ok ON : RING open FEC OUT IN ON.](https://reader036.fdocuments.us/reader036/viewer/2022081515/551d9dc1497959293b8e118a/html5/thumbnails/1.jpg)
Control et AcquisitionHardware:
FEC
ON : TTCRx Ok
ON : RING open
FECO
UT
IN
ON
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Control et AcquisitionHardware:
Carte CCU
1
2345
6
CCU0x52
±6V
INOUT
I2C
RING
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Control et AcquisitionHardware:
UTRI
±6V
APV0APV1APV2APV3APV4APV5
{
{
{
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Control et AcquisitionHardware:
V UTRI
±6V APV0APV1APV2APV3APV4APV5
{
{
{
![Page 5: Control et Acquisition Hardware: FEC ON : TTCRx Ok ON : RING open FEC OUT IN ON.](https://reader036.fdocuments.us/reader036/viewer/2022081515/551d9dc1497959293b8e118a/html5/thumbnails/5.jpg)
Control et AcquisitionHardware:
FED
7654
3210
TRCLK
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Control et AcquisitionHardware:
TSC
TRCLK
Seq OUTTrg input
Trg Ok
To FED
Clk input
Clk output
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Control et AcquisitionHardware:
Hybride
5
4
3
2
1
0
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Control et AcquisitionHybride:
APVPream/Shap/buffer
PipeLineAPSP Mux
Bias Generato
Pulse Gen.
PipeLine CtrlI2C
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Control et AcquisitionHybride:
APV
1 1 1 a b c d e f g h 1 {128 channels non-ordonnés} 1 0 0 …..
CLK
APV Output
20 MHz
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Control et AcquisitionHybride:
MUX
MUX
20MHz
40MHz
CLK
CLK
APV1 Output
APV2 Output
MUX Output
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Control et AcquisitionHybride:
PLL
PLLIN
OUT
CLK
CLKCodé
Seq
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Control et AcquisitionHybride:
PLL
CLK
TRG
TRGd
D
d : Fin delay < 25ns
D : Corse delay % 25nsd
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Control et AcquisitionHybride:
DCU
A0 :A1 :
A2 :A3 :
:A4:A5
:A6:A7
ITH2,50V/21,25V/2Det Return
T° thermistanceAPV 1,25 VEmpty
DCU T° (interne)
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Control et AcquisitionPOWER:
Carte CCU : +6V
Carte UTRI : +6V :: I > 1,5 A if 6 APVs - 6V :: I ~ 1 A
NB. De Préférence Les cartes doivent être alimentées par 2 alimentations séparées
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Control et AcquisitionI2C :
APV0 : 0x20 = 32APV1 : 0x21 = 33APV2 : 0x22 = 34APV3 : 0x23 = 35APV4 : 0x24 = 36APV5 : 0x25 = 37
MUX : 0x43 = 67PLL : 0x44 = 68 0x45 = 69 0x46 = 70 0x47 = 71
APV Broadcast : 0x3f = 63
DCU : 0 1 2 3 4 5 6 7
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Control et AcquisitionObservations :
1- Les Trames de données APV ne sont visibles que par envoie d’un Trigger
Attention : La PLL peut ne pas envoyer des Triggers ! La PLL peut se désynchroniser!
2. APV/MUX output :: Tick Marks visibles ssi - Power ON - CLK send - Eventuellement RESET Attention : La PLL peut ne pas envoyer la CLK !
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Control et AcquisitionConnexion:
±6V
AP
V0
AP
V1
AP
V2
AP
V3
AP
V4
AP
V5
{ { {
FEC TSCFEDVUTRICCU card
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Control et AcquisitionAPV setting:
CDRV :: 1 1 1 0 1 1 1 1
16 = = = = = = =cal4
= 0x EF = 239
ical
VPSP :: ligne de base
MODE :: peak == 1s & peak deconv == 3s & deconv. multi == 3s & peak == 1s & deconv
Bits definition : cf. picture