Computing with Finite AutomataComputing with Finite Automata

290N: The Unknown Component 290N: The Unknown Component ProblemProblem

Lecture 9Lecture 9

OutlineOutline Problem solving flowProblem solving flow

Example of a traffic light controllerExample of a traffic light controller Representation of automataRepresentation of automata Simple operationsSimple operations

Complementing (“complement”)Complementing (“complement”) Completing (“complete”)Completing (“complete”)

Filtering statesFiltering states Making prefix closed (“prefix”)Making prefix closed (“prefix”) Progressive (“progressive”)Progressive (“progressive”) Moore-reduction (“moore”)Moore-reduction (“moore”)

State minimization (“minimize”)State minimization (“minimize”)

Reachability analysisReachability analysis Product computation (“product”)Product computation (“product”) Verification by language containment (“check”)Verification by language containment (“check”) Determinization by subset construction (“determinize”)Determinization by subset construction (“determinize”) Don’t-care minimization (“dcmin”)Don’t-care minimization (“dcmin”)

Problem Solving FlowProblem Solving Flow

Determine the interaction topologyDetermine the interaction topology Specify the fixed part and the spec as automata, FSMs, or multi-Specify the fixed part and the spec as automata, FSMs, or multi-

level multi-valued networkslevel multi-valued networks Create the script, which implements the flowCreate the script, which implements the flow

Special attention should be paid to projection and lifting of variables Special attention should be paid to projection and lifting of variables (command “support”) because it is closely related to the selected (command “support”) because it is closely related to the selected topologytopology

Run the script on MVSIS and debug it if necessaryRun the script on MVSIS and debug it if necessary Analyze the resulting solutionAnalyze the resulting solution

Is it prefix closed and progressive? (commands “prefix”, “progressive”)Is it prefix closed and progressive? (commands “prefix”, “progressive”) Is it deterministic as an FSM? (command “check_nd”)Is it deterministic as an FSM? (command “check_nd”) Is it state-minimum? (command “minimize”)Is it state-minimum? (command “minimize”) Compare the language of this solution with other solutions if available Compare the language of this solution with other solutions if available

(command “volume”)(command “volume”) Make conclusionsMake conclusions

Formulate and prove new theoremsFormulate and prove new theorems Create new examplesCreate new examples

Example: Traffic Light ControllerExample: Traffic Light Controller

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General Topology This example

Traffic Light Controller (fixed part)Traffic Light Controller (fixed part).model fixed.model fixed.inputs v z.inputs v z.outputs Acc.outputs Acc.mv v 2 wait go.mv v 2 wait go.mv z 3 red green yellow.mv z 3 red green yellow.mv CS, NS 3 Fr Fg Fy.mv CS, NS 3 Fr Fg Fy.latch NS CS.latch NS CS.reset CS.reset CSFrFr.table ->Acc.table ->Acc11.table v z CS ->NS.table v z CS ->NSwait red Fr Frwait red Fr Frgo red Fr Fggo red Fr Fgwait green Fg Fgwait green Fg Fggo green Fg Fygo green Fg Fywait yellow Fy Fywait yellow Fy Fygo yellow Fy Frgo yellow Fy Fr.end.end

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z = {red, green, yellow}

v = {wait, go}

Traffic Light Controller (spec)Traffic Light Controller (spec)

.model spec.model spec

.inputs z.inputs z

.outputs Acc.outputs Acc

.mv z 3 red green yellow.mv z 3 red green yellow

.mv CS,NS 4 S1 S2 S3 S4.mv CS,NS 4 S1 S2 S3 S4

.table ->Acc.table ->Acc11.latch NS CS.latch NS CS.reset CS.reset CSS1S1.table z CS ->NS.table z CS ->NSred S1 S2red S1 S2red S2 S3red S2 S3green S3 S4green S3 S4yellow S4 S1yellow S4 S1.end.end

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Traffic Light Controller (script)Traffic Light Controller (script)

echo "Synthesis ..."echo "Synthesis ..."determinizedeterminize -lci spec.mva spec_dci.mva -lci spec.mva spec_dci.mvasupportsupport v(2),z(3) spec_dci.mva spec_dci_supp.mva v(2),z(3) spec_dci.mva spec_dci_supp.mvasupportsupport v(2),z(3) fixed.mva fixed_supp.mva v(2),z(3) fixed.mva fixed_supp.mvaproductproduct -l fixed_supp.mva spec_dci_supp.mva p.mva -l fixed_supp.mva spec_dci_supp.mva p.mvasupportsupport v(2) v(2) p.mva p_supp.mvap.mva p_supp.mvadeterminizedeterminize -lci p_supp.mva p_dci.mva -lci p_supp.mva p_dci.mvaprogressiveprogressive -i 0-i 0 p_dci.mva x.mva p_dci.mva x.mva

echo "Verification ..."echo "Verification ..."supportsupport v(2),z(3) x.mva x_supp.mva v(2),z(3) x.mva x_supp.mvaproductproduct x_supp.mva fixed_supp.mva prod.mva x_supp.mva fixed_supp.mva prod.mvasupportsupport v(2),z(3) spec.mva spec_supp.mva v(2),z(3) spec.mva spec_supp.mvacheckcheck prod.mva spec_supp.mva prod.mva spec_supp.mva

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Traffic Light Controller (solution)Traffic Light Controller (solution)

.model solution.model solution

.inputs v.inputs v

.outputs Acc.outputs Acc

.mv v 2 wait go.mv v 2 wait go

.mv CS, NS 4 \.mv CS, NS 4 \ FrS1 FrS2 FgS3 FyS4FrS1 FrS2 FgS3 FyS4.latch NS CS.latch NS CS.reset CS.reset CSFrS1FrS1.table ->Acc.table ->Acc11.table v CS ->NS.table v CS ->NSwait FrS1 FrS2wait FrS1 FrS2go FrS2 FgS3go FrS2 FgS3go FgS3 FyS4go FgS3 FyS4go FyS4 FrS1go FyS4 FrS1.end.end

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Traffic Light Controller (script2)Traffic Light Controller (script2)echo "Synthesis ..."echo "Synthesis ..."determinizedeterminize -lci spec.mva spec_dci.mva -lci spec.mva spec_dci.mvasupportsupport v(2),z(3) spec_dci.mva spec_dci_supp.mva v(2),z(3) spec_dci.mva spec_dci_supp.mvasupportsupport v(2),z(3) fixed.mva fixed_supp.mva v(2),z(3) fixed.mva fixed_supp.mvaproductproduct -l fixed_supp.mva spec_dci_supp.mva p.mva -l fixed_supp.mva spec_dci_supp.mva p.mvasupportsupport z(3),v(2) z(3),v(2) p.mva p_supp.mvap.mva p_supp.mvadeterminizedeterminize -lci p_supp.mva p_dci.mva -lci p_supp.mva p_dci.mvaprogressiveprogressive -i 1-i 1 p_dci.mva x.mva p_dci.mva x.mva

echo "Verification ..."echo "Verification ..."supportsupport v(2),z(3) x.mva x_supp.mva v(2),z(3) x.mva x_supp.mvaproductproduct x_supp.mva fixed_supp.mva prod.mva x_supp.mva fixed_supp.mva prod.mvasupportsupport v(2),z(3) spec.mva spec_supp.mva v(2),z(3) spec.mva spec_supp.mvacheckcheck prod.mva spec_supp.mva prod.mva spec_supp.mva

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Further ExperimentsFurther Experiments Run both scripts and see how solution differsRun both scripts and see how solution differs Make Spec non-deterministic and see what happensMake Spec non-deterministic and see what happens Make Fixed non-deterministic and see what happensMake Fixed non-deterministic and see what happens Try more complex FixedTry more complex Fixed

For example, make Fixed depend on an additional variable s, For example, make Fixed depend on an additional variable s, which shifts it from one set of states to another set of stateswhich shifts it from one set of states to another set of states

In one set, Fixed behaves as beforeIn one set, Fixed behaves as before In other set, Fixed already behaves according to the specIn other set, Fixed already behaves according to the spec

An Extension of FixedAn Extension of Fixed

New states

Old states

Two Topologies to TryTwo Topologies to Try

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OutlineOutline Problem solving flowProblem solving flow

Example of a traffic light controllerExample of a traffic light controller Representation of automataRepresentation of automata Simple operationsSimple operations

Complementing (“complement”)Complementing (“complement”) Completing (“complete”)Completing (“complete”)

Filtering statesFiltering states Making prefix closed (“prefix”)Making prefix closed (“prefix”) Progressive (“progressive”)Progressive (“progressive”) Moore-reduction (“moore”)Moore-reduction (“moore”)

State minimization (“minimize”)State minimization (“minimize”)

Reachability analysisReachability analysis Product computation (“product”)Product computation (“product”) Verification by language containment (“check”)Verification by language containment (“check”) Determinization by subset construction (“determinize”)Determinization by subset construction (“determinize”) Don’t-care minimization (“dcmin”)Don’t-care minimization (“dcmin”)

Representation of AutomataRepresentation of Automata Completely explicitCompletely explicit (MVSIS package “au”) (MVSIS package “au”)

Both STG and transition conditions are represented explicitly (STG is a Both STG and transition conditions are represented explicitly (STG is a graph; conditions are SOPs)graph; conditions are SOPs)

Completely implicit (monolithic)Completely implicit (monolithic) (MVSIS package “lang”) (MVSIS package “lang”) Automaton is represented by a single transition relation and char functions Automaton is represented by a single transition relation and char functions

of accepting statesof accepting states Completely implicit (partitioned)Completely implicit (partitioned) (MVSIS package “mvn” (mvnSolve.c)) (MVSIS package “mvn” (mvnSolve.c))

Can only be used for automata derived from multi-level networksCan only be used for automata derived from multi-level networks Automaton is represented by a set of partitions (one partition for each Automaton is represented by a set of partitions (one partition for each

latch excitation function)latch excitation function) Hybrid representationHybrid representation (MVSIS package “aut”) (MVSIS package “aut”)

STG is represented explicitly (as a graph)STG is represented explicitly (as a graph) Transition conditions are represented implicitly as BDDsTransition conditions are represented implicitly as BDDs

Simple OperationsSimple Operations Complementing Complementing

swap the sets of accepting and swap the sets of accepting and non-accepting statesnon-accepting states

deterministic automata only!deterministic automata only! CompletingCompleting

For each state, compute the For each state, compute the input domain when the input domain when the transitions are definedtransitions are defined

If this domain is constant 1 for If this domain is constant 1 for all states, the automaton is all states, the automaton is completecomplete

OtherwiseOtherwise• create a new non-accepting create a new non-accepting

state (DC state) with the self-state (DC state) with the self-loop under all inputsloop under all inputs

• create transitions from each create transitions from each incompletely specified state incompletely specified state into the DC state, under the into the DC state, under the previously undefined conditionpreviously undefined condition

Filtering StatesFiltering States

Prefix-closedPrefix-closed Removes all the non-accepting states Removes all the non-accepting states Removes the accepting states not reachable from the initial stateRemoves the accepting states not reachable from the initial state

Progressive (I-progressive)Progressive (I-progressive) Iteratively removes all the states whose I/O behavior Iteratively removes all the states whose I/O behavior

represented as a multi-output relation is not well-definedrepresented as a multi-output relation is not well-defined

Moore-reductionMoore-reduction Given an arbitrary Mealy machine, reduce it to a Moore machineGiven an arbitrary Mealy machine, reduce it to a Moore machine

Example of Prefixed CloseExample of Prefixed Close

Example of ProgressiveExample of Progressive

Example of Moore-ReductionExample of Moore-ReductionCSF computed after splitting latches of benchmark “dk27.blif”

The results of Moore-reduction Number of inputs = 3.

OutlineOutline Problem solving flowProblem solving flow

Example of a traffic light controllerExample of a traffic light controller Representation of automataRepresentation of automata Simple operationsSimple operations

Complementing (“complement”)Complementing (“complement”) Completing (“complete”)Completing (“complete”)

Filtering statesFiltering states Making prefix closed (“prefix”)Making prefix closed (“prefix”) Progressive (“progressive”)Progressive (“progressive”) Moore-reduction (“moore”)Moore-reduction (“moore”)

State minimization (“minimize”)State minimization (“minimize”)

Reachability analysisReachability analysis Product computation (“product”)Product computation (“product”) Verification by language containment (“check”)Verification by language containment (“check”) Determinization by subset construction (“determinize”)Determinization by subset construction (“determinize”) Don’t-care minimization (“dcmin”)Don’t-care minimization (“dcmin”)

State Minimization of FAState Minimization of FA

Requirements for the automatonRequirements for the automaton Deterministic (if not, first determinize)Deterministic (if not, first determinize) Complete (if not, first complete)Complete (if not, first complete)

Definition of state equivalenceDefinition of state equivalence Two ways of computing equivalence classesTwo ways of computing equivalence classes

ImplicitImplicit ExplicitExplicit

The explicit algorithm in detailThe explicit algorithm in detail ExampleExample

State Equivalence of FAState Equivalence of FA Definition.Definition. A string is accepted by A string is accepted by

the automation in state the automation in state ss iff it iff it drives the automaton into an drives the automaton into an accepting state.accepting state.

Definition.Definition. Two states Two states s1s1 and and s2 s2 are distinguishable iff there exists are distinguishable iff there exists a string, which is accepted in state a string, which is accepted in state s1 and not accepted in state s1 and not accepted in state s2s2..

Definition.Definition. States States s1s1 and and s2s2 are are equivalent if they are not equivalent if they are not distinguishable.distinguishable.

Example: Example: States States AA and and CC are distinguishable are distinguishableStatesStates B B and and C C are equivalentare equivalent

Outline of the AlgorithmOutline of the Algorithm The automaton is given byThe automaton is given by

State transition graph State transition graph The set of accepting statesThe set of accepting states

Compute the set of distance-0 distinguishable pairs by combining Compute the set of distance-0 distinguishable pairs by combining each accepting state with each non-accepting stateeach accepting state with each non-accepting state

For each pair, find all the pairs reachable in backward traversal from For each pair, find all the pairs reachable in backward traversal from the distinguishable pairs, under all input combinationsthe distinguishable pairs, under all input combinations

Collect these pairs and explore them until no new pairs can be foundCollect these pairs and explore them until no new pairs can be found The remaining pairs are pairs of equivalent statesThe remaining pairs are pairs of equivalent states Reduce the automaton by replacing each state by one selected Reduce the automaton by replacing each state by one selected

representative of its equivalence classrepresentative of its equivalence class

Implicit ImplementationImplicit Implementation The automaton is given byThe automaton is given by

Transition relation Transition relation R(x,cs,ns)R(x,cs,ns) Characteristic function of accepting states Characteristic function of accepting states A(cs)A(cs)

Compute the set of distance-0 distinguishable pairs (when one state Compute the set of distance-0 distinguishable pairs (when one state is accepting while the other is not)is accepting while the other is not)

DD00(cs,cs’) = A(cs) (cs,cs’) = A(cs) A(cs’) A(cs’) Compute the pair transition relationCompute the pair transition relation

P(cs,cs’,ns,ns’) = P(cs,cs’,ns,ns’) = x [R(x,cs,ns) & R(x,cs’,ns’)]x [R(x,cs,ns) & R(x,cs’,ns’)] Starting from the distance-0 distinguishable pairs, iteratively Starting from the distance-0 distinguishable pairs, iteratively

compute distance-k distinguishable pairs, until convergencecompute distance-k distinguishable pairs, until convergence DDi+1i+1(cs,cs’) = (cs,cs’) = ns,ns’ [P(cs,cs’,ns,ns’) & Dns,ns’ [P(cs,cs’,ns,ns’) & Dii(ns,ns’)](ns,ns’)]

The equivalence relation isThe equivalence relation is E(cs,cs’) = NOT[DE(cs,cs’) = NOT[Di+1i+1(cs,cs’)](cs,cs’)]

Reduce the automaton by replacing each state by one Reduce the automaton by replacing each state by one representative taken from its equivalence classrepresentative taken from its equivalence class

P(cs,cs’) = CompatibleProjection( E(cs,cs’), {cs} )P(cs,cs’) = CompatibleProjection( E(cs,cs’), {cs} ) R(x,cs,ns) = R(x,cs,ns) = cs’,ns’[ R(x,cs’,ns’) & P(cs,cs’) & P(ns,ns’) ]cs’,ns’[ R(x,cs’,ns’) & P(cs,cs’) & P(ns,ns’) ]

Explicit ImplementationExplicit Implementation The automaton The automaton

The linked list of statesThe linked list of states The accepting states are markedThe accepting states are marked

Additional data structuresAdditional data structures Q:Q: The FIFO queue of distinguishable state pairs to be explored The FIFO queue of distinguishable state pairs to be explored H:H: The hash table hashing every pair into The hash table hashing every pair into {visited, not visited}{visited, not visited}

InitializationInitializationfor each accepting state for each accepting state ss for each non-accepting state for each non-accepting state s’s’ insert pair insert pair (s,s’)(s,s’) into into QQ and and HH

ComputationComputationwhile while QQ is not empty, extract one pair is not empty, extract one pair (s,s’)(s,s’) from from QQ for each pair for each pair (t,t’),(t,t’), which transits into which transits into (s,s’)(s,s’) under some input under some input if if (t,t’)(t,t’) is not in is not in HH (that is, (that is, (t,t’)(t,t’) has not been visited) has not been visited) insert pair insert pair (t,t’)(t,t’) into into QQ and into and into HH

Reducing the AutomatonReducing the Automaton The automaton The automaton

The linked list of statesThe linked list of states The accepting states are markedThe accepting states are marked

The equivalence relationThe equivalence relation Maps pair Maps pair (s,s’)(s,s’) into into {distinguishable, equivalent}{distinguishable, equivalent}

• The same as hash table The same as hash table H: visited = distinguishable; not visited = equivalentH: visited = distinguishable; not visited = equivalent ComputationComputation

Construct the equivalence classes of states using the equivalence relationConstruct the equivalence classes of states using the equivalence relation Select one representative state from each equivalence classSelect one representative state from each equivalence class Create the mappingCreate the mapping of each state in the original automaton into the of each state in the original automaton into the

representative state from its equivalence classrepresentative state from its equivalence classstart the new automatonstart the new automatonadd a new state for each representative state of the old automatonadd a new state for each representative state of the old automatonfor all representative states for all representative states s1s1

for each transition for each transition (s1->s2)(s1->s2) from the representative state from the representative state s1s1 into some other state into some other state s2s2add transition from the new state corresponding to add transition from the new state corresponding to s1s1 into the new state into the new state

corresponding to corresponding to s2s2 Set the new initial state to be the new state corresponding to the Set the new initial state to be the new state corresponding to the

representative of the class, to which the original initial state belongsrepresentative of the class, to which the original initial state belongs

Example of State MinimizationExample of State Minimization

Distinguishable pairs Distinguishable pairs after initializationafter initialization

(A,DC), (C,DC), (B,DC)(A,DC), (C,DC), (B,DC) Computed Computed

distinguishable pairsdistinguishable pairs (A,DC) (A,DC) (A,C) (A,C) (A,DC) (A,DC) (A,B) (A,B)

Remaining equivalent Remaining equivalent pairspairs

(B,C)(B,C) The derived reduced The derived reduced

graph graph