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Computer Structure

Unit 3. Assembly programming

Departamento de InformáticaGrupo de Arquitectura de Computadores, Comunicaciones y Sistemas

UNIVERSIDAD CARLOS III DE MADRID

becweb

Texto escrito a máquina

Félix García Carballeira, Alejandro Calderón Mateos, José Daniel García Sánchez

becweb

UC3M

Contents

� Basic concepts on assembly programming� MIPS32 assembly language� Instruction formats and addressing modes� Procedure calls and subroutines

ARCOS Computer Structure 2

Motivation

� Understand how high level languages are executed � C, C++, Java, …

� Analyze the execution time of high level instructions.

� Useful in specific domains:� Compilers

Operating Systems


� Operating Systems� Games� Embedded systems� Etc.

Motivation to use MIPS32

� Easy architecture.� Easy to learn

� Assembly similar to other RISC processors


4

RISC processors

� Very used in many devices

What is a computer?

ProcessorData

Instructions

results


Instructions

Machine instruction

001 AB 00000000101


Operation code

OperandsRegisters

Memory address

Numbers

Steps to execute an instruction

� Fetch� MAR PC� Read� MBR Memory� PC PC + 1� RI MBR

PC

MAR MBR

IR

000100


� RI MBR

� Decoding

� Execution

� Jump to fetch

000100 0010000000000000

Address Content

Memory

Machine instructions properties

� Do a single and easy task� Use a fixed number of operands� Auto-contents, include all information neededd for the

execution:� An instruction includes:� An instruction includes:

� Operation to do� Location of operands:

� Registers� Memory� Instruction

� Location to store the results� A reference to the next instruction

� Implicit way: next instruction� Explicit way: branch instructions


Program

� Ordered sequence of machine instructions

temp = v[k];


00001001110001101010111101011000

10101111010110000000100111000110

11000110101011110101100000001001

01011000000010011100011010101111

temp = v[k];

v[k] = v[k+1];

v[k+1] = temp;

Languages levels

High level language (ej: C, C++)

compiler

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

lw $t0, 0($2)


Assembly language

(Ej: MIPS)

Machine language

(MIPS)

assembler

lw $t0, 0($2)lw $t1, 4($2)sw $t1, 0($2)sw $t0, 4($2)

0000 1001 1100 0110 1010 1111 0101 1000

1010 1111 0101 1000 0000 1001 1100 0110

1100 0110 1010 1111 0101 1000 0000 1001

0101 1000 0000 1001 1100 0110 1010 1111

Assembly language

� Uses symbolic codes to represent instructions� add – addition� lw – Load a memory data

� Uses symbolic codes for data and references� $t0 – register� $t0 – register

� There is an assembly instruction per machine instruction� add $t1, $t2, $t3


Programming model of a computer

� A computer provides a programming model:� Instruction set (assembly language)

� An instruction includes:� Operation code� Other elements: registers, memory address, numbers

� Storing elements


� Storing elements� Registers� Memory� Registers of I/O controllers

� Execution modes

MIPS architecture

� MIPS R2000/R3000� 32 bits processor� RISC� CPU +

auxiliary coprocessors

� Coprocessor 0 � exceptions, interrupts and

virtual memory system


virtual memory system

� Coprocessor 1� FPU (floatingg point unit)

Register bank

� 32 registers� Size: 1 word (4

bytes)� Use $ at the

beginning

Symbolicname

Number Use

zero 0 Constant 0

at 1 Reserved for assembler

v0, v1 2, 3 Results of functions

a0, …, a3 4, …, 7 Function arguments

t0, …, t7 8, …, 15 Temporary (NO preserved across calls)


t0, …, t7 8, …, 15 Temporary (NO preserved across calls)

s0, …, s7 16, …, 23 Saved temporary (preserved across calls)

t8, t9 24, 25 Temporary (NOpreserved across calls)

k0, k1 26, 27 Reserved for operating system

gp 28 Pointer to global area

sp 29 Stack pointer

fp 30 Frame pointer

ra 31 Return address (used by function calls)

Types of instructions

� Transfer instruction� Arithmetic � Logical instructions� Shifting� Rotation � Rotation � Comparison� Branches


Data transfer

� Store a value in a register. Immediate load� li $t0 5 $t0 5

� Register to register� move $a0 $t0 $a0 $t0move $a0 $t0 $a0 $t0

� Memory access instructions (later)� Register to memory� Memory to register


Arithmetic instructions

� Integer operations(ALU) or floating point operations (FPU)

� Examples with integers� Addition

add $t0, $t1, $t2 $t0 $t1 + $t2 Addition with overflowaddi $t0, $t1, 5 $t0 $t1 + 5 Addition with overflowaddu$t0, $t1, $t2 $t0 $t1 + $t2 Addition without overflowaddu$t0, $t1, $t2 $t0 $t1 + $t2 Addition without overflow

� Subtractionsub $t0 $t1 1

� Multiplicationmul $t0 $t1 $t2

� Divisiondiv $t0, $t1, $t2 $t0 $t1 / $t2 Integer divisionrem $t0, $t1, $t2 $t0 $t1 % $t2 remainder


Example

int a = 5;int b = 7;int c = 8;int d;

li $t0, 5li $t1, 7li $t2, 8

d = a * (b + c) add $t1, $t1, $t2mul $t3, $t1, $t0


Example

int a = 5;int b = 7;int c = 8;int d;

li $t0, 5li $t1, 7li $t2, 8li $t3 10

d=-(a*(b-10)+c)sub $t4, $t1, $t3mul $t4, $t4, $t0add $t4, $t4, $t2li $t5, -1mul $t4, $t4, $t5


Logical instructions

� Boolean operations

� Examples:� AND

and $t0 $t1 $t2 ($t0 = $t1 & $t2)

� ORor $t0 $t1 $t2 ($t0 = $t1 | $t2)

1100

1010

1000

AND

or $t0 $t1 $t2 ($t0 = $t1 | $t2)ori $t0 $t1 80 ($t0 = $t1 | 80)

� NOTnot $t0 $t1 ($t0 = ! $t1)

� XORor $t0 $t1 $t2 ($t0 = $t1 ^ $t2)

1100

1010

1110

OR

1100

1010

0110

XOR

10

01

NOT


Example

li $t0, 5li $t1, 8

and $t2, $t1, $t0

What is the value of $t2?


Solution

li $t0, 5li $t1, 8

and $t2, $t1, $t0


000 …. 0101 $t0


000 …. 0101 $t0000 ….. 1000 $t1

and 000 ….. 0000 $t2

Shift instructions

� Bits movement

� Examples:

� Shift right logicalsrl $t0 $t0 4 ($t0 = $t0 >> 4 bits) 01110110101

0

� Shift left logicalsll $t0 $t0 5 ($t0 = $t0 << 5 bits)

� Shift right arithmeticsra $t0 $t0 2 ($t0 = $t0 >> 2 bits) 11110110101

01110110101 0


Example

li $t0, 5li $t1, 6

sra $t0, $t1, 1



Example

li $t0, 5li $t1, 6

sra $t0, $t1, 1

Waht is the value of $t0?

000 …. 0110 $t1


000 …. 0110 $t1shift one bit to right000 ….. 0011 $t0

Example

li $t0, 5li $t1, 6

sra $t0, $t1, 1



Example

li $t0, 5li $t1, 6

sra $t0, $t1, 1


000 …. 0110 $t1


000 …. 0110 $t1Shit one bit to left000 ….. 1100 $t0

Rotations

� Bits movement

� Example:

� Rotate leftrol $t0 $t0 4 rotate 4 bits

01110110101

� Rotate rightror $t0 $t0 5 rotate 5 bits

01110110101


Comparison instructions

� seq $t0, $t1, $t2 if ($t1 == $t2) $t0 = 1; else $t0 = 0� sneq $t0, $t1, $t2 if ($t1 !=$t2) $t0 = 1; else $t0 = 0� sge $t0, $t1, $t2 if ($t1 >= $t2) $t0 = 1; else $t0 = 0� sgt $t0, $t1, $t2 if ($t1 > $t2) $t0 = 1; else $t0 = 0� sle $t0, $t1, $t2 if ($t1 <= $t2) $t0 = 1; else $t0 = 0� sle $t0, $t1, $t2 if ($t1 <= $t2) $t0 = 1; else $t0 = 0� slt $t0, $t1, $t2 if ($t1 < $t2) $t0 = 1; else $t0 = 0


Comparison instructions

� seq $t0, $t1, $t2 Set if equal� sneq $t0, $t1, $t2 Set if no equal� sge $t0, $t1, $t2 Set if greater or equal� sgt $t0, $t1, $t2 Set if greater than� sle $t0, $t1, $t2 Set if less or equal� sle $t0, $t1, $t2 Set if less or equal� slt $t0, $t1, $t2 Set if less than


Branch instructions

� Alter the flow of control and the sequence of instructions

� Types:� Conditional branches:� beq $t0 $t1 0xE00012

� Branch to address 0xE00012, if $t0 == $t1� beqz$t1 address� beqz$t1 address

� Branch to instruction labeled with address if$t1 == 0

� Unconditionalbranches:� Always branch

j 0x10002Eb address

� Function calls:� jal 0x20001E …… jr $ra


Branch instructions

� beqz $t0, address Branch if $t0 == 0� beq $t0, $t1, address Branch if equal (t0 == t1)� bneq $t0, $t1, address Branch if not equal (t0 ≠ t1)� bge $t0, $t1, address Branch if greater or equal (t0 ≥ t1)� bgt $t0, $t1, address Branch if greater than (t0 > t1)� bgt $t0, $t1, address Branch if greater than (t0 > t1)� ble $t0, $t1, address Branch if less or equal (t0 ≤ t1)� blt $t0, $t1, address Branch if less than (t0 <t1)


Control flow structures

while

int i;

i=0;while (i < 10) {

li $t0 0

li $t1 10

while: bge $t0 t1 end

# action


{/* action*/i = i + 1 ;

}}

addi $t0 $t0 1

b while

end: ...

Example

� Calculate 1 + 2 + 3 + …. + 10

i=0;s=0;while (i < 10)


while (i < 10) {

s = s + i;i = i + 1;

}}

� Result in $t1

Solution

� Calculate 1 + 2 + 3 + …. + 10

i=0;s=0;while (i < 10)

li $t0 0li $t1 0li $t2 10


while (i < 10) {

s = s + i;i = i + 1;

}}

li $t2 10while: bge $t0 t2 end

add $t1 $t1 $t0addi $t0 $t0 1b while

end: ...

� Result in $t1

Example

� Calculate the number of 1’s of a register ($t0). Result in $t3.

i = 0;n = 45; # number


n = 45; # numbers=0;while (i < 32) {

b = last bit of ns = s + b;sift n one bit torighti = i + 1 ;

}}

Solution

� Calculate the number of 1’s of a register ($t0). Result in $t3

i = 0;n = 45; # number

li $t0 0 #ili $t1 45 #n


n = 45; # numbers=0;while (i < 32) {

b = last bit of ns = s + b;sift n one bit torighti = i + 1 ;

}}

li $t1 45 #nli $t2 32li $t3 0 #s

while: bge $t0 t2 endand $t4 $t1 1add $t3 $t3 $t4srl $t1 $t1 1addi $t0 $t0 1b while

end: ...

Example

� Obtain the 16 first bits of a register ($t0) and store them in the 16 last bits of other register ($t1)


Solution

� Obtain the 16 first bits of a register ($t0) and store them in the 16 last bits of other register ($t1)

srl $t1, $t0, 16


01110110101 Shift 16 bits to right0


if

int b1 = 4;int b2 = 2;

if (b2 == 8) {b1 = 0;

li $t0 4

li $t1 2

li $t2 8


b1 = 0;}...

bneq $t0 $t2 end

li $t0 0

end: ...


if-else

int a=1; int b=2;

if (a < b){

// action 1

li $t1 1

li $t2 2

blt $t1 $t2 then # cond.

else : ...


// action 1 } else{

// action 2 }

else : ...

# action 2

b end # uncond.

then: ...

# action 1

end: ...

Example

� Determine if the number stored in $t2 is even. If $t2 is even the program stores 1 in $t1, else stores 0 in $t1


Solution

� Determine if the number stored in $t2 is even. If $t2 is even the program stores 1 in $t1, else stores 0 in $t1

li $t2 9


li $t1 2

rem $t1 $t2 $t1 # remainder

beq $t1 $0 then # cond.

else: li $t1 0

b end # uncond.

then: li $t1 1

end: ...

Example

� Determine if the number stored in $t2 is even. If $t2 is even the program stores 1 in $t1, else stores 0 in $t1. In this case, analyze the last bit


Solution

� Determine if the number stored in $t2 is even. If $t2 is even the program stores 1 in $t1, else stores 0 in $t1. In this case, analyze the last bit

li $t2 9


li $t1 1

and $t1 $t2 $t1 # get the last bit

beq $t1 $0 then # cond.

else: li $t1 0

b end # uncond.

then: li $t1 1

end: ...

Example

� Calculate an

� a in $t0� n in $t1� Result in $t2

a=8n=4;


n=4;i=0;p = 1;while (i < n) {

p = p * ai = i + 1 ;

}}

Solution

� Calculate an

� a in $t0� n in $t1� Result in $t2

a=8n=4;

li $t0 8li $t1 4


n=4;i=0;p = 1;while (i < n) {

p = p * ai = i + 1 ;

}}

li $t1 4li $t2 1li $t4 0

while: bge $t4 $t1 endmul $t2 $t2 $t0addi $t4 $t4 1b while

end: move $t2 $t4

Contents

� Basic concepts on assembly programming� MIPS32 assembly language� Instructions formats and addressing modes� Procedure calls and subroutines


SPIM simulator

� SPIM is a simulator of the MIPS architecture

� Multiplatform:� Linux� Windows� MacOS

http://pages.cs.wisc.edu/~larus/spim.html


� MacOS

SPIM simulator (other version)

� SPIM is a simulator of the MIPS architecture

� Multiplatform:� Linux� Windows

http://sourceforge.net/projects/spimsimulator/files/


� Windows� MacOS

Exercise

� Install the SPIM simulator � http://pages.cs.wisc.edu/~larus/spim.html� http://sourceforge.net/projects/spimsimulator/files/


� Use the simulator with small assembly programs

MIPS Architecture


Register bank

1617181920212223

� 32 registers� 4 bytes of size (one

word )� Use$

01234567


232425262728293031

789101112131415

Register bank

0 $zero1234567

1617181920212223

Constant zeroCannot be changed


789101112131415

232425262728293031

Register bank

0 $zero1234567

1617181920212223

Temprorary registers


78 $t0 $t89 $t1 $t910 $t211 $t312 $t413 $t514 $t615 $t7

232425262728293031

Register bank

0 $zero $s01 $s12 $s23 $s34 $s45 $s56 $s67 $s7

1617181920212223

Preserved values


7 $s78 $t0 $t89 $t1 $t910 $t211 $t312 $t413 $t514 $t615 $t7

232425262728293031

Register bank

0 $zero $s0 1 $s12 $v0 $s23 $v1 $s34 $a0 $s45 $a1 $s56 $a2 $s67 $a3 $s7

1617181920212223


7 $a3 $s78 $t0 $t89 $t1 $t910 $t211 $t312 $t413 $t5 $sp14 $t6 $fp15 $t7 $ra

232425262728293031

Arguments and subroutines

Register bank

0 $zero $s0 1 $at $s12 $v0 $s23 $v1 $s34 $a0 $s45 $a1 $s56 $a2 $s67 $a3 $s7

1617181920212223


7 $a3 $s78 $t0 $t89 $t1 $t910 $t2 $k011 $t3 $k112 $t4 $gp13 $t5 $sp14 $t6 $fp15 $t7 $ra

232425262728293031

Others

Memory layout

� 4GB of memory

� A part for the processes

� Other part reserved for a mini operating system. First 4 MB


Memory layout for a program


Memory layout for a program

� A user program is divided in segments:� Stack segment

� Local variables� Function contexts

� Data segments� Static data

Stack segment01011001

$sp

01011001

$fp


Static data� Code segment (text)

� Program code

Text segment

Data segment

01011001

$gp

01011001

pc

Program structure

.data

# Global static definitions

Assembly directivesData section


# Global static definitions

.text

# instructions

Code section

SPIM simulator

Codesegment

Registerbank

$0, $1, $2, …

$f0, $f1, …


Data segment

Stacksegment

Others

SPIM simulator

Codesegment

Registerbank

$0, $1, $2, …

$f0, $f1, …


Data segent

Stacksegment

Example: Hello world…

.data

msg_hola: .asciiz "Hello world\n"

.text

Hello.s

65Computer Structure

.text

.globl main

main:

# printf(" Hello world\n") ;

li $v0 4

la $a0 msg_hola

syscall

ARCOS


Hello.s

# coments

label:Instruction/pseudoinstructino

.directive.directive

operands


.data


.text

.globl main

main:

# printf(" Hello world\n") ;

li $v0 4

la $a0 msg_hola

syscall

Hello.s

ARCOS


.data


.text

.globl main

Hello.s


.globl main

main:

# printf("Hello world\n") ;

li $v0 4 #system call code

la $a0 msg_hola

syscall

ARCOS

Directives

Directives Description

.data Data segment definition

.text Code segment definition

.ascii “string” String definition without NULL terminator

.asciiz “string” String definition with NULL terminator

.byte 1, 2, 3 Definition of bytes in memory


.byte 1, 2, 3 Definition of bytes in memory

.half 300, 301, 302 Definition of half-words

.word 800000, 800001 Definition of words

.float 1.23, 2.13 Definition of float values

.double 3.0e21 Definition of double values

.space 10 Reserve 10 bytes

.extern label n Label is global and extern of size n

.globl label Label is global

.align n Align next data to 2n̂

Static data definition


System calls

� The SPIM simulator provides a small operating system with 17 services

� How to invoke:� Call code in $v0.� Call code in $v0.� Arguments in registers.� Execute syscallinstruction


System calls

Service Call code($v0)

Arguments Result

print_int 1 $a0 = integer

print_float 2 $f12 = float

print_double 3 $f12 =double


print_double 3 $f12 =double

print_string 4 $a0 = string

read_int 5 integer in $v0

read_float 6 float in $f0

read_double 7 double in $f0

read_string 8 $a0=buffer, $a1=length

sbrk 9 $a0=amount Address in $v0

exit 10

System calls

Service Call code($v0)

Arguments Result

print_char 11 $a0 (ASCII code)

read_char 12 $v0 (ASCII code)

open 13 Equivalentto $v0 = open($a0,$a1, $a2)


open 13 Equivalentto $v0 = open($a0,$a1, $a2)

read 14 Equivalent to $v0 = read ($a0, $a1, $a2)

write 15 Equivalent to $v0 = write($a0, $a1, $a2)

close 16 Equivalent to $v0 = close($a0)

exit2 17 Finish the program. Return code in $a0

Example


Memory model.

Byte addressing

� Byte addressingrefers to hardware architectures which support accessing individual bytes of data rather than only larger units called words (most of computers)

� A computer with addresses of n bits can address 2n bytes� A 32-bit computer (MIPS32) can address 232 bytes of


� A 32-bit computer (MIPS32) can address 2bytes of memory = 4 GB

� MIPS includes instructions to access:� Individual bytes� Words (4 consecutive bytes )

Memory model.

Byte addressing

Byte (content)

012345

Byte addresses

Address: 6 (000110)Content: 00001101 (9)


56 00001101

2n-1

Address space

Byte addressing

0x0F0000000x0F000001

Address: 0x0F000002Content: 00001101 (9)

Byte (content)

Byte addresses


0x0F0000010x0F000002 000011010x0F000003

Address space

012345

� For performance reasons, main memories use words of 32 or 64 bits

� The memory is word addressed� The memory map and the physical

memory are differents

Byte (content)

Byte addresses


56 00001101

2n-1

?

Address space and physical memory

0 71 82 43 345

Word of 32 bits(content)

Addresses ofwords

0 7 8 4 3 1234

byte 0 byte 1 byte 2 byte 3

Logical Physical

Byte (content)

Byte addresses


56

2n-1


2n-4

A 32-bit computer addresses the memory per bytes. Ithas an address space of 332 bytes and 230 words.

Memory access

� A 32-bit computer with byte addressing:� Words of 32 bits (four bytes)� Can address 232 bytes� The memory has 230 words� There are instructions to access:


� There are instructions to access:� Bytes stored in an address: A31 … A0

� Words stored in an address: A31 … A0

� Physical access to memory uses word addresses: A31 … A2

� A byte in the A31 … A0 address is stored � In the word with address A31 … A2

� In byte A1A0 inside the word

Address space and byte addressing

012345

Address: 6 (000110)Content: 00001101 (9)

lb $t1, 0x6Byte (content)

Byte addresses


56 00001101

2n-1

$t131 24 23 16 15 8 7 0


012345

Address: 6 (000110)Content: 00001101 (9)


Byte addresses


56 00001101

2n-1

00001101$t131 24 23 16 15 8 7 0

00000000 0000000000000000


012345

address : 6 (000110)content: 11111101 (-3 in two’s complement)


Byte addresses


56 11111101

2n-1

$t131 24 23 16 15 8 7 0


012345

Address: 6 (000110)Content: 11111101 (-3 in two’s complement)


Byte addresses


56 11111101

2n-1

11111101$t131 24 23 16 15 8 7 0

11111111 1111111111111111


012345



Byte addresses


56 11111101

2n-1

11111101$t131 24 23 16 15 8 7 0

11111111 1111111111111111

Preserv the sign


012345


lbu $t1, 0x6Byte (content)

Byte addresses


56 11111101

2n-1

$t131 24 23 16 15 8 7 0


012345



Byte addresses


56 11111101

2n-1

11111101$t131 24 23 16 15 8 7 0

00000000 000000000000000


012345



Byte addresses


56 11111101

2n-1

11111101$t131 24 23 16 15 8 7 0

00000000 000000000000000

Load and does not preserv the sign

Address space and physical access to bytes

Byte

0 71 82 43 34 55 3

32-bit word

0 7 8 4 3 1 5 3 2 7234

lbu $t1, 0x5Logical Physical



5 36 27 7

$t131 24 23 16 15 8 7 0


Byte

0 71 82 43 34 55 3

32-bit word

0 7 8 4 3 1 5 3 2 7234


byte 0 byte 1 byte 2 byte 30x5


5 36 27 7

To access the byte of this address:

0x5 = 00000…….000101

$t131 24 23 16 15 8 7 0


Byte

0 71 82 43 34 55 3

32-bit word

0 7 8 4 3 1 5 3 2 7234



0x1


5 36 27 7

We transfer the second word:

00000…….000101

$t131 24 23 16 15 8 7 0

30


Byte

0 71 82 43 34 55 3

32-bit word

0 7 8 4 3 1 5 3 2 723



0x1


5 36 27 7

The word is transferred to the processor

5 3 2 7

$t131 24 23 16 15 8 7 0

Address space and and physical access to

bytes

Byte

0 71 82 43 34 55 3

32-bit word

0 7 8 4 3 4 5 3 2 781216




5 36 27 7

$t131 24 23 16 15 8 7 0

5 3 2 7

Copy the byte01 (A1 A0) of the word

0 0 0 3

00000…….0001012

Storing words in memory

012345

A word: four bytes

Word stored in byte 0

Word storedin byte 4

Byte (content)

Byte addresses


5678

2n-1

Word storedin byte 4


012345 byte0 byte1 byte2 byte3

32-bit word?

Byte (content)

Byte addresses


5678

2n-1

31 24 23 16 15 8 7 0

+ significant - significant


31 24 23 16 15 8 7 0

+ significant - significant

byte0 byte1 byte2 byte3

32-bit word

A A+1

AA+1

byte0 byte1

byte3 byte2


LittleEndian

A+1A+2A+3

A+1A+2A+3

byte1byte2byte3

byte2byte1byte0

The number 27(10 = 11011(2 = 000000000000000000000000000011011

A A+1A+2A+3

AA+1A+2A+3

00000000000000000000000000011011

BigEndian

LittleEndianBigEndian

00011011000000000000000000000000

Communication problems in computers

with different architectures

The number 27(10 = 11011(2 = 000000000000000000000000000011011

A A+1A+2

AA+1A+2

000000000000000000000000


A+2A+3

A+2A+3

0000000000011011




The number 27(10 = 11011(2 = 000000000000000000000000000011011

A A+1A+2

AA+1A+2

000000000000000000000000


A+2A+3

A+2A+3

0000000000011011

LittleEndianBigEndianNetwork transfer



The number 27(10 = 11011(2 = 000000000000000000000000000011011

A A+1A+2

AA+1A+2

000000000000000000000000

000000000000000000000000


A+2A+3

A+2A+3

0000000000011011

LittleEndianBigEndianNetwork transfer 00011011

Communication problems in computer


The number 27(10 = 11011(2 = 000000000000000000000000000011011

A A+1A+2

AA+1A+2

000000000000000000000000

000000000000000000000000


A+2A+3

A+2A+3

0000000000011011


00011011

The number stored is : 000110110000000000000000000000000Not 27

Space address and word addressing

Byte

01234 000000005 00000000

Address: 4 (000110)Content : 00000000000000000000000100001101(2 = 269(10

BigEndian

lw $t1, 0x4Logical


5 000000006 000000017 00001101

BigEndian

$t131 24 23 16 15 8 7 0

Address space and physical word

addressing

Byte 32-bit word

0 1 00000000 00000000 00000001 00001101234

lw $t1, 0x4Logical Physical


01234 000000005 00000000


5 000000006 000000017 00001101

$t131 24 23 16 15 8 7 0


addressing

Byte 32-bit word

0 1 00000000 00000000 00000001 0000110123



01234 000000005 00000000

0x4


5 000000006 000000017 00001101

Acces to the word in address:0x4 = 00000…….000100

$t131 24 23 16 15 8 7 0


addressing

Byte 32-bit word

0 1 00000000 00000000 00000001 0000110123



01234 000000005 00000000

0x4


5 000000006 000000017 00001101

Transfer the word1

00000000 00000000 00000001 00001101

$t131 24 23 16 15 8 7 0


addressing

Byte 32-bit word

0 1 00000000 00000000 00000001 0000110123



01234 000000005 00000000


5 000000006 000000017 00001101

Copy the word

00000000 00000000 00000001 00001101

$t131 24 23 16 15 8 7 0

00000000 00000000 00000001 00001101

Differences among lw, lb, lbu, la

0x0F000000 0xCB0x0F000001 0x12

lw $t1, 0x0F000000Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02


0x0F000000 0xCB0x0F000001 0x12


Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

Copy the content of the word

$t131 24 23 16 15 8 7 0

11001011 00010010 00001000 00000010

0xCB 0x12 0x08 0x02


0x0F000000 0xCB0x0F000001 0x12

lbu $t1, 0x0F000002Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

Copy the content

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00001000

0x08


0x0F000000 0xCB0x0F000001 0x12

la $t1, 0x0F000000

Copy the address, notthe content

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

00001111 00000000 00000000 00000000

0x0F 0x00 0x00 0x00

Example

0x0F0000000x0F000001

li $t1, 18li $t2, 24

Byte (content)

Byte addresses


0x0F0000010x0F0000020x0F0000030x0F000004 0x0F0000050x0F0000060x0F000007

Example

0x0F0000000x0F000001

li $t1, 18li $t2, 24

Byte (content)

Byte addresses


0x0F0000010x0F0000020x0F0000030x0F000004 0x0F0000050x0F0000060x0F000007

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

$t231 24 23 16 15 8 7 0

00000000 00000000 00000000 00011000

Example

0x0F000000 000000000x0F000001 00000000

sw $t1, 0x0F000000

Write the content of a register (word ) in memory

Byte (content)

Byte addresses


0x0F000001 000000000x0F000002 000000000x0F000003 000100000x0F000004 0x0F0000050x0F0000060x0F000007

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

$t231 24 23 16 15 8 7 0

00000000 00000000 00000000 00011000

Example

0x0F000000 000000000x0F000001 00000000

sw $t1, 0x0F000000sw $t2, 0x0F000004

Byte (content)

Byte addresses


0x0F000001 000000000x0F000002 000000000x0F000003 000100000x0F000004 000000000x0F000005 000000000x0F000006 000000000x0F000007 00011000

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

$t231 24 23 16 15 8 7 0

00000000 00000000 00000000 00011000

Example

0x0F0000000x0F000001 00010010

sb $t1, 0x0F000001

Write the less significant byte of register $t1 in memory

Byte (content)

Byte addresses


0x0F000001 000100100x0F0000020x0F0000030x0F000004 0x0F0000050x0F0000060x0F000007

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

Example

0x0F000000 000000000x0F000001 00000000


Byte addresses


0x0F000001 000000000x0F000002 000000000x0F000003 000100000x0F000004 000000000x0F000005 000000000x0F000006 000000000x0F000007 00011000

$t131 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

$t231 24 23 16 15 8 7 0

00000000 00000000 00000000 00011000

$t331 24 23 16 15 8 7 0

00000000 00000000 00000000 00010010

Data not aligned

Byte 32-bit word

0 1 00000000 00000000 000000012 0000110134

Logical Physical


012345 00000000

lw $t1, 0x05 ????


5 000000006 000000007 000000018 00001101

Palabra

A word stored in address 0x05 is not alignedbecause is stored in two consecutive memorywords.

Data alignment

This word is aligned.

Address

0

4

8

31 071523


812

16

20

24

Data alignment

� A datum of K bytes of size is aligned when the address D used for this datum:

D mod K = 0� Data alignment implies:

� Data of 2 bytes are stored in even addresses


Data of 2 bytes are stored in even addresses� Data of 4 bytes are stored in addresses multiple of 4� Data of 8 bytes (double) are stored in addresses multiple of 8

Data alignment

� Many computers does not allow the access to not aligned data:� Goal: reduce the number of memory accesses� Compilers assign addresses aligned to variables

� Intel architectures allow the access to not aligned data� We need several memory accesses


� We need several memory accesses

01 00000000 00000000 000011102 0000110134

32-bit word


Summary

� The instructions and data of a program must be loaded in memory for the execution

� All data and instructions have a memory address� In a 32-bit computer (as MIPS32)

� Registers have 32 bits� Registers have 32 bits� Memory can store bytes (8 bits)

� Instructions: memory → register: lb , lbu , sb� Instructions: register → memory: sb

� Memory can store words (32 bits)� Instructions: memory → register : lw� Instructions: register → memory : sw


Instructions and pseudo-instructions

� There is an assembly instruction per machine instruction:� 32 bits� addi $t1, $t1, 2

� A pseudo-instruction is equivalent to several machine instructions:instructions:� li $t1, 0x00800010

� Need more than 32 bits, but can be used as an pseudo-instruction .

� Is translated to:� lui $t1, 0x0080� ori $t1, $t1, 0x0010


Instructions and pseudo-instructions

� The pseudo-instruction move

move reg2,reg1

� Is translated to:

add reg2,$zero,reg1add reg2,$zero,reg1


Format of the memory access instructions

lwswlb Register , memory addresslbsblbu


Register , memory address

� Number that represent sthe address� Symbolic label that represents the

adress� (register): address stored in a

register� num(register): represent sthe

address that is obtained addingnum and the address stored in theregister

Other uses of the instructions la, lw, lb

0x0F000000 0xCB0x0F000001 0x12

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0


0x0F000000 0xCB0x0F000001 0x12

la $t0, 0x0F000002

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0


0x0F000000 0xCB0x0F000001 0x12

la $t0, 0x0F000002

Copy the address, notthe content

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0

00001111 00000000 00000000 00000010


0x0F000000 0xCB0x0F000001 0x12

lbu $t0, ($t1)

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0

00001111 00000000 00000000 00000010


0x0F000000 0xCB0x0F000001 0x12

lbu $t0, ($t1)

Copy the byte stored in the memory stored in register$t1

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0

00001111 00000000 00000000 00000010

00000000 00000000 00000000 00001000


0x0F000000 0xCB0x0F000001 0x12

lw $t0, ($t1)

Copy the word stored in memory address stored in register $t1

Byte (content)

Byte addresses


0x0F000001 0x120x0F000002 0x080x0F000003 0x02

$t131 24 23 16 15 8 7 0

$t031 24 23 16 15 8 7 0

00001111 00000000 00000000 00000000

11001011 00010010 00001000 00000010


� lbu $t0, 0x0F000002� Absolute/direct. Load in $t0 the byte stored in

0x0F000002� lbu $t0, ($t1)

� Register indirect. Load in $t0 the byte stored in the memory � Register indirect. Load in $t0 the byte stored in the memory address stored in register $t1

� lbu $t0, 80($t1)� Relative. Load in $t0 the byte stored in the memory address

that is obtained adding the content of $t1 to 80


Instructions to write in memory

� sw $t0, 0x0F000000 � Copy the word stored in $t0 in the address 0x0F000000

� sb $t0, 0x0F000000 � Copy the byte stored in $t0 in the address 0x0F000000


Basic data types

Integers

int result;

int op1 = 100 ;

int op2 = -10 ;

...

.data

result: .word 0

op1: .word 100

op2: .word -10

...

. text


main ()

{

result= op1 + op2 ;

...

}

. text

.globl main

main: lw $t1 op1

lw $t2 op2

add $t3 $t1 $t2

la $t4 result

sw $t3 ($t4)

...

Exercise

� Write an assembly fragment similar to int b;int a = 100 ;int c = 5 ;int d;

main () main ()

{

d = 80;

b = -(a+b*c+a);

}

Assuming that a, b, c and d are variables stored in memory


Basic data types

Arrays

Init address v[0]v[1]v[2]

� Collection of data items stored consecutively in memory

� The address of j element is:Init_address + j * p

ARCOS Computer Structure

v[N-1]

Where p is the size of each item

133

Basic data types

Arrays

int vec[5] ;...

main () {

vec[4] = 8;

.data

. align 2 #next item aligen to 4

vec: .space 20 #5 elem. *4 bytes

.text

.globl main


vec[4] = 8;

}

main: la $t1 vec

li $t2 8

sw $t2 16($t1)

...

Basic data types

Arrays

int vec[5] ;...

main () {

vec[4] = 8;

.data

. align 2 #next item align to 4


.text

.globl main


vec[4] = 8;

}

main: li $t0 16

la $t1 vec

add $t3, $t1, $t0

li $t2 8

sw $t2, ($t3)

...

Basic data types

Arrays

int vec[5] ;...

main () {

vec[4] = 8;

.data

. align 2 #next item align to 4 vec: .space 20 #5 elem. *4 bytes

.text

.globl main

main :


vec[4] = 8;}

main :

li $t2 8

li $t1 16

sw $t2 vec($t1)

...

Exercise

� Let V an array on integer elements� V represents the init address

� What is the address of V[5]?� Which are the instructions to load in register $t0 the value of � Which are the instructions to load in register $t0 the value of

v[5]?


Basic data types

Matrix

� A matrix m x nconsists of m arrays of lengthn

� Usually stored by rows� The element aij is stored in address:

init_address+ (i · n + j) × p

1º array

2º array

ARCOS Computer Structure

init_address+ (i · n + j) × p

wherep is the size of each item

2º array

138

Basic data types

Matrix

int vec[5] ;int mat[2][3] = {{11,12,13},

{21,22,23}};...

main ()

.data



mat: .word 11, 12, 13

. word 21, 22, 23

...


main () {

m[0][1] = m[0][0] + m[1][0] ;

...}

.text

.globl main

main: lw $t1 mat+0

lw $t2 mat+12

add $t3 $t1 $t2

sw $t3 mat+4

...

Basic data types

String

char c1 ;

.data

c1: .space 1 # 1 byte

c2: .byte ‘h’

ac1: . asciiz “hola”

...

. text

� Array of bytes� The end of the string is

indicated with 0


char c1 ;char c2=‘h’ ;char *ac1 = “hola” ;...

main () {

printf(“%s”,ac1) ;...

}

. text

.globl main

main: li $v0 4

la $a0 ac1

syscall

...

Basic data types

String length

char c1 ;char c2=‘h’ ;char *ac1 = “hola” ;Char *c;...

.data

c1: .space 1 # 1 byte

c2: .byte ‘h’

ac1: .asciiz “hola”

...

.text

.globl main


main () {

c = ac1; int l = 0;while (*c != NULL) {

c++; l++;}printf(“%d”, l);...

}

main: la $t0, ac1

li $a0, 1

lbu $t1, ($t0)

buc: beqz $t1, fin

addi $t1, $t1, 1

addi $a0, $a0, 1

lbu $t1, ($t0)

b buc

fin: li $v0 1

syscall

...

Arrays and strings

� Review:� lw $t0, 4($s3) # $t0 M[$s3+4]� sw $t0, 4($s3) # M[$s3+4] $t0


Exercise

� Write a program equivalent to:

int vec[100] ;...

main () {

int i = 0;


int i = 0;

for (i = 0; i < 100; i++)vec[i] = 5;

}

� Assuming that $a0 stores the init address of vec

Exercise

� Write a program equivalent to:

int vec[100] ;...

main () {

int i = 0;


int i = 0;suma = 0;

for (i = 0; i < 100; i++)suma = suma + vec[i];

}

� $a0 stores the init address of v. The result must be stored in $v0

Exercise

� Write a program that:� Calculate the number of occurrences of a char in a string

� String address stored in $a0� Char to look for in $a1� Result must be stored in $v0


� Result must be stored in $v0

Floating-point instructions

� Floating-point register bank (32 registers)� $f0, $f1, .. $31

� For single precision: $f0, .. $f31� For float variables

� For double precision (64 bits) pairs of registers: $f0, $f2, $f4, � For double precision (64 bits) pairs of registers: $f0, $f2, $f4, ….� Doublevariables


ALU

BUS

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

Floating-point instructions

� Single precision addition (add.s) and double (add.d)� Single precision subtraction (sub.s) and double (add.d)� Single precision multiplication (mul.s) and double (mul.d)� Single precision division (div.s) and double (div.d)� Single precision comparison (c.x.s) and duoble (c.x.d)� Single precision comparison (c.x.s) and duoble (c.x.d)

� x can be: eq, neq, lt, le, gt, ge� Conditional branch in floating point

� True (bclt) or false (bclf)


Floating-point operations

� IEEE 754 floating-point operations on FPU

� Examples:� Addition in single precisionadd.s $f0 $f1 $f4

f0 = f1 + f4B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

� Addition in double precisionadd.d $f0 $f2 $f4

(f0,f1) = (f2,f3) + (f4,f5)� Other operations in single precision:

� add.s, sub.s, mul.s, div.s, abs.s

� Operation in double precision:� add.d, sub.d, mul.d, div.d, abs.d

ALU

BUS


Floating-point operations

� Transfer across memory and floating-point registers

� lwc1 $f0, address:� Load in $f0 a float value

� swc1 $f0, address:� Store the float value loaded in $f0 in memory

� l.s y s.s are equivalents� l.s y s.s are equivalents� ldc1 $f0, address:

� Load in ($f0, $f1) a doublevalue� sdc1 $f0, address

� Store the doublevalue stored in ($f0, $f1) in memory

� l.d y s.d are equivalents


Basic data types

float

float result;

float op1 = 100 ;

float op2 = -10 ;

...

.data

result: .float

op1: .float 100

op2: .float -10

...

. text


main ()

{

result= op1 + op2 ;

...

}

. text

.globl main

main: l.s $f0 op1

l.s $f1 op2

add.s $f3 $f1 $f2

s.s $f3 result

...

Basic data types

double

double result;

double op1 = 100 ;

double op2 = -10.27 ;

...

.data

result: .double

op1: .double 100

op2: .double -10.27

...

. text


main ()

{

result = op1 * op2 ;

...

}

. text

.globl main

main: l.d $f0 op1 # ($f0,$f1)

l.d $f2 op2 # ($f2,$f3)

mul.d $f6 $f0 $f2

s.d $f6 result

...

Operations with registers (CPU, FPU)

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

B.R. enteros

t0

CPU

t1

mtc1 $t0 $f1


ALU

BUS

$f31$f31 $f30$f30…

ALU

BUS

B.R. enteros

U.C

Operations with registers (CPU, FPU)

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

B.R. enteros

t0

CPU

t1

mfc1 $t0 $f1


ALU

BUS

$f31$f31 $f30$f30…

ALU

BUS

B.R. enteros

U.C

Operations with registers (FPU, FPU)

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

mov.s $f0 $f1

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2


ALU

BUS

$f31$f31 $f30$f30…

ALU

BUS

B.R.$f31$f31 $f30$f30…

$f0 ← $f1

Operations with registers (FPU, FPU)

mov.d $f0 $f2

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2


($f0, $f1) ← ($f2, $f3)

ALU

BUS

$f31$f31 $f30$f30…

ALU

BUS

B.R.$f31$f31 $f30$f30…

Conversion operations

� cvt.s.w $f2 $f1

� Convert from integer ($f1) to single precision ($f2)� cvt.w.s $f2 $f1

� Convert from single precision ($f1) to integer ($f2)� cvt.d.w $f2 $f0cvt.d.w $f2 $f0

� Convert from integer ($f0) to double precision ($f2)� cvt.w.d $f2 $f0

� Convert from double precision ($f0) ro integer ($f2)� cvt.d.s $f2 $f0

� Convert from single precision ($f0) to double f2)� cvt.s.d $f2 $f0

� Convert from double precision ($f0) to single ($f2)


Load instructions

� li.s $f4, 8.0

� Load the float value 8.0 in register $f4 � li.d $f2, 12.4

� Load the double value 12.4 in register $f2


Example

float PI = 3,1415;

int radio = 4;

float length;

Length = PI * radio;

.text

.globl main

main:

li.s $f0 3.1415li.s $f0 3.1415

li $t0 4

mtc1 $t0 $f1 # 4 en Ca2

cvt.s.w $f2 $f1 # 4 ieee754

mul.s $f0 $f2 $f1


Example

float PI = 3,1415;

int radio = 4;

float length;

length = PI * radio;

.text

.globl main

main:

li.s $f0 3.1415li.s $f0 3.1415

li $t0 4

mtc1 $t0 $f1 # 4 en Ca2

cvt.s.w $f2 $f1 # 4 ieee754

mul.s $f0 $f2 $f1


ALU

BUS

B.R.

FPU

$f1$f1 $f0$f0

$f31$f31 $f30$f30……

$f3$f3 $f2$f2

ALU

BUS

B.R. enteros

t0

CPU

U.C

t1

Exercise

� Write an assembly program that:� Load the value -3.141516 in register $f0� Obtain the exponent and mantissa values stored in the

register $f0 (IEEE 754 format)� Display the sign � Display the sign � Display the exponent � Display the mantissa


Solution

.data

line: .asciiz "\n"

.text

.globl mainmain:

li.s $f0, -3.141516

#Displaymov.s $f12, $f0

li $s0, 0x80000000 #signand $a0, $t0, $s0srl $a0, $a0, 31li $v0, 1syscall

la $a0, lineli $v0, 4syscall

li $s0, 0x7F800000 #exponentand $a0, $t0, $s0srl $a0, $a0, 23

mov.s $f12, $f0li $v0, 2syscall


# copy to prrocessormfc1 $t0, $f12


srl $a0, $a0, 23li $v0, 1syscall


li $s0, 0x007FFFFF #mantissaand $a0, $t0, $s0li $v0, 1syscall

jr $ra

Contents



Information of an instruction

� The instruction size is adjusted to word (or multiples)

� Are divided in fields:� Operationn to do� Operands

� There can be implicit operands� There can be implicit operands

� The instruction format: form of representation of an instruction composed of fields of binary numbers:� The field size limits the number of values to encode


Information of an instruction

� Very few formats:� Each instruction belongs to a format

� Example: instruction formats in MIPS

op. rs rt rd shamt func.

op. rs rt offset

16 bits

op. offset

26 bits

5 bits 5 bits 5 bits 5 bits 6 bits6 bits

5 bits 5 bits6 bits

6 bits

Tipo Rarithmetic

Tipo Jbranches

Tipo IImmediatetransfer


Instruction fields

� Each field encodes:

� Operation (Operation code)� Instruction and format used

� Operands� Location of operands� Location for results� Location of next instruction (in branches)

� Implicit : PC PC + ‘4’ (next instruction)� Explicit: j 0x01004 (PC modified)


Locations of operands

� In the instruction� In registers (processor)� Main memory� Input/output modules


Addressing modes

� Procedure that allows to localize the operands� Types

� Immediate� Direct� Register� Indirect� Indirect� Register indirect� Relative

� Base-register� Index-register� PC-relative

� Implicit � Stack


Immediate addressing

�Operand is in the instruction.

�Example: �li $a0 25�addi $t1 $t2 50

� Fast: Memory access is not required� More size is needed:

� li $t1, 0x00800010� Need more than 32 bits; equivalent to:

� lui $t1, 0x0080� ori $t1, $t1, 0x0010


Register addressing

� Operand is in a register.

� Example: move $a0 $a1� $a0 and $a1 are encoded in the instruction

op rs rt 16 bits

� Advantages:� No memory access is required� Small address field� Faster access

op rs rt 16 bits

Regs.

operand


Direct addressing

� Operand in memory. The instruction encodes the address

� Example (MIPS): lw $t1, 0xFFF0� Load in $t1 the word stored in address 0xFFF0

memory

Operand

� Problems:� Memory access time is larger than register access time� Large fields=> large instructions

op rs rt 16 bits

Operand


Register indirect addressing

� The instruction has the register where the address is stored

� Example (MIPS): lw $a0 ($a1)� Load in $a0 the word stored in address stored

in $a1.

memory

opernad

address

Regs.

� Advantages:� Small fields� MIPS can allow in a register an address for addressing the entire memory

(registers have 32 bits)

op rs rt 16 bits


Indirect addressing

� The instruction has the address where the operand address isstored (not available in MIPS)

� Example: LD R1 [ADDR] (IEEE 694)� Load in R1 the item stored in the address stored in ADDR

Memory

Address 2

operand

� Problems:� Several memory accesses are required� Slower instructions

op address 1


Base-register addressing

Register ROp. cod.

Instruction

Displacement

� Example: lw $a0 12($t1)� Load in $a0 the word stored in address: $t1 + 12

Register ROp. cod.

Memory

Operand Memory address

Registers bank

Displacement

+


Uses in arrays

int vec[5] ;...

main () {

.data



.text

.globl main{v[4] = 8;

}


main: la $t1 vec

li $t2 8

sw $t2 16($t1)

...

Index-register addressing

Register Rop. cod.

Instruction

address

� Example: lw $a0 address($t1)� Load in $a0 the word stored in address: $t1 + address

� $t1 represents an index

Register Rop. cod.

Memory

OperandIndex/displacement

Registers

address

+


Use in arrays

int vec[5] ;...

main () {

.data

. align 2 # next item align to 4


.text

.globl main{v[3] = 8; v[4] = 8;

}


main: li $t1 12

li $t2 8

sw $t2 vec($t1)

addi $t1 $t1 4

sw $t2 vec($t1)

...

PC-relative addressing

Instruction

� Example: beqz $t1 label� If $t1 == 0, then PC => PC = PC + label

� Label represents a displacement

Op. code

PC +

Displacement


Program counter in MIPS 32

� Registers of 32 bits� Program counter of 32 bits� Instructions of 32 bits (one word)� Program counter stores instruction address� Next instruction is 4 bytes beyond� Program counter is updated:� Program counter is updated:

� PC = PC + 4


address: Instruction:

0x00400000 or $2,$0,$0

0x00400004 slt $8,$0,$5

0x00400008 beq $8,$0,3

0x0040000c add $2,$2,$4

0x00400010 addi $5,$5,-1

0x00400014 j 0x100001

PC-relative addressing in MIPS

� Instruction beq $9,$0, label is encoded as:

immediate

16

CO rs rt

6 5 5

� Label must be encoded in an “immediate” field� When $t0 == $1, what is the value for end label?

bucle: beq $t0,$1, end

add $t8,$t4,$t4addi $t0,$0,-1j bucle

end :


PC-relative addressing in MIPS

� When the condition in satisfied� PC = PC + (label * 4)

� Then:

bucle: beq $t0,$1, endadd $t8,$t4,$4t4add $t8,$t4,$4t4addi $t0,$0,-1j bucle

end:

� end== 3� When an instruction is executed, PC stores the addresss of next

instruction in memory


Use in loops

� End represents the address where the instruction move is stored

li $t0 8li $t1 4li $t2 1li $t4 0

while : bge $t4 $t1 end


while : bge $t4 $t1 endmul $t2 $t2 $t0addi $t4 $t4 1b while

end : move $t2 $t4

Use in loops

li $t0 8li $t1 4li $t2 1li $t4 0

while : bge $t4 $t1 endmul $t2 $t2 $t0addi $t4 $t4 1

0x0000100

0x0000104

0x0000108

0x000010C

li $t0 8

li $t1 4

li $t2 1

li $t4 0

Address Content


addi $t4 $t4 1b while

end : move $t2 $t40x0000110

0x0000114

0x0000118

0x000011C

0x0000120

bge $t4 $t1 end

mul $t2 $t2 $t0

addi $t4 $t4 1

b while

move $t2 $t4

Use in loops

li $t0 8li $t1 4li $t2 1li $t4 0

while : bge $t4 $t1 endmul $t2 $t2 $t0addi $t4 $t4 1

0x0000100

0x0000104

0x0000108

0x000010C

li $t0 8

li $t1 4

li $t2 1

li $t4 0

Address Content


addi $t4 $t4 1b while

end : move $t2 $t40x0000110

0x0000114

0x0000118

0x000011C

0x0000120

bge $t4 $t1 end

mul $t2 $t2 $t0

addi $t4 $t4 1

b while

move $t2 $t4

� end represents a displacement relative to current PC => 3

�PC = PC + 3 * 4

� while represents a displacement relative to current PC =>-4

�PC = PC + (-4)*4

Differences between b and j instructions

op. address

26 bits6 bits

Instruction j address

Branchaddress=> PC = address


op. displacement

16 bits5 bits 5 bits6 bits

Instruction b displacement

Branchaddress=> PC = address

Branch address => PC = PC + displacement

Implicit addressing

�The operand is not encoded in the instruction.

�Example : beqz $a0 label1� If $a0 is zero, branch to label� $a0 is an operand, $zero is the other one

� Advantages� Fast: No access memory is required.� Instructions shorter

op rs 16 bits


Satck addressing

PUSH Reg Push the content of a register (item)

top $sp

Stack grows to lower memory addresses

item

top

$sp


Stack addressing

POP Reg Pop the top of the stack (item)

Copy the element in a Reg


item

top $spitem

top

$sp


Stack addressing

188

� MIPS does not have PUSH or POP instructions� The stack pointer ($sp) is visible

� We assume that stack pointer points to the last element in the stack

PUSH $t0

sub $sp, $sp, 4sw $t0, ($sp)

POP $t0

lw $t0, ($sp)add $sp, $sp, 4


Examples of addressing types

� la $t0 label immediate� The second operand is an address� But this address is not accessed, the address is the operand

lw $t0 label direct� lw $t0 label direct� The second operand is an address� A memory access is required to obtain the final operand

� bne $t0 $t1 label PC-relative� Last operand represents a displacement� Label is encoded as a number that represents a displacement

relative to PC


Addressing modes in MIPS

� Immediate value� Register $r� Direct dir� Register indirect ($r)� Register relative displacement($r)� Register relative displacement($r)� PC-relative beq label� Stack-relative displacement($sp)


Instruction format

� A machine instruction includes:� Operation code� Operand addresses� Result address� Address of the next instruction� How the operands are represented


op. rs rt rd shamt func.

� How the operands are represented� A machine instruction is divided in fields� Example in MIPS:

Instruction format

� The size of an instruction is usually one word, but there can be instructions of several words� In MIPS the size of all instructions is one word (32 bits)

� Operation code:� With n bits we can encode 2n instructions� We can use extensions fields to encode more instructions

Example: in MIPS, arithmetic instructions have the operation


� Example: in MIPS, arithmetic instructions have the operation code 0. The operation is encode in func. field

op. rs rt rd shamt func.Type Rarithmetic

Instruction format

� The format specifies the meaning of each field in the instruction

� Format length: number of bits used to encode the instruction� The instruction is divided in fields� Very few formats

193

� Very few formats� In order to simplify the control unit design.

� Usually:� Fields of the same type have the same length.� Operation code is the first field


Format length

� Alternatives:� Unique length: All instructions with the same size

�MIPS32: 32 bits�PowerPC: 32 bits

� Variable: Different instructions can have different sizes

194

� Variable: Different instructions can have different sizes�How to know the length of an instruction? � Op. code�IA32 (Intel processors): variable number of bytes


Example: MIPS instruction formats195

CO rs rt

6 5 5

rd

5

func

6

sa

5

CO

6

immediate

26 add $t0, $t0, $t1


immediate

16

CO immediate

CO rs rt

6 5 5 addi $t0, $t0, 1

Example of MIPS formats

� MIPS Instruction:� add $8,$9,$10� Format:

CO rs rt

6 5 5

rd

5

func

6

sa

5


0 9 10 8 320

�Binary representation

� Decimal representation:

000000 01001 01010 01000 10000000000

CO rs rt rd funcsa

Example of MIPS formats

� MIPS Instruction:� addi $21,$22,-50� Format:

immediate

16

CO rs rt

6 5 5


� Binary representation

� Decimal representation:

immediateCO rs rt

8 22 21 -50

001000 10110 10101 1111111111001110

How to use the addi instruction with 32 bits

values?

� What happens when this instruction is used in a program?� addi $t0,$t0, 0xABABCDCD� The immediate value has 32 bits. This instruction cannot be

encoded in one word (32 bits)


How to use the addi instruction with 32 bits

values?

� What happens when this instruction is used in a program?� addi $t0,$t0, 0xABABCDCD� The immediate value has 32 bits. This instruction cannot be

encoded in one word (32 bits)� Solution:� Solution:

� This instruction is translated to:lui $at, 0xABABori $at, $at, 0xCDCDadd $t0, $t0, $at

� The $at is reserved to the assembler


Questions

� How does the unit control know the format of an instruction?

� How does the unit control know the number of operands of an instruction?

200

� How does the unit control know the format of each operand?


Operation code

� Fixed size:� n bits � 2n operation codes� m operation codes � log2m bits.

� Extension fields� MIPS (arithmetic-logic instructions)

201

� MIPS (arithmetic-logic instructions)� Op= 0; The instruction is encoded in func

� Variable sizes:� More frequent instructions= shorter sizes


op. rs rt rd shamt func.Tipo Raritméticas

Example

� A 16-bit computer has an instruction set of 60 instructions and a register bank with 8 registers.

� Define the format of this instruction: ADDx R1 R2 R3, where � Define the format of this instruction: ADDx R1 R2 R3, where R1, R2 and R3 are registers.


Solution

� Word of 16 bits

word-> 16 bits

60 instructions

8 registers (in RB)

ADDx R1(reg.), R2(reg.), R3(reg.)

16 bits


Solution

� To encode 60 instructions, 6 bits are required for the operation code

word-> 16 bits

60 instructions

8 registers (in RB)


16 bits

6 bits

Operationcode


Solution

� To encode 8 registers, 3 bits are required

word-> 16 bits

60 instructions

8 registers (in RB)


16 bits

6 bits 3 bits 3 bits 3 bits

Operationcode

Operands (3 registers )


Solution

� Spare one bit (16-6-3-3-3 = 1)

word-> 16 bits

60 instructions

8 registers (in RB)


16 bits

6 bits 3 bits 3 bits 3 bits 1 bit


Operationcode

Operands (3 registers )

Exercise

� A 16-bit computer, with byte memory addressing has 60 machine instructions and a register bank with 8 registers. What is the format for the instruction ADDV R1, R2, M, where R1 y R2 are registers and M represents a memory address?


Exercise

� A 32-bit computer with byte memory addressing has 64 machine instructions and 128 registers. Consider the instruction SWAPM addr1, addr2, that swaps the content of two memory addresses addr1 and addr2. � What is the memory address space of this computer?� What is the memory address space of this computer?� Define the format for this instruction.� Write a program fragment in MIPS32 equivalent to the

above instruction� If the instruction has to be encoded in one word, what is the

addresses range assuming that memory addresses are represented in binary?


CISC-RISC

� CISC: Complex Instruction Set Architecture(http://es.wikipedia.org/wiki/RISC) � Many instructions� Complex instructions� Irregular design

� RISC: Reduced Instruction Set Code (http://es.wikipedia.org/wiki/CISC)� RISC: Reduced Instruction Set Code (http://es.wikipedia.org/wiki/CISC)� Simple instructions� Very few instructions� Instructions with fixed size� Many registers� Most of instructions use registers� Parameters are passed using registers� Pipelined architectures


Execution modes

� The execution modes indicates the number of addresses and the type of operands that can be specified in an instruction.

�0 addresses � Stack.�1 address � Accumulator register.�2 addresses� Registers, Register-memory, Memory-

210

�2 addresses� Registers, Register-memory, Memory-memory

�3 addresses� registers, register-memory, memory-memory.


3 addresses model

� Registers� Three operands in registers.� Require load/store operations.� ADD .R0, .R1, .R2

� Memory-memory� Operands in memory addresses

211

� Operands in memory addresses� ADD /DIR1, /DIR2, /DIR3

� Register-memory� Hybrid.� ADD .R0, /DIR1, /DIR2� ADD .R0, .R1, /DIR1


Example

212

X = A + B * C

A

B

/DA

/DB


C

X

/DC

/DX

Execution model

3 addresses: R-R

213

LOAD .R0, /DBLOAD .R1, /DCMUL .R0, .R0, .R1LOAD .R2, /DAADD .R0, .R0, .R2

6 instructions

4 accesses to memory


ADD .R0, .R0, .R2STORE .R0, /DX

10 accesses to registers

3 addresses: M-M

214

MUL /DX, /DB, /DCADD /DX, /DX, /DA

2 instructions




2 addresses model

� Registers: � Two operands in registers� Load/store operations requiered� ADD .R0, .R1 (R0 <- R0 + R1)

� Memory-memory� Two operands in memory

215

� Two operands in memory� ADD /DIR1, /DIR2 (MP[DIR1] <- MP[DIR1] +

MP[DIR2])� Register-memory

� Hybrid.� ADD .R0, /DIR1 (R0 <- R0 + MP[DIR1])


2 addresses: R-R

216

LOAD .R0, /DBLOAD .R1, /DCMUL .R0, .R1LOAD .R3, /DAADD .R0, .R3

6 instructions



ADD .R0, .R3STORE .R0, /DX


2 addresses: M-M

217

MOVE /DX, /DBMUL /DX, /DCADD /DX, /DA

3 instructions




2 addresses: R-M

218

LOAD .R0, /DBMUL .R0, /DCADD .R0, /DASTORE .R0, /DX

4 instructions




1 address model

� All operations use an implicit operand:� Accumulator register� Example: ADD R1 -> AC <- AC + R1

� Load/store operations on the accumulator

219

� Operations to move data from the accumulator and other registers


1 address

220

LOAD /DBMUL /DCADD /DASTORE /DX

4 instructions



0 access to registers

0 addresses model

� All operations use the stack� Operands are placed on top of the stack

� The operation pop operands from the stack.� Result is stored on top of the stack� Two instructions:

221

� Two instructions:� PUSH� POP


Stack operations

222

PUSH 5


5

Stack operations

223

PUSH 5PUSH 7


5

7

Stack operations

224

PUSH 5PUSH 7ADD


12

Stack operations

225

PUSH 5PUSH 7ADDPOP /DX


0 addresses

226

PUSH /DBPUSH /DCMULPUSH /DAADD

6 intructions



ADDPOP /DX

10 accesses to stack memory

Contents



Procedures

� A procedure (function, subroutine) is a subprogram that does a specific task when is invoked� Receives arguments of input parameters� Return one o several results

� In assembly programming a procedure is associated with a � In assembly programming a procedure is associated with a symbolic name that represents the init address


Steps in the execution of a

procedure/function

� Pass the input parameters to the procedure� Transfer the flow control to the procedure� Acquire storage resources needed for the procedure� Make the task� Return the results� Return the results� Return to the previous point of control


Functions in high level languages

230

int main() {int z;z=factorial(x);print_int(z);

}

int factorial(int x) {int i;int r=1;for (i=1;i<=x;i++) {


}r*=i;

}return r;

}

Function calls in MIPS

231

factorial:

Function calls in MIPS (jal instruction)


…jal factorial…

jr $ra

Factorial represents the initaddress of the subroutine (function)


232

…

factorial:0x00401000


…jal 0x00401000…

jr $ra0x000010000x00001004

$ra = PC = 0x00001004 PC = 0x00401000


233

…

0x00401000


…jal 0x00401000…

jr $ra0x000010000x00001004

$ra = 0x00001004


234

…

0x00401000

Return (jr instruction)


…jal 0x00401000…

jr $ra0x000010000x00001004

PC = $ra = 0x00001004

$ra = 0x00001004


235

…

0x00401000


…jal 0x00401000…

jr $ra0x000010000x00001004

PC = $ra = 0x00001004

jal/jr instructions

� What is the behavior of jal instruction?� $ra $PC � $PC init address of the function

� What is the behavior of jr instruction?$PC $ra

236

� $PC $ra


Nested calls

…jal 0x00401000…

jal 0x000080000

jr $ra

0x00401000

0x000010000x00001004

0x00008000


…

$ra = PC = 0x00001004 PC = 0x00401000

jr $ra

Nested calls

…jal 0x00401000…

jal 0x000080000

jr $ra

0x00401000

0x004010200x00401024

0x000010000x00001004

0x00008000


…

$ra = PC = 0x00401024 PC = 0x00008000

jr $ra

Nested calls

…jal 0x00401000…

jal 0x000080000

jr $ra

0x00401000

0x004010200x00401024

0x000010000x00001004

0x00008000


…

PC = $ra = 0x00401024

jr $ra

Nested calls

…jal 0x00401000…

jal 0x000080000

jr $ra

0x00401000

0x004010200x00401024

0x000010000x00001004

0x00008000


…

PC = $ra = 0x00401024

jr $ra

?

Nested calls

…jal 0x00401000…

jal 0x000080000

jr $ra

0x00401000

0x004010200x00401024

0x000010000x00001004

0x00008000


…

PC = $ra = 0x00401024

jr $ra

?

The return address is lost

Where to store the return address?

� Computers have two storage elements:� Registers� Memory

� The number of registers is limited, so registers cannot be used � Return addresses are stored in main memory


� Return addresses are stored in main memory� In a program area called stack

Program execution

OperatingSystem

MainMemory

Code

Data

Disk


Data

Stack

Program

Executable File

Memory map of a process

� User programs are divided in segments:� Stack segment

� Local variables� Function context

Text segment

Data segment

01011001

pc

memory


� Function context� Data segment

� Static data, global variables� Text segment (code)

� Machine instructions

Data segment

Stack segment

01011001

$sp

Stack

PUSH Reg Push an element in stack (item)


top $sp


item

top

$sp

Stack

POP Reg Pop last element and insert it in a register (item)



item

top $spitem

top

$sp

Before to start

� MIPS does not have PUSH or POP instructions� Stack pointer ($sp ) is used to manage the stack

� We assume that stack pointer points to the last element in the stack

247


PUSH $t0

subu $sp, $sp, 4sw $t0, ($sp)

POP $t0

lw $t0, ($sp)addu $sp, $sp, 4

PUSH operation in MIPS

7 $sp


8

Initial state: stack pointer ($sp) points tto he last element in stack


7

$sp


8

subu $sp, $sp, 4

Substract 4 to stack pointer to insert a new word in the stack


9

7

$sp


8

li $t2, 9

sw $t2 ($sp)

Insert the content of register $t2 in the stack

POP operation in MIPS

9

7

$sp


8

lw $t2 ($sp)

Copy in $t2 the first element of the stack (9)

POP operation in MIPS

9

7$sp


8

addu $sp, $sp, 4

Update the stack pointer to point to the new top. The data (9) continues in memory but will be overwriten in future PUSH operations.

Stack

Consecutive PUSH and POP

push $a0

push $t1

push $t2

push $s2

...

pop $s2

pop $t2

pop $t1

pop $a0


Stack


push $a0push $t1push $t2push $s2

...

sub $sp $sp 4

sw $a0 ($sp)

sub $sp $sp 4

sw $t1 ($sp)

sub $sp $sp 4

sw $t2 ($sp)

sub $sp $sp 4

sw $s2 ($sp)

pop $s2pop $t2pop $t1pop $a0

...

lw $s2 ($sp)

add $sp $sp 4

lw $s2 ($sp)

add $sp $sp 4

lw $s2 ($sp)

add $sp $sp 4

lw $s2 ($sp)

add $sp $sp 4


Stack


push $a0push $t1push $t2push $s2

sub $sp $sp 16

sw $a0 12($sp)

sw $t1 8($sp)

sw $t2 4($sp)

sw $s2 ($sp)

...

pop $s2pop $t2pop $t1pop $a0

...

lw $s2 ($sp)

lw $t2 4($sp)

lw $t1 8($sp)

lw $a0 12($sp)

add $sp $sp 16


Example(1) Suppose a high level language code

256

int main() {int z;z=factorial(5);print_int(z);.



.

.

.}

r*=i;}return r;

}

Example(2) Analyze how to pass the arguments

257

� Input parameters in MIPS are passed in $a0, $a1, $a2 y $a3� Output parameters are returned in $v0, $v1

� In z=factorial(5);� Input parameter in $a0


� Input parameter in $a0� Result in $v0

Example(3) Translate to assembly language

258

int main() {int z;z=factorial(5);print_int(z);. . .

}

li $a0, 5 # argumentjal factorial # function callmove $a0, $v0 # resultli $v0, 1 syscall # system call

# to print an int

Input parameter in $a0

Result in $v0


} # to print an int...


r*=i;}return r;

}

factorial: li $s1, 1 #s1 for rli $s0, 1 #s0 for i

loop: bgt $s0, $a0 , endmul $s1, $s1, $s0addi $s0, $s0, 1b loop

end: move $v0 , $s1 #resultjr $ra

Example(4) Analyze the registers modified

259


r*=i;

factorial: li $s1 , 1 #s1 forrli $s0 , 1 #s0 for i

loop: bgt $s0, $a0, endmul $s1, $s1, $s0addi $s0, $s0, 1b loop


r*=i;}return r;

}

b loopend: move $v0, $s1 #result

jr $ra

� The function uses (modifies) registers $s0 and $s1� If this registers are modified, the caller function (main) can be affected� Then, factorial function must store this registers in the stack at the beginning and restore them at the end

Example(5) Store registers in stack

260


r*=i;

factorial: sub $sp, $sp, 8sw $s0, 4($sp)sw $s1, ($sp)li $s1, 1 #s1 for rli $s0, 1 #s0 fori

loop : bgt $s0, $a0, end


r*=i;}return r;

}

loop : bgt $s0, $a0, endmul $s1, $s1, $s0addi $s0, $s0, 1b bucle

end: move $v0, $s1 #resultlw $s1, ($sp)lw $s0, 4($sp)add $sp, $sp, 8jr $ra

Is not necessary to store $ra in stack, Function is terminal

Registers $s0 and $s1 are stored in the stack

If we had used $t0 and $t1, it would not have need to copy $t0 and $t1 in thestack (temporary registers)

Example 2

261

int main() {

int z;

z=f1(5, 2);

int f1 (int a, int b) {

int r;

r = a + a + f2(b);return r;


print_int(z);}

}

int f2(int c){

int s;

s = c * c * c;return s;

}

Example 2. Call

262

int main() {

int z;

z=f1(5, 2);

li $a0, 5 # first argumentli $a1, 2 # second argumentjal f1 # callmove $a0, $v0 # resultli $v0, 1 syscall # systam call


print_int(z);}

syscall # systam call# to print an int

Parameters are passed in $a0 and $a1

Result is returned in $v0

Example 2. function f1263


int r;


f1: add $s0, $a0, $a0

move $a0, $a1 jal f2add $v0, $s0, $v0

jr $ra


}

int f2(int c){

int s;


}

Example 2. Analyze registers modified in f1

264


int r;


f1: add $s0, $a0, $a0

move $a0, $a1 jal f2add $v0, $s0, $v0

jr $ra


}

int f2(int c){

int s;


}

F1 modifies $s0 and $ra, then store them in the stack

Register $ra is modified in instruction jal f2

Register $a0 is modified to pass the argument to function f2

Example 2. Storing registers in the stack

265


int r;


f1: sub $sp, $sp, 12sw $s0, 8($sp)sw $a0, 4($sp)sw $ra, ($sp)

add $s0, $a0, $a0

move $a0, $a1 jal f2


}

int f2(int c){

int s;


}

jal f2add $v0, $s0, $v0

lw $ra, ($sp)lw $a0, 4($sp)lw $s0, 8($sp)add $sp, $sp, 12jr $ra

Example 2. function f2

266


int r;

r = a + a + f2(b);return r; f2: mul $t0 , $a0, $a0


}

int f2(int c){

int s;


}

f2: mul $t0 , $a0, $a0mul $t0, $t0, $a0jr $ra

Function f2 does not modify register $ra because is terminal

Register $t0 is not stored in stack because this type of register is temporary and its value does not need be preserved

Types of functions

� Terminal function.� Does not call other functions.

� Not terminal function.� Call other functions.

267


Procedure activation

Stack frame

� The stack frame is the mechanism used by compilers to activate the procedures/functions.

� The stack frame is built in the stack by the caller (the calling program) and the callee (procedure called)

� The stack frame is managed with two registers:� The stack frame is managed with two registers:� $sp : stack pointer, that points to the top of the stack� $fp : stack frame pointer, that points to the first word of the

frame of a procedure� The stack frame pointer ($fp ) is used in the callee procedure

to: � Access the parameters passed in the stack� Access the local variables of the procedure


Stack frame

� The stack frame stores:� Parameters passed by the caller procedure� The stack frame pointer of the caller procedure� Registers saved by the procedure ($ra in not

terminal procedures)


terminal procedures)� Local variables

Stack frame

$sp

$fp

Registers saved by

The caller

Local variables of the

Calle procedure

Low addresses


Stack growing

Arguments of the calle

Old $fp

$fp The caller

High address

Access to parameters and local variables

using the stack frame

int f (int n1, n2, n3, n4, n5, n6)

{int v[4];int k;

for (k= 0; k <3; k++)v[i] = n1+n2+n3+n4+n5+n6;

Stack

Low addresses

return (v[1]);

}

� Arguments n1 , n2 , n3 y n4 are passed:� In $a0 , $a1 , $a2 , $a3

� Arguments n5 , n6 are passed:� In the stack


$sp

growing

High addresses

Argument n5

Argument n6



$sp

$fp v[3]

v[2]

v[1]

v[0]

int f (int n1, n2, n3, n4, n5, n6)

{int v[4];int k;

for (k= 0; k <3; k++)v[i] = n1+n2+n3+n4+n5+n6;

Stack

Low addresses


$fp

old $fp

v[3]

Argument n5

Argument n6

return (v[1]);

}

� Once invoked, f must reserve in the stack frame space for local variables that cannot be stored in registers (v in this example)

growing

High addresses



$sp

$fp v[3]

v[2]

v[1]

v[0]

int f (int n1, n2, n3, n4, n5, n6)

{int v[4];int k;

for (k= 0; k <3; k++)v[i] = n1+n2+n3+n4+n5+n6;

Stack

Low addresses


$fp v[3]return (v[1]);

}

� The value of n1 is in $a0� The value of n5 is in 4($fp)� The value of n6 is in 8($fp)� The value ofv[3] is in -4($fp)� The value ofv[0] is in -16($fp)

growing

High addresses

old $fp

Argument n5

Argument n6

Parameters passing convention

� Convention that describes:� The usage of registers (general and FPU)� The usage of stack� Actions to be taken in caller/callee procedures

� Different compilers use different convections

274

� Different compilers use different convections� ABI � Application Binary Interface.


MIPS register usage conventions

Register Use Preserve the value

$v0-$v1 Results No

$a0..$a3 Arguments Yes

$t0..$t9 Temporary No


$s0..$s7 Saved Yes

$sp Stack pointer Yes

$fp Stack frame pointer Yes

$ra Return address Yes

Subroutines step by step

Caller subroutine Calle subroutine

Save the registers not preserved across the call

Pass the arguments

Make the call

Reserve the stack frame

Saved registers

Execute the subroutine

Restore registers previously saved

Free the stack frame

Return

Restore the registers previousy saved


276

Save registers

Caller subroutine

� A subroutine can modify registers $t� Before to invoke

other subroutine, these registers must

277

Registers $t

Stackthese registers must be saved in stack


Stack

subu $sp, $sp, 8sw $t0,($sp)sw $t1, 4($sp)

jal function

lw $t1, 4($sp)lw $t0, ($sp)addu $sp, $sp, 8

Parameters passing

Caller subroutine

� First arguments are passed in registers:� $a0 , $a1 , $a2 , $a3� $f12 , $f14 (floating point)� Rest of parameters use the stack

278


Passing 2 parameters

279

Registers $t

Registers bank

Argument 1Argument 2Argument 3Argument 4

$a0

$a1

$a2

$a3


stackli $a0, 5 // param 1li $a1, 8 // param 2

jal func

addu $sp, $sp, 16

Passing 6 parameters

280

Registers $t

Registers bank

Argument 1Argument 2Argument 3Argument 4

Argument 6Argument 5

$a0

$a1

$a2

$a3


Registers $t

stack

li $a0, 5 // param 1li $a1, 8 // param 2li $a2, 7 // param 3li $a3, 9 // param 4

subu $sp, $sp, 8li $t0, 10 // param 6sw $t0, 4($sp)li $t0, 7s2 $t0, ($sp) // param 5

jal func

addu $sp, $sp, 8

Calling the subroutine

caller subroutine

� “Jump and link”instruction� jal label� bal label� bltzal $reg, label� bgezal $reg, label� jalr $reg

281

� jalr $reg� jalr $reg, $reg


Reserve of the stack frame

Callee subroutine

� The callee subroutine saves in stack:� Old $fp� Registers saved by the function

� Registers $s that are modified.

� Register $ra in not terminal subroutines.

282

Register $ra in not terminal subroutines.

� Local variables

� To reserve the stack frame, subtract the size to the stack pointer


Subroutine execution

� The subroutine store the return values in:� Usually in registers $v0 and $v1� For floating point$f0 y $f2 .� Other return values in stack

283


Finally

� Callee subroutine:� Restore the saved values

� Free the stack frame� Add to $sp the stack frame size

� $sp = $fp

284

� $sp = $fp

� Restore the value of $fp

� Return to caller subroutine� jr $ra

� Caller subroutine:� Restore values saved previously in stack


Example: factorial

int factorial ( int a )

{

if (a < 2) then

return 1 ;

return a * factorial(a-1) ;

}

factorial(a=4)

(a < 2) ?

6 * 4

factorial(a=3)

(a < 2) ?


}

void main () {

int result;

result=factorial(4) ;

printf(“f(4)=%d”,result);

}

(a < 2) ?

2 * 3

factorial(a=2)

(a < 2) ?

1 * 2

factorial(a=1)

(a < 2) ?

Example: factorial

Before the callLow addresses

Computer Structure 286

$sp

High addresses

ARCOS

Example: factorial

$sp

factorial:

# frame stacksubu $sp $sp 12 sw $ra 4($sp)sw $fp 8($sp)addu $fp $sp 8

Low addresses


$fp

$fp (old)

$ra

ARCOS

High addresses

Example: factorial

$sp

factorial:

# stack framesubu $sp $sp 12 sw $ra 4($sp)sw $fp 8($sp)addu $fp $sp 8

bge $a0 2 b_elseli $v0 1

Low addresses


$fp

$fp (old)

$ra

$a0li $v0 1 b b_efs

b_else: sw $a0 -8($fp)addi $a0 $a0 -1jal factoriallw $v1 -8($fp)mul $v0 $v0 $v1

ARCOS

High addresses

Example: factorial

factorial:

# frame stacksubu $sp $sp 12 sw $ra 4($sp)sw $fp 8($sp)addu $fp $sp 8

bge $a0 2 b_elseli $v0 1

Low addresses


$sp $fp (antiguo)

$ra

$a0li $v0 1 b b_efs

b_else: sw $a0 -8($fp)addi $a0 $a0 -1jal factoriallw $v1 -8($fp)mul $v0 $v0 $v1

# end frame stackb_efs: lw $ra 4($sp)

lw $fp ($fp)addu $sp $sp 12jr $ra

ARCOS

High addresses

O32 convention (MIPS)

� First argument are passed in registers� $a0, $a1, $a2, $a3� $f12, $f14 (floating point)� Rest of the arguments in the stack

� Always a “hole” must be reserved in the stack for arguments: � Always a “hole” must be reserved in the stack for arguments: (are not copied, only the hole is reserved)� This space is used if function calls other function

� To reserve the frame stack, subtract the size to the stack pointer� Must be multiple of 8 (by convention)


O32 convention. Passing 2 arguments

291

Spacefor $a3Space for $a2Space for $a1Space for $a0

Registers bank

Argument 1Argument 2Argument 3Argument4

$a0

$a1

$a2

$a3


Registers $t

Spacefor $a3 Argument4$a3

pila

Translation and execution of programs

� Elements involved in the translation and execution of programs:� Compiler � Assembler� Linker� Linker� Loader


Compiled code versus interpreted

� Compiled code:� Programs are translated to machine code by the compiler

� Code directly executed by the computer� More efficient

� Interpreted code:� An interpreterr is a program that executes other programs� An interpreterr is a program that executes other programs� An interpreter executes a set of instruction machine independent. � Example: Java is translated to byte codethat is execute by the

interpreter (Java Virtual Machine)� Generally easier to write interpreter. More portability


Translation and execution steps (C program)

compiler

C program

Assembly program


Assembler

Objet: Module in machine language Objet: liraries in machine language

Linker

Executable: program in mahcine language

LoaderMemory

Compiler

� Input: High level language (C, C++, …)� Output: Code in assembly language� Can contain pseudoinstructions� A pseudoinstructionis an instruction that understands the

assembler but not the machineassembler but not the machine� move $t1, $t2 ⇒ or $t1, $t2, $zero


Assembler

� Input: Assembly language code� Output: Object code in machine language� The assembler converts pseudoinstructions in machine

instructions� Analyze the sentences in assembly language independently, � Analyze the sentences in assembly language independently,

sentence to sentence� Produce an object file(.o)


Assembly sentences analysis

� Check the correctness of instructions (operation code, operands, valid addressing,…)

� Check if the sentence has a label. If sentence has a label, check if the symbolic label is not repeated and assign a value corresponding to the memory position that will have corresponding to the memory position that will have

� Build a symbol tablewith all symbolic labels� In a first phase the assembler records in its symbol table the

name of the label and the address of the memory word that the instruction occupies.

� In a second phase all labels are resolved


Format of an object file

� File header. Describes the size and position of each element inside the file

� Text segment: Includes the machine instructions� Data segment: Include the data of global variables� Relocation information: identifies instructions and data words � Relocation information: identifies instructions and data words

that depend on absolute addresses. These references must change if portions of the program are moved in memory.

� Every label of j or jal (internal or external)� Addresses of data

� Symbol table: label not defined (external references)� Debugging information. Allows to associate machine

instruction to C code and how to interpret data structures


Linker

� Input: Object code files� Output: executable file� Combines several objet files (.o) into a single executable file� Resolves all references (branch instructions and addresses of

data)data)� The linker assumes that the first word of the text segment is in

the address 0x00000000� Enables separate compilation of files

� Changes to one file do not require recompilation of whole program

� Allow the use of libraries (.a)


Linker

.o file 1text 1

data 1

info 1Linker

a.out

Relocated text 1

Relocated text 2


.o file 2text 2

data 2

info 2

Relocated data 1

Relocated data 2

Format of an executable file

� Header. Describes the size and position of each element inside the file. Includes the start address of the program

� Text segment: contains the machine code� Data segment: Includes the data of global variables with initial

values defined values defined � Relocation information: when dynamic libraries are used


Loader

� Reads an executable file (a.out) and load it in memory

Operating System

Mainmemory

Disk


Code

Data

Stack

Program

Executable file

Loader

� Belongs to the operating system� Reads the header of the executable in order to obtain the size

of segments� Builds a new space in memory to allocate the code, data, and

stack segmentsstack segments� Copies the instructions and data with initial values from disk

to memory� Copies the arguments passed to the program in the stack� Initializes the registers. Set the PC and stack


Libraries

� A library is a set of related objects� The object modules can include references to symbols defined

in libraries (function or exported variables)� The system libraries are a set of predefined libraries that offer

services to applications.services to applications.� Types:

� Static libraries: are linked with objects to produce an executable that include all references resolved. A change in the library implies to link and generate the executable again

� Dynamic libraries (DLL, dynamically linked library)


Dynamic libraries

� The library routines are not linked into the executable file and are loaded when the program is loaded in memory

� The program includes information to locate the libraries and to resolve the external references during the execution

� Advantages:� Advantages:� Smaller executables� Only the elements used are loaded� A change in the library does not affect the executable file. Is

not necessary to re compilate the code


Example

C ⇒⇒⇒⇒ ASM⇒⇒⇒⇒ ΟΟΟΟbj⇒⇒⇒⇒ Exe⇒⇒⇒⇒ execution

Program C: example

#include <stdio.h>int main (int argc, char *argv[]) {

int i , sum = 0;


int i , sum = 0;for (i = 1; i <= 10; i++)

sum = sum + i + i;

printf (“The sum 1 + ... +10 is %d\n", sum);}

printf() : library function in libc.a

Compilation

.text

.align 2

.globl mainmain:

subu $sp,$sp,24sw $ra, 20($sp)sw $a0, 4($sp)

end:la $a0, strli $a1, $t1jal printfmove $v0, $0lw $ra, 20($sp)lw $a0, 4($sp)


sw $a0, 4($sp)sw $a1, 8($sp)

li $t0, 0li $t1, 0

loop:bgt $t0, 10, endadd $t1, $t1, $t0addi $t0, $t0, 1b loop

lw $a0, 4($sp)lw $a1, 8($sp)addiu $sp,$sp,24jr $ra.data.align 0

str:.asciiz "The sum 1 + ... +10 is %d\n "

Compilation

.text

.align 2

.globl mainmain:

subu $sp,$sp,24sw $ra, 20($sp)sw $a0, 4($sp)

end:la $a0, strli $a1, $t1jal printfmove $v0, $0lw $ra, 20($sp)lw $a0, 4($sp)


7 pseudo-instructiones

sw $a0, 4($sp)sw $a1, 8($sp)

li $t0, 0li $t1, 0

loop:bgt $t0, 10, endadd $t1, $t1, $t0addi $t0, $t0, 1b end

lw $a0, 4($sp)lw $a1, 8($sp)addiu $sp,$sp,24jr $ra.data.align 0

str:.asciiz "The sum 1 + ... +10 is %d\n "

Compilation

Elimination of pseudoinstructions

.text

.align 2

.globl mainmain:

addiu $29,$29,-24sw $31, 20($29)sw $4, 4($29)

end:lui $4, l.strori $4, $4, r.straddu $4, $0, $9jal printfaddu $2, $0, $0lw $31, 20($29)


sw $4, 4($29)sw $5, 8($29)ori $8, $0, 0ori $9, $0, 0

loop:slti $1, $8, 11beq $1, $0, endadd $9, $9, $8addi $8, $8, 1bgez $0, loop

lw $31, 20($29)lw $4, 4($29)lw $5, 8($29)addiu $29,$29,24jr $31

Compilation

Assign addresses

00 addiu $29,$29,-2404 sw $31, 20($29)08 sw $4, 4($29)0c sw $5, 8($29)10 ori $8, $0, 014 ori $9, $0, 018 slti $1, $8, 11

2c lui $4, l.str30 ori $4, $4, r.str34 addu $4, $0, $938 jal printf3c addu $2, $0, $040 lw $31, 20($29)44 lw $4, 4($29)


18 slti $1, $8, 111c beq $1, $0, end20 add $9, $9, $824 addi $8, $8, 128 bgez $0, loop

44 lw $4, 4($29)48 lw $5, 8($29)4c addiu $29,$29,2450 jr $31

Compilation

Create symbol table and relocation table

� Symbol table

Label address (in module) typemain: 0x00000000 global textbucle: 0x0000001c local textstr: 0x00000000 local data


� Relocation informationAddress Instr. type Dependency

0x0000002c lui l.str0x00000030 ori r.str 0x00000038 jal printf

Compilation

Resolve local PC-relative labels


2c lui $4, l.str30 ori $4, $4, r.str34 addu $4, $0, $938 jal printf3c addu $2, $0, $040 lw $31, 20($29)44 lw $4, 4($29)


18 slti $1, $8, 11 1c beq $1, $0, 320 add $9, $9, $824 addi $8, $8, 128 bgez $0, -4

44 lw $4, 4($29)48 lw $5, 8($29)4c addiu $29,$29,2450 jr $31

Text segment in object file

0x000000 001001111011110111111111111010000x000004 101011111011111100000000000101000x000008 101011111010010000000000000001000x00000c 101011111010010100000000000010000x000010 1000110100000000 00000000000000000x000014 101011010010000000000000000111000x000018 001010000010100000000000000010110x00001C 000100000010000000000000000000110x000020 000000010010100001001000001000000x000024 001000010000100000000000000000010x000028 00000100000000001111111111111100


0x000028 000001000000000011111111111111000x00002C 0011110000000100 00000000000000000x000030 0011010010000100 00000000000000000x000034 000000010010010000000000001000010x000038 000011 000000000000000000000000000x00003c 000000000000000000010000010000010x000040 100011111011111100000000000101000x000044 100011111010010000000000000001000x000048 100011111010010100000000000010000x00004c 000000111110000000000000000110000x000050 00000000000000001110100000001000

Link

� Combine example.o and libc.a� Create absolute memory addresses� Modify and merge symbol and relocation tables� Symbol Table

� Label Addressmain: 0x00000000Label Addressmain: 0x00000000loop: 0x0000001cstr: 0x10000430printf: 0x000003b0 …

� Relocation Information� Address Instr. Type Dependency

0x0000002c lui l.str0x00000030 ori r.str 0x00000038 jal printf …


Link

Resolve addresses


2c lui $4, 409630 ori $4, $4, 107234 addu $4, $0, $938 jal 8123c addu $2, $0, $040 lw $31, 20($29)44 lw $4, 4($29)


18 slti $1, $8, 11 1c beq $1, $0, 3 20 add $9, $9, $824 addi $8, $8, 128 bgez $0, -4

44 lw $4, 4($29)48 lw $5, 8($29)4c addiu $29,$29,2450 jr $31

Link

� Generation of executable file� Single text segment� Single data segment� Header with information of each segment


Computer Structure - UC3Mocw.uc3m.es/ingenieria-informatica/computer-structure/unit3.pdf ·...

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